[PATCH] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

[PATCH] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

[Xi Ruoyao]

As the commit message of r14-4674 has indicated, if the assembler does
not support conditional branch relaxation, a relocation overflow may
happen on conditional branches when relaxation is enabled because the
number of NOP instructions inserted by the assembler will be more than
the number estimated by GCC.

To work around this issue, disable relaxation by default if the
assembler is detected incapable to perform conditional branch relaxation
at GCC build time.  We also need to pass -mno-relax to the assembler to
really disable relaxation.  But, if the assembler does not support
-mrelax option at all, we should not pass -mno-relax to the assembler or
it will immediately error out.  Also handle this with the build time
assembler capability probing, and add a pair of options
-m[no-]pass-mrelax-to-as to allow using a different assembler from the
build-time one.

With this change, if GCC is built with GAS 2.41, relaxation will be
disabled by default.  So the default value of -mexplicit-relocs= is also
changed to 'always' if -mno-relax is specified or implied by the
build-time default, because using assembler macros for symbol addresses
produces no benefit when relaxation is disabled.

gcc/ChangeLog:

	PR target/112330
	* config/loongarch/genopts/loongarch.opt.in: Add
	-m[no]-pass-relax-to-as.  Change the default of -m[no]-relax to
	account conditional branch relaxation support status.
	* config/loongarch/loongarch.opt: Regenerate.
	* configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
	the assembler supports conditional branch relaxation.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/loongarch/loongarch-opts.h
	(HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
	* config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
	Define.
	(ASM_MRELAX_SPEC): Define.
	(ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
	* config/loongarch/loongarch.cc: Take the setting of
	-m[no-]relax into account when determining the default of
	-mexplicit-relocs=.
	* doc/invoke.texi: Document -m[no-]relax and
	-m[no-]pass-mrelax-to-as for LoongArch.  Update the default
	value of -mexplicit-relocs=.
---

Bootstrapped and regtested on loongarch64-linux-gnu twice: once with
Binutils 2.41, another with Binutils 2.41.50.20231105.  With Binutils
2.41.50.20231105 there is a regression: the compilation of
c-c++-common/asan/pr59063-2.c timeouts.  My diagnostic has shown that
the timeout was caused by the linker (it seemed running indefinitely),
so it's more likely a Binutils regression rather than GCC regression
and I'll leave this for Qinggang.

Ok for trunk?

 gcc/config.in                                 |  6 +++
 gcc/config/loongarch/genopts/loongarch.opt.in |  6 ++-
 gcc/config/loongarch/loongarch-driver.h       | 16 +++++++-
 gcc/config/loongarch/loongarch-opts.h         |  4 ++
 gcc/config/loongarch/loongarch.cc             |  2 +-
 gcc/config/loongarch/loongarch.opt            |  6 ++-
 gcc/configure                                 | 39 ++++++++++++++++++-
 gcc/configure.ac                              | 10 +++++
 gcc/doc/invoke.texi                           | 36 +++++++++++++----
 9 files changed, 111 insertions(+), 14 deletions(-)

diff --git a/gcc/config.in b/gcc/config.in
index 03faee1c6ac..7728e53ca1f 100644
--- a/gcc/config.in
+++ b/gcc/config.in
@@ -386,6 +386,12 @@
 #endif
 
 
+/* Define if your assembler supports conditional branch relaxation. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_COND_BRANCH_RELAXATION
+#endif
+
+
 /* Define if your assembler supports the --debug-prefix-map option. */
 #ifndef USED_FOR_TARGET
 #undef HAVE_AS_DEBUG_PREFIX_MAP
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in
index e1fe0c7086e..158701d327a 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -223,10 +223,14 @@ Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0)
 Avoid using the GOT to access external symbols.
 
 mrelax
-Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION)
+Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
 Take advantage of linker relaxations to reduce the number of instructions
 required to materialize symbol addresses.
 
+mpass-mrelax-to-as
+Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION)
+Pass -mrelax or -mno-relax option to the assembler.
+
 -param=loongarch-vect-unroll-limit=
 Target Joined UInteger Var(loongarch_vect_unroll_limit) Init(6) IntegerRange(1, 64) Param
 Used to limit unroll factor which indicates how much the autovectorizer may
diff --git a/gcc/config/loongarch/loongarch-driver.h b/gcc/config/loongarch/loongarch-driver.h
index d859afcc9fe..20d233cc938 100644
--- a/gcc/config/loongarch/loongarch-driver.h
+++ b/gcc/config/loongarch/loongarch-driver.h
@@ -51,9 +51,23 @@ along with GCC; see the file COPYING3.  If not see
   "%{G*} %{,ada:-gnatea %{mabi=*} -gnatez} " \
   "%(subtarget_cc1_spec)"
 
+#if HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION
+#define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mrelax}}"
+#else
+#define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mno-relax}}"
+#endif
+
+#if HAVE_AS_MRELAX_OPTION
+#define ASM_MRELAX_SPEC \
+  "%{!mno-pass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}"
+#else
+#define ASM_MRELAX_SPEC \
+  "%{mpass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}"
+#endif
+
 #undef ASM_SPEC
 #define ASM_SPEC \
-  "%{mabi=*} %{mno-relax} %(subtarget_asm_spec)"
+  "%{mabi=*} " ASM_MRELAX_SPEC " %(subtarget_asm_spec)"
 
 
 extern const char*
diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h
index f204828015e..8de41bbc4f7 100644
--- a/gcc/config/loongarch/loongarch-opts.h
+++ b/gcc/config/loongarch/loongarch-opts.h
@@ -101,6 +101,10 @@ loongarch_update_gcc_opt_status (struct loongarch_target *target,
 #define HAVE_AS_MRELAX_OPTION 0
 #endif
 
+#ifndef HAVE_AS_COND_BRANCH_RELAXATION
+#define HAVE_AS_COND_BRANCH_RELAXATION 0
+#endif
+
 #ifndef HAVE_AS_TLS
 #define HAVE_AS_TLS 0
 #endif
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index c782f571abc..9b63f0dc322 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7432,7 +7432,7 @@ loongarch_option_override_internal (struct gcc_options *opts,
 
   if (la_opt_explicit_relocs == M_OPT_UNSET)
     la_opt_explicit_relocs = (HAVE_AS_EXPLICIT_RELOCS
-			      ? (HAVE_AS_MRELAX_OPTION
+			      ? (loongarch_mrelax
 				 ? EXPLICIT_RELOCS_AUTO
 				 : EXPLICIT_RELOCS_ALWAYS)
 			      : EXPLICIT_RELOCS_NONE);
diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt
index 02946608327..a5988411fbb 100644
--- a/gcc/config/loongarch/loongarch.opt
+++ b/gcc/config/loongarch/loongarch.opt
@@ -230,10 +230,14 @@ Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0)
 Avoid using the GOT to access external symbols.
 
 mrelax
-Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION)
+Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
 Take advantage of linker relaxations to reduce the number of instructions
 required to materialize symbol addresses.
 
+mpass-mrelax-to-as
+Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION)
+Pass -mrelax or -mno-relax option to the assembler.
+
 -param=loongarch-vect-unroll-limit=
 Target Joined UInteger Var(loongarch_vect_unroll_limit) Init(6) IntegerRange(1, 64) Param
 Used to limit unroll factor which indicates how much the autovectorizer may
diff --git a/gcc/configure b/gcc/configure
index d4ad988000f..0444645edd5 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -20000,7 +20000,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 19995 "configure"
+#line 20003 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -20106,7 +20106,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 20101 "configure"
+#line 20109 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -29371,6 +29371,41 @@ if test $gcc_cv_as_loongarch_relax = yes; then
 
 $as_echo "#define HAVE_AS_MRELAX_OPTION 1" >>confdefs.h
 
+fi
+
+    { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for conditional branch relaxation support" >&5
+$as_echo_n "checking assembler for conditional branch relaxation support... " >&6; }
+if ${gcc_cv_as_loongarch_cond_branch_relax+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  gcc_cv_as_loongarch_cond_branch_relax=no
+  if test x$gcc_cv_as != x; then
+    $as_echo 'a:
+       .rept 32769
+       nop
+       .endr
+       beq $a0,$a1,a' > conftest.s
+    if { ac_try='$gcc_cv_as $gcc_cv_as_flags  -o conftest.o conftest.s >&5'
+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }
+    then
+	gcc_cv_as_loongarch_cond_branch_relax=yes
+    else
+      echo "configure: failed program was" >&5
+      cat conftest.s >&5
+    fi
+    rm -f conftest.o conftest.s
+  fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_cond_branch_relax" >&5
+$as_echo "$gcc_cv_as_loongarch_cond_branch_relax" >&6; }
+if test $gcc_cv_as_loongarch_cond_branch_relax = yes; then
+
+$as_echo "#define HAVE_AS_COND_BRANCH_RELAXATION 1" >>confdefs.h
+
 fi
 
     ;;
diff --git a/gcc/configure.ac b/gcc/configure.ac
index dc8cb6a33de..484864ae5d2 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -5436,6 +5436,16 @@ x:
       [-mrelax], [.text],,
       [AC_DEFINE(HAVE_AS_MRELAX_OPTION, 1,
 		[Define if your assembler supports -mrelax option.])])
+    gcc_GAS_CHECK_FEATURE([conditional branch relaxation support],
+      gcc_cv_as_loongarch_cond_branch_relax,
+      [],
+      [a:
+       .rept 32769
+       nop
+       .endr
+       beq $a0,$a1,a],,
+      [AC_DEFINE(HAVE_AS_COND_BRANCH_RELAXATION, 1,
+		[Define if your assembler supports conditional branch relaxation.])])
     ;;
     s390*-*-*)
     gcc_GAS_CHECK_FEATURE([.gnu_attribute support],
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 6e776a0faa1..d605987d22c 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1044,7 +1044,7 @@ Objective-C and Objective-C++ Dialects}.
 -mmax-inline-memcpy-size=@var{n}
 -mexplicit-relocs=@var{style} -mexplicit-relocs -mno-explicit-relocs
 -mdirect-extern-access -mno-direct-extern-access
--mcmodel=@var{code-model}}
+-mcmodel=@var{code-model} -mrelax -mpass-mrelax-to-as}
 
 @emph{M32R/D Options}
 @gccoptlist{-m32r2  -m32rx  -m32r
@@ -26334,16 +26334,14 @@ with @option{-mexplicit-relocs=always} the assembler relocation operators
 are always used, with @option{-mexplicit-relocs=auto} the compiler will
 use the relocation operators where the linker relaxation is impossible to
 improve the code quality, and macros elsewhere.  The default
-value for the option is determined during GCC build-time by detecting
-corresponding assembler support:
+value for the option is determined with the assembler capability detected
+during GCC build-time and the setting of @option{-mrelax}:
 @option{-mexplicit-relocs=none} if the assembler does not support
 relocation operators at all,
 @option{-mexplicit-relocs=always} if the assembler supports relocation
-operators but does not support relaxation,
-@option{-mexplicit-relocs=auto} if the assembler supports both relocation
-operators and relaxation.  This option is mostly useful for
-debugging, or interoperation with assemblers different from the build-time
-one.
+operators but @option{-mrelax} is not enabled,
+@option{-mexplicit-relocs=auto} if the assembler supports relocation
+operators and @option{-mrelax} is enabled.
 
 @opindex mexplicit-relocs
 @item -mexplicit-relocs
@@ -26367,6 +26365,28 @@ kernels, executables linked with @option{-static} or @option{-static-pie}.
 @option{-mdirect-extern-access} is not compatible with @option{-fPIC} or
 @option{-fpic}.
 
+@item -mrelax
+@itemx -mno-relax
+Take (do not take) advantage of linker relaxations.  If
+@option{-mpass-mrelax-to-as} is enabled, this option is also passed to
+the assembler.  The default is determined during GCC build-time by
+detecting corresponding assembler support:
+@option{-mrelax} if the assembler supports both the @option{-mrelax}
+option and the conditional branch relaxation (it's required or the
+@code{.align} directives and conditional branch instructions in the
+assembly code outputted by GCC may be rejected by the assembler because
+of a relocation overflow), @option{-mno-relax} otherwise.
+
+@item -mpass-mrelax-to-as
+@itemx -mno-pass-mrelax-to-as
+Pass (do not pass) the @option{-mrelax} or @option{-mno-relax} option
+to the assembler.  The default is determined during GCC build-time by
+detecting corresponding assembler support:
+@option{-mpass-mrelax-to-as} if the assembler supports the
+@option{-mrelax} option, @option{-mno-pass-mrelax-to-as} otherwise.
+This option is mostly useful for debugging, or interoperation with
+assemblers different from the build-time one.
+
 @item loongarch-vect-unroll-limit
 The vectorizer will use available tuning information to determine whether it
 would be beneficial to unroll the main vectorized loop and by how much.  This
-- 
2.42.1

Re: [PATCH] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

[Xi Ruoyao]

Ping.  I've tested this with Binutils 2.41 and 2.41.50.202311xx several
times so it should be OK.

On Mon, 2023-11-06 at 15:50 +0800, Xi Ruoyao wrote:

/* snip */

> Bootstrapped and regtested on loongarch64-linux-gnu twice: once with
> Binutils 2.41, another with Binutils 2.41.50.20231105.  With Binutils
> 2.41.50.20231105 there is a regression: the compilation of
> c-c++-common/asan/pr59063-2.c timeouts.  My diagnostic has shown that
> the timeout was caused by the linker (it seemed running indefinitely),

Update on this: it does not run indefinitely but very slow, so it can
timeout (esp. when running the full test suite with -j32 on a 3C5000).

> Ok for trunk?

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

Re: [PATCH] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330]

[chenglulu]

在 2023/11/14 下午4:50, Xi Ruoyao 写道:
> Ping.  I've tested this with Binutils 2.41 and 2.41.50.202311xx several
> times so it should be OK.
>
> On Mon, 2023-11-06 at 15:50 +0800, Xi Ruoyao wrote:
>
> /* snip */
>
>> Bootstrapped and regtested on loongarch64-linux-gnu twice: once with
>> Binutils 2.41, another with Binutils 2.41.50.20231105.  With Binutils
>> 2.41.50.20231105 there is a regression: the compilation of
>> c-c++-common/asan/pr59063-2.c timeouts.  My diagnostic has shown that
>> the timeout was caused by the linker (it seemed running indefinitely),
> Update on this: it does not run indefinitely but very slow, so it can
> timeout (esp. when running the full test suite with -j32 on a 3C5000).
>
>> Ok for trunk?
OK, thanks!