From: Lulu Cheng <chenglulu@loongson.cn>
To: gcc-patches@gcc.gnu.org
Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn,
Lulu Cheng <chenglulu@loongson.cn>
Subject: [PATCH v5 3/5] LoongArch: Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
Date: Mon, 29 Jan 2024 16:21:59 +0800 [thread overview]
Message-ID: <20240129082201.26087-4-chenglulu@loongson.cn> (raw)
In-Reply-To: <20240129082201.26087-1-chenglulu@loongson.cn>
Binutils does not support relaxation using four instructions to obtain
symbol addresses
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
When the code model of the symbol is extreme and -mexplicit-relocs=auto,
the macro instruction loading symbol address is not applicable.
(loongarch_call_tls_get_addr): Adjust code.
(loongarch_legitimize_tls_address): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c: New test.
* gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c: New test.
---
gcc/config/loongarch/loongarch.cc | 19 +++++++++----------
.../explicit-relocs-extreme-auto-tls-ld-gd.c | 5 +++++
.../explicit-relocs-medium-auto-tls-ld-gd.c | 5 +++++
3 files changed, 19 insertions(+), 10 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index a0c14f908a8..684ae81870c 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -1971,6 +1971,10 @@ loongarch_explicit_relocs_p (enum loongarch_symbol_type type)
if (la_opt_explicit_relocs != EXPLICIT_RELOCS_AUTO)
return la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS;
+ /* The linker don't know how to relax accesses in extreme code model. */
+ if (loongarch_symbol_extreme_p (type))
+ return true;
+
switch (type)
{
case SYMBOL_TLS_IE:
@@ -1982,11 +1986,6 @@ loongarch_explicit_relocs_p (enum loongarch_symbol_type type)
does not relax 64-bit pc-relative accesses as at now. */
return true;
case SYMBOL_GOT_DISP:
- /* The linker don't know how to relax GOT accesses in extreme
- code model. */
- if (TARGET_CMODEL_EXTREME)
- return true;
-
/* If we are performing LTO for a final link, and we have the
linker plugin so we know the resolution of the symbols, then
all GOT references are binding to external symbols or
@@ -2776,7 +2775,7 @@ loongarch_call_tls_get_addr (rtx sym, enum loongarch_symbol_type type, rtx v0)
start_sequence ();
- if (la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS)
+ if (loongarch_explicit_relocs_p (type))
{
/* Split tls symbol to high and low. */
rtx high = gen_rtx_HIGH (Pmode, copy_rtx (loc));
@@ -2809,7 +2808,7 @@ loongarch_call_tls_get_addr (rtx sym, enum loongarch_symbol_type type, rtx v0)
case CMODEL_MEDIUM:
{
rtx reg = gen_reg_rtx (Pmode);
- if (TARGET_EXPLICIT_RELOCS)
+ if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
{
emit_insn (gen_pcalau12i (Pmode, reg, loongarch_tls_symbol));
rtx call = gen_call_value_internal_1 (Pmode, v0, reg,
@@ -2845,7 +2844,7 @@ loongarch_call_tls_get_addr (rtx sym, enum loongarch_symbol_type type, rtx v0)
case CMODEL_NORMAL:
case CMODEL_MEDIUM:
{
- if (TARGET_EXPLICIT_RELOCS)
+ if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP))
{
rtx high = gen_reg_rtx (Pmode);
loongarch_emit_move (high,
@@ -2939,7 +2938,7 @@ loongarch_legitimize_tls_address (rtx loc)
tmp1 = gen_reg_rtx (Pmode);
tmp2 = loongarch_unspec_address (loc, SYMBOL_TLS_IE);
dest = gen_reg_rtx (Pmode);
- if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+ if (loongarch_explicit_relocs_p (SYMBOL_TLS_IE))
{
tmp3 = gen_reg_rtx (Pmode);
rtx high = gen_rtx_HIGH (Pmode, copy_rtx (tmp2));
@@ -2996,7 +2995,7 @@ loongarch_legitimize_tls_address (rtx loc)
tmp2 = loongarch_unspec_address (loc, SYMBOL_TLS_LE);
dest = gen_reg_rtx (Pmode);
- if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+ if (loongarch_explicit_relocs_p (SYMBOL_TLS_LE))
{
tmp3 = gen_reg_rtx (Pmode);
rtx high = gen_rtx_HIGH (Pmode, copy_rtx (tmp2));
diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
new file mode 100644
index 00000000000..35bd4570a9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" } */
+/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } } */
+
+#include "./explicit-relocs-auto-tls-ld-gd.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c
new file mode 100644
index 00000000000..47bffae8af7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=medium -fplt" } */
+/* { dg-final { scan-assembler-not "la.global" { target tls_native } } } */
+
+#include "./explicit-relocs-auto-tls-ld-gd.c"
--
2.39.3
next prev parent reply other threads:[~2024-01-29 8:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 8:21 [PATCH v5 0/5] When cmodel=extreme, add macro implementation and fix problems with explicit relos implementation Lulu Cheng
2024-01-29 8:21 ` [PATCH v5 1/5] LoongArch: Merge template got_load_tls_{ld/gd/le/ie} Lulu Cheng
2024-01-29 8:21 ` [PATCH v5 2/5] LoongArch: Add the macro implementation of mcmodel=extreme Lulu Cheng
2024-01-29 8:21 ` Lulu Cheng [this message]
2024-01-29 8:22 ` [PATCH v5 4/5] LoongArch: Added support for loading __get_tls_addr symbol address using call36 Lulu Cheng
2024-01-29 8:22 ` [PATCH v5 5/5] LoongArch: Don't split the instructions containing relocs for extreme code model Lulu Cheng
2024-02-02 1:17 ` [pushed][PATCH v5 0/5] When cmodel=extreme, add macro implementation and fix problems with explicit relos implementation chenglulu
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