* [PATCH v2] testsuite: Add a test case for negating FP vectors containing zeros
@ 2024-02-29 7:09 Xi Ruoyao
2024-02-29 11:29 ` Xi Ruoyao
0 siblings, 1 reply; 2+ messages in thread
From: Xi Ruoyao @ 2024-02-29 7:09 UTC (permalink / raw)
To: gcc-patches; +Cc: Jeff Law, chenglulu, i, xuchenghua, YunQiang Su, Xi Ruoyao
Recently I've fixed two wrong FP vector negate implementation which
caused wrong sign bits in zeros in targets (r14-8786 and r14-8801). To
prevent a similar issue from happening again, add a test case.
Tested on x86_64 (with SSE2, AVX, AVX2, and AVX512F), AArch64, MIPS
(with MSA), LoongArch (with LSX and LASX).
gcc/testsuite:
* gcc.dg/vect/vect-neg-zero.c: New test.
---
v1->v2: Remove { dg-do run } which was likely triggering a SIGILL on
Linaro ARM CI.
Ok for trunk?
gcc/testsuite/gcc.dg/vect/vect-neg-zero.c | 38 +++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/vect/vect-neg-zero.c
diff --git a/gcc/testsuite/gcc.dg/vect/vect-neg-zero.c b/gcc/testsuite/gcc.dg/vect/vect-neg-zero.c
new file mode 100644
index 00000000000..6af4a02c517
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-neg-zero.c
@@ -0,0 +1,38 @@
+/* { dg-add-options ieee } */
+/* { dg-additional-options "-fsigned-zeros" } */
+
+double x[4] = {-0.0, 0.0, -0.0, 0.0};
+float y[8] = {-0.0, 0.0, -0.0, 0.0, -0.0, -0.0, 0.0, 0.0};
+
+static __attribute__ ((always_inline)) inline void
+test (int factor)
+{
+ double a[4];
+ float b[8];
+
+ asm ("" ::: "memory");
+
+ for (int i = 0; i < 2 * factor; i++)
+ a[i] = -x[i];
+
+ for (int i = 0; i < 4 * factor; i++)
+ b[i] = -y[i];
+
+#pragma GCC novector
+ for (int i = 0; i < 2 * factor; i++)
+ if (__builtin_signbit (a[i]) == __builtin_signbit (x[i]))
+ __builtin_abort ();
+
+#pragma GCC novector
+ for (int i = 0; i < 4 * factor; i++)
+ if (__builtin_signbit (b[i]) == __builtin_signbit (y[i]))
+ __builtin_abort ();
+}
+
+int
+main (void)
+{
+ test (1);
+ test (2);
+ return 0;
+}
--
2.44.0
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v2] testsuite: Add a test case for negating FP vectors containing zeros
2024-02-29 7:09 [PATCH v2] testsuite: Add a test case for negating FP vectors containing zeros Xi Ruoyao
@ 2024-02-29 11:29 ` Xi Ruoyao
0 siblings, 0 replies; 2+ messages in thread
From: Xi Ruoyao @ 2024-02-29 11:29 UTC (permalink / raw)
To: gcc-patches; +Cc: Jeff Law, chenglulu, i, xuchenghua, YunQiang Su
On Thu, 2024-02-29 at 15:09 +0800, Xi Ruoyao wrote:
> Recently I've fixed two wrong FP vector negate implementation which
> caused wrong sign bits in zeros in targets (r14-8786 and r14-8801). To
> prevent a similar issue from happening again, add a test case.
>
> Tested on x86_64 (with SSE2, AVX, AVX2, and AVX512F), AArch64, MIPS
> (with MSA), LoongArch (with LSX and LASX).
>
> gcc/testsuite:
>
> * gcc.dg/vect/vect-neg-zero.c: New test.
> ---
>
> v1->v2: Remove { dg-do run } which was likely triggering a SIGILL on
> Linaro ARM CI.
Oops, still failing ARM CI. Not sure why...
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 2+ messages in thread
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