* [PATCH] RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns
@ 2023-04-10 10:56 Lin Sinan
2023-04-10 14:55 ` Jeff Law
2023-04-18 18:27 ` Jeff Law
0 siblings, 2 replies; 3+ messages in thread
From: Lin Sinan @ 2023-04-10 10:56 UTC (permalink / raw)
To: gcc-patches; +Cc: shihua, philipp.tomsich, kito.cheng, jeffreyalaw, Sinan Lin
From: Sinan Lin <sinan.lin@linux.alibaba.com>
tell gcc that zbkb has these two spn to enable some optimizations. e.g.
1) the rrotate_expr could match to rotrm3 during expand; 2) hook up
__builtin_bswap64 with `rev8` in zbkb64.
---
gcc/config/riscv/bitmanip.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 7aa591689ba..3ed9f5d403a 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -297,7 +297,7 @@
[(set (match_operand:GPR 0 "register_operand")
(rotatert:GPR (match_operand:GPR 1 "register_operand")
(match_operand:QI 2 "arith_operand")))]
- "TARGET_ZBB || TARGET_XTHEADBB"
+ "TARGET_ZBB || TARGET_XTHEADBB || TARGET_ZBKB"
{
if (TARGET_XTHEADBB && !immediate_operand (operands[2], VOIDmode))
FAIL;
@@ -362,12 +362,12 @@
(define_expand "bswapdi2"
[(set (match_operand:DI 0 "register_operand")
(bswap:DI (match_operand:DI 1 "register_operand")))]
- "TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB)")
+ "TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB || TARGET_ZBKB)")
(define_expand "bswapsi2"
[(set (match_operand:SI 0 "register_operand")
(bswap:SI (match_operand:SI 1 "register_operand")))]
- "(!TARGET_64BIT && TARGET_ZBB) || TARGET_XTHEADBB")
+ "(!TARGET_64BIT && (TARGET_ZBB || TARGET_ZBKB)) || TARGET_XTHEADBB")
(define_insn "*bswap<mode>2"
[(set (match_operand:X 0 "register_operand" "=r")
--
2.19.1.6.gb485710b
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns
2023-04-10 10:56 [PATCH] RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns Lin Sinan
@ 2023-04-10 14:55 ` Jeff Law
2023-04-18 18:27 ` Jeff Law
1 sibling, 0 replies; 3+ messages in thread
From: Jeff Law @ 2023-04-10 14:55 UTC (permalink / raw)
To: Lin Sinan, gcc-patches; +Cc: shihua, philipp.tomsich, kito.cheng, Sinan Lin
On 4/10/23 04:56, Lin Sinan wrote:
> From: Sinan Lin <sinan.lin@linux.alibaba.com>
>
> tell gcc that zbkb has these two spn to enable some optimizations. e.g.
> 1) the rrotate_expr could match to rotrm3 during expand; 2) hook up
> __builtin_bswap64 with `rev8` in zbkb64.
> ---
> gcc/config/riscv/bitmanip.md | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Deferred to gcc-14 as the trunk is not currently open for development.
jeff
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns
2023-04-10 10:56 [PATCH] RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns Lin Sinan
2023-04-10 14:55 ` Jeff Law
@ 2023-04-18 18:27 ` Jeff Law
1 sibling, 0 replies; 3+ messages in thread
From: Jeff Law @ 2023-04-18 18:27 UTC (permalink / raw)
To: Lin Sinan, gcc-patches; +Cc: shihua, philipp.tomsich, kito.cheng, Sinan Lin
On 4/10/23 04:56, Lin Sinan wrote:
> From: Sinan Lin <sinan.lin@linux.alibaba.com>
>
> tell gcc that zbkb has these two spn to enable some optimizations. e.g.
> 1) the rrotate_expr could match to rotrm3 during expand; 2) hook up
> __builtin_bswap64 with `rev8` in zbkb64.
Thanks. I pushed this to the trunk.
jeff
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-04-10 10:56 [PATCH] RISC-V: add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and rotr<mode>3 patterns Lin Sinan
2023-04-10 14:55 ` Jeff Law
2023-04-18 18:27 ` Jeff Law
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