[PATCH] RISC-V: testsuite: Fix 32-bit FAILs.

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* [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
@ 2023-11-10 12:51 Robin Dapp
  2023-11-10 13:26 ` 钟居哲
  2023-11-10 23:00 ` 钟居哲
  0 siblings, 2 replies; 23+ messages in thread
From: Robin Dapp @ 2023-11-10 12:51 UTC (permalink / raw)
  To: gcc-patches, palmer, Kito Cheng, jeffreyalaw, juzhe.zhong; +Cc: rdapp.gcc

Hi,

this patch fixes several more FAILs that would only show up in 32-bit runs.

Regards
 Robin

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c: Adjust.
	* gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/cond/pr111401.c: Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/slp-mask-run-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c:
	Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c:
	Ditto.
---
 .../riscv/rvv/autovec/binop/vmul-zvfh-run.c   | 34 ++++-----
 .../riscv/rvv/autovec/binop/vsub-zvfh-run.c   | 72 +++++++++----------
 .../autovec/cond/cond_narrow_shift_run-3.c    |  2 +-
 .../riscv/rvv/autovec/cond/pr111401.c         |  2 +-
 .../autovec/conversions/vfcvt-itof-zvfh-run.c |  4 +-
 .../autovec/conversions/vfcvt_rtz-zvfh-run.c  |  4 +-
 .../conversions/vfncvt-ftoi-zvfh-run.c        | 18 ++---
 .../conversions/vfncvt-itof-template.h        | 36 ++++++----
 .../conversions/vfncvt-itof-zvfh-run.c        | 31 ++++----
 .../rvv/autovec/conversions/vfncvt-zvfh-run.c |  4 +-
 .../conversions/vfwcvt-ftoi-zvfh-run.c        | 10 +--
 .../conversions/vfwcvt-itof-zvfh-run.c        |  4 +-
 .../rvv/autovec/conversions/vfwcvt-zvfh-run.c | 40 +++++------
 .../riscv/rvv/autovec/slp-mask-run-1.c        |  2 +-
 .../rvv/autovec/ternop/ternop_run_zvfh-1.c    |  4 +-
 .../rvv/autovec/ternop/ternop_run_zvfh-10.c   |  4 +-
 .../rvv/autovec/ternop/ternop_run_zvfh-11.c   | 50 ++++++-------
 .../rvv/autovec/ternop/ternop_run_zvfh-12.c   | 49 ++++++-------
 .../rvv/autovec/ternop/ternop_run_zvfh-2.c    | 24 ++++---
 .../rvv/autovec/ternop/ternop_run_zvfh-3.c    | 21 +++---
 .../rvv/autovec/ternop/ternop_run_zvfh-4.c    |  4 +-
 .../rvv/autovec/ternop/ternop_run_zvfh-5.c    | 50 ++++++-------
 .../rvv/autovec/ternop/ternop_run_zvfh-6.c    | 50 ++++++-------
 .../rvv/autovec/ternop/ternop_run_zvfh-7.c    |  4 +-
 .../rvv/autovec/ternop/ternop_run_zvfh-8.c    | 21 +++---
 .../rvv/autovec/ternop/ternop_run_zvfh-9.c    | 22 +++---
 .../riscv/rvv/autovec/unop/vfsqrt-run.c       | 30 ++++----
 .../riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c   |  2 +-
 .../riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c   |  2 +-
 .../riscv/rvv/autovec/unop/vfsqrt-template.h  | 24 ++-----
 .../riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c  | 34 ++++-----
 .../autovec/vls-vlmax/vec_extract-zvfh-run.c  |  4 +-
 .../rvv/autovec/vls-vlmax/vec_set-zvfh-run.c  |  4 +-
 33 files changed, 335 insertions(+), 331 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
index a4271810e58..1082695c5de 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_zvfh } } } */
 /* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
 
 #include "vmul-template.h"
@@ -7,24 +7,24 @@
 
 #define SZ 512
 
-#define RUN(TYPE,VAL)				\
-  TYPE a##TYPE[SZ];				\
-  TYPE b##TYPE[SZ];	  			\
-  for (int i = 0; i < SZ; i++)			\
-  {                             		\
-    a##TYPE[i] = 2;				\
-    b##TYPE[i] = VAL;           		\
-  }                             		\
-  vadd_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);	\
-  for (int i = 0; i < SZ; i++)			\
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 2;                                                          \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vmul_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
     assert (a##TYPE[i] == 2 * VAL);
 
-#define RUN2(TYPE,VAL)				\
-  TYPE as##TYPE[SZ];				\
-  for (int i = 0; i < SZ; i++)			\
-    as##TYPE[i] = 3;            		\
-  vadds_##TYPE (as##TYPE, as##TYPE, VAL, SZ);	\
-  for (int i = 0; i < SZ; i++)			\
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 3;                                                           \
+  vmuls_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                  \
+  for (int i = 0; i < SZ; i++)                                                 \
     assert (as##TYPE[i] == 3 * VAL);
 
 #define RUN_ALL()	\
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
index c996ce81270..b438beafeb9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
 
 #include "vsub-template.h"
@@ -7,41 +7,41 @@
 
 #define SZ 512
 
-#define RUN(TYPE,VAL)				\
-  TYPE a##TYPE[SZ];				\
-  TYPE b##TYPE[SZ];	  			\
-  for (int i = 0; i < SZ; i++)			\
-  {                             		\
-    a##TYPE[i] = 999;           		\
-    b##TYPE[i] = VAL;           		\
-  }                             		\
-  vsub_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);	\
-  for (int i = 0; i < SZ; i++)			\
-    assert (a##TYPE[i] == 999 - VAL);
-
-#define RUN2(TYPE,VAL)				\
-  TYPE as##TYPE[SZ];				\
-  for (int i = 0; i < SZ; i++)			\
-    as##TYPE[i] = 999;            		\
-  vsubs_##TYPE (as##TYPE, as##TYPE, VAL, SZ);	\
-  for (int i = 0; i < SZ; i++)			\
-    assert (as##TYPE[i] == 999 - VAL);
-
-#define RUN3(TYPE)				\
-  TYPE as2##TYPE[SZ];				\
-  for (int i = 0; i < SZ; i++)			\
-    as2##TYPE[i] = i * 33 - 779;            	\
-  vsubi_##TYPE (as2##TYPE, as2##TYPE, SZ);	\
-  for (int i = 0; i < SZ; i++)			\
-    assert (as2##TYPE[i] == (TYPE)(-16 - (i * 33 - 779)));
-
-#define RUN4(TYPE)				\
-  TYPE as3##TYPE[SZ];				\
-  for (int i = 0; i < SZ; i++)			\
-    as3##TYPE[i] = i * -17 + 667;            	\
-  vsubi2_##TYPE (as3##TYPE, as3##TYPE, SZ);	\
-  for (int i = 0; i < SZ; i++)			\
-    assert (as3##TYPE[i] == (TYPE)(15 - (i * -17 + 667)));
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 123;                                                        \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vsub_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (a##TYPE[i] == 123 - VAL);
+
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 234;                                                         \
+  vsubs_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                  \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as##TYPE[i] == 234 - VAL);
+
+#define RUN3(TYPE)                                                             \
+  TYPE as2##TYPE[SZ];                                                          \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as2##TYPE[i] = i * 33 - 779;                                               \
+  vsubi_##TYPE (as2##TYPE, as2##TYPE, SZ);                                     \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as2##TYPE[i] == (TYPE) (-16 - (i * 33 - 779)));
+
+#define RUN4(TYPE)                                                             \
+  TYPE as3##TYPE[SZ];                                                          \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as3##TYPE[i] = i * -3 + 267;                                               \
+  vsubi2_##TYPE (as3##TYPE, as3##TYPE, SZ);                                    \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as3##TYPE[i] == (TYPE) (15 - (i * -3 + 267)));
 
 #define RUN_ALL()	\
  RUN(_Float16, 4)	\
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
index 27f9b686b38..0fcf2c5ca0f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
@@ -3,7 +3,7 @@
 
 #include "cond_narrow_shift-3.c"
 
-#define N 99
+#define N 61
 
 #define TEST_LOOP(TYPE1, TYPE2)                                                \
   {                                                                            \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
index 83dbd61b3f3..f593db3192a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-march=rv64gcv -mabi=lp64d --param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
+/* { dg-additional-options "--param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
 
 double
 __attribute__ ((noipa))
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
index f30e55bf7f7..bd85f3f5814 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfcvt-itof-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
index 637e51a07bd..3164fed03fb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfcvt_rtz-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
index ddbbdf35179..dbbbb615cc1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfncvt-ftoi-template.h"
 
@@ -7,10 +7,8 @@
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289;                   \
-    }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+    src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289;                     \
+  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -19,10 +17,8 @@
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289;                    \
-    }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+    src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289;                      \
+  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -33,7 +29,7 @@ main ()
   RUN (_Float16, int8_t, 3)
   RUN (_Float16, int8_t, 4)
   RUN (_Float16, int8_t, 13)
-  RUN (_Float16, int8_t, 40)
+  RUN (_Float16, int8_t, 29)
 
   RUN2 (_Float16, uint8_t, 1)
   RUN2 (_Float16, uint8_t, 8)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
index c427cd167f6..bfc9179f310 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
@@ -1,21 +1,29 @@
 #include <stdint-gcc.h>
 
-#define TEST(TYPE1, TYPE2)                                        \
-  __attribute__ ((noipa))					  \
-  void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst,		  \
-			      TYPE1 *restrict a, int n)		  \
-  {								  \
-    for (int i = 0; i < n; i++)					  \
-      dst[i] = (TYPE2) (a[i] & 0x7ffffffful);			  \
+#define TEST(TYPE1, TYPE2)                                                     \
+  __attribute__ ((noipa)) void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst,     \
+						      TYPE1 *restrict a,       \
+						      int n)                   \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = (TYPE2) (a[i] & 0x7ffffffful);                                   \
   }
 
+#define TESTS(TYPE1, TYPE2)                                                    \
+  __attribute__ ((noipa)) void vfncvts_##TYPE1##TYPE2 (TYPE2 *restrict dst,    \
+						       TYPE1 *restrict a,      \
+						       int n)                  \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = (TYPE2) (a[i]);                                                 \
+  }
 
-#define TEST_ALL()						  \
-  TEST (int64_t, float)						  \
-  TEST (uint64_t, float)					  \
-  TEST (int64_t, _Float16)					  \
-  TEST (uint64_t, _Float16)					  \
-  TEST (int32_t, _Float16)					  \
-  TEST (uint32_t, _Float16)					  \
+#define TEST_ALL()                                                             \
+  TEST (int64_t, float)                                                        \
+  TEST (uint64_t, float)                                                       \
+  TEST (int64_t, _Float16)                                                     \
+  TEST (uint64_t, _Float16)                                                    \
+  TEST (int32_t, _Float16)                                                     \
+  TEST (uint32_t, _Float16)                                                    \
 
 TEST_ALL ()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
index ea084299d0b..0342d147de0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
@@ -1,32 +1,39 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_zvfh && riscv_zfh} } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfncvt-itof-template.h"
 
+#include <math.h>
+
+TESTS (int64_t, _Float16)
+TESTS (int32_t, _Float16)
+
+#define EPS 1e-5
+
 #define RUN(TYPE1, TYPE2, NUM)                                                 \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * -3 - 832;                                \
-    }                                                                          \
-  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
+    src##TYPE1##TYPE2##NUM[i] = i * -3 + 833;                                  \
+  vfncvts_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM,      \
+			  NUM);                                                \
   for (int i = 0; i < NUM; i++)                                                \
-    if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
+    if (__builtin_fabsf16 (dst##TYPE1##TYPE2##NUM[i]                           \
+			   - (TYPE2) src##TYPE1##TYPE2##NUM[i])                \
+	> EPS)                                                                 \
       __builtin_abort ();
 
 #define RUN2(TYPE1, TYPE2, NUM)                                                \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * 3 + 892;                                 \
-    }                                                                          \
+    src##TYPE1##TYPE2##NUM[i] = i * 3 + 892;                                   \
   vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
-    if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
+    if (__builtin_fabsf16 (dst##TYPE1##TYPE2##NUM[i]                           \
+			   - (TYPE2) src##TYPE1##TYPE2##NUM[i])                \
+	> EPS)                                                                 \
       __builtin_abort ();
-
 int
 main ()
 {
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
index 6b8f3b5dfb1..6eb9f146704 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfncvt-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
index d13d4dd6338..3d1165400d3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
-#include "vfcvt_rtz-template.h"
+#include "vfwcvt-ftoi-template.h"
 
 #define RUN(TYPE1, TYPE2, NUM)                                                 \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
@@ -10,7 +10,7 @@
     {                                                                          \
       src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 832.947289;                 \
     }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -22,7 +22,7 @@
     {                                                                          \
       src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 832.947289;                  \
     }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
index 8289e53523e..8df59a9a91d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfwcvt-itof-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
index 10c8bdd530f..9f2c9835fd6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
 
 #include "vfwcvt-template.h"
 
@@ -8,26 +8,24 @@
 #define SZ 512
 #define EPS 1e-4
 
-#define RUN(TYPE1,TYPE2)					\
-  TYPE1 src##TYPE1##TYPE2[SZ];					\
-  TYPE2 dst##TYPE1##TYPE2[SZ];					\
-  for (int i = 0; i < SZ; i++)					\
-  {                             				\
-    src##TYPE1##TYPE2[i] = (i & 1) ? -i : i;  			\
-    src##TYPE1##TYPE2[i] *= 0.0003141592;			\
-    dst##TYPE1##TYPE2[i] = -1;					\
-  }                             				\
-  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2,			\
-			src##TYPE1##TYPE2, SZ);			\
-  for (int i = 0; i < SZ; i++)					\
-    assert (__builtin_fabs (dst##TYPE1##TYPE2[i]		\
-	    - ((i & 1) ? -i : i) * 0.0003141592) < EPS);	\
-
-
-#define RUN_ALL()						\
- RUN(_Float16, float)						\
- RUN(_Float16, double)						\
+#define RUN(TYPE1, TYPE2)                                                      \
+  TYPE1 src##TYPE1##TYPE2[SZ];                                                 \
+  TYPE2 dst##TYPE1##TYPE2[SZ];                                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      src##TYPE1##TYPE2[i] = (i & 1) ? -i : i;                                 \
+      src##TYPE1##TYPE2[i] *= 0.0003141592;                                    \
+      dst##TYPE1##TYPE2[i] = -1;                                               \
+    }                                                                          \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2, src##TYPE1##TYPE2, SZ);            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (__builtin_fabsf16 (dst##TYPE1##TYPE2[i]                            \
+			       - ((i & 1) ? -i : i) * 0.0003141592)            \
+	    < EPS);
 
+#define RUN_ALL()                                                              \
+  RUN (_Float16, float)                                                        \
+  RUN (_Float16, double)
 int main ()
 {
   RUN_ALL()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
index b3469c41c87..b7d86c6fbb5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=gnu99 -O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=gnu99 -O3 --param=riscv-autovec-preference=scalable" } */
 
 #include <malloc.h>
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
index 3ae6e598877..6c707e3c6ad 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-1.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
index 9b7e0572c68..4d57fe56e5b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-10.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
index 7a35d852ede..80f1d54aefa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-11.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
+	array1_##NUM[i] = (i & 1) + 5;                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+		   array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array6_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+	array6_##NUM[i]                                                        \
+	  = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array6_##NUM[i]);   \
+	if (array3_##NUM[i] != array6_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array7_##NUM[i]                                                        \
+	  = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
+	if (array4_##NUM[i] != array7_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array8_##NUM[i]                                                        \
+	  = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
+	if (array5_##NUM[i] != array8_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
       }                                                                        \
   }
 
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
index 51b77da0d5d..29b1683ff67 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-12.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
+	array1_##NUM[i] = (i & 1) + 5;                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+		   array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array7_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+	array6_##NUM[i]                                                        \
+	  = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array7_##NUM[i]);   \
+	if (array3_##NUM[i] != array6_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array7_##NUM[i]                                                        \
+	  = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
+	if (array4_##NUM[i] != array7_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array8_##NUM[i]                                                        \
+	  = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
+	if (array5_##NUM[i] != array8_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
       }                                                                        \
   }
 
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
index e069a8c7c14..3f9036c2868 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-2.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
 	array1_##NUM[i] = (i & 1) + 5;                                         \
-	array2_##NUM[i] = i - NUM / 3;                                         \
-	array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array5_##NUM[i] = NUM + i * 7;                                         \
-	array8_##NUM[i] = NUM + i * 7;                                         \
-	asm volatile("" ::: "memory");                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
 		   array2_##NUM, NUM);                                         \
@@ -48,8 +50,8 @@ int __attribute__ ((optimize (0))) main ()
 {
   TEST_LOOP (_Float16, 7)
   TEST_LOOP (_Float16, 16)
-  TEST_LOOP (_Float16, 77)
+  TEST_LOOP (_Float16, 94)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 199)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
index 8b3994dad96..e9ad951e62f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-3.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
 	array1_##NUM[i] = (i & 1) + 5;                                         \
-	array2_##NUM[i] = i - NUM / 3;                                         \
-	array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array5_##NUM[i] = NUM + i * 7;                                         \
-	array8_##NUM[i] = NUM + i * 7;                                         \
-	asm volatile("" ::: "memory");                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
 		   array2_##NUM, NUM);                                         \
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
index ef5bf498e3f..fb0cb1fef6b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-4.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
index 67fc570c6e3..06f6dbd1dbf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-5.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
+	array1_##NUM[i] = (i & 1) + 5;                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2 * 2;                                      \
+	array8_##NUM[i] = val + val2 * 2;                                      \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+		   array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array6_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+	array6_##NUM[i]                                                        \
+	  = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array6_##NUM[i]);   \
+	if (array3_##NUM[i] != array6_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array7_##NUM[i]                                                        \
+	  = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
+	if (array4_##NUM[i] != array7_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array8_##NUM[i]                                                        \
+	  = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
+	if (array5_##NUM[i] != array8_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
       }                                                                        \
   }
 
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
index d0361849639..b7f931e9d78 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-6.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
+	array1_##NUM[i] = (i & 1) + 5;                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+		   array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array7_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+	array6_##NUM[i]                                                        \
+	  = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array7_##NUM[i]);   \
+	if (array3_##NUM[i] != array6_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array7_##NUM[i]                                                        \
+	  = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
+	if (array4_##NUM[i] != array7_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
+	array8_##NUM[i]                                                        \
+	  = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
+	if (array5_##NUM[i] != array8_##NUM[i])                                \
+	  __builtin_abort ();                                                  \
       }                                                                        \
   }
 
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
index 7838406eba7..3a712fd0dcb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-7.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
index ec2907b3f25..f01cf6d9645 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-8.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
 	array1_##NUM[i] = (i & 1) + 5;                                         \
-	array2_##NUM[i] = i - NUM / 3;                                         \
-	array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array5_##NUM[i] = NUM + i * 7;                                         \
-	array8_##NUM[i] = NUM + i * 7;                                         \
-	asm volatile("" ::: "memory");                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val2 / 3 - val2;                               \
+	array6_##NUM[i] = val - val2 / 3 - val2;                               \
+	array4_##NUM[i] = val - val2 / 2 + val2;                               \
+	array7_##NUM[i] = val - val2 / 2 + val2;                               \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
 		   array2_##NUM, NUM);                                         \
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
index a855e0cc77f..eb8a105d0f1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
 /* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
 
 #include "ternop-9.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+	int val = NUM / 18.3;                                                  \
+	int val2 = i / 18.7;                                                   \
 	array1_##NUM[i] = (i & 1) + 5;                                         \
-	array2_##NUM[i] = i - NUM / 3;                                         \
-	array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
-	array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
-	array5_##NUM[i] = NUM + i * 7;                                         \
-	array8_##NUM[i] = NUM + i * 7;                                         \
-	asm volatile("" ::: "memory");                                         \
+	array2_##NUM[i] = val2 - val / 3;                                      \
+	array3_##NUM[i] = val - val / 3 - val2;                                \
+	array6_##NUM[i] = val - val / 3 - val2;                                \
+	array4_##NUM[i] = val - val / 2 + val2;                                \
+	array7_##NUM[i] = val - val / 2 + val2;                                \
+	array5_##NUM[i] = val + val2;                                          \
+	array8_##NUM[i] = val + val2;                                          \
+	asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
 		   array2_##NUM, NUM);                                         \
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
index 427252c81a3..739d1973229 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
@@ -3,28 +3,26 @@
 
 #include "vfsqrt-template.h"
 
-#include <assert.h>
-
 #define SZ 255
 
 #define EPS 1e-5
 
-#define RUN(TYPE)						\
-  TYPE a##TYPE[SZ];					      	\
-  for (int i = 0; i < SZ; i++)				      	\
-  {                             			      	\
-    a##TYPE[i] = (TYPE)i;             			      	\
-  }                             			      	\
-  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);	        	      	\
-  for (int i = 0; i < SZ; i++)				      	\
-    assert (__builtin_fabs				      	\
-	    (a##TYPE[i] -  __builtin_sqrtf ((TYPE)i)) < EPS);	\
+#define RUN(TYPE, SUFFIX)                                                      \
+  TYPE a##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    a##TYPE[i] = (TYPE) i;                                                     \
+  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);                                         \
+  for (int i = 0; i < SZ; i++)                                                 \
+    if (__builtin_fabs##SUFFIX (a##TYPE[i]                                     \
+				- __builtin_sqrt##SUFFIX ((TYPE) i))           \
+	> EPS)                                                                 \
+      __builtin_abort ();
 
-#define RUN_ALL()						\
- RUN(float)	                                	      	\
- RUN(double)	                                	      	\
+#define RUN_ALL()                                                              \
+  RUN (float, f)                                                               \
+  RUN (double, )
 
 int main ()
 {
-  RUN_ALL()
+  RUN_ALL ()
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
index a1874c8f9f0..dc3f7c49e24 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
@@ -7,6 +7,6 @@
    it here instead of in the template directly (which is also
    included by the run test that might need to be linked without
    the extension).  */
-TEST_TYPE3(_Float16)
+TEST_TYPE (_Float16, f16)
 
 /* { dg-final { scan-assembler-times {\tvfsqrt\.v} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
index 955621d4bcd..31d99756f02 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
@@ -7,6 +7,6 @@
    it here instead of in the template directly (which is also
    included by the run test that might need to be linked without
    the extension).  */
-TEST_TYPE3(_Float16)
+TEST_TYPE (_Float16, f16)
 
 /* { dg-final { scan-assembler-times {\tvfsqrt\.v} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
index 314ea646bec..473792d0f1b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
@@ -1,31 +1,15 @@
 #include <stdint-gcc.h>
 
-#define TEST_TYPE(TYPE) 				\
+#define TEST_TYPE(TYPE, SUFFIX) 				\
   __attribute__((noipa))				\
   void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n)		\
   {							\
     for (int i = 0; i < n; i++)				\
-      dst[i] = __builtin_sqrtf (a[i]);			\
-  }
-
-#define TEST_TYPE2(TYPE) 				\
-  __attribute__((noipa))				\
-  void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n)		\
-  {							\
-    for (int i = 0; i < n; i++)				\
-      dst[i] = __builtin_sqrt (a[i]);			\
-  }
-
-#define TEST_TYPE3(TYPE) 				\
-  __attribute__((noipa))				\
-  void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n)		\
-  {							\
-    for (int i = 0; i < n; i++)				\
-      dst[i] = __builtin_sqrtf16 (a[i]);		\
+      dst[i] = __builtin_sqrt##SUFFIX (a[i]);			\
   }
 
 #define TEST_ALL()					\
- TEST_TYPE(float)					\
- TEST_TYPE2(double)					\
+ TEST_TYPE(float, f)					\
+ TEST_TYPE(double, )					\
 
 TEST_ALL()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
index 5849e486047..c974ef090ba 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
@@ -1,31 +1,31 @@
-/* { dg-do run { target { riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_zvfh && riscv_zfh } } } */
 /* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
 
 #include "vfsqrt-template.h"
 
 /* We cannot link this without the Zvfh extension so define
    it here instead of in the template directly.  */
-TEST_TYPE3(_Float16)
-
-#include <assert.h>
+TEST_TYPE(_Float16, f16)
 
 #define SZ 255
 
 #define EPS 1e-5
 
-#define RUN(TYPE)						\
-  TYPE a##TYPE[SZ];						\
-  for (int i = 0; i < SZ; i++)				    	\
-  {                             			    	\
-    a##TYPE[i] = (TYPE)i;             			    	\
-  }                             			    	\
-  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);	        	    	\
-  for (int i = 0; i < SZ; i++)				    	\
-    assert (__builtin_fabs				    	\
-	    (a##TYPE[i] - __builtin_sqrtf ((TYPE)i)) < EPS);	\
-
-#define RUN_ALL()						\
- RUN(_Float16)	                                	    	\
+#define RUN(TYPE, SUFFIX)                                                      \
+  TYPE a##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = (TYPE) i;                                                   \
+    }                                                                          \
+  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);                                         \
+  for (int i = 0; i < SZ; i++)                                                 \
+    if (__builtin_fabs##SUFFIX (a##TYPE[i]                                     \
+				- __builtin_sqrt##SUFFIX ((TYPE) i))           \
+	> EPS)                                                                 \
+      __builtin_abort ();
+
+#define RUN_ALL() \
+      RUN (_Float16, f16)
 
 int main ()
 {
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
index 365480ec254..fa8551b158b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run {target { riscv_zvfh_hw } } } */
-/* { dg-additional-options "-Wno-pedantic" } */
+/* { dg-do run {target { riscv_zvfh } } } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
 
 #include <assert.h>
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
index 7e5a73a5ea8..98e673f4ad9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_zvfh_hw } } } */
-/* { dg-additional-options "-Wno-pedantic" } */
+/* { dg-do run { target { riscv_zvfh } } } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
 
 #include <assert.h>
 
-- 
2.41.0


^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-10 12:51 [PATCH] RISC-V: testsuite: Fix 32-bit FAILs Robin Dapp
@ 2023-11-10 13:26 ` 钟居哲
  2023-11-10 23:00 ` 钟居哲
  1 sibling, 0 replies; 23+ messages in thread
From: 钟居哲 @ 2023-11-10 13:26 UTC (permalink / raw)
  To: rdapp.gcc, gcc-patches, palmer, kito.cheng, Jeff Law; +Cc: rdapp.gcc

[-- Attachment #1: Type: text/plain, Size: 72848 bytes --]

LGTM.



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-11-10 20:51
To: gcc-patches; palmer; Kito Cheng; jeffreyalaw; juzhe.zhong@rivai.ai
CC: rdapp.gcc
Subject: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
Hi,
 
this patch fixes several more FAILs that would only show up in 32-bit runs.
 
Regards
Robin
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c: Adjust.
* gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c:
Ditto.
* gcc.target/riscv/rvv/autovec/cond/pr111401.c: Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/slp-mask-run-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c:
Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c:
Ditto.
---
.../riscv/rvv/autovec/binop/vmul-zvfh-run.c   | 34 ++++-----
.../riscv/rvv/autovec/binop/vsub-zvfh-run.c   | 72 +++++++++----------
.../autovec/cond/cond_narrow_shift_run-3.c    |  2 +-
.../riscv/rvv/autovec/cond/pr111401.c         |  2 +-
.../autovec/conversions/vfcvt-itof-zvfh-run.c |  4 +-
.../autovec/conversions/vfcvt_rtz-zvfh-run.c  |  4 +-
.../conversions/vfncvt-ftoi-zvfh-run.c        | 18 ++---
.../conversions/vfncvt-itof-template.h        | 36 ++++++----
.../conversions/vfncvt-itof-zvfh-run.c        | 31 ++++----
.../rvv/autovec/conversions/vfncvt-zvfh-run.c |  4 +-
.../conversions/vfwcvt-ftoi-zvfh-run.c        | 10 +--
.../conversions/vfwcvt-itof-zvfh-run.c        |  4 +-
.../rvv/autovec/conversions/vfwcvt-zvfh-run.c | 40 +++++------
.../riscv/rvv/autovec/slp-mask-run-1.c        |  2 +-
.../rvv/autovec/ternop/ternop_run_zvfh-1.c    |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-10.c   |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-11.c   | 50 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-12.c   | 49 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-2.c    | 24 ++++---
.../rvv/autovec/ternop/ternop_run_zvfh-3.c    | 21 +++---
.../rvv/autovec/ternop/ternop_run_zvfh-4.c    |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-5.c    | 50 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-6.c    | 50 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-7.c    |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-8.c    | 21 +++---
.../rvv/autovec/ternop/ternop_run_zvfh-9.c    | 22 +++---
.../riscv/rvv/autovec/unop/vfsqrt-run.c       | 30 ++++----
.../riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c   |  2 +-
.../riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c   |  2 +-
.../riscv/rvv/autovec/unop/vfsqrt-template.h  | 24 ++-----
.../riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c  | 34 ++++-----
.../autovec/vls-vlmax/vec_extract-zvfh-run.c  |  4 +-
.../rvv/autovec/vls-vlmax/vec_set-zvfh-run.c  |  4 +-
33 files changed, 335 insertions(+), 331 deletions(-)
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
index a4271810e58..1082695c5de 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_zvfh } } } */
/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vmul-template.h"
@@ -7,24 +7,24 @@
#define SZ 512
-#define RUN(TYPE,VAL) \
-  TYPE a##TYPE[SZ]; \
-  TYPE b##TYPE[SZ];   \
-  for (int i = 0; i < SZ; i++) \
-  {                             \
-    a##TYPE[i] = 2; \
-    b##TYPE[i] = VAL;           \
-  }                             \
-  vadd_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 2;                                                          \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vmul_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
     assert (a##TYPE[i] == 2 * VAL);
-#define RUN2(TYPE,VAL) \
-  TYPE as##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as##TYPE[i] = 3;            \
-  vadds_##TYPE (as##TYPE, as##TYPE, VAL, SZ); \
-  for (int i = 0; i < SZ; i++) \
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 3;                                                           \
+  vmuls_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                  \
+  for (int i = 0; i < SZ; i++)                                                 \
     assert (as##TYPE[i] == 3 * VAL);
#define RUN_ALL() \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
index c996ce81270..b438beafeb9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vsub-template.h"
@@ -7,41 +7,41 @@
#define SZ 512
-#define RUN(TYPE,VAL) \
-  TYPE a##TYPE[SZ]; \
-  TYPE b##TYPE[SZ];   \
-  for (int i = 0; i < SZ; i++) \
-  {                             \
-    a##TYPE[i] = 999;           \
-    b##TYPE[i] = VAL;           \
-  }                             \
-  vsub_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (a##TYPE[i] == 999 - VAL);
-
-#define RUN2(TYPE,VAL) \
-  TYPE as##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as##TYPE[i] = 999;            \
-  vsubs_##TYPE (as##TYPE, as##TYPE, VAL, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (as##TYPE[i] == 999 - VAL);
-
-#define RUN3(TYPE) \
-  TYPE as2##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as2##TYPE[i] = i * 33 - 779;            \
-  vsubi_##TYPE (as2##TYPE, as2##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (as2##TYPE[i] == (TYPE)(-16 - (i * 33 - 779)));
-
-#define RUN4(TYPE) \
-  TYPE as3##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as3##TYPE[i] = i * -17 + 667;            \
-  vsubi2_##TYPE (as3##TYPE, as3##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (as3##TYPE[i] == (TYPE)(15 - (i * -17 + 667)));
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 123;                                                        \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vsub_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (a##TYPE[i] == 123 - VAL);
+
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 234;                                                         \
+  vsubs_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                  \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as##TYPE[i] == 234 - VAL);
+
+#define RUN3(TYPE)                                                             \
+  TYPE as2##TYPE[SZ];                                                          \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as2##TYPE[i] = i * 33 - 779;                                               \
+  vsubi_##TYPE (as2##TYPE, as2##TYPE, SZ);                                     \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as2##TYPE[i] == (TYPE) (-16 - (i * 33 - 779)));
+
+#define RUN4(TYPE)                                                             \
+  TYPE as3##TYPE[SZ];                                                          \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as3##TYPE[i] = i * -3 + 267;                                               \
+  vsubi2_##TYPE (as3##TYPE, as3##TYPE, SZ);                                    \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as3##TYPE[i] == (TYPE) (15 - (i * -3 + 267)));
#define RUN_ALL() \
  RUN(_Float16, 4) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
index 27f9b686b38..0fcf2c5ca0f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
@@ -3,7 +3,7 @@
#include "cond_narrow_shift-3.c"
-#define N 99
+#define N 61
#define TEST_LOOP(TYPE1, TYPE2)                                                \
   {                                                                            \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
index 83dbd61b3f3..f593db3192a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-march=rv64gcv -mabi=lp64d --param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
+/* { dg-additional-options "--param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
double
__attribute__ ((noipa))
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
index f30e55bf7f7..bd85f3f5814 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfcvt-itof-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
index 637e51a07bd..3164fed03fb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfcvt_rtz-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
index ddbbdf35179..dbbbb615cc1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-ftoi-template.h"
@@ -7,10 +7,8 @@
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289;                   \
-    }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+    src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289;                     \
+  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -19,10 +17,8 @@
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289;                    \
-    }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+    src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289;                      \
+  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -33,7 +29,7 @@ main ()
   RUN (_Float16, int8_t, 3)
   RUN (_Float16, int8_t, 4)
   RUN (_Float16, int8_t, 13)
-  RUN (_Float16, int8_t, 40)
+  RUN (_Float16, int8_t, 29)
   RUN2 (_Float16, uint8_t, 1)
   RUN2 (_Float16, uint8_t, 8)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
index c427cd167f6..bfc9179f310 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
@@ -1,21 +1,29 @@
#include <stdint-gcc.h>
-#define TEST(TYPE1, TYPE2)                                        \
-  __attribute__ ((noipa))   \
-  void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst,   \
-       TYPE1 *restrict a, int n)   \
-  {   \
-    for (int i = 0; i < n; i++)   \
-      dst[i] = (TYPE2) (a[i] & 0x7ffffffful);   \
+#define TEST(TYPE1, TYPE2)                                                     \
+  __attribute__ ((noipa)) void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst,     \
+       TYPE1 *restrict a,       \
+       int n)                   \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = (TYPE2) (a[i] & 0x7ffffffful);                                   \
   }
+#define TESTS(TYPE1, TYPE2)                                                    \
+  __attribute__ ((noipa)) void vfncvts_##TYPE1##TYPE2 (TYPE2 *restrict dst,    \
+        TYPE1 *restrict a,      \
+        int n)                  \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = (TYPE2) (a[i]);                                                 \
+  }
-#define TEST_ALL()   \
-  TEST (int64_t, float)   \
-  TEST (uint64_t, float)   \
-  TEST (int64_t, _Float16)   \
-  TEST (uint64_t, _Float16)   \
-  TEST (int32_t, _Float16)   \
-  TEST (uint32_t, _Float16)   \
+#define TEST_ALL()                                                             \
+  TEST (int64_t, float)                                                        \
+  TEST (uint64_t, float)                                                       \
+  TEST (int64_t, _Float16)                                                     \
+  TEST (uint64_t, _Float16)                                                    \
+  TEST (int32_t, _Float16)                                                     \
+  TEST (uint32_t, _Float16)                                                    \
TEST_ALL ()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
index ea084299d0b..0342d147de0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
@@ -1,32 +1,39 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_zvfh && riscv_zfh} } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-itof-template.h"
+#include <math.h>
+
+TESTS (int64_t, _Float16)
+TESTS (int32_t, _Float16)
+
+#define EPS 1e-5
+
#define RUN(TYPE1, TYPE2, NUM)                                                 \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * -3 - 832;                                \
-    }                                                                          \
-  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
+    src##TYPE1##TYPE2##NUM[i] = i * -3 + 833;                                  \
+  vfncvts_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM,      \
+   NUM);                                                \
   for (int i = 0; i < NUM; i++)                                                \
-    if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
+    if (__builtin_fabsf16 (dst##TYPE1##TYPE2##NUM[i]                           \
+    - (TYPE2) src##TYPE1##TYPE2##NUM[i])                \
+ > EPS)                                                                 \
       __builtin_abort ();
#define RUN2(TYPE1, TYPE2, NUM)                                                \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * 3 + 892;                                 \
-    }                                                                          \
+    src##TYPE1##TYPE2##NUM[i] = i * 3 + 892;                                   \
   vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
-    if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
+    if (__builtin_fabsf16 (dst##TYPE1##TYPE2##NUM[i]                           \
+    - (TYPE2) src##TYPE1##TYPE2##NUM[i])                \
+ > EPS)                                                                 \
       __builtin_abort ();
-
int
main ()
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
index 6b8f3b5dfb1..6eb9f146704 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
index d13d4dd6338..3d1165400d3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
-#include "vfcvt_rtz-template.h"
+#include "vfwcvt-ftoi-template.h"
#define RUN(TYPE1, TYPE2, NUM)                                                 \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
@@ -10,7 +10,7 @@
     {                                                                          \
       src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 832.947289;                 \
     }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -22,7 +22,7 @@
     {                                                                          \
       src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 832.947289;                  \
     }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
index 8289e53523e..8df59a9a91d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfwcvt-itof-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
index 10c8bdd530f..9f2c9835fd6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfwcvt-template.h"
@@ -8,26 +8,24 @@
#define SZ 512
#define EPS 1e-4
-#define RUN(TYPE1,TYPE2) \
-  TYPE1 src##TYPE1##TYPE2[SZ]; \
-  TYPE2 dst##TYPE1##TYPE2[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-  {                             \
-    src##TYPE1##TYPE2[i] = (i & 1) ? -i : i;  \
-    src##TYPE1##TYPE2[i] *= 0.0003141592; \
-    dst##TYPE1##TYPE2[i] = -1; \
-  }                             \
-  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2, \
- src##TYPE1##TYPE2, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (__builtin_fabs (dst##TYPE1##TYPE2[i] \
-     - ((i & 1) ? -i : i) * 0.0003141592) < EPS); \
-
-
-#define RUN_ALL() \
- RUN(_Float16, float) \
- RUN(_Float16, double) \
+#define RUN(TYPE1, TYPE2)                                                      \
+  TYPE1 src##TYPE1##TYPE2[SZ];                                                 \
+  TYPE2 dst##TYPE1##TYPE2[SZ];                                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      src##TYPE1##TYPE2[i] = (i & 1) ? -i : i;                                 \
+      src##TYPE1##TYPE2[i] *= 0.0003141592;                                    \
+      dst##TYPE1##TYPE2[i] = -1;                                               \
+    }                                                                          \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2, src##TYPE1##TYPE2, SZ);            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (__builtin_fabsf16 (dst##TYPE1##TYPE2[i]                            \
+        - ((i & 1) ? -i : i) * 0.0003141592)            \
+     < EPS);
+#define RUN_ALL()                                                              \
+  RUN (_Float16, float)                                                        \
+  RUN (_Float16, double)
int main ()
{
   RUN_ALL()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
index b3469c41c87..b7d86c6fbb5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=gnu99 -O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=gnu99 -O3 --param=riscv-autovec-preference=scalable" } */
#include <malloc.h>
#include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
index 3ae6e598877..6c707e3c6ad 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-1.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
index 9b7e0572c68..4d57fe56e5b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-10.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
index 7a35d852ede..80f1d54aefa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-11.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array6_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array6_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
index 51b77da0d5d..29b1683ff67 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-12.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array7_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array7_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
index e069a8c7c14..3f9036c2868 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-2.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -48,8 +50,8 @@ int __attribute__ ((optimize (0))) main ()
{
   TEST_LOOP (_Float16, 7)
   TEST_LOOP (_Float16, 16)
-  TEST_LOOP (_Float16, 77)
+  TEST_LOOP (_Float16, 94)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 199)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
index 8b3994dad96..e9ad951e62f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-3.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
index ef5bf498e3f..fb0cb1fef6b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-4.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
index 67fc570c6e3..06f6dbd1dbf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-5.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2 * 2;                                      \
+ array8_##NUM[i] = val + val2 * 2;                                      \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array6_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array6_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
index d0361849639..b7f931e9d78 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-6.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array7_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array7_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
index 7838406eba7..3a712fd0dcb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-7.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
index ec2907b3f25..f01cf6d9645 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-8.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val2 / 3 - val2;                               \
+ array6_##NUM[i] = val - val2 / 3 - val2;                               \
+ array4_##NUM[i] = val - val2 / 2 + val2;                               \
+ array7_##NUM[i] = val - val2 / 2 + val2;                               \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
index a855e0cc77f..eb8a105d0f1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-9.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
index 427252c81a3..739d1973229 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
@@ -3,28 +3,26 @@
#include "vfsqrt-template.h"
-#include <assert.h>
-
#define SZ 255
#define EPS 1e-5
-#define RUN(TYPE) \
-  TYPE a##TYPE[SZ];       \
-  for (int i = 0; i < SZ; i++)       \
-  {                                   \
-    a##TYPE[i] = (TYPE)i;                   \
-  }                                   \
-  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);               \
-  for (int i = 0; i < SZ; i++)       \
-    assert (__builtin_fabs       \
-     (a##TYPE[i] -  __builtin_sqrtf ((TYPE)i)) < EPS); \
+#define RUN(TYPE, SUFFIX)                                                      \
+  TYPE a##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    a##TYPE[i] = (TYPE) i;                                                     \
+  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);                                         \
+  for (int i = 0; i < SZ; i++)                                                 \
+    if (__builtin_fabs##SUFFIX (a##TYPE[i]                                     \
+ - __builtin_sqrt##SUFFIX ((TYPE) i))           \
+ > EPS)                                                                 \
+      __builtin_abort ();
-#define RUN_ALL() \
- RUN(float)                                       \
- RUN(double)                                       \
+#define RUN_ALL()                                                              \
+  RUN (float, f)                                                               \
+  RUN (double, )
int main ()
{
-  RUN_ALL()
+  RUN_ALL ()
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
index a1874c8f9f0..dc3f7c49e24 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
@@ -7,6 +7,6 @@
    it here instead of in the template directly (which is also
    included by the run test that might need to be linked without
    the extension).  */
-TEST_TYPE3(_Float16)
+TEST_TYPE (_Float16, f16)
/* { dg-final { scan-assembler-times {\tvfsqrt\.v} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
index 955621d4bcd..31d99756f02 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
@@ -7,6 +7,6 @@
    it here instead of in the template directly (which is also
    included by the run test that might need to be linked without
    the extension).  */
-TEST_TYPE3(_Float16)
+TEST_TYPE (_Float16, f16)
/* { dg-final { scan-assembler-times {\tvfsqrt\.v} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
index 314ea646bec..473792d0f1b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
@@ -1,31 +1,15 @@
#include <stdint-gcc.h>
-#define TEST_TYPE(TYPE) \
+#define TEST_TYPE(TYPE, SUFFIX) \
   __attribute__((noipa)) \
   void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n) \
   { \
     for (int i = 0; i < n; i++) \
-      dst[i] = __builtin_sqrtf (a[i]); \
-  }
-
-#define TEST_TYPE2(TYPE) \
-  __attribute__((noipa)) \
-  void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n) \
-  { \
-    for (int i = 0; i < n; i++) \
-      dst[i] = __builtin_sqrt (a[i]); \
-  }
-
-#define TEST_TYPE3(TYPE) \
-  __attribute__((noipa)) \
-  void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n) \
-  { \
-    for (int i = 0; i < n; i++) \
-      dst[i] = __builtin_sqrtf16 (a[i]); \
+      dst[i] = __builtin_sqrt##SUFFIX (a[i]); \
   }
#define TEST_ALL() \
- TEST_TYPE(float) \
- TEST_TYPE2(double) \
+ TEST_TYPE(float, f) \
+ TEST_TYPE(double, ) \
TEST_ALL()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
index 5849e486047..c974ef090ba 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
@@ -1,31 +1,31 @@
-/* { dg-do run { target { riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_zvfh && riscv_zfh } } } */
/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vfsqrt-template.h"
/* We cannot link this without the Zvfh extension so define
    it here instead of in the template directly.  */
-TEST_TYPE3(_Float16)
-
-#include <assert.h>
+TEST_TYPE(_Float16, f16)
#define SZ 255
#define EPS 1e-5
-#define RUN(TYPE) \
-  TYPE a##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++)     \
-  {                                 \
-    a##TYPE[i] = (TYPE)i;                 \
-  }                                 \
-  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);             \
-  for (int i = 0; i < SZ; i++)     \
-    assert (__builtin_fabs     \
-     (a##TYPE[i] - __builtin_sqrtf ((TYPE)i)) < EPS); \
-
-#define RUN_ALL() \
- RUN(_Float16)                                     \
+#define RUN(TYPE, SUFFIX)                                                      \
+  TYPE a##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = (TYPE) i;                                                   \
+    }                                                                          \
+  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);                                         \
+  for (int i = 0; i < SZ; i++)                                                 \
+    if (__builtin_fabs##SUFFIX (a##TYPE[i]                                     \
+ - __builtin_sqrt##SUFFIX ((TYPE) i))           \
+ > EPS)                                                                 \
+      __builtin_abort ();
+
+#define RUN_ALL() \
+      RUN (_Float16, f16)
int main ()
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
index 365480ec254..fa8551b158b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run {target { riscv_zvfh_hw } } } */
-/* { dg-additional-options "-Wno-pedantic" } */
+/* { dg-do run {target { riscv_zvfh } } } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
#include <assert.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
index 7e5a73a5ea8..98e673f4ad9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_zvfh_hw } } } */
-/* { dg-additional-options "-Wno-pedantic" } */
+/* { dg-do run { target { riscv_zvfh } } } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
#include <assert.h>
-- 
2.41.0
 
 

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-10 12:51 [PATCH] RISC-V: testsuite: Fix 32-bit FAILs Robin Dapp
  2023-11-10 13:26 ` 钟居哲
@ 2023-11-10 23:00 ` 钟居哲
  2023-11-13  8:52   ` Robin Dapp
  1 sibling, 1 reply; 23+ messages in thread
From: 钟居哲 @ 2023-11-10 23:00 UTC (permalink / raw)
  To: rdapp.gcc, gcc-patches, palmer, kito.cheng, Jeff Law; +Cc: rdapp.gcc

[-- Attachment #1: Type: text/plain, Size: 74022 bytes --]

Hi, Robin.
This patch has fixed almost 90% of the "test for excess errors" that I previously reported.
Thansk a lot!

But there are still some bogus FAILs:

FAIL: gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-11-10 20:51
To: gcc-patches; palmer; Kito Cheng; jeffreyalaw; juzhe.zhong@rivai.ai
CC: rdapp.gcc
Subject: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
Hi,
 
this patch fixes several more FAILs that would only show up in 32-bit runs.
 
Regards
Robin
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c: Adjust.
* gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c:
Ditto.
* gcc.target/riscv/rvv/autovec/cond/pr111401.c: Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/slp-mask-run-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c:
Ditto.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c:
Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c:
Ditto.
---
.../riscv/rvv/autovec/binop/vmul-zvfh-run.c   | 34 ++++-----
.../riscv/rvv/autovec/binop/vsub-zvfh-run.c   | 72 +++++++++----------
.../autovec/cond/cond_narrow_shift_run-3.c    |  2 +-
.../riscv/rvv/autovec/cond/pr111401.c         |  2 +-
.../autovec/conversions/vfcvt-itof-zvfh-run.c |  4 +-
.../autovec/conversions/vfcvt_rtz-zvfh-run.c  |  4 +-
.../conversions/vfncvt-ftoi-zvfh-run.c        | 18 ++---
.../conversions/vfncvt-itof-template.h        | 36 ++++++----
.../conversions/vfncvt-itof-zvfh-run.c        | 31 ++++----
.../rvv/autovec/conversions/vfncvt-zvfh-run.c |  4 +-
.../conversions/vfwcvt-ftoi-zvfh-run.c        | 10 +--
.../conversions/vfwcvt-itof-zvfh-run.c        |  4 +-
.../rvv/autovec/conversions/vfwcvt-zvfh-run.c | 40 +++++------
.../riscv/rvv/autovec/slp-mask-run-1.c        |  2 +-
.../rvv/autovec/ternop/ternop_run_zvfh-1.c    |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-10.c   |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-11.c   | 50 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-12.c   | 49 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-2.c    | 24 ++++---
.../rvv/autovec/ternop/ternop_run_zvfh-3.c    | 21 +++---
.../rvv/autovec/ternop/ternop_run_zvfh-4.c    |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-5.c    | 50 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-6.c    | 50 ++++++-------
.../rvv/autovec/ternop/ternop_run_zvfh-7.c    |  4 +-
.../rvv/autovec/ternop/ternop_run_zvfh-8.c    | 21 +++---
.../rvv/autovec/ternop/ternop_run_zvfh-9.c    | 22 +++---
.../riscv/rvv/autovec/unop/vfsqrt-run.c       | 30 ++++----
.../riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c   |  2 +-
.../riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c   |  2 +-
.../riscv/rvv/autovec/unop/vfsqrt-template.h  | 24 ++-----
.../riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c  | 34 ++++-----
.../autovec/vls-vlmax/vec_extract-zvfh-run.c  |  4 +-
.../rvv/autovec/vls-vlmax/vec_set-zvfh-run.c  |  4 +-
33 files changed, 335 insertions(+), 331 deletions(-)
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
index a4271810e58..1082695c5de 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-zvfh-run.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_zvfh } } } */
/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vmul-template.h"
@@ -7,24 +7,24 @@
#define SZ 512
-#define RUN(TYPE,VAL) \
-  TYPE a##TYPE[SZ]; \
-  TYPE b##TYPE[SZ];   \
-  for (int i = 0; i < SZ; i++) \
-  {                             \
-    a##TYPE[i] = 2; \
-    b##TYPE[i] = VAL;           \
-  }                             \
-  vadd_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 2;                                                          \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vmul_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
     assert (a##TYPE[i] == 2 * VAL);
-#define RUN2(TYPE,VAL) \
-  TYPE as##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as##TYPE[i] = 3;            \
-  vadds_##TYPE (as##TYPE, as##TYPE, VAL, SZ); \
-  for (int i = 0; i < SZ; i++) \
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 3;                                                           \
+  vmuls_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                  \
+  for (int i = 0; i < SZ; i++)                                                 \
     assert (as##TYPE[i] == 3 * VAL);
#define RUN_ALL() \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
index c996ce81270..b438beafeb9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-zvfh-run.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vsub-template.h"
@@ -7,41 +7,41 @@
#define SZ 512
-#define RUN(TYPE,VAL) \
-  TYPE a##TYPE[SZ]; \
-  TYPE b##TYPE[SZ];   \
-  for (int i = 0; i < SZ; i++) \
-  {                             \
-    a##TYPE[i] = 999;           \
-    b##TYPE[i] = VAL;           \
-  }                             \
-  vsub_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (a##TYPE[i] == 999 - VAL);
-
-#define RUN2(TYPE,VAL) \
-  TYPE as##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as##TYPE[i] = 999;            \
-  vsubs_##TYPE (as##TYPE, as##TYPE, VAL, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (as##TYPE[i] == 999 - VAL);
-
-#define RUN3(TYPE) \
-  TYPE as2##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as2##TYPE[i] = i * 33 - 779;            \
-  vsubi_##TYPE (as2##TYPE, as2##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (as2##TYPE[i] == (TYPE)(-16 - (i * 33 - 779)));
-
-#define RUN4(TYPE) \
-  TYPE as3##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-    as3##TYPE[i] = i * -17 + 667;            \
-  vsubi2_##TYPE (as3##TYPE, as3##TYPE, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (as3##TYPE[i] == (TYPE)(15 - (i * -17 + 667)));
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 123;                                                        \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vsub_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (a##TYPE[i] == 123 - VAL);
+
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 234;                                                         \
+  vsubs_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                  \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as##TYPE[i] == 234 - VAL);
+
+#define RUN3(TYPE)                                                             \
+  TYPE as2##TYPE[SZ];                                                          \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as2##TYPE[i] = i * 33 - 779;                                               \
+  vsubi_##TYPE (as2##TYPE, as2##TYPE, SZ);                                     \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as2##TYPE[i] == (TYPE) (-16 - (i * 33 - 779)));
+
+#define RUN4(TYPE)                                                             \
+  TYPE as3##TYPE[SZ];                                                          \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as3##TYPE[i] = i * -3 + 267;                                               \
+  vsubi2_##TYPE (as3##TYPE, as3##TYPE, SZ);                                    \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as3##TYPE[i] == (TYPE) (15 - (i * -3 + 267)));
#define RUN_ALL() \
  RUN(_Float16, 4) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
index 27f9b686b38..0fcf2c5ca0f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_narrow_shift_run-3.c
@@ -3,7 +3,7 @@
#include "cond_narrow_shift-3.c"
-#define N 99
+#define N 61
#define TEST_LOOP(TYPE1, TYPE2)                                                \
   {                                                                            \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
index 83dbd61b3f3..f593db3192a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/pr111401.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-march=rv64gcv -mabi=lp64d --param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
+/* { dg-additional-options "--param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
double
__attribute__ ((noipa))
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
index f30e55bf7f7..bd85f3f5814 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt-itof-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfcvt-itof-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
index 637e51a07bd..3164fed03fb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfcvt_rtz-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
index ddbbdf35179..dbbbb615cc1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-ftoi-template.h"
@@ -7,10 +7,8 @@
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289;                   \
-    }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+    src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289;                     \
+  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -19,10 +17,8 @@
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289;                    \
-    }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+    src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289;                      \
+  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -33,7 +29,7 @@ main ()
   RUN (_Float16, int8_t, 3)
   RUN (_Float16, int8_t, 4)
   RUN (_Float16, int8_t, 13)
-  RUN (_Float16, int8_t, 40)
+  RUN (_Float16, int8_t, 29)
   RUN2 (_Float16, uint8_t, 1)
   RUN2 (_Float16, uint8_t, 8)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
index c427cd167f6..bfc9179f310 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
@@ -1,21 +1,29 @@
#include <stdint-gcc.h>
-#define TEST(TYPE1, TYPE2)                                        \
-  __attribute__ ((noipa))   \
-  void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst,   \
-       TYPE1 *restrict a, int n)   \
-  {   \
-    for (int i = 0; i < n; i++)   \
-      dst[i] = (TYPE2) (a[i] & 0x7ffffffful);   \
+#define TEST(TYPE1, TYPE2)                                                     \
+  __attribute__ ((noipa)) void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst,     \
+       TYPE1 *restrict a,       \
+       int n)                   \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = (TYPE2) (a[i] & 0x7ffffffful);                                   \
   }
+#define TESTS(TYPE1, TYPE2)                                                    \
+  __attribute__ ((noipa)) void vfncvts_##TYPE1##TYPE2 (TYPE2 *restrict dst,    \
+        TYPE1 *restrict a,      \
+        int n)                  \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = (TYPE2) (a[i]);                                                 \
+  }
-#define TEST_ALL()   \
-  TEST (int64_t, float)   \
-  TEST (uint64_t, float)   \
-  TEST (int64_t, _Float16)   \
-  TEST (uint64_t, _Float16)   \
-  TEST (int32_t, _Float16)   \
-  TEST (uint32_t, _Float16)   \
+#define TEST_ALL()                                                             \
+  TEST (int64_t, float)                                                        \
+  TEST (uint64_t, float)                                                       \
+  TEST (int64_t, _Float16)                                                     \
+  TEST (uint64_t, _Float16)                                                    \
+  TEST (int32_t, _Float16)                                                     \
+  TEST (uint32_t, _Float16)                                                    \
TEST_ALL ()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
index ea084299d0b..0342d147de0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
@@ -1,32 +1,39 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_zvfh && riscv_zfh} } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-itof-template.h"
+#include <math.h>
+
+TESTS (int64_t, _Float16)
+TESTS (int32_t, _Float16)
+
+#define EPS 1e-5
+
#define RUN(TYPE1, TYPE2, NUM)                                                 \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * -3 - 832;                                \
-    }                                                                          \
-  vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
+    src##TYPE1##TYPE2##NUM[i] = i * -3 + 833;                                  \
+  vfncvts_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM,      \
+   NUM);                                                \
   for (int i = 0; i < NUM; i++)                                                \
-    if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
+    if (__builtin_fabsf16 (dst##TYPE1##TYPE2##NUM[i]                           \
+    - (TYPE2) src##TYPE1##TYPE2##NUM[i])                \
+ > EPS)                                                                 \
       __builtin_abort ();
#define RUN2(TYPE1, TYPE2, NUM)                                                \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
   TYPE2 dst##TYPE1##TYPE2##NUM[NUM];                                           \
   for (int i = 0; i < NUM; i++)                                                \
-    {                                                                          \
-      src##TYPE1##TYPE2##NUM[i] = i * 3 + 892;                                 \
-    }                                                                          \
+    src##TYPE1##TYPE2##NUM[i] = i * 3 + 892;                                   \
   vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
-    if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
+    if (__builtin_fabsf16 (dst##TYPE1##TYPE2##NUM[i]                           \
+    - (TYPE2) src##TYPE1##TYPE2##NUM[i])                \
+ > EPS)                                                                 \
       __builtin_abort ();
-
int
main ()
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
index 6b8f3b5dfb1..6eb9f146704 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
index d13d4dd6338..3d1165400d3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
@@ -1,7 +1,7 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
-#include "vfcvt_rtz-template.h"
+#include "vfwcvt-ftoi-template.h"
#define RUN(TYPE1, TYPE2, NUM)                                                 \
   TYPE1 src##TYPE1##TYPE2##NUM[NUM];                                           \
@@ -10,7 +10,7 @@
     {                                                                          \
       src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 832.947289;                 \
     }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
@@ -22,7 +22,7 @@
     {                                                                          \
       src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 832.947289;                  \
     }                                                                          \
-  vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM);  \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \
   for (int i = 0; i < NUM; i++)                                                \
     if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i])        \
       __builtin_abort ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
index 8289e53523e..8df59a9a91d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfwcvt-itof-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
index 10c8bdd530f..9f2c9835fd6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
-/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */
#include "vfwcvt-template.h"
@@ -8,26 +8,24 @@
#define SZ 512
#define EPS 1e-4
-#define RUN(TYPE1,TYPE2) \
-  TYPE1 src##TYPE1##TYPE2[SZ]; \
-  TYPE2 dst##TYPE1##TYPE2[SZ]; \
-  for (int i = 0; i < SZ; i++) \
-  {                             \
-    src##TYPE1##TYPE2[i] = (i & 1) ? -i : i;  \
-    src##TYPE1##TYPE2[i] *= 0.0003141592; \
-    dst##TYPE1##TYPE2[i] = -1; \
-  }                             \
-  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2, \
- src##TYPE1##TYPE2, SZ); \
-  for (int i = 0; i < SZ; i++) \
-    assert (__builtin_fabs (dst##TYPE1##TYPE2[i] \
-     - ((i & 1) ? -i : i) * 0.0003141592) < EPS); \
-
-
-#define RUN_ALL() \
- RUN(_Float16, float) \
- RUN(_Float16, double) \
+#define RUN(TYPE1, TYPE2)                                                      \
+  TYPE1 src##TYPE1##TYPE2[SZ];                                                 \
+  TYPE2 dst##TYPE1##TYPE2[SZ];                                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      src##TYPE1##TYPE2[i] = (i & 1) ? -i : i;                                 \
+      src##TYPE1##TYPE2[i] *= 0.0003141592;                                    \
+      dst##TYPE1##TYPE2[i] = -1;                                               \
+    }                                                                          \
+  vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2, src##TYPE1##TYPE2, SZ);            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (__builtin_fabsf16 (dst##TYPE1##TYPE2[i]                            \
+        - ((i & 1) ? -i : i) * 0.0003141592)            \
+     < EPS);
+#define RUN_ALL()                                                              \
+  RUN (_Float16, float)                                                        \
+  RUN (_Float16, double)
int main ()
{
   RUN_ALL()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
index b3469c41c87..b7d86c6fbb5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_v } } } */
-/* { dg-additional-options "-std=gnu99 -O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=gnu99 -O3 --param=riscv-autovec-preference=scalable" } */
#include <malloc.h>
#include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
index 3ae6e598877..6c707e3c6ad 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-1.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
index 9b7e0572c68..4d57fe56e5b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-10.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-10.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
index 7a35d852ede..80f1d54aefa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-11.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-11.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array6_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array6_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
index 51b77da0d5d..29b1683ff67 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-12.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-12.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array7_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) - array7_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] - array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] - array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
index e069a8c7c14..3f9036c2868 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-2.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-2.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -48,8 +50,8 @@ int __attribute__ ((optimize (0))) main ()
{
   TEST_LOOP (_Float16, 7)
   TEST_LOOP (_Float16, 16)
-  TEST_LOOP (_Float16, 77)
+  TEST_LOOP (_Float16, 94)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 199)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
index 8b3994dad96..e9ad951e62f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-3.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-3.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
index ef5bf498e3f..fb0cb1fef6b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-4.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-4.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
index 67fc570c6e3..06f6dbd1dbf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-5.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-5.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2 * 2;                                      \
+ array8_##NUM[i] = val + val2 * 2;                                      \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array6_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array6_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
index d0361849639..b7f931e9d78 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-6.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-6.c"
@@ -15,32 +15,34 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
- array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
+ array1_##NUM[i] = (i & 1) + 5;                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
-    array2_##NUM, NUM);                                         \
+    array2_##NUM, NUM);                                         \
     for (int i = 0; i < NUM; i++)                                              \
       {                                                                        \
- array6_##NUM[i]                                                        \
-   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array7_##NUM[i]);   \
- if (array3_##NUM[i] != array6_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array7_##NUM[i]                                                        \
-   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
- if (array4_##NUM[i] != array7_##NUM[i])                                \
-   __builtin_abort ();                                                  \
- array8_##NUM[i]                                                        \
-   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
- if (array5_##NUM[i] != array8_##NUM[i])                                \
-   __builtin_abort ();                                                  \
+ array6_##NUM[i]                                                        \
+   = (TYPE) (-(array1_##NUM[i] * array2_##NUM[i]) + array7_##NUM[i]);   \
+ if (array3_##NUM[i] != array6_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array7_##NUM[i]                                                        \
+   = (TYPE) (array1_##NUM[i] * array6_##NUM[i] + array7_##NUM[i]);      \
+ if (array4_##NUM[i] != array7_##NUM[i])                                \
+   __builtin_abort ();                                                  \
+ array8_##NUM[i]                                                        \
+   = (TYPE) (array2_##NUM[i] * array7_##NUM[i] + array8_##NUM[i]);      \
+ if (array5_##NUM[i] != array8_##NUM[i])                                \
+   __builtin_abort ();                                                  \
       }                                                                        \
   }
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
index 7838406eba7..3a712fd0dcb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-7.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-7.c"
@@ -30,6 +30,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
index ec2907b3f25..f01cf6d9645 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-8.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-8.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val2 / 3 - val2;                               \
+ array6_##NUM[i] = val - val2 / 3 - val2;                               \
+ array4_##NUM[i] = val - val2 / 2 + val2;                               \
+ array7_##NUM[i] = val - val2 / 2 + val2;                               \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -50,6 +52,5 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
index a855e0cc77f..eb8a105d0f1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run_zvfh-9.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_v && riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_v && riscv_zvfh } } } */
/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */
#include "ternop-9.c"
@@ -15,15 +15,17 @@
     TYPE array8_##NUM[NUM] = {};                                               \
     for (int i = 0; i < NUM; ++i)                                              \
       {                                                                        \
+ int val = NUM / 18.3;                                                  \
+ int val2 = i / 18.7;                                                   \
array1_##NUM[i] = (i & 1) + 5;                                         \
- array2_##NUM[i] = i - NUM / 3;                                         \
- array3_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array6_##NUM[i] = NUM - NUM / 3 - i;                                   \
- array4_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array7_##NUM[i] = NUM - NUM / 2 + i;                                   \
- array5_##NUM[i] = NUM + i * 7;                                         \
- array8_##NUM[i] = NUM + i * 7;                                         \
- asm volatile("" ::: "memory");                                         \
+ array2_##NUM[i] = val2 - val / 3;                                      \
+ array3_##NUM[i] = val - val / 3 - val2;                                \
+ array6_##NUM[i] = val - val / 3 - val2;                                \
+ array4_##NUM[i] = val - val / 2 + val2;                                \
+ array7_##NUM[i] = val - val / 2 + val2;                                \
+ array5_##NUM[i] = val + val2;                                          \
+ array8_##NUM[i] = val + val2;                                          \
+ asm volatile ("" ::: "memory");                                        \
       }                                                                        \
     ternop_##TYPE (array3_##NUM, array4_##NUM, array5_##NUM, array1_##NUM,     \
   array2_##NUM, NUM);                                         \
@@ -50,6 +52,6 @@ int __attribute__ ((optimize (0))) main ()
   TEST_LOOP (_Float16, 16)
   TEST_LOOP (_Float16, 77)
   TEST_LOOP (_Float16, 128)
-  TEST_LOOP (_Float16, 795)
+  TEST_LOOP (_Float16, 299)
   return 0;
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
index 427252c81a3..739d1973229 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-run.c
@@ -3,28 +3,26 @@
#include "vfsqrt-template.h"
-#include <assert.h>
-
#define SZ 255
#define EPS 1e-5
-#define RUN(TYPE) \
-  TYPE a##TYPE[SZ];       \
-  for (int i = 0; i < SZ; i++)       \
-  {                                   \
-    a##TYPE[i] = (TYPE)i;                   \
-  }                                   \
-  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);               \
-  for (int i = 0; i < SZ; i++)       \
-    assert (__builtin_fabs       \
-     (a##TYPE[i] -  __builtin_sqrtf ((TYPE)i)) < EPS); \
+#define RUN(TYPE, SUFFIX)                                                      \
+  TYPE a##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    a##TYPE[i] = (TYPE) i;                                                     \
+  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);                                         \
+  for (int i = 0; i < SZ; i++)                                                 \
+    if (__builtin_fabs##SUFFIX (a##TYPE[i]                                     \
+ - __builtin_sqrt##SUFFIX ((TYPE) i))           \
+ > EPS)                                                                 \
+      __builtin_abort ();
-#define RUN_ALL() \
- RUN(float)                                       \
- RUN(double)                                       \
+#define RUN_ALL()                                                              \
+  RUN (float, f)                                                               \
+  RUN (double, )
int main ()
{
-  RUN_ALL()
+  RUN_ALL ()
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
index a1874c8f9f0..dc3f7c49e24 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv32gcv.c
@@ -7,6 +7,6 @@
    it here instead of in the template directly (which is also
    included by the run test that might need to be linked without
    the extension).  */
-TEST_TYPE3(_Float16)
+TEST_TYPE (_Float16, f16)
/* { dg-final { scan-assembler-times {\tvfsqrt\.v} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
index 955621d4bcd..31d99756f02 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-rv64gcv.c
@@ -7,6 +7,6 @@
    it here instead of in the template directly (which is also
    included by the run test that might need to be linked without
    the extension).  */
-TEST_TYPE3(_Float16)
+TEST_TYPE (_Float16, f16)
/* { dg-final { scan-assembler-times {\tvfsqrt\.v} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
index 314ea646bec..473792d0f1b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-template.h
@@ -1,31 +1,15 @@
#include <stdint-gcc.h>
-#define TEST_TYPE(TYPE) \
+#define TEST_TYPE(TYPE, SUFFIX) \
   __attribute__((noipa)) \
   void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n) \
   { \
     for (int i = 0; i < n; i++) \
-      dst[i] = __builtin_sqrtf (a[i]); \
-  }
-
-#define TEST_TYPE2(TYPE) \
-  __attribute__((noipa)) \
-  void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n) \
-  { \
-    for (int i = 0; i < n; i++) \
-      dst[i] = __builtin_sqrt (a[i]); \
-  }
-
-#define TEST_TYPE3(TYPE) \
-  __attribute__((noipa)) \
-  void vsqrt_##TYPE (TYPE *dst, TYPE *a, int n) \
-  { \
-    for (int i = 0; i < n; i++) \
-      dst[i] = __builtin_sqrtf16 (a[i]); \
+      dst[i] = __builtin_sqrt##SUFFIX (a[i]); \
   }
#define TEST_ALL() \
- TEST_TYPE(float) \
- TEST_TYPE2(double) \
+ TEST_TYPE(float, f) \
+ TEST_TYPE(double, ) \
TEST_ALL()
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
index 5849e486047..c974ef090ba 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vfsqrt-zvfh-run.c
@@ -1,31 +1,31 @@
-/* { dg-do run { target { riscv_zvfh_hw } } } */
+/* { dg-do run { target { riscv_zvfh && riscv_zfh } } } */
/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax -ffast-math" } */
#include "vfsqrt-template.h"
/* We cannot link this without the Zvfh extension so define
    it here instead of in the template directly.  */
-TEST_TYPE3(_Float16)
-
-#include <assert.h>
+TEST_TYPE(_Float16, f16)
#define SZ 255
#define EPS 1e-5
-#define RUN(TYPE) \
-  TYPE a##TYPE[SZ]; \
-  for (int i = 0; i < SZ; i++)     \
-  {                                 \
-    a##TYPE[i] = (TYPE)i;                 \
-  }                                 \
-  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);             \
-  for (int i = 0; i < SZ; i++)     \
-    assert (__builtin_fabs     \
-     (a##TYPE[i] - __builtin_sqrtf ((TYPE)i)) < EPS); \
-
-#define RUN_ALL() \
- RUN(_Float16)                                     \
+#define RUN(TYPE, SUFFIX)                                                      \
+  TYPE a##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = (TYPE) i;                                                   \
+    }                                                                          \
+  vsqrt_##TYPE (a##TYPE, a##TYPE, SZ);                                         \
+  for (int i = 0; i < SZ; i++)                                                 \
+    if (__builtin_fabs##SUFFIX (a##TYPE[i]                                     \
+ - __builtin_sqrt##SUFFIX ((TYPE) i))           \
+ > EPS)                                                                 \
+      __builtin_abort ();
+
+#define RUN_ALL() \
+      RUN (_Float16, f16)
int main ()
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
index 365480ec254..fa8551b158b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run {target { riscv_zvfh_hw } } } */
-/* { dg-additional-options "-Wno-pedantic" } */
+/* { dg-do run {target { riscv_zvfh } } } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
#include <assert.h>
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
index 7e5a73a5ea8..98e673f4ad9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_zvfh_hw } } } */
-/* { dg-additional-options "-Wno-pedantic" } */
+/* { dg-do run { target { riscv_zvfh } } } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
#include <assert.h>
-- 
2.41.0
 
 

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-10 23:00 ` 钟居哲
@ 2023-11-13  8:52   ` Robin Dapp
  2023-11-13  8:55     ` juzhe.zhong
  2023-11-13  8:58     ` juzhe.zhong
  0 siblings, 2 replies; 23+ messages in thread
From: Robin Dapp @ 2023-11-13  8:52 UTC (permalink / raw)
  To: 钟居哲, gcc-patches, palmer, kito.cheng, Jeff Law
  Cc: rdapp.gcc

> FAIL: gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)

Hmm, I don't see those here locally:

PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
...
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize execution test 

Could you please post logs for them?  Maybe a spike vs qemu thing
and/or there is indeed an error in the expander still?

Regards
 Robin

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  8:52   ` Robin Dapp
@ 2023-11-13  8:55     ` juzhe.zhong
  2023-11-13  9:10       ` Robin Dapp
  2023-11-13  8:58     ` juzhe.zhong
  1 sibling, 1 reply; 23+ messages in thread
From: juzhe.zhong @ 2023-11-13  8:55 UTC (permalink / raw)
  To: Robin Dapp, gcc-patches, palmer, kito.cheng, jeffreyalaw; +Cc: Robin Dapp

[-- Attachment #1: Type: text/plain, Size: 2882 bytes --]

The FAIL is as follows:

xgcc: fatal error: Cannot find suitable multilib set for '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'^M
compilation terminated.^M
compiler exited with status 1
FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)
Excess errors:
xgcc: fatal error: Cannot find suitable multilib set for '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
compilation terminated.

My compile option is : --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d

I am using SPIKE but I don't think simulator cause such issue since it is compile issue.

juzhe.zhong@rivai.ai

From: Robin Dapp
Date: 2023-11-13 16:52
To: 钟居哲; gcc-patches; palmer; kito.cheng; Jeff Law
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
> FAIL: gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)

Hmm, I don't see those here locally:

PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
...
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize execution test 

Could you please post logs for them?  Maybe a spike vs qemu thing
and/or there is indeed an error in the expander still?

Regards
Robin

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  8:52   ` Robin Dapp
  2023-11-13  8:55     ` juzhe.zhong
@ 2023-11-13  8:58     ` juzhe.zhong
  1 sibling, 0 replies; 23+ messages in thread
From: juzhe.zhong @ 2023-11-13  8:58 UTC (permalink / raw)
  To: Robin Dapp, gcc-patches, palmer, kito.cheng, jeffreyalaw; +Cc: Robin Dapp

[-- Attachment #1: Type: text/plain, Size: 2173 bytes --]

Also, I didn't enable multi-lib.

juzhe.zhong@rivai.ai

From: Robin Dapp
Date: 2023-11-13 16:52
To: 钟居哲; gcc-patches; palmer; kito.cheng; Jeff Law
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
> FAIL: gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)

Hmm, I don't see those here locally:

PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
PASS: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test
...
PASS: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize execution test 

Could you please post logs for them?  Maybe a spike vs qemu thing
and/or there is indeed an error in the expander still?

Regards
Robin

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  8:55     ` juzhe.zhong
@ 2023-11-13  9:10       ` Robin Dapp
  2023-11-13  9:31         ` Robin Dapp
  0 siblings, 1 reply; 23+ messages in thread
From: Robin Dapp @ 2023-11-13  9:10 UTC (permalink / raw)
  To: juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw; +Cc: rdapp.gcc

> xgcc: fatal error: Cannot find suitable multilib set for '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'^M
> compilation terminated.^M
> compiler exited with status 1
> FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)
> Excess errors:
> xgcc: fatal error: Cannot find suitable multilib set for '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
> compilation terminated.
> 
> My compile option is : --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d
> 
> I am using SPIKE but I don't think simulator cause such issue since it is compile issue.

Ok, that's no spike issue but some config issue.
I also didn't enable multilib and those tests should work
regardless. 

The problem seems to be just with the run tests in those two
directories and they are no different than other tests so it's
probably a problem how they are invoked by the test harness?

I'm going to configure with --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d
to see if there is any difference.

Regards
 Robin

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  9:10       ` Robin Dapp
@ 2023-11-13  9:31         ` Robin Dapp
  2023-11-13  9:34           ` juzhe.zhong
  2023-11-13  9:49           ` Lehua Ding
  0 siblings, 2 replies; 23+ messages in thread
From: Robin Dapp @ 2023-11-13  9:31 UTC (permalink / raw)
  To: juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw; +Cc: rdapp.gcc

> I'm going to configure with --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d
> to see if there is any difference.

No change for me, how do you invoke the testsuite? I.e. Which target board?

Regards
 Robin

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  9:31         ` Robin Dapp
@ 2023-11-13  9:34           ` juzhe.zhong
  2023-11-13  9:49           ` Lehua Ding
  1 sibling, 0 replies; 23+ messages in thread
From: juzhe.zhong @ 2023-11-13  9:34 UTC (permalink / raw)
  To: Robin Dapp, gcc-patches, palmer, kito.cheng, jeffreyalaw
  Cc: Robin Dapp, 丁乐华

[-- Attachment #1: Type: text/plain, Size: 507 bytes --]

Ok. Lehua is going to take care of this issue. He has reproduced it.



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-11-13 17:31
To: juzhe.zhong@rivai.ai; gcc-patches; palmer; kito.cheng; jeffreyalaw
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
> I'm going to configure with --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d
> to see if there is any difference.
 
No change for me, how do you invoke the testsuite? I.e. Which target board?
 
Regards
Robin
 

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  9:31         ` Robin Dapp
  2023-11-13  9:34           ` juzhe.zhong
@ 2023-11-13  9:49           ` Lehua Ding
  2023-11-13  9:59             ` Robin Dapp
  1 sibling, 1 reply; 23+ messages in thread
From: Lehua Ding @ 2023-11-13  9:49 UTC (permalink / raw)
  To: Robin Dapp, juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw

Hi Robin,

Can you show me the compile command in gcc.log for the 
slp-mask-run-1.exe like bellow? I'd like to see the -march option on 
your side.

Executing on host: 
/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/xgcc 
-B/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/ 
 
/work/home/lding/open-source/riscv-gnu-toolchain-push/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c 
  -march=rv64gcv_zvfh_zfh -mabi=lp64d -mcmodel=medany 
-fdiagnostics-plain-output  -O3 -ftree-vectorize -ansi -pedantic-errors 
-march=rv64gcv_zfh -mabi=lp64d -O3 -std=gnu99 -O3 
--param=riscv-autovec-preference=scalable      -lm  -o 
./slp-mask-run-1.exe    (timeout = 6000)
spawn -ignore SIGHUP 
/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/xgcc 
-B/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/ 
/work/home/lding/open-source/riscv-gnu-toolchain-push/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c 
-march=rv64gcv_zvfh_zfh -mabi=lp64d -mcmodel=medany 
-fdiagnostics-plain-output -O3 -ftree-vectorize -ansi -pedantic-errors 
-march=rv64gcv_zfh -mabi=lp64d -O3 -std=gnu99 -O3 
--param=riscv-autovec-preference=scalable -lm -o ./slp-mask-run-1.exe

On 2023/11/13 17:31, Robin Dapp wrote:
>> I'm going to configure with --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d
>> to see if there is any difference.
> 
> No change for me, how do you invoke the testsuite? I.e. Which target board?
> 
> Regards
>   Robin

-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai


^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  9:49           ` Lehua Ding
@ 2023-11-13  9:59             ` Robin Dapp
  2023-11-13 10:14               ` Lehua Ding
  0 siblings, 1 reply; 23+ messages in thread
From: Robin Dapp @ 2023-11-13  9:59 UTC (permalink / raw)
  To: Lehua Ding, juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw
  Cc: rdapp.gcc

Hi Lehua,

> Executing on host: /work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/xgcc -B/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/
> /work/home/lding/open-source/riscv-gnu-toolchain-push/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c  -march=rv64gcv_zvfh_zfh -mabi=lp64d -mcmodel=medany -fdiagnostics-plain-output  -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv64gcv_zfh -mabi=lp64d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable      -lm  -o ./slp-mask-run-1.exe    (timeout = 6000)
> spawn -ignore SIGHUP /work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/xgcc -B/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/ /work/home/lding/open-source/riscv-gnu-toolchain-push/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -march=rv64gcv_zvfh_zfh -mabi=lp64d -mcmodel=medany -fdiagnostics-plain-output -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv64gcv_zfh -mabi=lp64d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable -lm -o ./slp-mask-run-1.exe


Executing on host: /home/rdapp/projects/gcc32/build/gcc/xgcc -B/home/rdapp/projects/gcc32/build/gcc/  /home/rdapp/projects/gcc32/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c  -march=rv32gcv_zvfh   -fdiagnostics-plain-output  -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv32gcv_zfh -mabi=ilp32d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable  -lm  -o ./slp-mask-run-1.exe    (timeout = 300)                                                                                                                                                 
spawn -ignore SIGHUP /home/rdapp/projects/gcc32/build/gcc/xgcc -B/home/rdapp/projects/gcc32/build/gcc/ /home/rdapp/projects/gcc32/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -march=rv32gcv_zvfh -fdiagnostics-plain-output -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv32gcv_zfh -mabi=ilp32d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable -lm -o ./slp-mask-run-1.exe

That's for the 32-bit version now (yours looks 64 bit).

Regards
 Robin


^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13  9:59             ` Robin Dapp
@ 2023-11-13 10:14               ` Lehua Ding
  2023-11-13 10:17                 ` Robin Dapp
  0 siblings, 1 reply; 23+ messages in thread
From: Lehua Ding @ 2023-11-13 10:14 UTC (permalink / raw)
  To: Robin Dapp, juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw



On 2023/11/13 17:59, Robin Dapp wrote:
> Hi Lehua,
> 
>> Executing on host: /work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/xgcc -B/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/
>> /work/home/lding/open-source/riscv-gnu-toolchain-push/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c  -march=rv64gcv_zvfh_zfh -mabi=lp64d -mcmodel=medany -fdiagnostics-plain-output  -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv64gcv_zfh -mabi=lp64d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable      -lm  -o ./slp-mask-run-1.exe    (timeout = 6000)
>> spawn -ignore SIGHUP /work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/xgcc -B/work/home/lding/open-source/riscv-gnu-toolchain-push/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/build-gcc-newlib-stage2/gcc/ /work/home/lding/open-source/riscv-gnu-toolchain-push/gcc/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -march=rv64gcv_zvfh_zfh -mabi=lp64d -mcmodel=medany -fdiagnostics-plain-output -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv64gcv_zfh -mabi=lp64d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable -lm -o ./slp-mask-run-1.exe
> 
> 
> Executing on host: /home/rdapp/projects/gcc32/build/gcc/xgcc -B/home/rdapp/projects/gcc32/build/gcc/  /home/rdapp/projects/gcc32/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c  -march=rv32gcv_zvfh   -fdiagnostics-plain-output  -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv32gcv_zfh -mabi=ilp32d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable  -lm  -o ./slp-mask-run-1.exe    (timeout = 300)
> spawn -ignore SIGHUP /home/rdapp/projects/gcc32/build/gcc/xgcc -B/home/rdapp/projects/gcc32/build/gcc/ /home/rdapp/projects/gcc32/gcc/testsuite/gcc.target/riscv/rvv/autovec/slp-mask-run-1.c -march=rv32gcv_zvfh -fdiagnostics-plain-output -O3 -ftree-vectorize -ansi -pedantic-errors -march=rv32gcv_zfh -mabi=ilp32d -O3 -std=gnu99 -O3 --param=riscv-autovec-preference=scalable -lm -o ./slp-mask-run-1.exe

Looks like your configure is --with-march=rv32gcv_zvfh, can you change 
to --with-march=rv32gcv_zvfh_zfh?

-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai


^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 10:14               ` Lehua Ding
@ 2023-11-13 10:17                 ` Robin Dapp
  2023-11-13 10:22                   ` juzhe.zhong
  0 siblings, 1 reply; 23+ messages in thread
From: Robin Dapp @ 2023-11-13 10:17 UTC (permalink / raw)
  To: Lehua Ding, juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw
  Cc: rdapp.gcc

> Looks like your configure is --with-march=rv32gcv_zvfh, can you change to --with-march=rv32gcv_zvfh_zfh?

From config.log:

  $ ../configure --prefix=/home/rdapp/projects/builds/gcc --target=riscv32-unknown-linux-gnu --disable-nls --disable-multilib --disable-bootstrap --with-sysroot=/home/rdapp/projects/x-tools/riscv32-unknown-linux-gnu/riscv32-unknown-linux-gnu/sysroot --disable-libsanitizer --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d --enable-languages=c,c++

How do you invoke the testsuite and which target board?

Regards
 Robin

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 10:17                 ` Robin Dapp
@ 2023-11-13 10:22                   ` juzhe.zhong
  2023-11-13 10:32                     ` Lehua Ding
  0 siblings, 1 reply; 23+ messages in thread
From: juzhe.zhong @ 2023-11-13 10:22 UTC (permalink / raw)
  To: Robin Dapp, 丁乐华,
	gcc-patches, palmer, kito.cheng, jeffreyalaw
  Cc: Robin Dapp

[-- Attachment #1: Type: text/plain, Size: 936 bytes --]

If there is a difference between them. I think we should fix riscv-common.cc.
Since I think "zvfh_zfh" should not be different with "zfh_zvfh"



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-11-13 18:17
To: Lehua Ding; juzhe.zhong@rivai.ai; gcc-patches; palmer; kito.cheng; jeffreyalaw
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
> Looks like your configure is --with-march=rv32gcv_zvfh, can you change to --with-march=rv32gcv_zvfh_zfh?
 
From config.log:
 
  $ ../configure --prefix=/home/rdapp/projects/builds/gcc --target=riscv32-unknown-linux-gnu --disable-nls --disable-multilib --disable-bootstrap --with-sysroot=/home/rdapp/projects/x-tools/riscv32-unknown-linux-gnu/riscv32-unknown-linux-gnu/sysroot --disable-libsanitizer --with-arch=rv32gcv_zfh_zvfh --with-abi=ilp32d --enable-languages=c,c++
 
How do you invoke the testsuite and which target board?
 
Regards
Robin
 

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 10:22                   ` juzhe.zhong
@ 2023-11-13 10:32                     ` Lehua Ding
  2023-11-13 10:33                       ` Robin Dapp
  0 siblings, 1 reply; 23+ messages in thread
From: Lehua Ding @ 2023-11-13 10:32 UTC (permalink / raw)
  To: juzhe.zhong, Robin Dapp, gcc-patches, palmer, kito.cheng, jeffreyalaw


On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
> If there is a difference between them. I think we should fix 
> riscv-common.cc.
> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"

It's possible. Let me debug it and see if there's a problem.

-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 10:32                     ` Lehua Ding
@ 2023-11-13 10:33                       ` Robin Dapp
  2023-11-13 10:35                         ` Lehua Ding
  2023-11-13 11:13                         ` Lehua Ding
  0 siblings, 2 replies; 23+ messages in thread
From: Robin Dapp @ 2023-11-13 10:33 UTC (permalink / raw)
  To: Lehua Ding, juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw
  Cc: rdapp.gcc

> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
>> If there is a difference between them. I think we should fix riscv-common.cc.
>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
> 
> It's possible. Let me debug it and see if there's a problem.

I don't think it is different.  Just checked and it still works for me.

Could you please tell me how you invoke the testsuite?

Regards
 Robin


^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 10:33                       ` Robin Dapp
@ 2023-11-13 10:35                         ` Lehua Ding
  2023-11-13 11:13                         ` Lehua Ding
  1 sibling, 0 replies; 23+ messages in thread
From: Lehua Ding @ 2023-11-13 10:35 UTC (permalink / raw)
  To: Robin Dapp, juzhe.zhong, gcc-patches, palmer, kito.cheng, jeffreyalaw



On 2023/11/13 18:33, Robin Dapp wrote:
>> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
>>> If there is a difference between them. I think we should fix riscv-common.cc.
>>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
>>
>> It's possible. Let me debug it and see if there's a problem.
> 
> I don't think it is different.  Just checked and it still works for me.
> 
> Could you please tell me how you invoke the testsuite?

We use the riscv-gnu-toolchain and run this `make report-newlib 
SIM=spike RUNTESTFLAGS="rvv.exp" -j100`

-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai


^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 10:33                       ` Robin Dapp
  2023-11-13 10:35                         ` Lehua Ding
@ 2023-11-13 11:13                         ` Lehua Ding
  2023-11-13 11:27                           ` Lehua Ding
  1 sibling, 1 reply; 23+ messages in thread
From: Lehua Ding @ 2023-11-13 11:13 UTC (permalink / raw)
  To: Robin Dapp; +Cc: juzhe.zhong, gcc-patches, palmer, jeffreyalaw, kito.cheng

Hi Robin,

On 2023/11/13 18:33, Robin Dapp wrote:
>> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
>>> If there is a difference between them. I think we should fix riscv-common.cc.
>>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
>>
>> It's possible. Let me debug it and see if there's a problem.
> 
> I don't think it is different.  Just checked and it still works for me.
> 
> Could you please tell me how you invoke the testsuite?

This looks to be the difference between the linux and elf versions of 
gcc. The elf version of gcc we are build will have this problem, the 
linux version of gcc will not. I think the linux version of gcc has a 
wrong behavior.:

➜  riscv-gnu-toolchain-push git:(tintin-dev) 
./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-newlib-spike-debug/install/bin/riscv32-unknown-elf-gcc 
-march=rv32gcv_zfh 
build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
riscv32-unknown-elf-gcc: fatal error: Cannot find suitable multilib set 
for 
'-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
compilation terminated.
➜  riscv-gnu-toolchain-push git:(tintin-dev) 
./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-linux-spike-debug/install/bin/riscv32-unknown-linux-gnu-gcc 
-march=rv32gcv_zfh 
build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c


-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 11:13                         ` Lehua Ding
@ 2023-11-13 11:27                           ` Lehua Ding
  2023-11-15 10:47                             ` 钟居哲
  0 siblings, 1 reply; 23+ messages in thread
From: Lehua Ding @ 2023-11-13 11:27 UTC (permalink / raw)
  To: kito.cheng, Robin Dapp; +Cc: juzhe.zhong, gcc-patches, palmer, jeffreyalaw

Hi Kito,

On 2023/11/13 19:13, Lehua Ding wrote:
> Hi Robin,
> 
> On 2023/11/13 18:33, Robin Dapp wrote:
>>> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
>>>> If there is a difference between them. I think we should fix 
>>>> riscv-common.cc.
>>>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
>>>
>>> It's possible. Let me debug it and see if there's a problem.
>>
>> I don't think it is different.  Just checked and it still works for me.
>>
>> Could you please tell me how you invoke the testsuite?
> 
> This looks to be the difference between the linux and elf versions of 
> gcc. The elf version of gcc we are build will have this problem, the 
> linux version of gcc will not. I think the linux version of gcc has a 
> wrong behavior.:
> 
> ➜  riscv-gnu-toolchain-push git:(tintin-dev) 
> ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-newlib-spike-debug/install/bin/riscv32-unknown-elf-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
> riscv32-unknown-elf-gcc: fatal error: Cannot find suitable multilib set 
> for 
> '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
> compilation terminated.
> ➜  riscv-gnu-toolchain-push git:(tintin-dev) 
> ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-linux-spike-debug/install/bin/riscv32-unknown-linux-gnu-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
> 

It looks like this commit[1] from you make the difference between elf 
and linux. Can you help to see if it makes sense to behave differently 
now? elf version --with-arch is rv32gcv_zvfh_zfh, and the user will get 
an error with -march=rv32gcv_zfh. linux version will not.

[1] https://github.com/gcc-mirror/gcc/commit/17d683d

-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-13 11:27                           ` Lehua Ding
@ 2023-11-15 10:47                             ` 钟居哲
  2023-11-17  8:29                               ` Kito Cheng
  0 siblings, 1 reply; 23+ messages in thread
From: 钟居哲 @ 2023-11-15 10:47 UTC (permalink / raw)
  To: 丁乐华, kito.cheng, rdapp.gcc
  Cc: gcc-patches, palmer, Jeff Law

[-- Attachment #1: Type: text/plain, Size: 3398 bytes --]

Hi, Kito. Could you take a look at this issue?

-march parser is consistent between non-linux and linux.

You can simplify verify it with these cases:

FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)

These cases failed on non-linux toolchain, but pass on linux toolchain.
This consistency is caused by your previous multilib patch as Lehua said:
https://github.com/gcc-mirror/gcc/commit/17d683d 




juzhe.zhong@rivai.ai
 
From: Lehua Ding
Date: 2023-11-13 19:27
To: kito.cheng; Robin Dapp
CC: juzhe.zhong@rivai.ai; gcc-patches; palmer; jeffreyalaw
Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
Hi Kito,
 
On 2023/11/13 19:13, Lehua Ding wrote:
> Hi Robin,
> 
> On 2023/11/13 18:33, Robin Dapp wrote:
>>> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
>>>> If there is a difference between them. I think we should fix 
>>>> riscv-common.cc.
>>>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
>>>
>>> It's possible. Let me debug it and see if there's a problem.
>>
>> I don't think it is different.  Just checked and it still works for me.
>>
>> Could you please tell me how you invoke the testsuite?
> 
> This looks to be the difference between the linux and elf versions of 
> gcc. The elf version of gcc we are build will have this problem, the 
> linux version of gcc will not. I think the linux version of gcc has a 
> wrong behavior.:
> 
> ➜  riscv-gnu-toolchain-push git:(tintin-dev) 
> ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-newlib-spike-debug/install/bin/riscv32-unknown-elf-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
> riscv32-unknown-elf-gcc: fatal error: Cannot find suitable multilib set 
> for 
> '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
> compilation terminated.
> ➜  riscv-gnu-toolchain-push git:(tintin-dev) 
> ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-linux-spike-debug/install/bin/riscv32-unknown-linux-gnu-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
> 
 
It looks like this commit[1] from you make the difference between elf 
and linux. Can you help to see if it makes sense to behave differently 
now? elf version --with-arch is rv32gcv_zvfh_zfh, and the user will get 
an error with -march=rv32gcv_zfh. linux version will not.
 
[1] https://github.com/gcc-mirror/gcc/commit/17d683d
 
-- 
Best,
Lehua (RiVAI)
lehua.ding@rivai.ai

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-15 10:47                             ` 钟居哲
@ 2023-11-17  8:29                               ` Kito Cheng
  2023-11-17  8:54                                 ` Lehua Ding
  0 siblings, 1 reply; 23+ messages in thread
From: Kito Cheng @ 2023-11-17  8:29 UTC (permalink / raw)
  To: 钟居哲
  Cc: 丁乐华, rdapp.gcc, gcc-patches, palmer, Jeff Law

Oh, ok I got why it happened and it is definitely caused by my patch
(but not that one, it is caused by another patch[1]), let me describe
the reason why I try to emit errors. RISC-V has a crazy number of
possible extension combinations, so it's easy to make some mistakes by
using some unsupported extension combination and generating error
messages that are difficult to understand.

Give some practical example here:
config a RISC-V toolchain with --with-arch=rv64gc --with-abi=lp64d
also build with multilib for rv32i/ilp32 and rv64imac/lp64

Now users try to use that toolchain with -march=rv32gc -mabi=ilp32d,
what will happen if there is no such error emitted?
GCC will fail back to default multilib which is rv64gc/lp64d, and then
you may got error message like bellow:

ABI is incompatible with that of the selected emulation:
 target emulation `elf32-littleriscv' does not match `elf64-littleriscv'

Experienced toolchain developers or experienced FAE may know what happened,
but the error message is really not meaningful for most users - and
then they will go back to waste our time :P

So that's the background why I design and implement that mechnish.

You may ask: hey why not implement the same mechnish for linux?
Ok - the answer is simple - linux typically will build with
rv64gc/lp64d as base ,
No much different combination like bare metal environment.

*However* I am not trying to say: there is no solution there, let's
give up on testing with bare metal.

One possible solution is Jin Ma's patch[2], he proposed
-mdisable-multilib-check to suppress this check, but it's kind of
dangerous in most cases, this may make it compile, but will get
another error soon.

So...I think the right solution should be adding more checks before
running those tests, e.g.checking rv32gv/ilp32d can run before running
those testcase.

[1] https://github.com/gcc-mirror/gcc/commit/d72ca12b846a9f5c01674b280b1817876c77888f
[2] https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619234.html

On Wed, Nov 15, 2023 at 6:48 PM 钟居哲 <juzhe.zhong@rivai.ai> wrote:
>
> Hi, Kito. Could you take a look at this issue?
>
> -march parser is consistent between non-linux and linux.
>
> You can simplify verify it with these cases:
>
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)
>
> These cases failed on non-linux toolchain, but pass on linux toolchain.
> This consistency is caused by your previous multilib patch as Lehua said:
> https://github.com/gcc-mirror/gcc/commit/17d683d
>
>
> ________________________________
> juzhe.zhong@rivai.ai
>
>
> From: Lehua Ding
> Date: 2023-11-13 19:27
> To: kito.cheng; Robin Dapp
> CC: juzhe.zhong@rivai.ai; gcc-patches; palmer; jeffreyalaw
> Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
> Hi Kito,
>
> On 2023/11/13 19:13, Lehua Ding wrote:
> > Hi Robin,
> >
> > On 2023/11/13 18:33, Robin Dapp wrote:
> >>> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
> >>>> If there is a difference between them. I think we should fix
> >>>> riscv-common.cc.
> >>>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
> >>>
> >>> It's possible. Let me debug it and see if there's a problem.
> >>
> >> I don't think it is different.  Just checked and it still works for me.
> >>
> >> Could you please tell me how you invoke the testsuite?
> >
> > This looks to be the difference between the linux and elf versions of
> > gcc. The elf version of gcc we are build will have this problem, the
> > linux version of gcc will not. I think the linux version of gcc has a
> > wrong behavior.:
> >
> > ➜  riscv-gnu-toolchain-push git:(tintin-dev)
> > ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-newlib-spike-debug/install/bin/riscv32-unknown-elf-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
> > riscv32-unknown-elf-gcc: fatal error: Cannot find suitable multilib set
> > for
> > '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
> > compilation terminated.
> > ➜  riscv-gnu-toolchain-push git:(tintin-dev)
> > ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-linux-spike-debug/install/bin/riscv32-unknown-linux-gnu-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
> >
>
> It looks like this commit[1] from you make the difference between elf
> and linux. Can you help to see if it makes sense to behave differently
> now? elf version --with-arch is rv32gcv_zvfh_zfh, and the user will get
> an error with -march=rv32gcv_zfh. linux version will not.
>
> [1] https://github.com/gcc-mirror/gcc/commit/17d683d
>
> --
> Best,
> Lehua (RiVAI)
> lehua.ding@rivai.ai

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-17  8:29                               ` Kito Cheng
@ 2023-11-17  8:54                                 ` Lehua Ding
  2023-11-17  8:56                                   ` Robin Dapp
  0 siblings, 1 reply; 23+ messages in thread
From: Lehua Ding @ 2023-11-17  8:54 UTC (permalink / raw)
  To: Kito Cheng, 钟居哲
  Cc: rdapp.gcc, gcc-patches, palmer, Jeff Law

Hi Kito and Robin,

So, going back to our testcases that reported errors with this, I don't 
think we should explicitly specify -march and -mabi when compiling a 
runnable program, but use the defaults (--with-arch). Most of our 
current runnable testcases adhere to this convention, except for the 
ones we are discussing now, who are explicitly setting -march to 
rv32gcv_zfh or rv64gcv_zfh inside rvv.exp file.

On 2023/11/17 16:29, Kito Cheng wrote:
> Oh, ok I got why it happened and it is definitely caused by my patch
> (but not that one, it is caused by another patch[1]), let me describe
> the reason why I try to emit errors. RISC-V has a crazy number of
> possible extension combinations, so it's easy to make some mistakes by
> using some unsupported extension combination and generating error
> messages that are difficult to understand.
> 
> Give some practical example here:
> config a RISC-V toolchain with --with-arch=rv64gc --with-abi=lp64d
> also build with multilib for rv32i/ilp32 and rv64imac/lp64
> 
> Now users try to use that toolchain with -march=rv32gc -mabi=ilp32d,
> what will happen if there is no such error emitted?
> GCC will fail back to default multilib which is rv64gc/lp64d, and then
> you may got error message like bellow:
> 
> ABI is incompatible with that of the selected emulation:
>   target emulation `elf32-littleriscv' does not match `elf64-littleriscv'
> 
> Experienced toolchain developers or experienced FAE may know what happened,
> but the error message is really not meaningful for most users - and
> then they will go back to waste our time :P
> 
> So that's the background why I design and implement that mechnish.
> 
> You may ask: hey why not implement the same mechnish for linux?
> Ok - the answer is simple - linux typically will build with
> rv64gc/lp64d as base ,
> No much different combination like bare metal environment.
> 
> *However* I am not trying to say: there is no solution there, let's
> give up on testing with bare metal.
> 
> One possible solution is Jin Ma's patch[2], he proposed
> -mdisable-multilib-check to suppress this check, but it's kind of
> dangerous in most cases, this may make it compile, but will get
> another error soon.
> 
> So...I think the right solution should be adding more checks before
> running those tests, e.g.checking rv32gv/ilp32d can run before running
> those testcase.
> 
> [1] https://github.com/gcc-mirror/gcc/commit/d72ca12b846a9f5c01674b280b1817876c77888f
> [2] https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619234.html
> 
> On Wed, Nov 15, 2023 at 6:48 PM 钟居哲 <juzhe.zhong@rivai.ai> wrote:
>>
>> Hi, Kito. Could you take a look at this issue?
>>
>> -march parser is consistent between non-linux and linux.
>>
>> You can simplify verify it with these cases:
>>
>> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
>> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
>> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
>> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
>> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
>> FAIL: gcc.target/riscv/rvv/autovec/vmv-imm-run.c -O3 -ftree-vectorize (test for excess errors)
>>
>> These cases failed on non-linux toolchain, but pass on linux toolchain.
>> This consistency is caused by your previous multilib patch as Lehua said:
>> https://github.com/gcc-mirror/gcc/commit/17d683d
>>
>>
>> ________________________________
>> juzhe.zhong@rivai.ai
>>
>>
>> From: Lehua Ding
>> Date: 2023-11-13 19:27
>> To: kito.cheng; Robin Dapp
>> CC: juzhe.zhong@rivai.ai; gcc-patches; palmer; jeffreyalaw
>> Subject: Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
>> Hi Kito,
>>
>> On 2023/11/13 19:13, Lehua Ding wrote:
>>> Hi Robin,
>>>
>>> On 2023/11/13 18:33, Robin Dapp wrote:
>>>>> On 2023/11/13 18:22, juzhe.zhong@rivai.ai wrote:
>>>>>> If there is a difference between them. I think we should fix
>>>>>> riscv-common.cc.
>>>>>> Since I think "zvfh_zfh" should not be different with "zfh_zvfh"
>>>>>
>>>>> It's possible. Let me debug it and see if there's a problem.
>>>>
>>>> I don't think it is different.  Just checked and it still works for me.
>>>>
>>>> Could you please tell me how you invoke the testsuite?
>>>
>>> This looks to be the difference between the linux and elf versions of
>>> gcc. The elf version of gcc we are build will have this problem, the
>>> linux version of gcc will not. I think the linux version of gcc has a
>>> wrong behavior.:
>>>
>>> ➜  riscv-gnu-toolchain-push git:(tintin-dev)
>>> ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-newlib-spike-debug/install/bin/riscv32-unknown-elf-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
>>> riscv32-unknown-elf-gcc: fatal error: Cannot find suitable multilib set
>>> for
>>> '-march=rv32imafdcv_zicsr_zifencei_zfh_zfhmin_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=ilp32d'
>>> compilation terminated.
>>> ➜  riscv-gnu-toolchain-push git:(tintin-dev)
>>> ./build/dev-rv32gcv_zfh_zvfh-ilp32d-medany-linux-spike-debug/install/bin/riscv32-unknown-linux-gnu-gcc -march=rv32gcv_zfh build/dev-rv64gcv_zvfh_zfh-lp64d-medany-newlib-spike-debug/hello.c
>>>
>>
>> It looks like this commit[1] from you make the difference between elf
>> and linux. Can you help to see if it makes sense to behave differently
>> now? elf version --with-arch is rv32gcv_zvfh_zfh, and the user will get
>> an error with -march=rv32gcv_zfh. linux version will not.
>>
>> [1] https://github.com/gcc-mirror/gcc/commit/17d683d
>>
>> --
>> Best,
>> Lehua (RiVAI)
>> lehua.ding@rivai.ai
> 

-- 
Best,
Lehua (RiVAI)

^ permalink raw reply	[flat|nested] 23+ messages in thread

* Re: [PATCH] RISC-V: testsuite: Fix 32-bit FAILs.
  2023-11-17  8:54                                 ` Lehua Ding
@ 2023-11-17  8:56                                   ` Robin Dapp
  0 siblings, 0 replies; 23+ messages in thread
From: Robin Dapp @ 2023-11-17  8:56 UTC (permalink / raw)
  To: Lehua Ding, Kito Cheng, 钟居哲
  Cc: rdapp.gcc, gcc-patches, palmer, Jeff Law


> So, going back to our testcases that reported errors with this, I
> don't think we should explicitly specify -march and -mabi when
> compiling a runnable program, but use the defaults (--with-arch).
> Most of our current runnable testcases adhere to this convention,
> except for the ones we are discussing now, who are explicitly setting
> -march to rv32gcv_zfh or rv64gcv_zfh inside rvv.exp file.

Yes, agreed.  Run tests should check if they can run on the current
target and then run (or not).

Regards
 Robin


^ permalink raw reply	[flat|nested] 23+ messages in thread

end of thread, other threads:[~2023-11-17  8:56 UTC | newest]

Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-11-10 12:51 [PATCH] RISC-V: testsuite: Fix 32-bit FAILs Robin Dapp
2023-11-10 13:26 ` 钟居哲
2023-11-10 23:00 ` 钟居哲
2023-11-13  8:52   ` Robin Dapp
2023-11-13  8:55     ` juzhe.zhong
2023-11-13  9:10       ` Robin Dapp
2023-11-13  9:31         ` Robin Dapp
2023-11-13  9:34           ` juzhe.zhong
2023-11-13  9:49           ` Lehua Ding
2023-11-13  9:59             ` Robin Dapp
2023-11-13 10:14               ` Lehua Ding
2023-11-13 10:17                 ` Robin Dapp
2023-11-13 10:22                   ` juzhe.zhong
2023-11-13 10:32                     ` Lehua Ding
2023-11-13 10:33                       ` Robin Dapp
2023-11-13 10:35                         ` Lehua Ding
2023-11-13 11:13                         ` Lehua Ding
2023-11-13 11:27                           ` Lehua Ding
2023-11-15 10:47                             ` 钟居哲
2023-11-17  8:29                               ` Kito Cheng
2023-11-17  8:54                                 ` Lehua Ding
2023-11-17  8:56                                   ` Robin Dapp
2023-11-13  8:58     ` juzhe.zhong

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