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* [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
@ 2023-06-29  6:00 pan2.li
  2023-06-29  6:12 ` juzhe.zhong
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: pan2.li @ 2023-06-29  6:00 UTC (permalink / raw)
  To: gcc-patches; +Cc: juzhe.zhong, kito.cheng, pan2.li, yanzhang.wang, jeffreyalaw

From: Pan Li <pan2.li@intel.com>

This patch would like to refactor the vxrm_mode attr for duplicated
eq_attr condition. The common condition of attr is extraced to one
place instead of many places.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/vector.md: Refactor the common condition.
---
 gcc/config/riscv/vector.md | 39 ++++++++++++++++++++++----------------
 1 file changed, 23 insertions(+), 16 deletions(-)

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 406f96439ec..ebb7648b4df 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -445,22 +445,29 @@ (define_attr "avl_type" ""
 ;; Defines rounding mode of an fixed-point operation.
 
 (define_attr "vxrm_mode" "rnu,rne,rdn,rod,none"
-  (cond [(and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-	      (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNU"))
-	 (const_string "rnu")
-
-	 (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-	      (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNE"))
-	 (const_string "rne")
-
-	 (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-	      (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RDN"))
-	 (const_string "rdn")
-
-	 (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-	      (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_ROD"))
-	 (const_string "rod")]
-	 (const_string "none")))
+  (cond
+    [
+      (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
+      (cond
+	[
+	  (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNU")
+	  (const_string "rnu")
+
+	  (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNE")
+	  (const_string "rne")
+
+	  (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RDN")
+	  (const_string "rdn")
+
+	  (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_ROD")
+	  (const_string "rod")
+	]
+	(const_string "none")
+      )
+    ]
+    (const_string "none")
+  )
+)
 
 ;; -----------------------------------------------------------------
 ;; ---- Miscellaneous Operations
-- 
2.34.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
  2023-06-29  6:00 [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal pan2.li
@ 2023-06-29  6:12 ` juzhe.zhong
  2023-06-29  6:23 ` juzhe.zhong
  2023-06-29 20:58 ` Jeff Law
  2 siblings, 0 replies; 5+ messages in thread
From: juzhe.zhong @ 2023-06-29  6:12 UTC (permalink / raw)
  To: pan2.li, gcc-patches; +Cc: Kito.cheng, pan2.li, yanzhang.wang, jeffreyalaw

[-- Attachment #1: Type: text/plain, Size: 2407 bytes --]

It's meaningless. Drop this patch.



juzhe.zhong@rivai.ai
 
From: pan2.li
Date: 2023-06-29 14:00
To: gcc-patches
CC: juzhe.zhong; kito.cheng; pan2.li; yanzhang.wang; jeffreyalaw
Subject: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
From: Pan Li <pan2.li@intel.com>
 
This patch would like to refactor the vxrm_mode attr for duplicated
eq_attr condition. The common condition of attr is extraced to one
place instead of many places.
 
Signed-off-by: Pan Li <pan2.li@intel.com>
 
gcc/ChangeLog:
 
* config/riscv/vector.md: Refactor the common condition.
---
gcc/config/riscv/vector.md | 39 ++++++++++++++++++++++----------------
1 file changed, 23 insertions(+), 16 deletions(-)
 
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 406f96439ec..ebb7648b4df 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -445,22 +445,29 @@ (define_attr "avl_type" ""
;; Defines rounding mode of an fixed-point operation.
(define_attr "vxrm_mode" "rnu,rne,rdn,rod,none"
-  (cond [(and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNU"))
- (const_string "rnu")
-
- (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNE"))
- (const_string "rne")
-
- (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RDN"))
- (const_string "rdn")
-
- (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_ROD"))
- (const_string "rod")]
- (const_string "none")))
+  (cond
+    [
+      (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
+      (cond
+ [
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNU")
+   (const_string "rnu")
+
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNE")
+   (const_string "rne")
+
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RDN")
+   (const_string "rdn")
+
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_ROD")
+   (const_string "rod")
+ ]
+ (const_string "none")
+      )
+    ]
+    (const_string "none")
+  )
+)
;; -----------------------------------------------------------------
;; ---- Miscellaneous Operations
-- 
2.34.1
 
 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
  2023-06-29  6:00 [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal pan2.li
  2023-06-29  6:12 ` juzhe.zhong
@ 2023-06-29  6:23 ` juzhe.zhong
  2023-06-29 20:58 ` Jeff Law
  2 siblings, 0 replies; 5+ messages in thread
From: juzhe.zhong @ 2023-06-29  6:23 UTC (permalink / raw)
  To: pan2.li, gcc-patches; +Cc: Kito.cheng, pan2.li, yanzhang.wang, jeffreyalaw

[-- Attachment #1: Type: text/plain, Size: 2707 bytes --]

Oh. I see. You are not only changing the format. Sorry about that I didn't notice.

originally, each rounding mode has "vsalu,vaalu,vsmul,vsshift,vnclip"

Now, you change all rounding mode sharing same "vsalu,vaalu,vsmul,vsshift,vnclip".

When we want to remove some of the insn, we don't need to remove 4 places.

LGTM. Thanks.


juzhe.zhong@rivai.ai
 
From: pan2.li
Date: 2023-06-29 14:00
To: gcc-patches
CC: juzhe.zhong; kito.cheng; pan2.li; yanzhang.wang; jeffreyalaw
Subject: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
From: Pan Li <pan2.li@intel.com>
 
This patch would like to refactor the vxrm_mode attr for duplicated
eq_attr condition. The common condition of attr is extraced to one
place instead of many places.
 
Signed-off-by: Pan Li <pan2.li@intel.com>
 
gcc/ChangeLog:
 
* config/riscv/vector.md: Refactor the common condition.
---
gcc/config/riscv/vector.md | 39 ++++++++++++++++++++++----------------
1 file changed, 23 insertions(+), 16 deletions(-)
 
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 406f96439ec..ebb7648b4df 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -445,22 +445,29 @@ (define_attr "avl_type" ""
;; Defines rounding mode of an fixed-point operation.
(define_attr "vxrm_mode" "rnu,rne,rdn,rod,none"
-  (cond [(and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNU"))
- (const_string "rnu")
-
- (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNE"))
- (const_string "rne")
-
- (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RDN"))
- (const_string "rdn")
-
- (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-       (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_ROD"))
- (const_string "rod")]
- (const_string "none")))
+  (cond
+    [
+      (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
+      (cond
+ [
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNU")
+   (const_string "rnu")
+
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNE")
+   (const_string "rne")
+
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RDN")
+   (const_string "rdn")
+
+   (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_ROD")
+   (const_string "rod")
+ ]
+ (const_string "none")
+      )
+    ]
+    (const_string "none")
+  )
+)
;; -----------------------------------------------------------------
;; ---- Miscellaneous Operations
-- 
2.34.1
 
 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
  2023-06-29  6:00 [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal pan2.li
  2023-06-29  6:12 ` juzhe.zhong
  2023-06-29  6:23 ` juzhe.zhong
@ 2023-06-29 20:58 ` Jeff Law
  2023-06-30 11:15   ` Li, Pan2
  2 siblings, 1 reply; 5+ messages in thread
From: Jeff Law @ 2023-06-29 20:58 UTC (permalink / raw)
  To: pan2.li, gcc-patches; +Cc: juzhe.zhong, kito.cheng, yanzhang.wang



On 6/29/23 00:00, pan2.li@intel.com wrote:
> From: Pan Li <pan2.li@intel.com>
> 
> This patch would like to refactor the vxrm_mode attr for duplicated
> eq_attr condition. The common condition of attr is extraced to one
> place instead of many places.
> 
> Signed-off-by: Pan Li <pan2.li@intel.com>
> 
> gcc/ChangeLog:
> 
> 	* config/riscv/vector.md: Refactor the common condition.
OK
jeff

^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal
  2023-06-29 20:58 ` Jeff Law
@ 2023-06-30 11:15   ` Li, Pan2
  0 siblings, 0 replies; 5+ messages in thread
From: Li, Pan2 @ 2023-06-30 11:15 UTC (permalink / raw)
  To: Jeff Law, gcc-patches; +Cc: juzhe.zhong, kito.cheng, Wang, Yanzhang

Committed, thanks Jeff and Juzhe.

Pan

-----Original Message-----
From: Jeff Law <jeffreyalaw@gmail.com> 
Sent: Friday, June 30, 2023 4:58 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai; kito.cheng@sifive.com; Wang, Yanzhang <yanzhang.wang@intel.com>
Subject: Re: [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal



On 6/29/23 00:00, pan2.li@intel.com wrote:
> From: Pan Li <pan2.li@intel.com>
> 
> This patch would like to refactor the vxrm_mode attr for duplicated
> eq_attr condition. The common condition of attr is extraced to one
> place instead of many places.
> 
> Signed-off-by: Pan Li <pan2.li@intel.com>
> 
> gcc/ChangeLog:
> 
> 	* config/riscv/vector.md: Refactor the common condition.
OK
jeff

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2023-06-30 11:15 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-29  6:00 [PATCH v1] RISC-V: Refactor vxrm_mode attr for type attr equal pan2.li
2023-06-29  6:12 ` juzhe.zhong
2023-06-29  6:23 ` juzhe.zhong
2023-06-29 20:58 ` Jeff Law
2023-06-30 11:15   ` Li, Pan2

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