From: Xi Ruoyao <xry111@xry111.site>
To: Lulu Cheng <chenglulu@loongson.cn>, gcc-patches@gcc.gnu.org
Cc: i@xen0n.name, xuchenghua@loongson.cn
Subject: Re: [PATCH v3] LoongArch: Optimize immediate load.
Date: Fri, 04 Nov 2022 10:56:59 +0800 [thread overview]
Message-ID: <2d547e6296b28f9e8efcc3352fb363ca8967bff6.camel@xry111.site> (raw)
In-Reply-To: <2250cca5-a1c9-aecc-9b01-1b6e52ec5e06@loongson.cn>
On Fri, 2022-11-04 at 10:33 +0800, Lulu Cheng wrote:
>
> 在 2022/11/4 上午10:22, Xi Ruoyao 写道:
> > On Tue, 2022-11-01 at 20:04 +0800, Lulu Cheng wrote:
> > > gcc/ChangeLog:
> > >
> > > * config/loongarch/constraints.md (x): New constraint.
> > > * config/loongarch/loongarch.cc (struct loongarch_address_info):
> > > Adds a method to load the immediate 32 to 64 bit field.
> > > (struct loongarch_integer_op): Define a new member curr_value,
> > > that records the value of the number stored in the destination
> > > register immediately after the current instruction has run.
> > > (LARCH_MAX_INTEGER_OPS): Define this macro as 3.
> > > (LU32I_B): Move to the loongarch.h.
> > > (LU52I_B): Likewise.
> > > (loongarch_build_integer): Adds a method to load the immediate
> > > 32 to 63 bits.
> > > (loongarch_move_integer): Likewise.
> > We need to mention "call set_unique_reg_note" here because it seems the
> > key to resolve the issue.
>
> During debugging, I found the problem because the source register and
> destination register of the lu32i.d instruction are the same. As a
> result, during loop2_invariant pass, the destination register of
> lu32i.d is used twice, so the instructions after this instruction will
> not be brought out of the loop. Therefore, I combined lu32i.d and
> lu52i.d into one template, which avoids the situation that the same
> register is used twice. It is not split into two instructions until
> loop2_invariant has been optimized. So I don't think
> "set_unique_reg_note" plays a decisive role in this optimization.
It's better to mention this logic in the commit message then, to prevent
others from misunderstandings like mine.
Again the code change LGTM and I've tested it with --with-build-
config=bootstrap-ubsan.
> >
> > Otherwise LGTM.
> >
> > > (loongarch_print_operand_reloc): Modifying comment information.
> > > * config/loongarch/loongarch.h (LU32I_B): Move from loongarch.cc.
> > > (LU52I_B): Likewise.
> > > (HWIT_UC_0xFFFFFFFF): New macro.
> > > (HI32_OPERAND): New macro.
> > > * config/loongarch/loongarch.md (load_hi32): New template.
> > > * config/loongarch/predicates.md (const_hi32_operand): Determines
> > > whether the value is an immediate number that has a value of only
> > > the higher 32 bits.
> > > (hi32_mask_operand): Immediately counts the mask of 32 to 61 bits.
>
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
next prev parent reply other threads:[~2022-11-04 2:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 12:04 Lulu Cheng
2022-11-04 2:22 ` Xi Ruoyao
2022-11-04 2:33 ` Lulu Cheng
2022-11-04 2:56 ` Xi Ruoyao [this message]
2022-11-04 3:07 ` Lulu Cheng
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