Re: [PATCH] Enable shrink wrapping for the RISC-V target.

[Jeff Law <jlaw@ventanamicro.com>]

Just a couple more comments in-line.

On 10/18/22 09:18, Manolis Tsamis wrote:
>
>>> +/* Implement TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS.  */
>>> +
>>> +static sbitmap
>>> +riscv_get_separate_components (void)
>>> +{
>>> +  HOST_WIDE_INT offset;
>>> +  sbitmap components = sbitmap_alloc (FIRST_PSEUDO_REGISTER);
>>> +  bitmap_clear (components);
>>> +
>>> +  if (riscv_use_save_libcall (&cfun->machine->frame)
>>> +      || cfun->machine->interrupt_handler_p)
>> riscv_use_save_libcall() already checks interrupt_handler_p, so that's
>> redundant.  That said, I'm not sure riscv_use_save_libcall() is the
>> right check here as unless I'm missing something we don't have all those
>> other constraints when shrink-wrapping.
>>
> riscv_use_save_libcall returns false when interrupt_handler_p is true, so the
> check for interrupt_handler_p in the branch is not redundant in this case.
>
> I encountered some issues when shrink wrapping and libcall was used in the same
> function. Thinking that libcall replaces the prologue/epilogue I didn't see a
> reason to have both at the same time and hence I opted to disable
> shrink wrapping in that case. From my understanding this should be harmless?

I would have expected things to work fine with libcalls, perhaps with 
the exception of the save/restore libcalls.  So that needs deeper 
investigation.


>>
>> It seems kind of clunky to have two copies of all these loops (and we'll
>> need a third to make this work with the V stuff), but we've got that
>> issue elsewhere in the port so I don't think you need to fix it here
>> (though the V stuff will be there for the v2, so you'll need the third
>> copy of each loop).
>>
> Indeed, I was following the other ports here. Do you think it would be
> better to refactor this when the code for the V extension is added?
> By taking into account what code will be needed for V, a proper refactored
> function could be made to handle all cases.

I think refactoring when V gets added would be fine.  While we could 
probably refactor it correctly now (it isn't terribly complex code after 
all), but we're more likely to get it right with the least amount of 
work if we do it when V is submitted.


>> Either way, this deserves a test case.  I think it should be possible to
>> write one by introducing some register pressure around a
>> shrink-wrappable block that needs a long stack offset and making sure
>> in-flight registers don't get trashed.
>>
> I tried to think of some way to introduce a test like that but couldn't and
> I don't see how it would be done. Shrink wrapping only affects saved registers
> so there are always available temporaries that are not affected by
> shrink wrapping.
> (Register pressure should be irrelevant in this case if I understand correctly).
> Also the implementation checks for SMALL_OPERAND (offset) shrink wrapping
> should be unaffected from long stack offsets. If you see some way to write
> a test for that based on what I explained please explain how I could do that.

I think the register pressure was just to ensure that some saves were 
needed to trigger an attempt to shrink wrap something.  You'd also need 
something to eat stack space (local array which gets referenced as an 
asm operand, but where the asm doesn't generate any code perhaps)?  
Whether or not that works depends on stack layout though which I don't 
know well enough for riscv.


Generally looks pretty good though.


Jeff