[pushed] [PR108774] RA: Clear reg equiv caller_save_p flag when clearing defined_p flag

[pushed] [PR108774] RA: Clear reg equiv caller_save_p flag when clearing defined_p flag

[Vladimir Makarov]

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The following patch solves

   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108774

The patch was successfully bootstrapped and tested on i686, x86_64, and 
aarch64.

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commit a33e3dcbd15e73603796e30b5eeec11a0c8bacec
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Mon Feb 13 16:05:04 2023 -0500

    RA: Clear reg equiv caller_save_p flag when clearing defined_p flag
    
    IRA can invalidate initially setup equivalence in setup_reg_equiv.
    Flag caller_saved was not cleared during invalidation although
    init_insns were cleared.  It resulted in segmentation fault in
    get_equiv.  Clearing the flag solves the problem.  For more
    precaution I added clearing the flag in other places too although it
    might be not necessary.
    
            PR rtl-optimization/108774
    
    gcc/ChangeLog:
    
            * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
            caller_save_p flag when clearing defined_p flag.
            (setup_reg_equiv): Ditto.
            * lra-constraints.cc (lra_constraints): Ditto.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/i386/pr108774.c: New.

diff --git a/gcc/ira.cc b/gcc/ira.cc
index 9f9af808f63..6c7f4901e4c 100644
--- a/gcc/ira.cc
+++ b/gcc/ira.cc
@@ -2725,6 +2725,7 @@ ira_update_equiv_info_by_shuffle_insn (int to_regno, int from_regno, rtx_insn *i
 	  return;
 	}
       ira_reg_equiv[to_regno].defined_p = false;
+      ira_reg_equiv[to_regno].caller_save_p = false;
       ira_reg_equiv[to_regno].memory
 	= ira_reg_equiv[to_regno].constant
 	= ira_reg_equiv[to_regno].invariant
@@ -4193,6 +4194,7 @@ setup_reg_equiv (void)
 			if (ira_reg_equiv[i].memory == NULL_RTX)
 			  {
 			    ira_reg_equiv[i].defined_p = false;
+			    ira_reg_equiv[i].caller_save_p = false;
 			    ira_reg_equiv[i].init_insns = NULL;
 			    break;
 			  }
@@ -4203,6 +4205,7 @@ setup_reg_equiv (void)
 	      }
 	  }
 	ira_reg_equiv[i].defined_p = false;
+	ira_reg_equiv[i].caller_save_p = false;
 	ira_reg_equiv[i].init_insns = NULL;
 	break;
       }
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index dd4f68bbfc0..dbfaf0485a5 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -5100,7 +5100,8 @@ lra_constraints (bool first_p)
 			 && (targetm.preferred_reload_class
 			     (x, lra_get_allocno_class (i)) == NO_REGS))
 			|| contains_symbol_ref_p (x))))
-	      ira_reg_equiv[i].defined_p = false;
+	      ira_reg_equiv[i].defined_p
+		= ira_reg_equiv[i].caller_save_p = false;
 	    if (contains_reg_p (x, false, true))
 	      ira_reg_equiv[i].profitable_p = false;
 	    if (get_equiv (reg) != reg)
diff --git a/gcc/testsuite/gcc.target/i386/pr108774.c b/gcc/testsuite/gcc.target/i386/pr108774.c
new file mode 100644
index 00000000000..482bc490cde
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr108774.c
@@ -0,0 +1,11 @@
+/* PR target/108774 */
+/* { dg-do compile  { target x86_64-*-* } } */
+/* { dg-options "-Os -ftrapv -mcmodel=large" } */
+
+int i, j;
+
+void
+foo (void)
+{
+  i = ((1 << j) - 1) >> j;
+}