Re: [PATCH] riscv/RTEMS: Add RISCV_GCOV_TYPE_SIZE

[Jeff Law <jeffreyalaw@gmail.com>]

On 10/27/22 23:47, Sebastian Huber wrote:
> On 28/10/2022 01:05, Palmer Dabbelt wrote:
>> On Thu, 27 Oct 2022 15:56:17 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
>>>
>>> On 10/26/22 01:49, Sebastian Huber wrote:
>>>> The RV32A extension does not support 64-bit atomic operations.  For 
>>>> RTEMS, use
>>>> a 32-bit gcov type for RV32.
>>>>
>>>> gcc/ChangeLog:
>>>>
>>>>     * config/riscv/riscv.cc (riscv_gcov_type_size): New.
>>>>     (TARGET_GCOV_TYPE_SIZE): Likewise.
>>>>     * config/riscv/rtems.h (RISCV_GCOV_TYPE_SIZE): New.
>>>
>>> Why make this specific to rtems?  ISTM the logic behind this change
>>> would apply independently of the os.
>
> Reducing the gcov type to 32-bit has the drawback that the program 
> runtime is reduced. I am not sure if this is generally acceptable.

Right, but if you're limited by RV32A, then we're architecturally 
limited to 32bit atomics.  So something has to give.


I'm not objecting to this for rtems.  I'm just noting that if we're 
dealing with an architectural limitation, then the issue is likely to 
show up in other operating systems, so we should at least ponder if we 
want to do an OS specific change or something more general.


Jeff