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From: "Kewen.Lin" <>
	guojiufu <>,
	Segher Boessenkool <>
Subject: Re: [PATCH] testsuite: update requires for powerpc/float128-cmp2-runnable.c
Date: Thu, 13 Apr 2023 15:42:17 +0800	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

on 2023/4/12 20:47, Kewen.Lin wrote:
> Hi Segher & Jeff,
> on 2023/4/11 23:13, Segher Boessenkool wrote:
>> On Tue, Apr 11, 2023 at 05:40:09PM +0800, Kewen.Lin wrote:
>>> on 2023/4/11 17:14, guojiufu wrote:
>>>> Thanks for raising this concern.
>>>> The behavior to check about bif on FLOAT128_HW and emit an error message for
>>>> requirements on quad-precision is added in gcc12. This is why gcc12 fails to
>>>> compile the case on -m32.
>>>> Before gcc12, altivec_resolve_overloaded_builtin will return the overloaded
>>>> result directly, and does not check more about the result function.
>>> Thanks for checking, I wonder which commit caused this behavior change and what's
>>> the underlying justification?  I know there is one new bif handling framework
> Answered this question by myself with some diggings, test case
> float128-cmp2-runnable.c started to fail from r12-5752-gd08236359eb229 which
> exactly makes new bif framework start to take effect and the reason why the
> behavior changes is the condition change from **TARGET_P9_VECTOR** to
> With r12-5751-gc9dd01314d8467 (still old bif framework):
> $ grep -r scalar_cmp_exp_qp gcc/config/rs6000/rs6000-builtin.def
> BU_P9V_VSX_2 (VSCEQPGT, "scalar_cmp_exp_qp_gt", CONST,  xscmpexpqp_gt_kf)
> BU_P9V_VSX_2 (VSCEQPLT, "scalar_cmp_exp_qp_lt", CONST,  xscmpexpqp_lt_kf)
> BU_P9V_VSX_2 (VSCEQPEQ, "scalar_cmp_exp_qp_eq", CONST,  xscmpexpqp_eq_kf)
> BU_P9V_VSX_2 (VSCEQPUO, "scalar_cmp_exp_qp_unordered",  CONST,  xscmpexpqp_unordered_kf)
> BU_P9V_OVERLOAD_2 (VSCEQPGT,    "scalar_cmp_exp_qp_gt")
> BU_P9V_OVERLOAD_2 (VSCEQPLT,    "scalar_cmp_exp_qp_lt")
> BU_P9V_OVERLOAD_2 (VSCEQPEQ,    "scalar_cmp_exp_qp_eq")
> BU_P9V_OVERLOAD_2 (VSCEQPUO,    "scalar_cmp_exp_qp_unordered")
> There were only 13 bifs requiring TARGET_FLOAT128_HW in old bif framework.
> $ grep ^BU_FLOAT128_HW gcc/config/rs6000/rs6000-builtin.def
> BU_FLOAT128_HW_VSX_1 (VSEEQP,   "scalar_extract_expq",  CONST,  xsxexpqp_kf)
> BU_FLOAT128_HW_VSX_1 (VSESQP,   "scalar_extract_sigq",  CONST,  xsxsigqp_kf)
> BU_FLOAT128_HW_VSX_1 (VSTDCNQP, "scalar_test_neg_qp",   CONST,  xststdcnegqp_kf)
> BU_FLOAT128_HW_VSX_2 (VSIEQP,   "scalar_insert_exp_q",  CONST,  xsiexpqp_kf)
> BU_FLOAT128_HW_VSX_2 (VSIEQPF,  "scalar_insert_exp_qp", CONST,  xsiexpqpf_kf)
> BU_FLOAT128_HW_VSX_2 (VSTDCQP, "scalar_test_data_class_qp",     CONST,  xststdcqp_kf)
> BU_FLOAT128_HW_1 (SQRTF128_ODD,  "sqrtf128_round_to_odd",  FP, sqrtkf2_odd)
> BU_FLOAT128_HW_1 (TRUNCF128_ODD, "truncf128_round_to_odd", FP, trunckfdf2_odd)
> BU_FLOAT128_HW_2 (ADDF128_ODD,   "addf128_round_to_odd",   FP, addkf3_odd)
> BU_FLOAT128_HW_2 (SUBF128_ODD,   "subf128_round_to_odd",   FP, subkf3_odd)
> BU_FLOAT128_HW_2 (MULF128_ODD,   "mulf128_round_to_odd",   FP, mulkf3_odd)
> BU_FLOAT128_HW_2 (DIVF128_ODD,   "divf128_round_to_odd",   FP, divkf3_odd)
> BU_FLOAT128_HW_3 (FMAF128_ODD,   "fmaf128_round_to_odd",   FP, fmakf4_odd)
> Starting from r12-5752-gd08236359eb229, these scalar_cmp_exp_qp_{gt,lt,eq,unordered}
> bifs were put under stanza ieee128-hw, it makes ieee128-hw to have 17 bifs,
> comparing to the previous, the extra four ones were exactly these
> scalar_cmp_exp_qp_{gt,lt,eq,unordered}.
>>> introduced in gcc12, not sure the checking condition was changed together or by
>>> a standalone commit.  Anyway, apparently the conditions for the support of these
>>> bifs are different on gcc-11 and gcc-12, I wonder why it changed.  As mentioned
>>> above, PR108758's c#1 said this case (bifs) work well on gcc-11, I suspected the
>>> condition change was an overkill, that's why I asked.
>> It almost certainly was an oversight.  The new builtin framework changed
>> so many things, there was bound to be some breakage to go with all the
>> good things it brought.
> Yeah, as the above findings, also I found that r12-3126-g2ed356a4c9af06 introduced
> power9 related stanzas and r12-3167-g2f9489a1009d98 introduced ieee128-hw stanza
> including these four bifs, both of them don't have any notes on why we would change
> the condition for these scalar_cmp_exp_qp_{gt,lt,eq,unordered} from power9-vector to
> ieee128-hw, so I think it's just an oversight (ieee128-hw is an overkill comparing
> to power9-vector :)).
>> So what is the actual thing going wrong?  QP insns work fine and are
>> valid on all systems and environments, BE or LE, 32-bit or 64-bit.  Of
>> course you cannot use the "long double" type for those everywhere, but
>> that is a very different thing.
> The actual thing going wrong is that: the test case float128-cmp2-runnable.c
> runs well on BE -m32 and -m64 with gcc-11, but meets failures on BE -m32 with
> latest gcc-12 and trunk during compilation, having the error messages like:
> gcc/testsuite/ In function 'main':
> gcc/testsuite/ error:
>   '__builtin_vsx_scalar_cmp_exp_qp_eq' requires ISA 3.0 IEEE 128-bit floating point
> As scalar_cmp_exp_qp_{gt,lt,eq,unordered} requires condition TARGET_FLOAT128_HW
> now (since new bif framework took effect).
> (To be more exact, it started to fail from r12-5752-gd08236359eb229).
> IMHO, the apparent cause seems to be the wrong effective target mismatching the
> condition for those bifs, but the underlying cause is that new bif framework
> unexpectedly moved these four bifs from power9-vector to ieee128-hw.

I'm going to push the below patch next week if no objections.

Bootstrapped and regress-tested on:
  - powerpc64le-linux-gnu Power10
  - powerpc64le-linux-gnu Power9
  - powerpc64le-linux-gnu Power8
  - powerpc64-linux-gnu Power9 {-m64,-m32}
  - powerpc64-linux-gnu Power8 {-m64,-m32}

[PATCH] rs6000: Guard power9-vector for vsx_scalar_cmp_exp_qp_* [PR108758]

__builtin_vsx_scalar_cmp_exp_qp_{eq,gt,lt,unordered} used
to be guarded with condition TARGET_P9_VECTOR before new
bif framework was introduced (r12-5752-gd08236359eb229),
since r12-5752 they are placed under stanza ieee128-hw,
that is to check condition TARGET_FLOAT128_HW, it caused
test case float128-cmp2-runnable.c to fail at -m32 as the
condition TARGET_FLOAT128_HW isn't satisfied with -m32.

By checking the commit history, I didn't see any notes on
why this condition changes on them was made, so this patch
is to move these bifs from stanza ieee128-hw to stanza
power9-vector as before.  It also matches the condition of
the corresponding define_insns.

	PR target/108758


	* config/rs6000/rs6000-builtins.def
	(__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
	__builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
	to power9-vector.
 gcc/config/rs6000/rs6000-builtins.def | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 03fb194b151..67a3f5edaf2 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2797,6 +2797,19 @@
   const vsi __builtin_vsx_xxbrw_v4si (vsi);
     XXBRW_V4SI p9_xxbrw_v4si {}

+  const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+    VSCEQPEQ xscmpexpqp_eq_kf {}
+  const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
+    VSCEQPGT xscmpexpqp_gt_kf {}
+  const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
+    VSCEQPLT xscmpexpqp_lt_kf {}
+  const signed int \
+      __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
+    VSCEQPUO xscmpexpqp_unordered_kf {}

 ; Miscellaneous P9 functions
@@ -2879,19 +2892,6 @@
   fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128);
     MULF128_ODD mulkf3_odd {}

-  const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
-    VSCEQPEQ xscmpexpqp_eq_kf {}
-  const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
-    VSCEQPGT xscmpexpqp_gt_kf {}
-  const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
-    VSCEQPLT xscmpexpqp_lt_kf {}
-  const signed int \
-      __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
-    VSCEQPUO xscmpexpqp_unordered_kf {}
   fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128);
     SQRTF128_ODD sqrtkf2_odd {}


  reply	other threads:[~2023-04-13  7:42 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-10  2:09 Jiufu Guo
2023-04-10  9:26 ` Kewen.Lin
2023-04-11  9:14   ` guojiufu
2023-04-11  9:40     ` Kewen.Lin
2023-04-11 15:13       ` Segher Boessenkool
2023-04-12  5:06         ` Jiufu Guo
2023-04-12  5:31           ` Jiufu Guo
2023-04-12 14:46             ` Michael Meissner
2023-04-13  5:35               ` guojiufu
2023-04-12 12:47         ` Kewen.Lin
2023-04-13  7:42           ` Kewen.Lin [this message]
2023-04-13  7:45           ` guojiufu
2023-04-13  8:09             ` Kewen.Lin

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