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From: Jiufu Guo <>
To: Jiufu Guo via Gcc-patches <>
Cc: Segher Boessenkool <>,
	"Kewen.Lin" <>,,,
Subject: Re: [PATCH] testsuite: update requires for powerpc/float128-cmp2-runnable.c
Date: Wed, 12 Apr 2023 13:31:46 +0800	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <> (Jiufu Guo via Gcc-patches's message of "Wed, 12 Apr 2023 13:06:54 +0800")

Jiufu Guo via Gcc-patches <> writes:

> Hi,
> Segher Boessenkool <> writes:
>> On Tue, Apr 11, 2023 at 05:40:09PM +0800, Kewen.Lin wrote:
>>> on 2023/4/11 17:14, guojiufu wrote:
>>> > Thanks for raising this concern.
>>> > The behavior to check about bif on FLOAT128_HW and emit an error message for
>>> > requirements on quad-precision is added in gcc12. This is why gcc12 fails to
>>> > compile the case on -m32.
>>> > 
>>> > Before gcc12, altivec_resolve_overloaded_builtin will return the overloaded
>>> > result directly, and does not check more about the result function.
>>> Thanks for checking, I wonder which commit caused this behavior change and what's
>>> the underlying justification?  I know there is one new bif handling framework
>>> introduced in gcc12, not sure the checking condition was changed together or by
>>> a standalone commit.  Anyway, apparently the conditions for the support of these
>>> bifs are different on gcc-11 and gcc-12, I wonder why it changed.  As mentioned
>>> above, PR108758's c#1 said this case (bifs) work well on gcc-11, I suspected the
>>> condition change was an overkill, that's why I asked.
>> It almost certainly was an oversight.  The new builtin framework changed
>> so many things, there was bound to be some breakage to go with all the
>> good things it brought.
> Yes, the condition checking on gcc-12 is different from gcc-11. In
> gcc-11, the condition on overloaded bif is not checked.
> And, there are a few commits related to the bifs change. e.g.
> r12-4977-ga28cfe49203705 introduces a new bif expand function which has
> the ability to check more bif's target requirements like ieee128_hw.
> And another commit changes the error message (r12-6684).
>> So what is the actual thing going wrong?  QP insns work fine and are
>> valid on all systems and environments, BE or LE, 32-bit or 64-bit.
>> Of

I understand that QP insns (e.g. xscmpexpqp) is valid if the system
meets ISA3.0, no matter BE/LE, 32-bit/64-bit.
I think option -mfloat128-hardware is designed for QP insns.

While there is one issue, on BE machine, when compiling with options
"-mfloat128-hardware -m32", an error message is generated:
"error: '%<-mfloat128-hardware%>' requires '-m64'"

(I'm wondering if we need to relax this limitation.)

Jeff (Jiufu)

>> course you cannot use the "long double" type for those everywhere, but
>> that is a very different thing.
> Currently, when compiling bif __builtin_vsx_scalar_cmp_exp_qp_eq,
> gcc generates error message:
> error: '__builtin_vsx_scalar_cmp_exp_qp_eq' requires quad-precision
> floating-point arithmetic
> IMHO, this error would be ok.  Because it makes sense that this bif
> needs ieee128_hw.
> BR,
> Jeff (Jiufu)
>> Segher

  reply	other threads:[~2023-04-12  5:31 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-10  2:09 Jiufu Guo
2023-04-10  9:26 ` Kewen.Lin
2023-04-11  9:14   ` guojiufu
2023-04-11  9:40     ` Kewen.Lin
2023-04-11 15:13       ` Segher Boessenkool
2023-04-12  5:06         ` Jiufu Guo
2023-04-12  5:31           ` Jiufu Guo [this message]
2023-04-12 14:46             ` Michael Meissner
2023-04-13  5:35               ` guojiufu
2023-04-12 12:47         ` Kewen.Lin
2023-04-13  7:42           ` Kewen.Lin
2023-04-13  7:45           ` guojiufu
2023-04-13  8:09             ` Kewen.Lin

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