* [patch-2, rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]
@ 2023-12-01 2:42 HAO CHEN GUI
2023-12-04 9:10 ` Kewen.Lin
0 siblings, 1 reply; 2+ messages in thread
From: HAO CHEN GUI @ 2023-12-01 2:42 UTC (permalink / raw)
To: gcc-patches; +Cc: Segher Boessenkool, David, Kewen.Lin, Peter Bergner
Hi,
The "fctid" is supported on 64-bit Power processors and powerpc 476. It
need a guard to check it. The patch fixes the issue.
Bootstrapped and tested on x86 and powerpc64-linux BE and LE with
no regressions. Is this OK for trunk?
Thanks
Gui Haochen
ChangeLog
rs6000: guard fctid on PPC64 and powerpc 476
fctid is supported on 64-bit Power processors and powerpc 476. It should
be guarded by this condition. The patch fixes the issue.
gcc/
PR target/112707
* config/rs6000/rs6000.h (TARGET_FCTID): Define.
* config/rs6000/rs6000.md (lrint<mode>di2): Add guard TARGET_FCTID.
gcc/testsuite/
PR target/112707
* gcc.target/powerpc/pr112707.h: New.
* gcc.target/powerpc/pr112707-2.c: New.
* gcc.target/powerpc/pr112707-3.c: New.
patch.diff
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 22595f6..497ae3d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -467,6 +467,8 @@ extern int rs6000_vector_align[];
#define TARGET_FCFIDUS TARGET_POPCNTD
#define TARGET_FCTIDUZ TARGET_POPCNTD
#define TARGET_FCTIWUZ TARGET_POPCNTD
+/* Enable fctid on ppc64 and powerpc476. */
+#define TARGET_FCTID (TARGET_POWERPC64 | TARGET_FPRND)
#define TARGET_CTZ TARGET_MODULO
#define TARGET_EXTSWSLI (TARGET_MODULO && TARGET_POWERPC64)
#define TARGET_MADDLD TARGET_MODULO
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index d4337ce..4a5e63c 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6718,7 +6718,7 @@ (define_insn "lrint<mode>di2"
[(set (match_operand:DI 0 "gpc_reg_operand" "=d")
(unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
UNSPEC_FCTID))]
- "TARGET_HARD_FLOAT"
+ "TARGET_HARD_FLOAT && TARGET_FCTID"
"fctid %0,%1"
[(set_attr "type" "fp")])
diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-2.c b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
new file mode 100644
index 0000000..ae91913
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile { target { powerpc*-*-* && be } } } */
+/* { dg-options "-O2 -mdejagnu-cpu=7450 -m32 -fno-math-errno" } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-final { scan-assembler-not {\mfctid\M} } } */
+
+#include "pr112707.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-3.c b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
new file mode 100644
index 0000000..e47ce20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target { powerpc*-*-* && be } } } */
+/* { dg-options "-O2 -m32 -fno-math-errno -mdejagnu-cpu=476fp" } */
+/* { dg-require-effective-target ilp32 } */
+
+/* powerpc 476fp has hard float enabled which is required by fctid */
+
+#include "pr112707.h"
+
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707.h b/gcc/testsuite/gcc.target/powerpc/pr112707.h
new file mode 100644
index 0000000..e427dc6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr112707.h
@@ -0,0 +1,10 @@
+long long test1 (double a)
+{
+ return __builtin_llrint (a);
+}
+
+long long test2 (float a)
+{
+ return __builtin_llrint (a);
+}
+
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [patch-2, rs6000] guard fctid on PPC64 and powerpc 476 [PR112707]
2023-12-01 2:42 [patch-2, rs6000] guard fctid on PPC64 and powerpc 476 [PR112707] HAO CHEN GUI
@ 2023-12-04 9:10 ` Kewen.Lin
0 siblings, 0 replies; 2+ messages in thread
From: Kewen.Lin @ 2023-12-04 9:10 UTC (permalink / raw)
To: HAO CHEN GUI; +Cc: Segher Boessenkool, David, Peter Bergner, gcc-patches
Hi Haochen,
on 2023/12/1 10:42, HAO CHEN GUI wrote:
> Hi,
> The "fctid" is supported on 64-bit Power processors and powerpc 476. It
> need a guard to check it. The patch fixes the issue.
>
> Bootstrapped and tested on x86 and powerpc64-linux BE and LE with
> no regressions. Is this OK for trunk?
>
> Thanks
> Gui Haochen
>
> ChangeLog
> rs6000: guard fctid on PPC64 and powerpc 476
>
> fctid is supported on 64-bit Power processors and powerpc 476. It should
> be guarded by this condition. The patch fixes the issue.
>
> gcc/
> PR target/112707
> * config/rs6000/rs6000.h (TARGET_FCTID): Define.
> * config/rs6000/rs6000.md (lrint<mode>di2): Add guard TARGET_FCTID.
>
> gcc/testsuite/
> PR target/112707
> * gcc.target/powerpc/pr112707.h: New.
> * gcc.target/powerpc/pr112707-2.c: New.
> * gcc.target/powerpc/pr112707-3.c: New.
>
>
> patch.diff
> diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
> index 22595f6..497ae3d 100644
> --- a/gcc/config/rs6000/rs6000.h
> +++ b/gcc/config/rs6000/rs6000.h
> @@ -467,6 +467,8 @@ extern int rs6000_vector_align[];
> #define TARGET_FCFIDUS TARGET_POPCNTD
> #define TARGET_FCTIDUZ TARGET_POPCNTD
> #define TARGET_FCTIWUZ TARGET_POPCNTD
> +/* Enable fctid on ppc64 and powerpc476. */
> +#define TARGET_FCTID (TARGET_POWERPC64 | TARGET_FPRND)
Like some existing macros which are checking rs6000_cpu, I think it's
more specific to check with PROCESSOR_PPC476, that is: rs6000_cpu ==
PROCESSOR_PPC476. And say something like: "Only powerpc64 and powerpc476
support fctid." instead?
> #define TARGET_CTZ TARGET_MODULO
> #define TARGET_EXTSWSLI (TARGET_MODULO && TARGET_POWERPC64)
> #define TARGET_MADDLD TARGET_MODULO
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index d4337ce..4a5e63c 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -6718,7 +6718,7 @@ (define_insn "lrint<mode>di2"
> [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
> (unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
> UNSPEC_FCTID))]
> - "TARGET_HARD_FLOAT"
> + "TARGET_HARD_FLOAT && TARGET_FCTID"
> "fctid %0,%1"
> [(set_attr "type" "fp")])
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-2.c b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
> new file mode 100644
> index 0000000..ae91913
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c
> @@ -0,0 +1,6 @@
> +/* { dg-do compile { target { powerpc*-*-* && be } } } */
Nit: powerpc*-*-* && be checks are useless as ilp32 excludes le.
> +/* { dg-options "-O2 -mdejagnu-cpu=7450 -m32 -fno-math-errno" } */
Nit: -m32 isn't required.
> +/* { dg-require-effective-target ilp32 } */> +/* { dg-final { scan-assembler-not {\mfctid\M} } } */
> +
> +#include "pr112707.h"
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-3.c b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
> new file mode 100644
> index 0000000..e47ce20
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile { target { powerpc*-*-* && be } } } */
> +/* { dg-options "-O2 -m32 -fno-math-errno -mdejagnu-cpu=476fp" } */
Likewise.
The others look good to me, thanks!
BR,
Kewen
> +/* { dg-require-effective-target ilp32 } */
> +
> +/* powerpc 476fp has hard float enabled which is required by fctid */
> +
> +#include "pr112707.h"
> +
> +/* { dg-final { scan-assembler-times {\mfctid\M} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707.h b/gcc/testsuite/gcc.target/powerpc/pr112707.h
> new file mode 100644
> index 0000000..e427dc6
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr112707.h
> @@ -0,0 +1,10 @@
> +long long test1 (double a)
> +{
> + return __builtin_llrint (a);
> +}
> +
> +long long test2 (float a)
> +{
> + return __builtin_llrint (a);
> +}
> +
^ permalink raw reply [flat|nested] 2+ messages in thread
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2023-12-01 2:42 [patch-2, rs6000] guard fctid on PPC64 and powerpc 476 [PR112707] HAO CHEN GUI
2023-12-04 9:10 ` Kewen.Lin
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