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From: Lehua Ding <lehua.ding@rivai.ai>
To: Robin Dapp <rdapp.gcc@gmail.com>, gcc-patches <gcc-patches@gcc.gnu.org>
Cc: palmer <palmer@dabbelt.com>, Kito Cheng <kito.cheng@gmail.com>,
	jeffreyalaw <jeffreyalaw@gmail.com>,
	"juzhe.zhong" <juzhe.zhong@rivai.ai>
Subject: Re: [PATCH v3] RISC-V: Add autovec FP binary operations.
Date: Wed, 6 Sep 2023 17:43:32 +0800	[thread overview]
Message-ID: <5D71367462E7C90B+1c5abca3-4b8d-4bbd-8565-121586dd1e18@rivai.ai> (raw)
In-Reply-To: <b4438c7c-4aca-23a6-5482-464bc5eb0f14@gmail.com>

Hi Robin,

> +# Return 1 if the we can build a vector example with proper -march flags
> +# and the current target can execute it, 0 otherwise.  Cache the result.
> +
> +proc check_effective_target_riscv_vector_hw { } {
> +
> +    return [check_runtime riscv_vector_hw32 {
> +        int main (void)
> +        {
> +            asm ("vsetivli zero,8,e16,m1,ta,ma");
> +            asm ("vadd.vv v8,v8,v16" : : : "v8");
> +            return 0;
> +        }
> +    } "-march=rv32gcv -mabi=ilp32d"] || [check_runtime riscv_vector_hw64 {
> +        int main (void)
> +        {
> +            asm ("vsetivli zero,8,e16,m1,ta,ma");
> +            asm ("vadd.vv v8,v8,v16" : : : "v8");
> +            return 0;
> +        }
> +    } "-march=rv64gcv -mabi=lp64d"]
> +}
> +
> +# Return 1 if the we can build a Zvfh vector example with proper -march flags
> +# and the current target can execute it, 0 otherwise.  Cache the result.
> +
> +proc check_effective_target_riscv_zvfh_hw { } {
> +    if ![check_effective_target_riscv_vector_hw] then {
> +        return 0
> +    }
> +
> +    return [check_runtime riscv_zvfh_hw32 {
> +        int main (void)
> +        {
> +            asm ("vsetivli zero,8,e16,m1,ta,ma");
> +            asm ("vfadd.vv v8,v8,v16" : : : "v8");
> +            return 0;
> +        }
> +    } "-march=rv32gcv_zvfh -mabi=ilp32d"]
> +    || [check_runtime riscv_zvfh_hw64 {
> +        int main (void)
> +        {
> +            asm ("vsetivli zero,8,e16,m1,ta,ma");
> +            asm ("vfadd.vv v8,v8,v16" : : : "v8");
> +            return 0;
> +        }
> +    } "-march=rv64gcv_zvfh -mabi=lp64d"]

May I ask if the compiler options "-march=rv64gcv_zvfh -mabi=lp64d" 
should be removed? Because we don't specify -march and -mabi when we run 
testcase (so but why we need to specify the -march and -mabi in this 
target check?), we run it with the default values. Assuming that the 
default is rv64gcv_zvfh_zfh, `riscv_vector` check will fail because 
compile and link with -march=rv64gcv will throw the following error if I 
doesn't compile a multilibs compilers. But in fact rv64gcv_zvfh_zfh 
contains rv64gcv, we should not let this case report link error.:

riscv64-unknown-elf-gcc: fatal error: Cannot find suitable multilib set 
for 
'-march=rv64imafdcv_zicsr_zifencei_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=lp64d'

I think we should use the default march and mabi to check whether we can 
compile and execute specified instructions.

-- 
Best,
Lehua


  reply	other threads:[~2023-09-06  9:43 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-14 15:28 [PATCH] " Robin Dapp
2023-06-15 15:10 ` [PATCH v2] " Robin Dapp
2023-06-15 16:33   ` Michael Collison
2023-06-16 12:41     ` Robin Dapp
2023-06-16  6:58   ` juzhe.zhong
2023-06-16  7:31     ` Robin Dapp
     [not found] ` <3593152A4AF6C445+E892D494-DF60-4B27-928D-14A269989B2B@rivai.ai>
2023-06-16 13:29   ` [PATCH v3] " Robin Dapp
2023-09-06  9:43     ` Lehua Ding [this message]
2023-09-06 13:27       ` Robin Dapp
2023-09-07  3:25         ` Lehua Ding
     [not found]   ` <1609CD82F4EC3898+30AECC2C-6966-43A1-854C-C14F08E5D45B@rivai.ai>
2023-06-17  2:20     ` Jeff Law

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