* [PATCH] aarch64: Add rcpc3 dependency on rcpc2 and rcpc
@ 2024-04-12 14:19 Andrew Carlotti
2024-04-12 15:49 ` Richard Sandiford
0 siblings, 1 reply; 4+ messages in thread
From: Andrew Carlotti @ 2024-04-12 14:19 UTC (permalink / raw)
To: gcc-patches; +Cc: Richard Sandiford, Richard Earnshaw
We don't yet have a separate feature flag for FEAT_LRCPC2 (and adding
one will require extending the feature bitmask). Instead, make the
FEAT_LRCPC patterns available when either armv8.4-a or +rcpc3 is
specified. On the other hand, we already have a +rcpc flag, so this
dependency can be specified directly.
The cpunative test needed updating because it used an invalid Features
list, since lrcpc3 requires both ilrcpc and lrcpc to be present.
Without this change, host_detect_local_cpu would return the architecture
string 'armv8-a+dotprod+crc+crypto+rcpc3+norcpc'.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def: Add RCPC to
RCPC3 dependencies.
* config/aarch64/aarch64.h (AARCH64_ISA_RCPC8_4): Add test for
RCPC3 bit
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/info_24: Include lrcpc and ilrcpc.
---
Bootstrapped and regression tested on aarch64. I also verified that the
atomic-store.c and ldapr-sext.c tests would pass when replacing 'armv8.4-a'
with 'armv8-a+rcpc3'.
Ok for master?
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index 3155eccd39c8e6825b7fc2bb0d0514c2e7e559bf..42ec0eec31e2ddb0cc6f83fdbaf0fd4eac5ca7f4 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -153,7 +153,7 @@ AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
-AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
+AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (RCPC), (), (), "lrcpc3")
AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm")
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 45e901cda644dbe4eaae709e685954f1a6f7dbcf..5870e3f812f6cb0674488b8e17ab7278003d2d54 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -242,7 +242,8 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = AARCH64_FL_SM_OFF;
#define AARCH64_ISA_SHA3 (aarch64_isa_flags & AARCH64_FL_SHA3)
#define AARCH64_ISA_F16FML (aarch64_isa_flags & AARCH64_FL_F16FML)
#define AARCH64_ISA_RCPC (aarch64_isa_flags & AARCH64_FL_RCPC)
-#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_V8_4A)
+#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags \
+ & (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3))
#define AARCH64_ISA_RNG (aarch64_isa_flags & AARCH64_FL_RNG)
#define AARCH64_ISA_V8_5A (aarch64_isa_flags & AARCH64_FL_V8_5A)
#define AARCH64_ISA_TME (aarch64_isa_flags & AARCH64_FL_TME)
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
index 8d3c16a10910af977c560782f9d659c0e51286fd..3c64e00ca3a416ef565bc0b4a5b3e5bd9cfc41bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
@@ -1,8 +1,8 @@
processor : 0
BogoMIPS : 100.00
-Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc3
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc ilrcpc lrcpc3
CPU implementer : 0xfe
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd08
-CPU revision : 2
\ No newline at end of file
+CPU revision : 2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] aarch64: Add rcpc3 dependency on rcpc2 and rcpc
2024-04-12 14:19 [PATCH] aarch64: Add rcpc3 dependency on rcpc2 and rcpc Andrew Carlotti
@ 2024-04-12 15:49 ` Richard Sandiford
2024-04-12 17:00 ` Andrew Carlotti
0 siblings, 1 reply; 4+ messages in thread
From: Richard Sandiford @ 2024-04-12 15:49 UTC (permalink / raw)
To: Andrew Carlotti; +Cc: gcc-patches, Richard Earnshaw
Andrew Carlotti <andrew.carlotti@arm.com> writes:
> We don't yet have a separate feature flag for FEAT_LRCPC2 (and adding
> one will require extending the feature bitmask). Instead, make the
> FEAT_LRCPC patterns available when either armv8.4-a or +rcpc3 is
> specified. On the other hand, we already have a +rcpc flag, so this
> dependency can be specified directly.
>
> The cpunative test needed updating because it used an invalid Features
> list, since lrcpc3 requires both ilrcpc and lrcpc to be present.
> Without this change, host_detect_local_cpu would return the architecture
> string 'armv8-a+dotprod+crc+crypto+rcpc3+norcpc'.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-option-extensions.def: Add RCPC to
> RCPC3 dependencies.
> * config/aarch64/aarch64.h (AARCH64_ISA_RCPC8_4): Add test for
> RCPC3 bit
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/cpunative/info_24: Include lrcpc and ilrcpc.
>
> ---
>
> Bootstrapped and regression tested on aarch64. I also verified that the
> atomic-store.c and ldapr-sext.c tests would pass when replacing 'armv8.4-a'
> with 'armv8-a+rcpc3'.
>
> Ok for master?
>
>
> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
> index 3155eccd39c8e6825b7fc2bb0d0514c2e7e559bf..42ec0eec31e2ddb0cc6f83fdbaf0fd4eac5ca7f4 100644
> --- a/gcc/config/aarch64/aarch64-option-extensions.def
> +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> @@ -153,7 +153,7 @@ AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
>
> AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
>
> -AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
> +AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (RCPC), (), (), "lrcpc3")
>
> AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm")
>
> diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> index 45e901cda644dbe4eaae709e685954f1a6f7dbcf..5870e3f812f6cb0674488b8e17ab7278003d2d54 100644
> --- a/gcc/config/aarch64/aarch64.h
> +++ b/gcc/config/aarch64/aarch64.h
> @@ -242,7 +242,8 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = AARCH64_FL_SM_OFF;
> #define AARCH64_ISA_SHA3 (aarch64_isa_flags & AARCH64_FL_SHA3)
> #define AARCH64_ISA_F16FML (aarch64_isa_flags & AARCH64_FL_F16FML)
> #define AARCH64_ISA_RCPC (aarch64_isa_flags & AARCH64_FL_RCPC)
> -#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_V8_4A)
> +#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags \
> + & (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3))
It looks like the effect of these two changes is that:
* armv9-a+rcpc3+norcpc leaves TARGET_RCPC2 true and TARGET_RCPC and
TARGET_RCPC3 false.
* armv8-a+rcpc3+norcpc correctly leaves all three false.
If we add the RCPC3->RCPC dependency then I think we should also
require FL_RCPC alongside FL_V8_4A. I.e.:
#define AARCH64_ISA_RCPC8_4 (AARCH64_ISA_RCPC \
&& (aarch64_isa_flags \
& (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3)))
OK with that change, thanks.
Richard
> #define AARCH64_ISA_RNG (aarch64_isa_flags & AARCH64_FL_RNG)
> #define AARCH64_ISA_V8_5A (aarch64_isa_flags & AARCH64_FL_V8_5A)
> #define AARCH64_ISA_TME (aarch64_isa_flags & AARCH64_FL_TME)
> diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> index 8d3c16a10910af977c560782f9d659c0e51286fd..3c64e00ca3a416ef565bc0b4a5b3e5bd9cfc41bc 100644
> --- a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> @@ -1,8 +1,8 @@
> processor : 0
> BogoMIPS : 100.00
> -Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc3
> +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc ilrcpc lrcpc3
> CPU implementer : 0xfe
> CPU architecture: 8
> CPU variant : 0x0
> CPU part : 0xd08
> -CPU revision : 2
> \ No newline at end of file
> +CPU revision : 2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] aarch64: Add rcpc3 dependency on rcpc2 and rcpc
2024-04-12 15:49 ` Richard Sandiford
@ 2024-04-12 17:00 ` Andrew Carlotti
2024-04-12 23:41 ` Andrew Carlotti
0 siblings, 1 reply; 4+ messages in thread
From: Andrew Carlotti @ 2024-04-12 17:00 UTC (permalink / raw)
To: gcc-patches, Richard Earnshaw, richard.sandiford
On Fri, Apr 12, 2024 at 04:49:03PM +0100, Richard Sandiford wrote:
> Andrew Carlotti <andrew.carlotti@arm.com> writes:
> > We don't yet have a separate feature flag for FEAT_LRCPC2 (and adding
> > one will require extending the feature bitmask). Instead, make the
> > FEAT_LRCPC patterns available when either armv8.4-a or +rcpc3 is
> > specified. On the other hand, we already have a +rcpc flag, so this
> > dependency can be specified directly.
> >
> > The cpunative test needed updating because it used an invalid Features
> > list, since lrcpc3 requires both ilrcpc and lrcpc to be present.
> > Without this change, host_detect_local_cpu would return the architecture
> > string 'armv8-a+dotprod+crc+crypto+rcpc3+norcpc'.
> >
> > gcc/ChangeLog:
> >
> > * config/aarch64/aarch64-option-extensions.def: Add RCPC to
> > RCPC3 dependencies.
> > * config/aarch64/aarch64.h (AARCH64_ISA_RCPC8_4): Add test for
> > RCPC3 bit
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/aarch64/cpunative/info_24: Include lrcpc and ilrcpc.
> >
> > ---
> >
> > Bootstrapped and regression tested on aarch64. I also verified that the
> > atomic-store.c and ldapr-sext.c tests would pass when replacing 'armv8.4-a'
> > with 'armv8-a+rcpc3'.
> >
> > Ok for master?
> >
> >
> > diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
> > index 3155eccd39c8e6825b7fc2bb0d0514c2e7e559bf..42ec0eec31e2ddb0cc6f83fdbaf0fd4eac5ca7f4 100644
> > --- a/gcc/config/aarch64/aarch64-option-extensions.def
> > +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> > @@ -153,7 +153,7 @@ AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
> >
> > AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
> >
> > -AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
> > +AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (RCPC), (), (), "lrcpc3")
> >
> > AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm")
> >
> > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> > index 45e901cda644dbe4eaae709e685954f1a6f7dbcf..5870e3f812f6cb0674488b8e17ab7278003d2d54 100644
> > --- a/gcc/config/aarch64/aarch64.h
> > +++ b/gcc/config/aarch64/aarch64.h
> > @@ -242,7 +242,8 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = AARCH64_FL_SM_OFF;
> > #define AARCH64_ISA_SHA3 (aarch64_isa_flags & AARCH64_FL_SHA3)
> > #define AARCH64_ISA_F16FML (aarch64_isa_flags & AARCH64_FL_F16FML)
> > #define AARCH64_ISA_RCPC (aarch64_isa_flags & AARCH64_FL_RCPC)
> > -#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_V8_4A)
> > +#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags \
> > + & (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3))
>
> It looks like the effect of these two changes is that:
>
> * armv9-a+rcpc3+norcpc leaves TARGET_RCPC2 true and TARGET_RCPC and
> TARGET_RCPC3 false.
>
> * armv8-a+rcpc3+norcpc correctly leaves all three false.
>
> If we add the RCPC3->RCPC dependency then I think we should also
> require FL_RCPC alongside FL_V8_4A. I.e.:
>
> #define AARCH64_ISA_RCPC8_4 (AARCH64_ISA_RCPC \
> && (aarch64_isa_flags \
> & (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3)))
Good spot! I'll go with the following instead (for formatting reasons), if it
passes testing:
#define AARCH64_ISA_RCPC8_4 ((AARCH64_ISA_RCPC && AARCH_ISA_V8_4A) \
|| (aarch64_isa_flags & AARCH64_FL_RCPC3))
> OK with that change, thanks.
>
> Richard
>
>
> > #define AARCH64_ISA_RNG (aarch64_isa_flags & AARCH64_FL_RNG)
> > #define AARCH64_ISA_V8_5A (aarch64_isa_flags & AARCH64_FL_V8_5A)
> > #define AARCH64_ISA_TME (aarch64_isa_flags & AARCH64_FL_TME)
> > diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> > index 8d3c16a10910af977c560782f9d659c0e51286fd..3c64e00ca3a416ef565bc0b4a5b3e5bd9cfc41bc 100644
> > --- a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> > +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> > @@ -1,8 +1,8 @@
> > processor : 0
> > BogoMIPS : 100.00
> > -Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc3
> > +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc ilrcpc lrcpc3
> > CPU implementer : 0xfe
> > CPU architecture: 8
> > CPU variant : 0x0
> > CPU part : 0xd08
> > -CPU revision : 2
> > \ No newline at end of file
> > +CPU revision : 2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] aarch64: Add rcpc3 dependency on rcpc2 and rcpc
2024-04-12 17:00 ` Andrew Carlotti
@ 2024-04-12 23:41 ` Andrew Carlotti
0 siblings, 0 replies; 4+ messages in thread
From: Andrew Carlotti @ 2024-04-12 23:41 UTC (permalink / raw)
To: gcc-patches, Richard Earnshaw, richard.sandiford
On Fri, Apr 12, 2024 at 06:00:24PM +0100, Andrew Carlotti wrote:
> On Fri, Apr 12, 2024 at 04:49:03PM +0100, Richard Sandiford wrote:
> > Andrew Carlotti <andrew.carlotti@arm.com> writes:
> > > We don't yet have a separate feature flag for FEAT_LRCPC2 (and adding
> > > one will require extending the feature bitmask). Instead, make the
> > > FEAT_LRCPC patterns available when either armv8.4-a or +rcpc3 is
> > > specified. On the other hand, we already have a +rcpc flag, so this
> > > dependency can be specified directly.
> > >
> > > The cpunative test needed updating because it used an invalid Features
> > > list, since lrcpc3 requires both ilrcpc and lrcpc to be present.
> > > Without this change, host_detect_local_cpu would return the architecture
> > > string 'armv8-a+dotprod+crc+crypto+rcpc3+norcpc'.
> > >
> > > gcc/ChangeLog:
> > >
> > > * config/aarch64/aarch64-option-extensions.def: Add RCPC to
> > > RCPC3 dependencies.
> > > * config/aarch64/aarch64.h (AARCH64_ISA_RCPC8_4): Add test for
> > > RCPC3 bit
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > > * gcc.target/aarch64/cpunative/info_24: Include lrcpc and ilrcpc.
> > >
> > > ---
> > >
> > > Bootstrapped and regression tested on aarch64. I also verified that the
> > > atomic-store.c and ldapr-sext.c tests would pass when replacing 'armv8.4-a'
> > > with 'armv8-a+rcpc3'.
> > >
> > > Ok for master?
> > >
> > >
> > > diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
> > > index 3155eccd39c8e6825b7fc2bb0d0514c2e7e559bf..42ec0eec31e2ddb0cc6f83fdbaf0fd4eac5ca7f4 100644
> > > --- a/gcc/config/aarch64/aarch64-option-extensions.def
> > > +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> > > @@ -153,7 +153,7 @@ AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
> > >
> > > AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
> > >
> > > -AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
> > > +AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (RCPC), (), (), "lrcpc3")
> > >
> > > AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm")
> > >
> > > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> > > index 45e901cda644dbe4eaae709e685954f1a6f7dbcf..5870e3f812f6cb0674488b8e17ab7278003d2d54 100644
> > > --- a/gcc/config/aarch64/aarch64.h
> > > +++ b/gcc/config/aarch64/aarch64.h
> > > @@ -242,7 +242,8 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = AARCH64_FL_SM_OFF;
> > > #define AARCH64_ISA_SHA3 (aarch64_isa_flags & AARCH64_FL_SHA3)
> > > #define AARCH64_ISA_F16FML (aarch64_isa_flags & AARCH64_FL_F16FML)
> > > #define AARCH64_ISA_RCPC (aarch64_isa_flags & AARCH64_FL_RCPC)
> > > -#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_V8_4A)
> > > +#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags \
> > > + & (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3))
> >
> > It looks like the effect of these two changes is that:
> >
> > * armv9-a+rcpc3+norcpc leaves TARGET_RCPC2 true and TARGET_RCPC and
> > TARGET_RCPC3 false.
> >
> > * armv8-a+rcpc3+norcpc correctly leaves all three false.
> >
> > If we add the RCPC3->RCPC dependency then I think we should also
> > require FL_RCPC alongside FL_V8_4A. I.e.:
> >
> > #define AARCH64_ISA_RCPC8_4 (AARCH64_ISA_RCPC \
> > && (aarch64_isa_flags \
> > & (AARCH64_FL_V8_4A | AARCH64_FL_RCPC3)))
>
> Good spot! I'll go with the following instead (for formatting reasons), if it
> passes testing:
>
> #define AARCH64_ISA_RCPC8_4 ((AARCH64_ISA_RCPC && AARCH_ISA_V8_4A) \
> || (aarch64_isa_flags & AARCH64_FL_RCPC3))
I missed the 64 in AARCH64_ISA_V8_4A. The corrected version passed testing and
is now merged.
> > OK with that change, thanks.
> >
> > Richard
> >
> >
> > > #define AARCH64_ISA_RNG (aarch64_isa_flags & AARCH64_FL_RNG)
> > > #define AARCH64_ISA_V8_5A (aarch64_isa_flags & AARCH64_FL_V8_5A)
> > > #define AARCH64_ISA_TME (aarch64_isa_flags & AARCH64_FL_TME)
> > > diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> > > index 8d3c16a10910af977c560782f9d659c0e51286fd..3c64e00ca3a416ef565bc0b4a5b3e5bd9cfc41bc 100644
> > > --- a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> > > +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
> > > @@ -1,8 +1,8 @@
> > > processor : 0
> > > BogoMIPS : 100.00
> > > -Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc3
> > > +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc ilrcpc lrcpc3
> > > CPU implementer : 0xfe
> > > CPU architecture: 8
> > > CPU variant : 0x0
> > > CPU part : 0xd08
> > > -CPU revision : 2
> > > \ No newline at end of file
> > > +CPU revision : 2
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-04-12 14:19 [PATCH] aarch64: Add rcpc3 dependency on rcpc2 and rcpc Andrew Carlotti
2024-04-12 15:49 ` Richard Sandiford
2024-04-12 17:00 ` Andrew Carlotti
2024-04-12 23:41 ` Andrew Carlotti
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