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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Jeff Law <jeffreyalaw@gmail.com>, GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] RISC-V: Prohibit combination of 'E' and 'H'
Date: Sun, 22 Oct 2023 10:33:06 +0900	[thread overview]
Message-ID: <6e2f6992-133a-4e68-82cc-24388e387523@irq.a4lg.com> (raw)
In-Reply-To: <aaf7705a-d874-47db-9ea6-a334ba5f91f4@gmail.com>

On 2023/10/22 3:04, Jeff Law wrote:
> 
> 
> On 10/20/23 23:32, Tsukasa OI wrote:
>> From: Tsukasa OI <research_trasio@irq.a4lg.com>
>>
>> According to the ratified privileged specification (version 20211203),
>> it says:
>>
>>> The hypervisor extension depends on an "I" base integer ISA with 32 x
>>> registers (RV32I or RV64I), not RV32E, which has only 16 x registers.
>>
>> Also in the latest draft, it also prohibits RV64E with the 'H' extension.
>> This commit prohibits the combination of 'E' and 'H' extensions.
>>
>> gcc/ChangeLog:
>>
>>     * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
>>     Prohibit 'E' and 'H' combinations.
>>
>> gcc/testsuite/ChangeLog:
>>
>>     * gcc.target/riscv/arch-26.c: New test.
> In a similar vein, GCC doesn't really care about the privileged
> extensions.  So this won't really affect code generation.  So I'll ACK,
> but going forward let's start doing the regression test.  If you need
> help setting that up, I'm sure someone here can make suggestions.
> Personally I prefer a qemu+binfmt setup as it doesn't require setting up
> a board file and explicitly calling the simulator, ie, it looks a lot
> like native testing.
> 
> jeff
> 

Thanks for reviewing.  I'll commit two patches soon.

Yes, for GCC, privileged extensions (and version numbers) are not
important in general (unless toolchain conventions create privileged
built-in functions).

Intents of my two small patch sets are:

1. Allow inline assembly to use new/privileged extensions.
2. Allow/disallow same -march for both CC and AS (as possible).
3. (As long as no major compatibility breakage happens),
   make both GCC and Binutils faithful to the specification
   and the current status (that would also improve interoperability).

Hmm, I generally agree with your opinion and I made a board file for
DejaGnu (running qemu-riscv64) to run "make check-gcc
RUNTESTFLAGS='--target_board=riscv-sim riscv.exp'" because it already
contains many execute tests (and annoys me if I don't do that).

What I'm not sure is, what kind of regression tests we need?

(In my mind)
Level 1: Make nearly empty program with specific -march (and optionally
         -mabi?) and make sure that it works.
Level 2: Make a program with inline assembly and execute tests with
         specific configurations (with specific -march and -mabi)
         [I'm not sure how to write **and optionally execute tests**]

I would like to hear your thoughts.

Thanks,
Tsukasa

  reply	other threads:[~2023-10-22  1:33 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-21  5:32 Tsukasa OI
2023-10-21 18:04 ` Jeff Law
2023-10-22  1:33   ` Tsukasa OI [this message]
2023-10-23  1:54     ` Jeff Law

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