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From: chenglulu <chenglulu@loongson.cn>
To: Xi Ruoyao <xry111@xry111.site>, gcc-patches@gcc.gnu.org
Cc: i@xen0n.name, xuchenghua@loongson.cn
Subject: Re: [PATCH v3 4/5] LoongArch: Remove lrint_allow_inexact
Date: Thu, 23 Nov 2023 16:23:31 +0800	[thread overview]
Message-ID: <7a4ceec5-2545-f30a-af44-7f7767620b76@loongson.cn> (raw)
In-Reply-To: <20231120004728.205167-5-xry111@xry111.site>

I tested it and it was fine. I never knew this could be used like this.

Thank you!

在 2023/11/20 上午8:47, Xi Ruoyao 写道:
> No functional change, just a cleanup.
>
> gcc/ChangeLog:
>
> 	* config/loongarch/loongarch.md (lrint_allow_inexact): Remove.
> 	(<lrint_pattern><ANYF:mode><ANYFI:mode>2): Check if <LRINT>
> 	== UNSPEC_FTINT instead of <lrint_allow_inexact>.
> ---
>   gcc/config/loongarch/loongarch.md | 5 +----
>   1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
> index 78ed63f2132..1e019815451 100644
> --- a/gcc/config/loongarch/loongarch.md
> +++ b/gcc/config/loongarch/loongarch.md
> @@ -585,9 +585,6 @@ (define_int_attr lrint_pattern [(UNSPEC_FTINT "lrint")
>   (define_int_attr lrint_submenmonic [(UNSPEC_FTINT "")
>   				    (UNSPEC_FTINTRM "rm")
>   				    (UNSPEC_FTINTRP "rp")])
> -(define_int_attr lrint_allow_inexact [(UNSPEC_FTINT "1")
> -				      (UNSPEC_FTINTRM "0")
> -				      (UNSPEC_FTINTRP "0")])
>   
>   ;; Iterator and attributes for bytepick.d
>   (define_int_iterator bytepick_w_ashift_amount [8 16 24])
> @@ -2384,7 +2381,7 @@ (define_insn "<lrint_pattern><ANYF:mode><ANYFI:mode>2"
>   	(unspec:ANYFI [(match_operand:ANYF 1 "register_operand" "f")]
>   		      LRINT))]
>     "TARGET_HARD_FLOAT &&
> -   (<lrint_allow_inexact>
> +   (<LRINT> == UNSPEC_FTINT
>       || flag_fp_int_builtin_inexact
>       || !flag_trapping_math)"
>     "ftint<lrint_submenmonic>.<ANYFI:ifmt>.<ANYF:fmt> %0,%1"


  reply	other threads:[~2023-11-23  8:23 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-20  0:47 [PATCH v3 0/5] LoongArch: SIMD fixes and optimizations Xi Ruoyao
2023-11-20  0:47 ` [PATCH v3 1/5] LoongArch: Fix usage of LSX and LASX frint/ftint instructions [PR112578] Xi Ruoyao
2023-11-23  6:35   ` chenglulu
2023-11-23  7:11     ` Xi Ruoyao
2023-11-23  7:31       ` chenglulu
2023-11-23  8:13         ` chenglulu
2023-11-23  9:02           ` Xi Ruoyao
2023-11-23  9:12             ` chenglulu
2023-11-23 10:12               ` Xi Ruoyao
2023-11-23 12:06                 ` Xi Ruoyao
2023-11-23 18:03                 ` Joseph Myers
2023-11-24  2:39                   ` Xi Ruoyao
2023-11-24  8:01                     ` chenglulu
2023-11-24  8:26                       ` Xi Ruoyao
2023-11-24  8:36                         ` chenglulu
2023-11-24  8:42                           ` Xi Ruoyao
2023-11-24  9:46                             ` chenglulu
2023-11-24 10:30                               ` Xi Ruoyao
2023-11-24 14:59                                 ` chenglulu
2023-11-23  8:54         ` Xi Ruoyao
2023-11-20  0:47 ` [PATCH v3 2/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX muh instructions Xi Ruoyao
2023-11-23 12:08   ` chenglulu
2023-11-20  0:47 ` [PATCH v3 3/5] LoongArch: Use standard pattern name and RTX code for LSX/LASX rotate shift Xi Ruoyao
2023-11-23  8:42   ` chenglulu
2023-11-20  0:47 ` [PATCH v3 4/5] LoongArch: Remove lrint_allow_inexact Xi Ruoyao
2023-11-23  8:23   ` chenglulu [this message]
2023-11-23  8:58     ` Xi Ruoyao
2023-11-23  9:14       ` chenglulu
2023-11-23 12:24         ` Xi Ruoyao
2023-11-23 14:39           ` chenglulu
2023-11-20  0:47 ` [PATCH v3 5/5] LoongArch: Use LSX for scalar FP rounding with explicit rounding mode Xi Ruoyao
2023-11-29  7:12 ` Pushed: [PATCH v3 0/5] LoongArch: SIMD fixes and optimizations Xi Ruoyao
2023-11-29  7:45   ` chenglulu

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