* [Patch] GCN: Add pre-initial support for gfx1100
@ 2024-01-07 19:20 Tobias Burnus
2024-01-08 10:06 ` Andrew Stubbs
2024-02-19 17:05 ` GCN: Restore lost '__gfx90a__' target CPU definition (was: [Patch] GCN: Add pre-initial support for gfx1100) Thomas Schwinge
0 siblings, 2 replies; 5+ messages in thread
From: Tobias Burnus @ 2024-01-07 19:20 UTC (permalink / raw)
To: gcc-patches, Andrew Stubbs
[-- Attachment #1: Type: text/plain, Size: 1739 bytes --]
ROCm meanwhile supports also some consumer cards; besides the semi-new
gfx1030, support for gfx1100 was added more recently (in ROCm 5.7.1 for
"Ubuntu 22.04 only" and without parenthesis since ROCm 6.0.0).
GCC has already very limited support for gfx1030 - whose multlib support
is - on purpose - not yet enabled by default and is WIP.
The attached patch now adds gfx1100 on top of it, assuming that it
mostly behaves the same as gfx1030. This is really WIP as there are
known build (assembly) issues (see below) and not only "just" runtime
issues.
gfx1100 differs at least in the following aspects from the previously
supported cards:
* gfx1100 has an 'architected flat scratch' which is different from
'absolute flat scratch' which all others (but fiji: 'offset flat
scratch') have. Hence, '.amdhsa_reserve_flat_scratch 0'
has to be excluded to avoid assembly errors.
* gfx1100 also does not support 'v_mov_b32_sdwa', failing to assembly
libc/argz/libc_a-argz_stringify.o with:
"sdwa variant of this instruction is not supported"
→ This has not been address in the patch, hence, specifying gfx1100 in
--with-multilib-list= will fail to build when an in-tree newlib is build.
* * *
The attached patch fixes in addition one issue in libgomp (string-length
len constant is too short for gfx1030 (and gfx1100) = 7 characters) and
it includes the fix that __gfx1030__ is not defined, which I have
submitted separately (yesterday).
With the caveat that gfx1100 is even less usable than gfx1030 and it
won't build newlib, is it nonetheless
OK for mainline ?
(As gfx1100 is not enabled by default in multilib, a regular build will
will not fail and I think the *.md issue can be addressed separately.)
Tobias
[-- Attachment #2: gcn-gfx1100.diff --]
[-- Type: text/x-patch, Size: 20455 bytes --]
GCN: Add pre-initial support for gfx1100
ROCm since 5.7.1 supports gfx1100 (RDNA3) cards. This commit adds support
for it, mostly by assuming gfx1100 behaves identical to gfx1030. Like gfx1030,
gfx1100 support is neither documented nor the build of the multilib enabled by
default.
But contrary to gfx1030, gfx1100 has a known issue causing some libraries not
to build, including newlib: The sdwa variant of v_mov_b32_sdwa is not supported
by the hardware but GCC current does generates this instruction.
This will be addressed in a later commit.
gcc/ChangeLog:
* config.gcc (amdgcn-*-amdhsa): Accept --with-arch=gfx1100.
* config/gcn/gcn-hsa.h (NO_XNACK): Add gfx1100:
(ASM_SPEC): Handle gfx1100.
* config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1100.
(enum gcn_isa): Add ISA_RDNA3.
(TARGET_GFX1100, TARGET_RDNA2_PLUS, TARGET_RDNA3): Define.
* config/gcn/gcn-valu.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
* config/gcn/gcn.cc (gcn_option_override,
gcn_omp_device_kind_arch_isa, output_file_start): Handle gfx1100.
(gcn_global_address_p, gcn_addr_space_legitimate_address_p): Change
TARGET_RDNA2 to TARGET_RDNA2_PLUS.
(gcn_hsa_declare_function_name): Don't use '.amdhsa_reserve_flat_scratch'
with gfx1100.
* config/gcn/gcn.h (ASSEMBLER_DIALECT): Likewise.
(TARGET_CPU_CPP_BUILTINS): Define __RDNA3__, __gfx1030__ and
__gfx1100__.
* config/gcn/gcn.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
* config/gcn/gcn.opt (Enum gpu_type): Add gfx1100.
* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1100): Define.
(isa_has_combined_avgprs, main): Handle gfx1100.
* config/gcn/t-omp-device (isa): Add gfx1100.
libgomp/ChangeLog:
* plugin/plugin-gcn.c (gcn_gfx1100_s): New const string.
(gcn_isa_name_len): Fix length.
(isa_hsa_name, isa_code, max_isa_vgprs): Handle gfx1100.
gcc/config.gcc | 2 +-
gcc/config/gcn/gcn-hsa.h | 4 ++--
gcc/config/gcn/gcn-opts.h | 7 +++++-
gcc/config/gcn/gcn-valu.md | 10 ++++----
gcc/config/gcn/gcn.cc | 29 ++++++++++++++++-------
gcc/config/gcn/gcn.h | 10 +++++---
gcc/config/gcn/gcn.md | 32 ++++++++++++-------------
gcc/config/gcn/gcn.opt | 3 +++
gcc/config/gcn/mkoffload.cc | 5 ++++
gcc/config/gcn/t-omp-device | 2 +-
gcc/tree-vect-loop-manip.cc | 16 +++++++++++++
gcc/tree-vect-loop.cc | 58 ++++++++++++++++++++++-----------------------
libgomp/plugin/plugin-gcn.c | 9 ++++++-
13 files changed, 119 insertions(+), 68 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index ce40b7758dd..7e583390024 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4548,7 +4548,7 @@ case "${target}" in
for which in arch tune; do
eval "val=\$with_$which"
case ${val} in
- "" | fiji | gfx900 | gfx906 | gfx908 | gfx90a | gfx1030)
+ "" | fiji | gfx900 | gfx906 | gfx908 | gfx90a | gfx1030 | gfx1100)
# OK
;;
*)
diff --git a/gcc/config/gcn/gcn-hsa.h b/gcc/config/gcn/gcn-hsa.h
index 43bbe0411a3..bf7079fbbc6 100644
--- a/gcc/config/gcn/gcn-hsa.h
+++ b/gcc/config/gcn/gcn-hsa.h
@@ -75,7 +75,7 @@ extern unsigned int gcn_local_sym_hash (const char *name);
supported for gcn. */
#define GOMP_SELF_SPECS ""
-#define NO_XNACK "march=fiji:;march=gfx1030:;" \
+#define NO_XNACK "march=fiji:;march=gfx1030:;march=gfx1100:;" \
/* These match the defaults set in gcn.cc. */ \
"!mxnack*|mxnack=default:%{march=gfx900|march=gfx906|march=gfx908:-mattr=-xnack};"
#define NO_SRAM_ECC "!march=*:;march=fiji:;march=gfx900:;march=gfx906:;"
@@ -91,7 +91,7 @@ extern unsigned int gcn_local_sym_hash (const char *name);
"%{!march=*|march=fiji:--amdhsa-code-object-version=3} " \
"%{" NO_XNACK XNACKOPT "}" \
"%{" NO_SRAM_ECC SRAMOPT "} " \
- "%{march=gfx1030:-mattr=+wavefrontsize64} " \
+ "%{march=gfx1030|march=gfx1100:-mattr=+wavefrontsize64} " \
"-filetype=obj"
#define LINK_SPEC "--pie --export-dynamic"
#define LIB_SPEC "-lc"
diff --git a/gcc/config/gcn/gcn-opts.h b/gcc/config/gcn/gcn-opts.h
index 9a82cc81ea5..79fbda3ab25 100644
--- a/gcc/config/gcn/gcn-opts.h
+++ b/gcc/config/gcn/gcn-opts.h
@@ -25,7 +25,8 @@ enum processor_type
PROCESSOR_VEGA20, // gfx906
PROCESSOR_GFX908,
PROCESSOR_GFX90a,
- PROCESSOR_GFX1030
+ PROCESSOR_GFX1030,
+ PROCESSOR_GFX1100
};
#define TARGET_FIJI (gcn_arch == PROCESSOR_FIJI)
@@ -34,6 +35,7 @@ enum processor_type
#define TARGET_GFX908 (gcn_arch == PROCESSOR_GFX908)
#define TARGET_GFX90a (gcn_arch == PROCESSOR_GFX90a)
#define TARGET_GFX1030 (gcn_arch == PROCESSOR_GFX1030)
+#define TARGET_GFX1100 (gcn_arch == PROCESSOR_GFX1100)
/* Set in gcn_option_override. */
extern enum gcn_isa {
@@ -41,6 +43,7 @@ extern enum gcn_isa {
ISA_GCN3,
ISA_GCN5,
ISA_RDNA2,
+ ISA_RDNA3,
ISA_CDNA1,
ISA_CDNA2
} gcn_isa;
@@ -54,6 +57,8 @@ extern enum gcn_isa {
#define TARGET_CDNA2 (gcn_isa == ISA_CDNA2)
#define TARGET_CDNA2_PLUS (gcn_isa >= ISA_CDNA2)
#define TARGET_RDNA2 (gcn_isa == ISA_RDNA2)
+#define TARGET_RDNA2_PLUS (gcn_isa >= ISA_RDNA2 && gcn_isa < ISA_CDNA1)
+#define TARGET_RDNA3 (gcn_isa == ISA_RDNA3)
#define TARGET_M0_LDS_LIMIT (TARGET_GCN3)
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 615e48470dd..3d5b6271ee6 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -1417,7 +1417,7 @@
[(match_operand:V_noHI 1 "register_operand" " v")
(match_operand:SI 2 "const_int_operand" " n")]
UNSPEC_MOV_DPP_SHR))]
- "!TARGET_RDNA2"
+ "!TARGET_RDNA2_PLUS"
{
return gcn_expand_dpp_shr_insn (<MODE>mode, "v_mov_b32",
UNSPEC_MOV_DPP_SHR, INTVAL (operands[2]));
@@ -4211,7 +4211,7 @@
(unspec:<SCALAR_MODE>
[(match_operand:V_ALL 1 "register_operand")]
REDUC_UNSPEC))]
- "!TARGET_RDNA2"
+ "!TARGET_RDNA2_PLUS"
{
rtx tmp = gcn_expand_reduc_scalar (<MODE>mode, operands[1],
<reduc_unspec>);
@@ -4265,7 +4265,7 @@
; GCN3 requires a carry out, GCN5 not
"!(TARGET_GCN3 && SCALAR_INT_MODE_P (<SCALAR_MODE>mode)
&& <reduc_unspec> == UNSPEC_PLUS_DPP_SHR)
- && !TARGET_RDNA2"
+ && !TARGET_RDNA2_PLUS"
{
return gcn_expand_dpp_shr_insn (<MODE>mode, "<reduc_insn>",
<reduc_unspec>, INTVAL (operands[3]));
@@ -4310,7 +4310,7 @@
(match_operand:SI 3 "const_int_operand" "n")]
UNSPEC_PLUS_CARRY_DPP_SHR))
(clobber (reg:DI VCC_REG))]
- "!TARGET_RDNA2"
+ "!TARGET_RDNA2_PLUS"
{
return gcn_expand_dpp_shr_insn (<VnSI>mode, "v_add%^_u32",
UNSPEC_PLUS_CARRY_DPP_SHR,
@@ -4328,7 +4328,7 @@
(match_operand:DI 4 "register_operand" "cV")]
UNSPEC_PLUS_CARRY_IN_DPP_SHR))
(clobber (reg:DI VCC_REG))]
- "!TARGET_RDNA2"
+ "!TARGET_RDNA2_PLUS"
{
return gcn_expand_dpp_shr_insn (<MODE>mode, "v_addc%^_u32",
UNSPEC_PLUS_CARRY_IN_DPP_SHR,
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 79d3a65ce13..50467bc6d39 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -139,6 +139,7 @@ gcn_option_override (void)
: gcn_arch == PROCESSOR_GFX908 ? ISA_CDNA1
: gcn_arch == PROCESSOR_GFX90a ? ISA_CDNA2
: gcn_arch == PROCESSOR_GFX1030 ? ISA_RDNA2
+ : gcn_arch == PROCESSOR_GFX1100 ? ISA_RDNA3
: ISA_UNKNOWN);
gcc_assert (gcn_isa != ISA_UNKNOWN);
@@ -160,15 +161,17 @@ gcn_option_override (void)
acc_lds_size = 32768;
}
- /* gfx803 "Fiji" and gfx1030 do not support XNACK. */
+ /* gfx803 "Fiji", gfx1030 and gfx1100 do not support XNACK. */
if (gcn_arch == PROCESSOR_FIJI
- || gcn_arch == PROCESSOR_GFX1030)
+ || gcn_arch == PROCESSOR_GFX1030
+ || gcn_arch == PROCESSOR_GFX1100)
{
if (flag_xnack == HSACO_ATTR_ON)
- error ("-mxnack=on is incompatible with -march=%s",
+ error ("%<-mxnack=on%> is incompatible with %<-march=%s%>",
(gcn_arch == PROCESSOR_FIJI ? "fiji"
- : gcn_arch == PROCESSOR_GFX1030 ? "gfx1030"
- : NULL));
+ : gcn_arch == PROCESSOR_GFX1030 ? "gfx1030"
+ : gcn_arch == PROCESSOR_GFX1100 ? "gfx1100"
+ : NULL));
/* Allow HSACO_ATTR_ANY silently because that's the default. */
flag_xnack = HSACO_ATTR_OFF;
}
@@ -1592,7 +1595,7 @@ gcn_global_address_p (rtx addr)
{
rtx base = XEXP (addr, 0);
rtx offset = XEXP (addr, 1);
- int offsetbits = (TARGET_RDNA2 ? 11 : 12);
+ int offsetbits = (TARGET_RDNA2_PLUS ? 11 : 12);
bool immediate_p = (CONST_INT_P (offset)
&& INTVAL (offset) >= -(1 << 12)
&& INTVAL (offset) < (1 << 12));
@@ -1725,7 +1728,7 @@ gcn_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict,
rtx base = XEXP (x, 0);
rtx offset = XEXP (x, 1);
- int offsetbits = (TARGET_RDNA2 ? 11 : 12);
+ int offsetbits = (TARGET_RDNA2_PLUS ? 11 : 12);
bool immediate_p = (GET_CODE (offset) == CONST_INT
/* Signed 12/13-bit immediate. */
&& INTVAL (offset) >= -(1 << offsetbits)
@@ -3043,6 +3046,8 @@ gcn_omp_device_kind_arch_isa (enum omp_device_kind_arch_isa trait,
return gcn_arch == PROCESSOR_GFX90a;
if (strcmp (name, "gfx1030") == 0)
return gcn_arch == PROCESSOR_GFX1030;
+ if (strcmp (name, "gfx1100") == 0)
+ return gcn_arch == PROCESSOR_GFX1100;
return 0;
default:
gcc_unreachable ();
@@ -6539,6 +6544,11 @@ output_file_start (void)
xnack = "";
sram_ecc = "";
break;
+ case PROCESSOR_GFX1100:
+ cpu = "gfx1100";
+ xnack = "";
+ sram_ecc = "";
+ break;
default: gcc_unreachable ();
}
@@ -6664,7 +6674,6 @@ gcn_hsa_declare_function_name (FILE *file, const char *name, tree decl)
"\t .amdhsa_next_free_vgpr\t%i\n"
"\t .amdhsa_next_free_sgpr\t%i\n"
"\t .amdhsa_reserve_vcc\t1\n"
- "\t .amdhsa_reserve_flat_scratch\t0\n"
"\t .amdhsa_reserve_xnack_mask\t%i\n"
"\t .amdhsa_private_segment_fixed_size\t0\n"
"\t .amdhsa_group_segment_fixed_size\t%u\n"
@@ -6674,6 +6683,10 @@ gcn_hsa_declare_function_name (FILE *file, const char *name, tree decl)
sgpr,
xnack_enabled,
LDS_SIZE);
+ /* Not supported with 'architected flat scratch'. */
+ if (gcn_arch != PROCESSOR_GFX1100)
+ fprintf (file,
+ "\t .amdhsa_reserve_flat_scratch\t0\n");
if (gcn_arch == PROCESSOR_GFX90a)
fprintf (file,
"\t .amdhsa_accum_offset\t%i\n"
diff --git a/gcc/config/gcn/gcn.h b/gcc/config/gcn/gcn.h
index c350cbb0545..c2afb5e9140 100644
--- a/gcc/config/gcn/gcn.h
+++ b/gcc/config/gcn/gcn.h
@@ -30,6 +30,8 @@
builtin_define ("__CDNA2__"); \
else if (TARGET_RDNA2) \
builtin_define ("__RDNA2__"); \
+ else if (TARGET_RDNA3) \
+ builtin_define ("__RDNA3__"); \
if (TARGET_FIJI) \
{ \
builtin_define ("__fiji__"); \
@@ -41,11 +43,13 @@
builtin_define ("__gfx906__"); \
else if (TARGET_GFX908) \
builtin_define ("__gfx908__"); \
- else if (TARGET_GFX90a) \
- builtin_define ("__gfx90a__"); \
+ else if (TARGET_GFX1030) \
+ builtin_define ("__gfx1030"); \
+ else if (TARGET_GFX1100) \
+ builtin_define ("__gfx1100__"); \
} while (0)
-#define ASSEMBLER_DIALECT (TARGET_RDNA2 ? 1 : 0)
+#define ASSEMBLER_DIALECT (TARGET_RDNA2_PLUS ? 1 : 0)
/* Support for a compile-time default architecture and tuning.
The rules are:
diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md
index e7815340002..492b833e255 100644
--- a/gcc/config/gcn/gcn.md
+++ b/gcc/config/gcn/gcn.md
@@ -299,10 +299,10 @@
(define_attr "enabled" ""
(cond [(and (eq_attr "rdna" "no")
- (ne (symbol_ref "TARGET_RDNA2") (const_int 0)))
+ (ne (symbol_ref "TARGET_RDNA2_PLUS") (const_int 0)))
(const_int 0)
(and (eq_attr "rdna" "yes")
- (eq (symbol_ref "TARGET_RDNA2") (const_int 0)))
+ (eq (symbol_ref "TARGET_RDNA2_PLUS") (const_int 0)))
(const_int 0)
(and (eq_attr "gcn_version" "gcn5")
(eq (symbol_ref "TARGET_GCN5_PLUS") (const_int 0)))
@@ -2109,13 +2109,13 @@
return "s_load%o0\t%0, %A1 glc\;s_waitcnt\tlgkmcnt(0)\;"
"s_dcache_wb_vol";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "flat_load%o0\t%0, %A1%O1 glc\;s_waitcnt\t0\;"
"buffer_gl0_inv"
: "flat_load%o0\t%0, %A1%O1 glc\;s_waitcnt\t0\;"
"buffer_wbinvl1_vol");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "global_load%o0\t%0, %A1%O1 glc\;s_waitcnt\tvmcnt(0)\;"
"buffer_gl0_inv"
: "global_load%o0\t%0, %A1%O1 glc\;s_waitcnt\tvmcnt(0)\;"
@@ -2131,13 +2131,13 @@
return "s_dcache_wb_vol\;s_load%o0\t%0, %A1 glc\;"
"s_waitcnt\tlgkmcnt(0)\;s_dcache_inv_vol";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;flat_load%o0\t%0, %A1%O1 glc\;"
"s_waitcnt\t0\;buffer_gl0_inv"
: "buffer_wbinvl1_vol\;flat_load%o0\t%0, %A1%O1 glc\;"
"s_waitcnt\t0\;buffer_wbinvl1_vol");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;global_load%o0\t%0, %A1%O1 glc\;"
"s_waitcnt\tvmcnt(0)\;buffer_gl0_inv"
: "buffer_wbinvl1_vol\;global_load%o0\t%0, %A1%O1 glc\;"
@@ -2180,11 +2180,11 @@
case 0:
return "s_dcache_wb_vol\;s_store%o1\t%1, %A0 glc";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;flat_store%o1\t%A0, %1%O0 glc"
: "buffer_wbinvl1_vol\;flat_store%o1\t%A0, %1%O0 glc");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;global_store%o1\t%A0, %1%O0 glc"
: "buffer_wbinvl1_vol\;global_store%o1\t%A0, %1%O0 glc");
}
@@ -2198,13 +2198,13 @@
return "s_dcache_wb_vol\;s_store%o1\t%1, %A0 glc\;"
"s_waitcnt\tlgkmcnt(0)\;s_dcache_inv_vol";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;flat_store%o1\t%A0, %1%O0 glc\;"
"s_waitcnt\t0\;buffer_gl0_inv"
: "buffer_wbinvl1_vol\;flat_store%o1\t%A0, %1%O0 glc\;"
"s_waitcnt\t0\;buffer_wbinvl1_vol");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;global_store%o1\t%A0, %1%O0 glc\;"
"s_waitcnt\tvmcnt(0)\;buffer_gl0_inv"
: "buffer_wbinvl1_vol\;global_store%o1\t%A0, %1%O0 glc\;"
@@ -2252,13 +2252,13 @@
return "s_atomic_swap<X>\t%0, %1, %2 glc\;s_waitcnt\tlgkmcnt(0)\;"
"s_dcache_wb_vol\;s_dcache_inv_vol";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "flat_atomic_swap<X>\t%0, %1, %2 glc\;s_waitcnt\t0\;"
"buffer_gl0_inv"
: "flat_atomic_swap<X>\t%0, %1, %2 glc\;s_waitcnt\t0\;"
"buffer_wbinvl1_vol");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "global_atomic_swap<X>\t%0, %A1, %2%O1 glc\;"
"s_waitcnt\tvmcnt(0)\;buffer_gl0_inv"
: "global_atomic_swap<X>\t%0, %A1, %2%O1 glc\;"
@@ -2273,13 +2273,13 @@
return "s_dcache_wb_vol\;s_atomic_swap<X>\t%0, %1, %2 glc\;"
"s_waitcnt\tlgkmcnt(0)";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;flat_atomic_swap<X>\t%0, %1, %2 glc\;"
"s_waitcnt\t0"
: "buffer_wbinvl1_vol\;flat_atomic_swap<X>\t%0, %1, %2 glc\;"
"s_waitcnt\t0");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;"
"global_atomic_swap<X>\t%0, %A1, %2%O1 glc\;"
"s_waitcnt\tvmcnt(0)"
@@ -2297,13 +2297,13 @@
return "s_dcache_wb_vol\;s_atomic_swap<X>\t%0, %1, %2 glc\;"
"s_waitcnt\tlgkmcnt(0)\;s_dcache_inv_vol";
case 1:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;flat_atomic_swap<X>\t%0, %1, %2 glc\;"
"s_waitcnt\t0\;buffer_gl0_inv"
: "buffer_wbinvl1_vol\;flat_atomic_swap<X>\t%0, %1, %2 glc\;"
"s_waitcnt\t0\;buffer_wbinvl1_vol");
case 2:
- return (TARGET_RDNA2
+ return (TARGET_RDNA2_PLUS
? "buffer_gl0_inv\;"
"global_atomic_swap<X>\t%0, %A1, %2%O1 glc\;"
"s_waitcnt\tvmcnt(0)\;buffer_gl0_inv"
diff --git a/gcc/config/gcn/gcn.opt b/gcc/config/gcn/gcn.opt
index b3d7a188d03..842fd36d25c 100644
--- a/gcc/config/gcn/gcn.opt
+++ b/gcc/config/gcn/gcn.opt
@@ -43,6 +43,9 @@ Enum(gpu_type) String(gfx90a) Value(PROCESSOR_GFX90a)
EnumValue
Enum(gpu_type) String(gfx1030) Value(PROCESSOR_GFX1030)
+EnumValue
+Enum(gpu_type) String(gfx1100) Value(PROCESSOR_GFX1100)
+
march=
Target RejectNegative Negative(march=) Joined ToLower Enum(gpu_type) Var(gcn_arch) Init(PROCESSOR_FIJI)
Specify the name of the target GPU.
diff --git a/gcc/config/gcn/mkoffload.cc b/gcc/config/gcn/mkoffload.cc
index 3341c0d34eb..5b680e6f13f 100644
--- a/gcc/config/gcn/mkoffload.cc
+++ b/gcc/config/gcn/mkoffload.cc
@@ -59,6 +59,8 @@
#define EF_AMDGPU_MACH_AMDGCN_GFX90a 0x3f
#undef EF_AMDGPU_MACH_AMDGCN_GFX1030
#define EF_AMDGPU_MACH_AMDGCN_GFX1030 0x36
+#undef EF_AMDGPU_MACH_AMDGCN_GFX1100
+#define EF_AMDGPU_MACH_AMDGCN_GFX1100 0x41
#define EF_AMDGPU_FEATURE_XNACK_V4 0x300 /* Mask. */
#define EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 0x000
@@ -484,6 +486,7 @@ isa_has_combined_avgprs (int isa)
case EF_AMDGPU_MACH_AMDGCN_GFX906:
case EF_AMDGPU_MACH_AMDGCN_GFX908:
case EF_AMDGPU_MACH_AMDGCN_GFX1030:
+ case EF_AMDGPU_MACH_AMDGCN_GFX1100:
return false;
case EF_AMDGPU_MACH_AMDGCN_GFX90a:
return true;
@@ -1000,6 +1003,8 @@ main (int argc, char **argv)
elf_arch = EF_AMDGPU_MACH_AMDGCN_GFX90a;
else if (strcmp (argv[i], "-march=gfx1030") == 0)
elf_arch = EF_AMDGPU_MACH_AMDGCN_GFX1030;
+ else if (strcmp (argv[i], "-march=gfx1100") == 0)
+ elf_arch = EF_AMDGPU_MACH_AMDGCN_GFX1100;
#define STR "-mstack-size="
else if (startswith (argv[i], STR))
gcn_stack_size = atoi (argv[i] + strlen (STR));
diff --git a/gcc/config/gcn/t-omp-device b/gcc/config/gcn/t-omp-device
index b1cd998a8b1..2315ad594a3 100644
--- a/gcc/config/gcn/t-omp-device
+++ b/gcc/config/gcn/t-omp-device
@@ -1,4 +1,4 @@
omp-device-properties-gcn: $(srcdir)/config/gcn/gcn.cc
echo kind: gpu > $@
echo arch: amdgcn gcn >> $@
- echo isa: fiji gfx803 gfx900 gfx906 gfx908 gfx90a gfx1030 >> $@
+ echo isa: fiji gfx803 gfx900 gfx906 gfx908 gfx90a gfx1030 gfx1100 >> $@
diff --git a/libgomp/plugin/plugin-gcn.c b/libgomp/plugin/plugin-gcn.c
index bc8131a6c2d..e3e8b31c558 100644
--- a/libgomp/plugin/plugin-gcn.c
+++ b/libgomp/plugin/plugin-gcn.c
@@ -1641,7 +1641,8 @@ const static char *gcn_gfx906_s = "gfx906";
const static char *gcn_gfx908_s = "gfx908";
const static char *gcn_gfx90a_s = "gfx90a";
const static char *gcn_gfx1030_s = "gfx1030";
-const static int gcn_isa_name_len = 6;
+const static char *gcn_gfx1100_s = "gfx1100";
+const static int gcn_isa_name_len = 7;
/* Returns the name that the HSA runtime uses for the ISA or NULL if we do not
support the ISA. */
@@ -1662,6 +1663,8 @@ isa_hsa_name (int isa) {
return gcn_gfx90a_s;
case EF_AMDGPU_MACH_AMDGCN_GFX1030:
return gcn_gfx1030_s;
+ case EF_AMDGPU_MACH_AMDGCN_GFX1100:
+ return gcn_gfx1100_s;
}
return NULL;
}
@@ -1704,6 +1707,9 @@ isa_code(const char *isa) {
if (!strncmp (isa, gcn_gfx1030_s, gcn_isa_name_len))
return EF_AMDGPU_MACH_AMDGCN_GFX1030;
+ if (!strncmp (isa, gcn_gfx1100_s, gcn_isa_name_len))
+ return EF_AMDGPU_MACH_AMDGCN_GFX1100;
+
return -1;
}
@@ -1719,6 +1725,7 @@ max_isa_vgprs (int isa)
case EF_AMDGPU_MACH_AMDGCN_GFX906:
case EF_AMDGPU_MACH_AMDGCN_GFX908:
case EF_AMDGPU_MACH_AMDGCN_GFX1030:
+ case EF_AMDGPU_MACH_AMDGCN_GFX1100:
return 256;
case EF_AMDGPU_MACH_AMDGCN_GFX90a:
return 512;
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Patch] GCN: Add pre-initial support for gfx1100
2024-01-07 19:20 [Patch] GCN: Add pre-initial support for gfx1100 Tobias Burnus
@ 2024-01-08 10:06 ` Andrew Stubbs
2024-01-08 14:30 ` Tobias Burnus
2024-02-19 17:05 ` GCN: Restore lost '__gfx90a__' target CPU definition (was: [Patch] GCN: Add pre-initial support for gfx1100) Thomas Schwinge
1 sibling, 1 reply; 5+ messages in thread
From: Andrew Stubbs @ 2024-01-08 10:06 UTC (permalink / raw)
To: Tobias Burnus, gcc-patches
On 07/01/2024 19:20, Tobias Burnus wrote:
> ROCm meanwhile supports also some consumer cards; besides the semi-new
> gfx1030, support for gfx1100 was added more recently (in ROCm 5.7.1 for
> "Ubuntu 22.04 only" and without parenthesis since ROCm 6.0.0).
>
> GCC has already very limited support for gfx1030 - whose multlib support
> is - on purpose - not yet enabled by default and is WIP.
>
> The attached patch now adds gfx1100 on top of it, assuming that it
> mostly behaves the same as gfx1030. This is really WIP as there are
> known build (assembly) issues (see below) and not only "just" runtime
> issues.
>
> gfx1100 differs at least in the following aspects from the previously
> supported cards:
>
> * gfx1100 has an 'architected flat scratch' which is different from
> 'absolute flat scratch' which all others (but fiji: 'offset flat
> scratch') have. Hence, '.amdhsa_reserve_flat_scratch 0'
> has to be excluded to avoid assembly errors.
>
> * gfx1100 also does not support 'v_mov_b32_sdwa', failing to assembly
> libc/argz/libc_a-argz_stringify.o with:
> "sdwa variant of this instruction is not supported"
> → This has not been address in the patch, hence, specifying gfx1100 in
> --with-multilib-list= will fail to build when an in-tree newlib is build.
>
> * * *
>
> The attached patch fixes in addition one issue in libgomp (string-length
> len constant is too short for gfx1030 (and gfx1100) = 7 characters) and
> it includes the fix that __gfx1030__ is not defined, which I have
> submitted separately (yesterday).
>
> With the caveat that gfx1100 is even less usable than gfx1030 and it
> won't build newlib, is it nonetheless
>
> OK for mainline ?
>
> (As gfx1100 is not enabled by default in multilib, a regular build will
> will not fail and I think the *.md issue can be addressed separately.)
This looks fine to me. I know there will be things that need fixing for
both experimental architectures.
Andrew
P.S. Apologies, but I think my commits today conflict a little; you
should be able to drop the hunks that patch deleted code.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Patch] GCN: Add pre-initial support for gfx1100
2024-01-08 10:06 ` Andrew Stubbs
@ 2024-01-08 14:30 ` Tobias Burnus
2024-01-08 19:48 ` Thomas Schwinge
0 siblings, 1 reply; 5+ messages in thread
From: Tobias Burnus @ 2024-01-08 14:30 UTC (permalink / raw)
To: Andrew Stubbs, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 628 bytes --]
Hi Andrew,
Andrew Stubbs wrote:
>> OK for mainline ?
>
> This looks fine to me. I know there will be things that need fixing for
> both experimental architectures.
Indeed. I tried to be a bit more verbose also to avoid too high
expectations by occasional gcc-patches@ readers.
> P.S. Apologies, but I think my commits today conflict a little; you
> should be able to drop the hunks that patch deleted code.
I did so - but I then realized that I should have also added gfx1100 to
the new chunk.
Committed as r14-7006-g97a52f69d209f6 (see attachment) - as follow up to
the original r14-7005-g52a2c659ae6c21
Tobias
[-- Attachment #2: committed.diff --]
[-- Type: text/x-patch, Size: 1124 bytes --]
commit 97a52f69d209f69e755ffad6897c7176da9ac686
Author: Tobias Burnus <tobias@codesourcery.com>
Date: Mon Jan 8 15:18:10 2024 +0100
amdgcn: Add gfx1100 to new XNACK defaults in mkoffload
Commit r14-6997-g78dff4c25c1b95 added an arch-dependent
SET_XNACK_OFF vs. SET_XNACK_ANY check; that was added
between writing and committing the add-gfx1100
commit r14-7005-g52a2c659ae6c21 - and I missed to add
it there.
gcc/ChangeLog:
* config/gcn/mkoffload.cc (main): Handle gfx1100
when setting the default XNACK.
---
gcc/config/gcn/mkoffload.cc | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/config/gcn/mkoffload.cc b/gcc/config/gcn/mkoffload.cc
index 2cd201d56ca..d4cd509089e 100644
--- a/gcc/config/gcn/mkoffload.cc
+++ b/gcc/config/gcn/mkoffload.cc
@@ -1018,6 +1018,7 @@ main (int argc, char **argv)
case EF_AMDGPU_MACH_AMDGCN_GFX906:
case EF_AMDGPU_MACH_AMDGCN_GFX908:
case EF_AMDGPU_MACH_AMDGCN_GFX1030:
+ case EF_AMDGPU_MACH_AMDGCN_GFX1100:
SET_XNACK_OFF (elf_flags);
break;
case EF_AMDGPU_MACH_AMDGCN_GFX90a:
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Patch] GCN: Add pre-initial support for gfx1100
2024-01-08 14:30 ` Tobias Burnus
@ 2024-01-08 19:48 ` Thomas Schwinge
0 siblings, 0 replies; 5+ messages in thread
From: Thomas Schwinge @ 2024-01-08 19:48 UTC (permalink / raw)
To: Tobias Burnus, Andrew Stubbs, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 1067 bytes --]
Hi!
On 2024-01-08T15:30:06+0100, Tobias Burnus <burnus@net-b.de> wrote:
> Andrew Stubbs wrote:
>> I know there will be things that need fixing for
>> both experimental architectures.
>
> Indeed. [...]
..., like, making it even build? ;-P
>> P.S. Apologies, but I think my commits today conflict a little; you
>> should be able to drop the hunks that patch deleted code.
>
> I did so - but I then realized that I should have also added gfx1100 to
> the new chunk.
>
> Committed as r14-7006-g97a52f69d209f6 (see attachment) - as follow up to
> the original r14-7005-g52a2c659ae6c21
Pushed to master branch commit f9290cdf4697f467fd0fb7c710f58cc12e497889
"GCN: Add pre-initial support for gfx1100: 'EF_AMDGPU_MACH_AMDGCN_GFX1100'",
see attached.
Grüße
Thomas
-----------------
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[-- Attachment #2: 0001-GCN-Add-pre-initial-support-for-gfx1100-EF_AMDGPU_MA.patch --]
[-- Type: text/x-diff, Size: 2751 bytes --]
From f9290cdf4697f467fd0fb7c710f58cc12e497889 Mon Sep 17 00:00:00 2001
From: Thomas Schwinge <thomas@codesourcery.com>
Date: Mon, 8 Jan 2024 20:35:27 +0100
Subject: [PATCH] GCN: Add pre-initial support for gfx1100:
'EF_AMDGPU_MACH_AMDGCN_GFX1100'
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
../../../source-gcc/libgomp/plugin/plugin-gcn.c: In function ‘isa_hsa_name’:
../../../source-gcc/libgomp/plugin/plugin-gcn.c:1666:10: error: ‘EF_AMDGPU_MACH_AMDGCN_GFX1100’ undeclared (first use in this function); did you mean ‘EF_AMDGPU_MACH_AMDGCN_GFX1030’?
1666 | case EF_AMDGPU_MACH_AMDGCN_GFX1100:
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| EF_AMDGPU_MACH_AMDGCN_GFX1030
../../../source-gcc/libgomp/plugin/plugin-gcn.c:1666:10: note: each undeclared identifier is reported only once for each function it appears in
../../../source-gcc/libgomp/plugin/plugin-gcn.c: In function ‘isa_code’:
../../../source-gcc/libgomp/plugin/plugin-gcn.c:1711:12: error: ‘EF_AMDGPU_MACH_AMDGCN_GFX1100’ undeclared (first use in this function); did you mean ‘EF_AMDGPU_MACH_AMDGCN_GFX1030’?
1711 | return EF_AMDGPU_MACH_AMDGCN_GFX1100;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| EF_AMDGPU_MACH_AMDGCN_GFX1030
../../../source-gcc/libgomp/plugin/plugin-gcn.c: In function ‘max_isa_vgprs’:
../../../source-gcc/libgomp/plugin/plugin-gcn.c:1728:10: error: ‘EF_AMDGPU_MACH_AMDGCN_GFX1100’ undeclared (first use in this function); did you mean ‘EF_AMDGPU_MACH_AMDGCN_GFX1030’?
1728 | case EF_AMDGPU_MACH_AMDGCN_GFX1100:
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| EF_AMDGPU_MACH_AMDGCN_GFX1030
make[4]: *** [Makefile:813: libgomp_plugin_gcn_la-plugin-gcn.lo] Error 1
Fix-up for commit 52a2c659ae6c21f84b6acce0afcb9b93b9dc71a0
"GCN: Add pre-initial support for gfx1100".
libgomp/
* plugin/plugin-gcn.c (EF_AMDGPU_MACH): Add
'EF_AMDGPU_MACH_AMDGCN_GFX1100'.
---
libgomp/plugin/plugin-gcn.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/libgomp/plugin/plugin-gcn.c b/libgomp/plugin/plugin-gcn.c
index f24a28faa22..0339848451e 100644
--- a/libgomp/plugin/plugin-gcn.c
+++ b/libgomp/plugin/plugin-gcn.c
@@ -389,7 +389,8 @@ typedef enum {
EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
EF_AMDGPU_MACH_AMDGCN_GFX90a = 0x03f,
- EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036
+ EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
+ EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041
} EF_AMDGPU_MACH;
const static int EF_AMDGPU_MACH_MASK = 0x000000ff;
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* GCN: Restore lost '__gfx90a__' target CPU definition (was: [Patch] GCN: Add pre-initial support for gfx1100)
2024-01-07 19:20 [Patch] GCN: Add pre-initial support for gfx1100 Tobias Burnus
2024-01-08 10:06 ` Andrew Stubbs
@ 2024-02-19 17:05 ` Thomas Schwinge
1 sibling, 0 replies; 5+ messages in thread
From: Thomas Schwinge @ 2024-02-19 17:05 UTC (permalink / raw)
To: Tobias Burnus, gcc-patches, Andrew Stubbs
[-- Attachment #1: Type: text/plain, Size: 1812 bytes --]
Hi!
On 2024-01-07T20:20:19+0100, Tobias Burnus <burnus@net-b.de> wrote:
> --- a/gcc/config/gcn/gcn.h
> +++ b/gcc/config/gcn/gcn.h
> @@ -30,6 +30,8 @@
> builtin_define ("__CDNA2__"); \
> else if (TARGET_RDNA2) \
> builtin_define ("__RDNA2__"); \
> + else if (TARGET_RDNA3) \
> + builtin_define ("__RDNA3__"); \
> if (TARGET_FIJI) \
> { \
> builtin_define ("__fiji__"); \
> @@ -41,11 +43,13 @@
> builtin_define ("__gfx906__"); \
> else if (TARGET_GFX908) \
> builtin_define ("__gfx908__"); \
> - else if (TARGET_GFX90a) \
> - builtin_define ("__gfx90a__"); \
> + else if (TARGET_GFX1030) \
> + builtin_define ("__gfx1030"); \
> + else if (TARGET_GFX1100) \
> + builtin_define ("__gfx1100__"); \
> } while (0)
Supposedly it wasn't intentional that we lost gfx90a here -- I've pushed
to master branch commit 159174f25716c18a74a915cb01b9a28024ea7a3d
"GCN: Restore lost '__gfx90a__' target CPU definition", see attached.
Grüße
Thomas
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-GCN-Restore-lost-__gfx90a__-target-CPU-definition.patch --]
[-- Type: text/x-diff, Size: 2338 bytes --]
From 159174f25716c18a74a915cb01b9a28024ea7a3d Mon Sep 17 00:00:00 2001
From: Thomas Schwinge <tschwinge@baylibre.com>
Date: Thu, 8 Feb 2024 23:27:19 +0100
Subject: [PATCH] GCN: Restore lost '__gfx90a__' target CPU definition
Also, add some safeguards for the future.
Fix-up for commit 52a2c659ae6c21f84b6acce0afcb9b93b9dc71a0
"GCN: Add pre-initial support for gfx1100".
gcc/
* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Restore lost
'__gfx90a__' target CPU definition. Add some safeguards for the future.
---
gcc/config/gcn/gcn.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/gcc/config/gcn/gcn.h b/gcc/config/gcn/gcn.h
index a17f16aacc40..c314c7b4ae8e 100644
--- a/gcc/config/gcn/gcn.h
+++ b/gcc/config/gcn/gcn.h
@@ -32,6 +32,8 @@
builtin_define ("__RDNA2__"); \
else if (TARGET_RDNA3) \
builtin_define ("__RDNA3__"); \
+ else \
+ gcc_unreachable (); \
if (TARGET_FIJI) \
{ \
builtin_define ("__fiji__"); \
@@ -43,10 +45,14 @@
builtin_define ("__gfx906__"); \
else if (TARGET_GFX908) \
builtin_define ("__gfx908__"); \
+ else if (TARGET_GFX90a) \
+ builtin_define ("__gfx90a__"); \
else if (TARGET_GFX1030) \
builtin_define ("__gfx1030"); \
else if (TARGET_GFX1100) \
builtin_define ("__gfx1100__"); \
+ else \
+ gcc_unreachable (); \
} while (0)
#define ASSEMBLER_DIALECT (TARGET_RDNA2_PLUS ? 1 : 0)
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-02-19 17:05 UTC | newest]
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2024-01-07 19:20 [Patch] GCN: Add pre-initial support for gfx1100 Tobias Burnus
2024-01-08 10:06 ` Andrew Stubbs
2024-01-08 14:30 ` Tobias Burnus
2024-01-08 19:48 ` Thomas Schwinge
2024-02-19 17:05 ` GCN: Restore lost '__gfx90a__' target CPU definition (was: [Patch] GCN: Add pre-initial support for gfx1100) Thomas Schwinge
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