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* [PATCH] Simplify vector compare-not-select sequence
@ 2015-07-06 13:41 Bill Schmidt
  2015-07-09  3:05 ` Jeff Law
  2015-08-02 10:18 ` Andreas Schwab
  0 siblings, 2 replies; 6+ messages in thread
From: Bill Schmidt @ 2015-07-06 13:41 UTC (permalink / raw)
  To: gcc-patches; +Cc: ebotcazou, dje.gcc

Hi,

Due to specifics of the POWER architecture, some forms of a vector
compare followed by a vector select are represented in RTL as a compare,
followed by a logical NOT, followed by the select.  This tends to end up
generating an extra instruction.  This patch adds a case to
simplify-rtx.c to remove the logical NOT by reversing the outcomes of
the select.  I've added a POWER-specific test case that demonstrates
that the issue is fixed.

Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions.  Is this ok for trunk?

Thanks,
Bill


[gcc]

2015-07-06  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* simplify-rtx.c (simplify_ternary_operation): Add simplification
	for (!c) != {0,...,0} ? a : b for vector modes.

[gcc/testsuite]

2015-07-06  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/vec-cmp-sel.c: New test.


Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c	(revision 225440)
+++ gcc/simplify-rtx.c	(working copy)
@@ -5251,6 +5251,32 @@ simplify_ternary_operation (enum rtx_code code, ma
 		  && rtx_equal_p (XEXP (op0, 1), op1))))
 	return op2;
 
+      /* Convert (!c) != {0,...,0} ? a : b into
+         c != {0,...,0} ? b : a for vector modes.  */
+      if (VECTOR_MODE_P (GET_MODE (op1))
+	  && GET_CODE (op0) == NE
+	  && GET_CODE (XEXP (op0, 0)) == NOT
+	  && GET_CODE (XEXP (op0, 1)) == CONST_VECTOR)
+	{
+	  rtx cv = XEXP (op0, 1);
+	  int nunits = CONST_VECTOR_NUNITS (cv);
+	  bool ok = true;
+	  for (int i = 0; i < nunits; ++i)
+	    if (CONST_VECTOR_ELT (cv, i) != const0_rtx)
+	      {
+		ok = false;
+		break;
+	      }
+	  if (ok)
+	    {
+	      rtx new_op0 = gen_rtx_NE (GET_MODE (op0),
+					XEXP (XEXP (op0, 0), 0),
+					XEXP (op0, 1));
+	      rtx retval = gen_rtx_IF_THEN_ELSE (mode, new_op0, op2, op1);
+	      return retval;
+	    }
+	}
+
       if (COMPARISON_P (op0) && ! side_effects_p (op0))
 	{
 	  machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
Index: gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(working copy)
@@ -0,0 +1,20 @@
+/* { dg-do compile { target powerpc64*-*-* } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-maltivec -O2" } */
+/* { dg-final { scan-assembler "vcmpgtsd" } } */
+/* { dg-final { scan-assembler-not "xxlnor" } } */
+
+/* Test code in simplify-rtx.c that converts
+     (!c) != {0,...,0} ? a : b
+   into
+     c != {0,...,0} ? b : a  */
+
+#include <altivec.h>
+
+vector signed long long foo () {
+  vector signed long long x = { 25399, -12900 };
+  vector signed long long y = { 12178, -9987 };
+  vector bool long long b = vec_cmpge (x, y);
+  vector signed long long z = vec_sel (y, x, b);
+  return z;
+}


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] Simplify vector compare-not-select sequence
  2015-07-06 13:41 [PATCH] Simplify vector compare-not-select sequence Bill Schmidt
@ 2015-07-09  3:05 ` Jeff Law
  2015-08-02 10:18 ` Andreas Schwab
  1 sibling, 0 replies; 6+ messages in thread
From: Jeff Law @ 2015-07-09  3:05 UTC (permalink / raw)
  To: Bill Schmidt, gcc-patches; +Cc: ebotcazou, dje.gcc

On 07/06/2015 07:41 AM, Bill Schmidt wrote:
> Hi,
>
> Due to specifics of the POWER architecture, some forms of a vector
> compare followed by a vector select are represented in RTL as a compare,
> followed by a logical NOT, followed by the select.  This tends to end up
> generating an extra instruction.  This patch adds a case to
> simplify-rtx.c to remove the logical NOT by reversing the outcomes of
> the select.  I've added a POWER-specific test case that demonstrates
> that the issue is fixed.
>
> Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
> regressions.  Is this ok for trunk?
>
> Thanks,
> Bill
>
>
> [gcc]
>
> 2015-07-06  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
> 	* simplify-rtx.c (simplify_ternary_operation): Add simplification
> 	for (!c) != {0,...,0} ? a : b for vector modes.
>
> [gcc/testsuite]
>
> 2015-07-06  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
> 	* gcc.target/powerpc/vec-cmp-sel.c: New test.
OK.
jeff

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] Simplify vector compare-not-select sequence
  2015-07-06 13:41 [PATCH] Simplify vector compare-not-select sequence Bill Schmidt
  2015-07-09  3:05 ` Jeff Law
@ 2015-08-02 10:18 ` Andreas Schwab
  2015-08-03 15:16   ` Bill Schmidt
  1 sibling, 1 reply; 6+ messages in thread
From: Andreas Schwab @ 2015-08-02 10:18 UTC (permalink / raw)
  To: Bill Schmidt; +Cc: gcc-patches, ebotcazou, dje.gcc

Bill Schmidt <wschmidt@linux.vnet.ibm.com> writes:

> 	* gcc.target/powerpc/vec-cmp-sel.c: New test.

FAIL: gcc.target/powerpc/vec-cmp-sel.c (test for excess errors)
Excess errors:
/daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:14:1: error: use of 'long long' in AltiVec types is invalid without -mvsx
/daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:15:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
/daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:16:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
/daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:17:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
/daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:17:29: error: incompatible types when initializing type '__vector unsigned long long' using type '__vector __bool long long'
/daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:18:3: error: use of 'long long' in AltiVec types is invalid without -mvsx

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] Simplify vector compare-not-select sequence
  2015-08-02 10:18 ` Andreas Schwab
@ 2015-08-03 15:16   ` Bill Schmidt
  2015-08-03 17:35     ` Andreas Schwab
  0 siblings, 1 reply; 6+ messages in thread
From: Bill Schmidt @ 2015-08-03 15:16 UTC (permalink / raw)
  To: Andreas Schwab; +Cc: gcc-patches, ebotcazou, dje.gcc

On Sun, 2015-08-02 at 12:18 +0200, Andreas Schwab wrote:
> Bill Schmidt <wschmidt@linux.vnet.ibm.com> writes:
> 
> > 	* gcc.target/powerpc/vec-cmp-sel.c: New test.
> 
> FAIL: gcc.target/powerpc/vec-cmp-sel.c (test for excess errors)
> Excess errors:
> /daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:14:1: error: use of 'long long' in AltiVec types is invalid without -mvsx
> /daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:15:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
> /daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:16:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
> /daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:17:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
> /daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:17:29: error: incompatible types when initializing type '__vector unsigned long long' using type '__vector __bool long long'
> /daten/gcc/gcc-20150801/gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c:18:3: error: use of 'long long' in AltiVec types is invalid without -mvsx
> 
> Andreas.
> 

Hi Andreas,

Can you please verify that this patch works for you?

Thanks,
Bill

Index: gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(revision 226505)
+++ gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(working copy)
@@ -1,6 +1,7 @@
 /* { dg-do compile { target powerpc64*-*-* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-maltivec -O2 -mvsx -mpower8-vector" } */
 /* { dg-final { scan-assembler "vcmpgtsd" } } */
 /* { dg-final { scan-assembler-not "xxlnor" } } */
 


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] Simplify vector compare-not-select sequence
  2015-08-03 15:16   ` Bill Schmidt
@ 2015-08-03 17:35     ` Andreas Schwab
  2015-08-04 14:12       ` Bill Schmidt
  0 siblings, 1 reply; 6+ messages in thread
From: Andreas Schwab @ 2015-08-03 17:35 UTC (permalink / raw)
  To: Bill Schmidt; +Cc: gcc-patches, ebotcazou, dje.gcc

Bill Schmidt <wschmidt@linux.vnet.ibm.com> writes:

> Index: gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c
> ===================================================================
> --- gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(revision 226505)
> +++ gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(working copy)
> @@ -1,6 +1,7 @@
>  /* { dg-do compile { target powerpc64*-*-* } } */

If you want -m64 you need dg-require-effective-target lp64, but I see no
need for that.

>  /* { dg-require-effective-target powerpc_p8vector_ok } */
> -/* { dg-options "-maltivec -O2" } */
> +/* { dg-require-effective-target powerpc_vsx_ok } */
> +/* { dg-options "-maltivec -O2 -mvsx -mpower8-vector" } */
>  /* { dg-final { scan-assembler "vcmpgtsd" } } */
>  /* { dg-final { scan-assembler-not "xxlnor" } } */

Looks good.

PASS: gcc.target/powerpc/vec-cmp-sel.c (test for excess errors)
PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler vcmpgtsd
PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler-not xxlnor
PASS: gcc.target/powerpc/vec-cmp-sel.c (test for excess errors)
PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler vcmpgtsd
PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler-not xxlnor

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] Simplify vector compare-not-select sequence
  2015-08-03 17:35     ` Andreas Schwab
@ 2015-08-04 14:12       ` Bill Schmidt
  0 siblings, 0 replies; 6+ messages in thread
From: Bill Schmidt @ 2015-08-04 14:12 UTC (permalink / raw)
  To: Andreas Schwab; +Cc: gcc-patches, ebotcazou, dje.gcc

Thanks for verifying!

Also verified it still works on powerpc64le-unknown-linux-gnu.
Committed as obvious.

Thanks,
Bill


2015-08-04  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* gcc.target/powerpc/vec-cmp-sel.c: Avoid test failure on machines
	without VSX an Power8 vector support.


Index: gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(revision 226505)
+++ gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(working copy)
@@ -1,6 +1,7 @@
 /* { dg-do compile { target powerpc64*-*-* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-maltivec -O2 -mvsx -mpower8-vector" } */
 /* { dg-final { scan-assembler "vcmpgtsd" } } */
 /* { dg-final { scan-assembler-not "xxlnor" } } */
 



On Mon, 2015-08-03 at 19:35 +0200, Andreas Schwab wrote:
> Bill Schmidt <wschmidt@linux.vnet.ibm.com> writes:
> 
> > Index: gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c
> > ===================================================================
> > --- gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(revision 226505)
> > +++ gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c	(working copy)
> > @@ -1,6 +1,7 @@
> >  /* { dg-do compile { target powerpc64*-*-* } } */
> 
> If you want -m64 you need dg-require-effective-target lp64, but I see no
> need for that.
> 
> >  /* { dg-require-effective-target powerpc_p8vector_ok } */
> > -/* { dg-options "-maltivec -O2" } */
> > +/* { dg-require-effective-target powerpc_vsx_ok } */
> > +/* { dg-options "-maltivec -O2 -mvsx -mpower8-vector" } */
> >  /* { dg-final { scan-assembler "vcmpgtsd" } } */
> >  /* { dg-final { scan-assembler-not "xxlnor" } } */
> 
> Looks good.
> 
> PASS: gcc.target/powerpc/vec-cmp-sel.c (test for excess errors)
> PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler vcmpgtsd
> PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler-not xxlnor
> PASS: gcc.target/powerpc/vec-cmp-sel.c (test for excess errors)
> PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler vcmpgtsd
> PASS: gcc.target/powerpc/vec-cmp-sel.c scan-assembler-not xxlnor
> 
> Andreas.
> 


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2015-08-04 14:12 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-07-06 13:41 [PATCH] Simplify vector compare-not-select sequence Bill Schmidt
2015-07-09  3:05 ` Jeff Law
2015-08-02 10:18 ` Andreas Schwab
2015-08-03 15:16   ` Bill Schmidt
2015-08-03 17:35     ` Andreas Schwab
2015-08-04 14:12       ` Bill Schmidt

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