Re: [PATCH] RISC-V: Zihintpause: add __builtin_riscv_pause

[Jeff Law <jeffreyalaw@gmail.com>]

On 11/13/22 13:41, Philipp Tomsich wrote:
> The Zihintpause extension uses an opcode from the 'fence' opcode range
> to add a true hint instruction (i.e. if it is not supported on any
> given platform, the 'fence' that is encoded will not enforce any
> specific ordering on memory accesses) for entering a low-power state
> (e.g. in an idle thread).  We expose this new instruction through a
> machine-dependent builtin to allow generating it without a requirement
> for any inline assembly.
>
> Given that the encoding of 'pause' is valid (as a 'fence' encoding)
> even for processors that do not (yet) support Zihintpause, we make
> this builtin available without any further TARGET_* constraints.
>
> gcc/ChangeLog:
>
> 	* config/riscv/riscv-builtins.cc (struct riscv_builtin_description):
> 	add the pause machine-dependent builtin with no result and no
>          arguments; mark it as always present (pause is a true hint
>          that encodes into a fence-insn, if not supported with the new
>          pause semantics).
> 	* config/riscv/riscv-ftypes.def: Add type for void -> void.
> 	* config/riscv/riscv.md (riscv_pause): Add risc_pause and UNSPECV_PAUSE
> 	* doc/gcc/extensions-to-the-c-language-family/target-builtins/risc-v-built-in-functions.rst:
> 	Document.
> 	* optabs.cc (maybe_gen_insn): Allow nops == 0 (void -> void).
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/riscv/builtin_pause.c: New test.

OK.  Though I think you'll need to adjust the doc patch now with the 
sphinx work reverted.


Jeff