* [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
@ 2023-06-01 23:04 juzhe.zhong
2023-06-02 1:26 ` KuanLin Chen
0 siblings, 1 reply; 4+ messages in thread
From: juzhe.zhong @ 2023-06-01 23:04 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, palmer, rdapp.gcc, jeffreyalaw, Juzhe-Zhong
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Base on these:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/232
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/233
Add _mu C++ overloaded intrinsics for load && viota && vid.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
---
gcc/config/riscv/riscv-vector-builtins-bases.cc | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index a8113f6602b..498c6ba042e 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -164,7 +164,7 @@ public:
{
if (STORE_P || LST_TYPE == LST_INDEXED)
return true;
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -963,7 +963,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -979,7 +979,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -1749,7 +1749,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1794,7 +1794,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
--
2.36.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
2023-06-01 23:04 [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid juzhe.zhong
@ 2023-06-02 1:26 ` KuanLin Chen
2023-06-02 1:32 ` juzhe.zhong
0 siblings, 1 reply; 4+ messages in thread
From: KuanLin Chen @ 2023-06-02 1:26 UTC (permalink / raw)
To: gcc-patches, juzhe.zhong; +Cc: kito.cheng, palmer, rdapp.gcc, jeffreyalaw
Hi Juzhe,
I think fault_load_def::get_name should remove "instance.pred ==
PRED_TYPE_mu", right?
<juzhe.zhong@rivai.ai> 於 2023年6月2日 週五 上午7:05寫道:
>
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
>
> Base on these:
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/232
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/233
>
> Add _mu C++ overloaded intrinsics for load && viota && vid.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
>
> ---
> gcc/config/riscv/riscv-vector-builtins-bases.cc | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> index a8113f6602b..498c6ba042e 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
> +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> @@ -164,7 +164,7 @@ public:
> {
> if (STORE_P || LST_TYPE == LST_INDEXED)
> return true;
> - return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
> + return pred != PRED_TYPE_none;
> }
>
> rtx expand (function_expander &e) const override
> @@ -963,7 +963,7 @@ public:
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
> - || pred == PRED_TYPE_tumu;
> + || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
> }
>
> rtx expand (function_expander &e) const override
> @@ -979,7 +979,7 @@ public:
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
> - || pred == PRED_TYPE_tumu;
> + || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
> }
>
> rtx expand (function_expander &e) const override
> @@ -1749,7 +1749,7 @@ public:
>
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> - return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
> + return pred != PRED_TYPE_none;
> }
>
> rtx expand (function_expander &e) const override
> @@ -1794,7 +1794,7 @@ public:
>
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> - return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
> + return pred != PRED_TYPE_none;
> }
>
> rtx expand (function_expander &e) const override
> --
> 2.36.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Re: [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
2023-06-02 1:26 ` KuanLin Chen
@ 2023-06-02 1:32 ` juzhe.zhong
0 siblings, 0 replies; 4+ messages in thread
From: juzhe.zhong @ 2023-06-02 1:32 UTC (permalink / raw)
To: KuanLin Chen, gcc-patches; +Cc: Kito.cheng, palmer, Robin Dapp, jeffreyalaw
[-- Attachment #1: Type: text/plain, Size: 2844 bytes --]
Oh. Yes. Thanks for catching this!
Will send V2 soon.
juzhe.zhong@rivai.ai
From: KuanLin Chen
Date: 2023-06-02 09:26
To: gcc-patches; juzhe.zhong
CC: kito.cheng; palmer; rdapp.gcc; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
Hi Juzhe,
I think fault_load_def::get_name should remove "instance.pred ==
PRED_TYPE_mu", right?
<juzhe.zhong@rivai.ai> 於 2023年6月2日 週五 上午7:05寫道:
>
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
>
> Base on these:
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/232
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/233
>
> Add _mu C++ overloaded intrinsics for load && viota && vid.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
>
> ---
> gcc/config/riscv/riscv-vector-builtins-bases.cc | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> index a8113f6602b..498c6ba042e 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
> +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> @@ -164,7 +164,7 @@ public:
> {
> if (STORE_P || LST_TYPE == LST_INDEXED)
> return true;
> - return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
> + return pred != PRED_TYPE_none;
> }
>
> rtx expand (function_expander &e) const override
> @@ -963,7 +963,7 @@ public:
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
> - || pred == PRED_TYPE_tumu;
> + || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
> }
>
> rtx expand (function_expander &e) const override
> @@ -979,7 +979,7 @@ public:
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
> - || pred == PRED_TYPE_tumu;
> + || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
> }
>
> rtx expand (function_expander &e) const override
> @@ -1749,7 +1749,7 @@ public:
>
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> - return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
> + return pred != PRED_TYPE_none;
> }
>
> rtx expand (function_expander &e) const override
> @@ -1794,7 +1794,7 @@ public:
>
> bool can_be_overloaded_p (enum predication_type_index pred) const override
> {
> - return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
> + return pred != PRED_TYPE_none;
> }
>
> rtx expand (function_expander &e) const override
> --
> 2.36.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid
@ 2023-06-02 2:04 juzhe.zhong
0 siblings, 0 replies; 4+ messages in thread
From: juzhe.zhong @ 2023-06-02 2:04 UTC (permalink / raw)
To: gcc-patches
Cc: kito.cheng, kito.cheng, palmer, palmer, jeffreyalaw, rdapp.gcc,
best124612, Juzhe-Zhong
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Base on these:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/232
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/233
Add _mu C++ overloaded intrinsics for load && viota && vid.
Co-authored-by: KuanLin Chen <best124612@gmail.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
* config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
---
gcc/config/riscv/riscv-vector-builtins-bases.cc | 17 +++++++++++------
.../riscv/riscv-vector-builtins-shapes.cc | 5 ++---
2 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 3f92084929d..09870c327fa 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -164,7 +164,7 @@ public:
{
if (STORE_P || LST_TYPE == LST_INDEXED)
return true;
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -967,7 +967,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -983,7 +983,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
return pred == PRED_TYPE_tu || pred == PRED_TYPE_tum
- || pred == PRED_TYPE_tumu;
+ || pred == PRED_TYPE_tumu || pred == PRED_TYPE_mu;
}
rtx expand (function_expander &e) const override
@@ -1715,6 +1715,11 @@ public:
return CP_READ_MEMORY | CP_WRITE_CSR;
}
+ bool can_be_overloaded_p (enum predication_type_index pred) const override
+ {
+ return pred != PRED_TYPE_none;
+ }
+
gimple *fold (gimple_folder &f) const override
{
return fold_fault_load (f);
@@ -1753,7 +1758,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1798,7 +1803,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
rtx expand (function_expander &e) const override
@@ -1888,7 +1893,7 @@ public:
bool can_be_overloaded_p (enum predication_type_index pred) const override
{
- return pred != PRED_TYPE_none && pred != PRED_TYPE_mu;
+ return pred != PRED_TYPE_none;
}
gimple *fold (gimple_folder &f) const override
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 76262f07ce4..c8daae01f91 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -550,9 +550,8 @@ struct fault_load_def : public build_base
char *get_name (function_builder &b, const function_instance &instance,
bool overloaded_p) const override
{
- if (overloaded_p)
- if (instance.pred == PRED_TYPE_none || instance.pred == PRED_TYPE_mu)
- return nullptr;
+ if (overloaded_p && !instance.base->can_be_overloaded_p (instance.pred))
+ return nullptr;
tree type = builtin_types[instance.type.index].vector;
machine_mode mode = TYPE_MODE (type);
int sew = GET_MODE_BITSIZE (GET_MODE_INNER (mode));
--
2.36.1
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-06-01 23:04 [PATCH] RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid juzhe.zhong
2023-06-02 1:26 ` KuanLin Chen
2023-06-02 1:32 ` juzhe.zhong
2023-06-02 2:04 juzhe.zhong
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