From: Kito Cheng <kito.cheng@gmail.com>
To: juzhe.zhong@rivai.ai
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] RISC-V: Remove unused TI/TF vector modes.
Date: Mon, 24 Oct 2022 10:21:47 +0800 [thread overview]
Message-ID: <CA+yXCZB6TBkuij4QozQhg_5ALQU_QpXyaMFAJAKnU-=Yh5nAag@mail.gmail.com> (raw)
In-Reply-To: <20221024020524.27704-1-juzhe.zhong@rivai.ai>
Committed, thanks :)
On Mon, Oct 24, 2022 at 10:06 AM <juzhe.zhong@rivai.ai> wrote:
>
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes.
>
> ---
> gcc/config/riscv/riscv-vector-switch.def | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vector-switch.def b/gcc/config/riscv/riscv-vector-switch.def
> index cacfccb6d29..ee8ebd5f1cc 100644
> --- a/gcc/config/riscv/riscv-vector-switch.def
> +++ b/gcc/config/riscv/riscv-vector-switch.def
> @@ -155,10 +155,6 @@ ENTRY (VNx4DF, TARGET_VECTOR_FP64)
> ENTRY (VNx2DF, TARGET_VECTOR_FP64)
> ENTRY (VNx1DF, TARGET_VECTOR_FP64)
>
> -/* SEW = 128. Disable all of them. */
> -ENTRY (VNx2TI, false)
> -ENTRY (VNx2TF, false)
> -
> #undef TARGET_VECTOR_FP32
> #undef TARGET_VECTOR_FP64
> #undef ENTRY
> --
> 2.36.1
>
prev parent reply other threads:[~2022-10-24 2:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-24 2:05 juzhe.zhong
2022-10-24 2:21 ` Kito Cheng [this message]
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