* [PATCH V3] RISC-V:Fix a bug that is the CMO builtins are missing parameter
@ 2022-06-08 2:19 shiyulong
2022-06-20 9:56 ` Kito Cheng
0 siblings, 1 reply; 2+ messages in thread
From: shiyulong @ 2022-06-08 2:19 UTC (permalink / raw)
To: gcc-patches
Cc: andrew, palmer, kito.cheng, jim.wilson.gcc, wuwei2016, jiawei,
shihua, simon.cook, yulong
From: yulong <shiyulong@iscas.ac.cn>
We changed builtins format about zicbom and zicboz subextensions and modified test cases.
diff with the previous version:
1.We modified the FUNCTION_TYPE from RISCV_VOID_FTYPE_SI/DI to RISCV_VOID_FTYPE_VOID_PTR.
2.We added a new RISCV_ATYPE_VOID_PTR in riscv-builtins.cc and a new DEF_RISCV_FTYPE (1, (VOID, VOID_PTR)) in riscv-ftypes.def.
3.We deleted DEF_RISCV_FTYPE (1, (VOID, SI/DI)).
4.We modified the input parameters of the test cases.
Thanks, Simon and Kito.
gcc/ChangeLog:
* config/riscv/riscv-builtins.cc (RISCV_ATYPE_VOID_PTR): New.
* config/riscv/riscv-cmo.def (RISCV_BUILTIN): changed the FUNCTION_TYPE of RISCV_BUILTIN.
* config/riscv/riscv-ftypes.def (0): New.
(1):
gcc/testsuite/ChangeLog:
* gcc.target/riscv/cmo-zicbom-1.c: modified the input parameters.
* gcc.target/riscv/cmo-zicbom-2.c: modified the input parameters.
* gcc.target/riscv/cmo-zicboz-1.c: modified the input parameters.
* gcc.target/riscv/cmo-zicboz-2.c: modified the input parameters.
---
gcc/config/riscv/riscv-builtins.cc | 1 +
gcc/config/riscv/riscv-cmo.def | 16 ++++++------
gcc/config/riscv/riscv-ftypes.def | 3 +--
gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 26 ++++++++++++-------
gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 26 ++++++++++++-------
gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 10 ++++---
gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 10 ++++---
7 files changed, 58 insertions(+), 34 deletions(-)
diff --git a/gcc/config/riscv/riscv-builtins.cc b/gcc/config/riscv/riscv-builtins.cc
index 795132a0c16..1218fdfc67d 100644
--- a/gcc/config/riscv/riscv-builtins.cc
+++ b/gcc/config/riscv/riscv-builtins.cc
@@ -133,6 +133,7 @@ AVAIL (prefetchi64, TARGET_ZICBOP && TARGET_64BIT)
#define RISCV_ATYPE_USI unsigned_intSI_type_node
#define RISCV_ATYPE_SI intSI_type_node
#define RISCV_ATYPE_DI intDI_type_node
+#define RISCV_ATYPE_VOID_PTR ptr_type_node
/* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
their associated RISCV_ATYPEs. */
diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def
index b30ecf96ec1..9fe5094ce1a 100644
--- a/gcc/config/riscv/riscv-cmo.def
+++ b/gcc/config/riscv/riscv-cmo.def
@@ -1,16 +1,16 @@
// zicbom
-RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, clean32),
-RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, clean64),
+RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, clean32),
+RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, clean64),
-RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, flush32),
-RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, flush64),
+RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, flush32),
+RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, flush64),
-RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, inval32),
-RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, inval64),
+RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, inval32),
+RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, inval64),
// zicboz
-RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, zero32),
-RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, zero64),
+RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero32),
+RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero64),
// zicbop
RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32),
diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
index 62421292ce7..c2b45c63ea1 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -28,7 +28,6 @@ along with GCC; see the file COPYING3. If not see
DEF_RISCV_FTYPE (0, (USI))
DEF_RISCV_FTYPE (1, (VOID, USI))
-DEF_RISCV_FTYPE (0, (SI))
-DEF_RISCV_FTYPE (0, (DI))
+DEF_RISCV_FTYPE (1, (VOID, VOID_PTR))
DEF_RISCV_FTYPE (1, (SI, SI))
DEF_RISCV_FTYPE (1, (DI, DI))
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
index e2ba2183511..6341f7874d3 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
@@ -1,21 +1,29 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */
-int foo1()
+int var;
+
+void foo1()
{
- return __builtin_riscv_zicbom_cbo_clean();
+ __builtin_riscv_zicbom_cbo_clean(0);
+ __builtin_riscv_zicbom_cbo_clean(&var);
+ __builtin_riscv_zicbom_cbo_clean((void*)0x111);
}
-int foo2()
+void foo2()
{
- return __builtin_riscv_zicbom_cbo_flush();
+ __builtin_riscv_zicbom_cbo_flush(0);
+ __builtin_riscv_zicbom_cbo_flush(&var);
+ __builtin_riscv_zicbom_cbo_flush((void*)0x111);
}
-int foo3()
+void foo3()
{
- return __builtin_riscv_zicbom_cbo_inval();
+ __builtin_riscv_zicbom_cbo_inval(0);
+ __builtin_riscv_zicbom_cbo_inval(&var);
+ __builtin_riscv_zicbom_cbo_inval((void*)0x111);
}
-/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
index a605e8b1bdc..a04f106c8b0 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
@@ -1,21 +1,29 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */
-int foo1()
+int var;
+
+void foo1()
{
- return __builtin_riscv_zicbom_cbo_clean();
+ __builtin_riscv_zicbom_cbo_clean(0);
+ __builtin_riscv_zicbom_cbo_clean(&var);
+ __builtin_riscv_zicbom_cbo_clean((void*)0x111);
}
-int foo2()
+void foo2()
{
- return __builtin_riscv_zicbom_cbo_flush();
+ __builtin_riscv_zicbom_cbo_flush(0);
+ __builtin_riscv_zicbom_cbo_flush(&var);
+ __builtin_riscv_zicbom_cbo_flush((void*)0x111);
}
-int foo3()
+void foo3()
{
- return __builtin_riscv_zicbom_cbo_inval();
+ __builtin_riscv_zicbom_cbo_inval(0);
+ __builtin_riscv_zicbom_cbo_inval(&var);
+ __builtin_riscv_zicbom_cbo_inval((void*)0x111);
}
-/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
index 96c1674ef2d..5eb78ab94b5 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
@@ -1,9 +1,13 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */
-int foo1()
+int var;
+
+void foo1()
{
- return __builtin_riscv_zicboz_cbo_zero();
+ __builtin_riscv_zicboz_cbo_zero(0);
+ __builtin_riscv_zicboz_cbo_zero(&var);
+ __builtin_riscv_zicboz_cbo_zero((void*)0x121);
}
-/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
index 9d99839b1e7..fdc9c719669 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
@@ -1,9 +1,13 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */
-int foo1()
+int var;
+
+void foo1()
{
- return __builtin_riscv_zicboz_cbo_zero();
+ __builtin_riscv_zicboz_cbo_zero(0);
+ __builtin_riscv_zicboz_cbo_zero(&var);
+ __builtin_riscv_zicboz_cbo_zero((void*)0x121);
}
-/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */
--
2.17.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH V3] RISC-V:Fix a bug that is the CMO builtins are missing parameter
2022-06-08 2:19 [PATCH V3] RISC-V:Fix a bug that is the CMO builtins are missing parameter shiyulong
@ 2022-06-20 9:56 ` Kito Cheng
0 siblings, 0 replies; 2+ messages in thread
From: Kito Cheng @ 2022-06-20 9:56 UTC (permalink / raw)
To: 史玉龙
Cc: GCC Patches, Andrew Waterman, jiawei, wuwei2016,
廖仕华
Committed, thanks!
On Wed, Jun 8, 2022 at 10:20 AM <shiyulong@iscas.ac.cn> wrote:
>
> From: yulong <shiyulong@iscas.ac.cn>
>
> We changed builtins format about zicbom and zicboz subextensions and modified test cases.
> diff with the previous version:
> 1.We modified the FUNCTION_TYPE from RISCV_VOID_FTYPE_SI/DI to RISCV_VOID_FTYPE_VOID_PTR.
> 2.We added a new RISCV_ATYPE_VOID_PTR in riscv-builtins.cc and a new DEF_RISCV_FTYPE (1, (VOID, VOID_PTR)) in riscv-ftypes.def.
> 3.We deleted DEF_RISCV_FTYPE (1, (VOID, SI/DI)).
> 4.We modified the input parameters of the test cases.
>
> Thanks, Simon and Kito.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-builtins.cc (RISCV_ATYPE_VOID_PTR): New.
> * config/riscv/riscv-cmo.def (RISCV_BUILTIN): changed the FUNCTION_TYPE of RISCV_BUILTIN.
> * config/riscv/riscv-ftypes.def (0): New.
> (1):
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/cmo-zicbom-1.c: modified the input parameters.
> * gcc.target/riscv/cmo-zicbom-2.c: modified the input parameters.
> * gcc.target/riscv/cmo-zicboz-1.c: modified the input parameters.
> * gcc.target/riscv/cmo-zicboz-2.c: modified the input parameters.
>
> ---
> gcc/config/riscv/riscv-builtins.cc | 1 +
> gcc/config/riscv/riscv-cmo.def | 16 ++++++------
> gcc/config/riscv/riscv-ftypes.def | 3 +--
> gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 26 ++++++++++++-------
> gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 26 ++++++++++++-------
> gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 10 ++++---
> gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 10 ++++---
> 7 files changed, 58 insertions(+), 34 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-builtins.cc b/gcc/config/riscv/riscv-builtins.cc
> index 795132a0c16..1218fdfc67d 100644
> --- a/gcc/config/riscv/riscv-builtins.cc
> +++ b/gcc/config/riscv/riscv-builtins.cc
> @@ -133,6 +133,7 @@ AVAIL (prefetchi64, TARGET_ZICBOP && TARGET_64BIT)
> #define RISCV_ATYPE_USI unsigned_intSI_type_node
> #define RISCV_ATYPE_SI intSI_type_node
> #define RISCV_ATYPE_DI intDI_type_node
> +#define RISCV_ATYPE_VOID_PTR ptr_type_node
>
> /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
> their associated RISCV_ATYPEs. */
> diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def
> index b30ecf96ec1..9fe5094ce1a 100644
> --- a/gcc/config/riscv/riscv-cmo.def
> +++ b/gcc/config/riscv/riscv-cmo.def
> @@ -1,16 +1,16 @@
> // zicbom
> -RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, clean32),
> -RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, clean64),
> +RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, clean32),
> +RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, clean64),
>
> -RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, flush32),
> -RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, flush64),
> +RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, flush32),
> +RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, flush64),
>
> -RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, inval32),
> -RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, inval64),
> +RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, inval32),
> +RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, inval64),
>
> // zicboz
> -RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, zero32),
> -RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, zero64),
> +RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero32),
> +RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero64),
>
> // zicbop
> RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32),
> diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
> index 62421292ce7..c2b45c63ea1 100644
> --- a/gcc/config/riscv/riscv-ftypes.def
> +++ b/gcc/config/riscv/riscv-ftypes.def
> @@ -28,7 +28,6 @@ along with GCC; see the file COPYING3. If not see
>
> DEF_RISCV_FTYPE (0, (USI))
> DEF_RISCV_FTYPE (1, (VOID, USI))
> -DEF_RISCV_FTYPE (0, (SI))
> -DEF_RISCV_FTYPE (0, (DI))
> +DEF_RISCV_FTYPE (1, (VOID, VOID_PTR))
> DEF_RISCV_FTYPE (1, (SI, SI))
> DEF_RISCV_FTYPE (1, (DI, DI))
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> index e2ba2183511..6341f7874d3 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> @@ -1,21 +1,29 @@
> /* { dg-do compile } */
> /* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */
>
> -int foo1()
> +int var;
> +
> +void foo1()
> {
> - return __builtin_riscv_zicbom_cbo_clean();
> + __builtin_riscv_zicbom_cbo_clean(0);
> + __builtin_riscv_zicbom_cbo_clean(&var);
> + __builtin_riscv_zicbom_cbo_clean((void*)0x111);
> }
>
> -int foo2()
> +void foo2()
> {
> - return __builtin_riscv_zicbom_cbo_flush();
> + __builtin_riscv_zicbom_cbo_flush(0);
> + __builtin_riscv_zicbom_cbo_flush(&var);
> + __builtin_riscv_zicbom_cbo_flush((void*)0x111);
> }
>
> -int foo3()
> +void foo3()
> {
> - return __builtin_riscv_zicbom_cbo_inval();
> + __builtin_riscv_zicbom_cbo_inval(0);
> + __builtin_riscv_zicbom_cbo_inval(&var);
> + __builtin_riscv_zicbom_cbo_inval((void*)0x111);
> }
>
> -/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> index a605e8b1bdc..a04f106c8b0 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> @@ -1,21 +1,29 @@
> /* { dg-do compile } */
> /* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */
>
> -int foo1()
> +int var;
> +
> +void foo1()
> {
> - return __builtin_riscv_zicbom_cbo_clean();
> + __builtin_riscv_zicbom_cbo_clean(0);
> + __builtin_riscv_zicbom_cbo_clean(&var);
> + __builtin_riscv_zicbom_cbo_clean((void*)0x111);
> }
>
> -int foo2()
> +void foo2()
> {
> - return __builtin_riscv_zicbom_cbo_flush();
> + __builtin_riscv_zicbom_cbo_flush(0);
> + __builtin_riscv_zicbom_cbo_flush(&var);
> + __builtin_riscv_zicbom_cbo_flush((void*)0x111);
> }
>
> -int foo3()
> +void foo3()
> {
> - return __builtin_riscv_zicbom_cbo_inval();
> + __builtin_riscv_zicbom_cbo_inval(0);
> + __builtin_riscv_zicbom_cbo_inval(&var);
> + __builtin_riscv_zicbom_cbo_inval((void*)0x111);
> }
>
> -/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> index 96c1674ef2d..5eb78ab94b5 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> @@ -1,9 +1,13 @@
> /* { dg-do compile } */
> /* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */
>
> -int foo1()
> +int var;
> +
> +void foo1()
> {
> - return __builtin_riscv_zicboz_cbo_zero();
> + __builtin_riscv_zicboz_cbo_zero(0);
> + __builtin_riscv_zicboz_cbo_zero(&var);
> + __builtin_riscv_zicboz_cbo_zero((void*)0x121);
> }
>
> -/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
> index 9d99839b1e7..fdc9c719669 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
> @@ -1,9 +1,13 @@
> /* { dg-do compile } */
> /* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */
>
> -int foo1()
> +int var;
> +
> +void foo1()
> {
> - return __builtin_riscv_zicboz_cbo_zero();
> + __builtin_riscv_zicboz_cbo_zero(0);
> + __builtin_riscv_zicboz_cbo_zero(&var);
> + __builtin_riscv_zicboz_cbo_zero((void*)0x121);
> }
>
> -/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2022-06-08 2:19 [PATCH V3] RISC-V:Fix a bug that is the CMO builtins are missing parameter shiyulong
2022-06-20 9:56 ` Kito Cheng
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