From: Kito Cheng <kito.cheng@gmail.com>
To: 钟居哲 <juzhe.zhong@rivai.ai>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] RISC-V: Simplify ASM checks.
Date: Mon, 19 Dec 2022 23:14:18 +0800 [thread overview]
Message-ID: <CA+yXCZC_hEJJ2-2ovHKj5xAXcGMnPirA+XJjM_QgUs5ANdA8Vg@mail.gmail.com> (raw)
In-Reply-To: <20221219111147.1768-1-juzhe.zhong@rivai.ai>
[-- Attachment #1: Type: text/plain, Size: 89274 bytes --]
Merged into previou patch and commited
<juzhe.zhong@rivai.ai> 於 2022年12月19日 週一 19:11 寫道：
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Simplify ASM checks.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Ditto.
> * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Ditto.
>
> ---
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-10.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-11.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-12.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-13.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-14.c | 16 +++++-----
> .../riscv/rvv/vsetvl/vlmax_phi-15.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-16.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-17.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-18.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-19.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-20.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-21.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-22.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-23.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-24.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-25.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-26.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-27.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_phi-28.c | 16 +++++-----
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c | 4 +--
> .../gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_single_block-1.c | 14 ++++-----
> .../riscv/rvv/vsetvl/vlmax_single_block-10.c | 24 +++++++--------
> .../riscv/rvv/vsetvl/vlmax_single_block-11.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_single_block-12.c | 18 +++++------
> .../riscv/rvv/vsetvl/vlmax_single_block-13.c | 14 ++++-----
> .../riscv/rvv/vsetvl/vlmax_single_block-14.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_single_block-15.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_single_block-16.c | 30 +++++++++----------
> .../riscv/rvv/vsetvl/vlmax_single_block-17.c | 18 +++++------
> .../riscv/rvv/vsetvl/vlmax_single_block-18.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_single_block-19.c | 12 ++++----
> .../riscv/rvv/vsetvl/vlmax_single_block-2.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_single_block-3.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_single_block-4.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_single_block-5.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_single_block-6.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_single_block-7.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_single_block-8.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_single_block-9.c | 30 +++++++++----------
> .../riscv/rvv/vsetvl/vlmax_single_vtype-1.c | 28 ++++++++---------
> .../riscv/rvv/vsetvl/vlmax_single_vtype-2.c | 12 ++++----
> .../riscv/rvv/vsetvl/vlmax_single_vtype-3.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_single_vtype-4.c | 8 ++---
> .../riscv/rvv/vsetvl/vlmax_single_vtype-5.c | 8 ++---
> .../riscv/rvv/vsetvl/vlmax_single_vtype-6.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_single_vtype-7.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_single_vtype-8.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-1.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c | 6 ++--
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-13.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-14.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-15.c | 8 ++---
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-16.c | 8 ++---
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-2.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-4.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-5.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-6.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-7.c | 2 +-
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-8.c | 4 +--
> .../riscv/rvv/vsetvl/vlmax_switch_vtype-9.c | 4 +--
> 69 files changed, 234 insertions(+), 234 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
> index 1c32dc3f844..cd58e53a822 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,\.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,\.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
> index e0cee66c2d2..1aaebdf4bc4 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
> index 67867dbf4c4..813ea49e705 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
> index 530604218da..9b59df9f78b 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
> index 3c7951ab67e..35e4fd190af 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
> index b44d28fd77a..2330d34246f 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
> @@ -207,11 +207,11 @@ void f7 (void * restrict in, void * restrict out,
> int n, int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
> index 06d3ffd0020..687ecdf0fa3 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
> index 141602b9239..d644fb69955 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
> index 345d799bc6c..ea4d95554bc 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
> index bce14e29791..cbbffb78966 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
> index a0e3b5703a7..21d5cc91310 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
> index 01b9a50389d..39d523b6676 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
> index c41022dce3a..29dd2d6a774 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
> index d90a06ce544..286a7439fb6 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s+\.L[0-9]+\:\s+vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
> index 6527a0a67dc..4cd8a5dfc79 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
> index dc09782eb2d..5825f12a577 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
> index f566156a05e..e2b53313ee1 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
> index 4f2ca827705..f40ff57f57f 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
> index 9c0a07bc05d..26a9933e8e2 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
> index 6d78052cc61..7028d9118bb 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
> @@ -36,5 +36,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
> index cdd1d3a2e19..aa4c1a7f51d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
> @@ -227,11 +227,11 @@ void f7 (void * restrict in, void * restrict out,
> int n, int cond)
> *(vbool1_t*)(out + i) = v;
> }
> }
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vlm\.v\s*(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vlm\.v\s*(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 7 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
> index ddfc938bcc4..41585d012e1 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g"
> no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
> index a6cb700185f..d4890e31ff0 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
> index 1da94b4486d..53905fca6fe 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
> index 19d005f70ee..4d56ec53540 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
> index 6eabe9cb0ff..f722ec49c02 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
> index 811f7b3f9a8..69bd0be5fd6 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
> index a91eca7f3dd..208173fb4bb 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
> @@ -33,5 +33,5 @@ void f (void * restrict in, void * restrict out, int n,
> int cond)
> }
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]}
> 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> -/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target {
> no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts
> "-flto" } } } } */
> +/* { dg-final { scan-assembler-times
> {ble\tra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7],zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)}
> 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts
> "-g" no-opts "-flto" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
> index 016af8fc67b..fb1258f826e 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
> @@ -145,10 +145,10 @@ void foo7 (void * restrict in, void * restrict out)
> *(vbool1_t*)(out + 8) = v8;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
> index 185db998df1..bdfb964cc01 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
> @@ -123,21 +123,21 @@ void f15 (void * restrict in, void * restrict out)
> *(vint8m4_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts
> "-O0" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
> index 95746b763e0..17055f0f0bf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
> @@ -27,8 +27,8 @@ void f3 (void * restrict in, void * restrict out)
> *(vint64m1_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0"
> } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
> index d3442457861..1383995ac72 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
> @@ -75,18 +75,18 @@ void f9 (void * restrict in, void * restrict out)
> *(vfloat32m8_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0"
> } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
> index 9ed1020af29..ba4b5ef7c3b 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
> @@ -75,15 +75,15 @@ void f9 (void * restrict in, void * restrict out)
> *(vfloat32m8_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0"
> } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
> index f5d91c68a16..5f04c192924 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
> @@ -11,6 +11,6 @@ void f3 (void * restrict in, void * restrict out)
> *(vfloat64m1_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0"
> } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
> index 3d9e8370cc9..8debc17248f 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
> @@ -35,8 +35,8 @@ void f4 (void * restrict in, void * restrict out)
> *(vfloat64m1_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 2 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0"
> } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
> index 6ee416088ca..c8913d8267d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
> @@ -123,25 +123,25 @@ void f15 (void * restrict in, void * restrict out)
> *(vint16m8_t*)(out + 2) = v2;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" } } } } */
>
> /* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts
> "-O0" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
> index 7fba5560f88..edb94218ede 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
> @@ -21,12 +21,12 @@ void foo7 (void * restrict in, void * restrict out)
> *(vbool64_t*)(out + 7) = v7;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)}
> 7 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 7 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)} 7 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
> index 01ea59db736..e547b94621b 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
> @@ -26,7 +26,7 @@ void f (void * restrict in, void * restrict out)
> *(vint8mf2_t*)(out + 7) = v7;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" } } } } */
> /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0"
> no-opts "-O1" no-opts "-Os" } } } } */
> diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
> index 431ec82846b..819e58281fe 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
> @@ -81,25 +81,25 @@ void f (void * restrict in, void * restrict out)
> *(vint16m8_t*)(out + 30) = v30;
> }
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } }
> } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } }
> } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } }
> } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
>
> -/* { dg-final { scan-assembler-times
> {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]}
> 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } }
> } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m2,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */
> /* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target {
> no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-O2" } } } } */<
prev parent reply other threads:[~2022-12-19 15:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-19 11:11 juzhe.zhong
2022-12-19 15:14 ` Kito Cheng [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CA+yXCZC_hEJJ2-2ovHKj5xAXcGMnPirA+XJjM_QgUs5ANdA8Vg@mail.gmail.com \
--to=kito.cheng@gmail.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=juzhe.zhong@rivai.ai \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).