* [PATH] [CLEANUP] Remove trailing whitespace characters
@ 2023-09-10 14:36 Guillaume Gomez
2023-09-11 13:27 ` David Malcolm
0 siblings, 1 reply; 6+ messages in thread
From: Guillaume Gomez @ 2023-09-10 14:36 UTC (permalink / raw)
To: gcc-patches, David Malcolm
[-- Attachment #1: Type: text/plain, Size: 1099 bytes --]
When going through the code, I saw a lot of trailing whitespace
characters so I decided to write a small script that would remove
them. I didn't expect there would be so many though... Not sure if
patch with so many changes are accepted like this or if I should send
more focused one.
Anyway, for posterity, here is the python script I used:
```
from os import listdir
from os.path import isfile, join
def clean_file(p):
if not p.endswith(".cc") and not p.endswith(".h"):
return
with open(p, 'r', encoding='utf8') as f:
content = f.read().split('\n')
updated = 0
i = 0
while i < len(content):
s = content[i].rstrip()
if s != content[i]:
updated += 1
content[i] = s
i += 1
if updated == 0:
return
with open(p, 'w', encoding='utf8') as f:
f.write('\n'.join(content))
def recur_read(p):
for f in listdir(p):
full_path = join(p, f)
if isfile(full_path):
clean_file(full_path)
else:
recur_read(full_path)
recur_read(".")
```
Cordially.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-Remove-trailing-whitespace-characters.patch --]
[-- Type: text/x-patch; charset="US-ASCII"; name="0001-Remove-trailing-whitespace-characters.patch", Size: 1953905 bytes --]
From 35de333e570a033e4015ce7cad426f1d0a5ef924 Mon Sep 17 00:00:00 2001
From: Guillaume Gomez <guillaume1.gomez@gmail.com>
Date: Sun, 10 Sep 2023 16:12:38 +0200
Subject: [PATCH] Remove trailing whitespace characters
gcc/ChangeLog:
* alias.cc: Likewise
* alloc-pool.h: Likewise
* asan.cc: Likewise
* attribs.cc: Likewise
* auto-profile.cc: Likewise
* backend.h: Likewise
* basic-block.h: Likewise
* bb-reorder.cc: Likewise
* bitmap.cc: Likewise
* bitmap.h: Likewise
* builtins.cc: Likewise
* caller-save.cc: Likewise
* calls.cc: Likewise
* ccmp.cc: Likewise
* cfg.cc: Likewise
* cfganal.cc: Likewise
* cfgbuild.cc: Likewise
* cfgcleanup.cc: Likewise
* cfgexpand.cc: Likewise
* cfghooks.h: Likewise
* cfgloop.cc: Likewise
* cfgloopanal.cc: Likewise
* cfgloopmanip.cc: Likewise
* cfgrtl.cc: Likewise
* cgraph.cc: Likewise
* cgraph.h: Likewise
* cgraphbuild.cc: Likewise
* cgraphclones.cc: Likewise
* cgraphunit.cc: Likewise
* collect-utils.cc: Likewise
* collect2.cc: Likewise
* combine-stack-adj.cc: Likewise
* combine.cc: Likewise
* common/config/avr/avr-common.cc: Likewise
* common/config/epiphany/epiphany-common.cc: Likewise
* common/config/i386/i386-common.cc: Likewise
* common/config/mcore/mcore-common.cc: Likewise
* common/config/msp430/msp430-common.cc: Likewise
* common/config/nds32/nds32-common.cc: Likewise
* common/config/pdp11/pdp11-common.cc: Likewise
* common/config/riscv/riscv-common.cc: Likewise
* common/config/rs6000/rs6000-common.cc: Likewise
* common/config/rx/rx-common.cc: Likewise
* compare-elim.cc: Likewise
* config/aarch64/aarch64-builtins.cc: Likewise
* config/aarch64/aarch64-cost-tables.h: Likewise
* config/aarch64/aarch64-protos.h: Likewise
* config/aarch64/aarch64.cc: Likewise
* config/aarch64/aarch64.h: Likewise
* config/aarch64/falkor-tag-collision-avoidance.cc: Likewise
* config/alpha/alpha.cc: Likewise
* config/alpha/alpha.h: Likewise
* config/alpha/driver-alpha.cc: Likewise
* config/alpha/elf.h: Likewise
* config/alpha/openbsd.h: Likewise
* config/alpha/vms.h: Likewise
* config/arc/arc.cc: Likewise
* config/arm/aout.h: Likewise
* config/arm/arm.cc: Likewise
* config/arm/arm.h: Likewise
* config/arm/bpabi.h: Likewise
* config/arm/elf.h: Likewise
* config/arm/linux-eabi.h: Likewise
* config/arm/symbian.h: Likewise
* config/arm/unknown-elf.h: Likewise
* config/arm/vxworks.h: Likewise
* config/avr/avr-arch.h: Likewise
* config/avr/avr-c.cc: Likewise
* config/avr/avr-devices.cc: Likewise
* config/avr/avr-log.cc: Likewise
* config/avr/avr-protos.h: Likewise
* config/avr/avr.cc: Likewise
* config/avr/avr.h: Likewise
* config/avr/elf.h: Likewise
* config/avr/gen-avr-mmcu-specs.cc: Likewise
* config/avr/gen-avr-mmcu-texi.cc: Likewise
* config/avr/stdfix.h: Likewise
* config/bfin/bfin-protos.h: Likewise
* config/bfin/bfin.cc: Likewise
* config/bfin/bfin.h: Likewise
* config/c6x/c6x.cc: Likewise
* config/c6x/c6x.h: Likewise
* config/cris/cris.cc: Likewise
* config/darwin-c.cc: Likewise
* config/darwin-driver.cc: Likewise
* config/darwin-protos.h: Likewise
* config/darwin.h: Likewise
* config/elfos.h: Likewise
* config/epiphany/epiphany.cc: Likewise
* config/epiphany/epiphany.h: Likewise
* config/fr30/fr30.cc: Likewise
* config/fr30/fr30.h: Likewise
* config/freebsd-spec.h: Likewise
* config/freebsd.h: Likewise
* config/frv/frv.cc: Likewise
* config/frv/frv.h: Likewise
* config/gcn/gcn-run.cc: Likewise
* config/gcn/gcn-tree.cc: Likewise
* config/gcn/gcn.cc: Likewise
* config/gcn/gcn.h: Likewise
* config/h8300/h8300.cc: Likewise
* config/h8300/h8300.h: Likewise
* config/host-darwin.h: Likewise
* config/host-hpux.cc: Likewise
* config/host-linux.cc: Likewise
* config/host-netbsd.cc: Likewise
* config/host-openbsd.cc: Likewise
* config/host-solaris.cc: Likewise
* config/i386/att.h: Likewise
* config/i386/avx512dqintrin.h: Likewise
* config/i386/biarch64.h: Likewise
* config/i386/bsd.h: Likewise
* config/i386/cpuid.h: Likewise
* config/i386/cygming.h: Likewise
* config/i386/cygwin.h: Likewise
* config/i386/djgpp.h: Likewise
* config/i386/driver-i386.cc: Likewise
* config/i386/freebsd.h: Likewise
* config/i386/gas.h: Likewise
* config/i386/gmm_malloc.h: Likewise
* config/i386/gnu-user.h: Likewise
* config/i386/host-cygwin.cc: Likewise
* config/i386/host-mingw32.cc: Likewise
* config/i386/i386-builtins.cc: Likewise
* config/i386/i386-c.cc: Likewise
* config/i386/i386-expand.cc: Likewise
* config/i386/i386-features.cc: Likewise
* config/i386/i386-options.cc: Likewise
* config/i386/i386-opts.h: Likewise
* config/i386/i386.cc: Likewise
* config/i386/i386.h: Likewise
* config/i386/openbsdelf.h: Likewise
* config/i386/smmintrin.h: Likewise
* config/i386/sol2.h: Likewise
* config/i386/unix.h: Likewise
* config/i386/winnt-cxx.cc: Likewise
* config/i386/winnt.cc: Likewise
* config/i386/wmmintrin.h: Likewise
* config/ia64/freebsd.h: Likewise
* config/ia64/ia64.cc: Likewise
* config/ia64/ia64.h: Likewise
* config/iq2000/iq2000.cc: Likewise
* config/iq2000/iq2000.h: Likewise
* config/kopensolaris-gnu.h: Likewise
* config/lm32/lm32-protos.h: Likewise
* config/lm32/lm32.cc: Likewise
* config/lm32/lm32.h: Likewise
* config/loongarch/loongarch-protos.h: Likewise
* config/m32c/m32c.cc: Likewise
* config/m32r/m32r.cc: Likewise
* config/m32r/m32r.h: Likewise
* config/m68k/linux.h: Likewise
* config/m68k/m68k.cc: Likewise
* config/m68k/m68k.h: Likewise
* config/m68k/m68kelf.h: Likewise
* config/m68k/netbsd-elf.h: Likewise
* config/mcore/mcore-elf.h: Likewise
* config/mcore/mcore.cc: Likewise
* config/mcore/mcore.h: Likewise
* config/microblaze/microblaze-c.cc: Likewise
* config/microblaze/microblaze-protos.h: Likewise
* config/microblaze/microblaze.cc: Likewise
* config/microblaze/microblaze.h: Likewise
* config/mips/frame-header-opt.cc: Likewise
* config/mips/mips.cc: Likewise
* config/mips/mips.h: Likewise
* config/mips/sde.h: Likewise
* config/mmix/mmix.cc: Likewise
* config/mn10300/linux.h: Likewise
* config/mn10300/mn10300.cc: Likewise
* config/mn10300/mn10300.h: Likewise
* config/moxie/moxie.cc: Likewise
* config/moxie/moxie.h: Likewise
* config/msp430/msp430.cc: Likewise
* config/msp430/msp430.h: Likewise
* config/nds32/nds32-protos.h: Likewise
* config/nds32/nds32.cc: Likewise
* config/nds32/nds32.h: Likewise
* config/netbsd.h: Likewise
* config/nios2/elf.h: Likewise
* config/nios2/nios2.cc: Likewise
* config/nios2/nios2.h: Likewise
* config/nvptx/nvptx.cc: Likewise
* config/nvptx/nvptx.h: Likewise
* config/openbsd-stdint.h: Likewise
* config/openbsd.h: Likewise
* config/pa/pa-64.h: Likewise
* config/pa/pa.cc: Likewise
* config/pa/pa.h: Likewise
* config/pa/pa32-regs.h: Likewise
* config/pa/som.h: Likewise
* config/pdp11/pdp11.cc: Likewise
* config/pdp11/pdp11.h: Likewise
* config/pru/pru-passes.cc: Likewise
* config/pru/pru.cc: Likewise
* config/riscv/riscv.cc: Likewise
* config/riscv/riscv.h: Likewise
* config/rl78/rl78-protos.h: Likewise
* config/rl78/rl78.cc: Likewise
* config/rl78/rl78.h: Likewise
* config/rs6000/aix.h: Likewise
* config/rs6000/aix71.h: Likewise
* config/rs6000/altivec.h: Likewise
* config/rs6000/darwin.h: Likewise
* config/rs6000/driver-rs6000.cc: Likewise
* config/rs6000/freebsd.h: Likewise
* config/rs6000/freebsd64.h: Likewise
* config/rs6000/host-darwin.cc: Likewise
* config/rs6000/linux.h: Likewise
* config/rs6000/ppu_intrinsics.h: Likewise
* config/rs6000/rs6000-c.cc: Likewise
* config/rs6000/rs6000-call.cc: Likewise
* config/rs6000/rs6000-internal.h: Likewise
* config/rs6000/rs6000-logue.cc: Likewise
* config/rs6000/rs6000-p8swap.cc: Likewise
* config/rs6000/rs6000-pcrel-opt.cc: Likewise
* config/rs6000/rs6000-string.cc: Likewise
* config/rs6000/rs6000.cc: Likewise
* config/rs6000/rs6000.h: Likewise
* config/rs6000/si2vmx.h: Likewise
* config/rs6000/spu2vmx.h: Likewise
* config/rs6000/sysv4.h: Likewise
* config/rs6000/vec_types.h: Likewise
* config/rs6000/xcoff.h: Likewise
* config/rtems.h: Likewise
* config/rx/rx.cc: Likewise
* config/rx/rx.h: Likewise
* config/s390/s390.cc: Likewise
* config/sh/elf.h: Likewise
* config/sh/embed-elf.h: Likewise
* config/sh/netbsd-elf.h: Likewise
* config/sh/sh.cc: Likewise
* config/sh/sh.h: Likewise
* config/sh/sh_treg_combine.cc: Likewise
* config/sh/vxworks.h: Likewise
* config/sol2.cc: Likewise
* config/sol2.h: Likewise
* config/sparc/freebsd.h: Likewise
* config/sparc/linux.h: Likewise
* config/sparc/linux64.h: Likewise
* config/sparc/sol2.h: Likewise
* config/sparc/sp-elf.h: Likewise
* config/sparc/sp64-elf.h: Likewise
* config/sparc/sparc-protos.h: Likewise
* config/sparc/sparc.cc: Likewise
* config/sparc/sparc.h: Likewise
* config/sparc/sysv4.h: Likewise
* config/stormy16/stormy16-protos.h: Likewise
* config/stormy16/stormy16.cc: Likewise
* config/stormy16/stormy16.h: Likewise
* config/v850/v850-c.cc: Likewise
* config/v850/v850.cc: Likewise
* config/v850/v850.h: Likewise
* config/vax/vax.cc: Likewise
* config/vax/vax.h: Likewise
* config/visium/visium.h: Likewise
* config/vx-common.h: Likewise
* config/vxworks.cc: Likewise
* config/vxworksae.h: Likewise
* config/xtensa/xtensa.cc: Likewise
* config/xtensa/xtensa.h: Likewise
* convert.cc: Likewise
* coretypes.h: Likewise
* coverage.cc: Likewise
* cprop.cc: Likewise
* cse.cc: Likewise
* cselib.cc: Likewise
* data-streamer-out.cc: Likewise
* data-streamer.h: Likewise
* ddg.cc: Likewise
* ddg.h: Likewise
* df-core.cc: Likewise
* df-problems.cc: Likewise
* df-scan.cc: Likewise
* df.h: Likewise
* diagnostic.cc: Likewise
* diagnostic.h: Likewise
* dojump.cc: Likewise
* dominance.cc: Likewise
* double-int.cc: Likewise
* dse.cc: Likewise
* dumpfile.cc: Likewise
* dwarf2asm.cc: Likewise
* dwarf2cfi.cc: Likewise
* dwarf2out.cc: Likewise
* emit-rtl.cc: Likewise
* except.cc: Likewise
* explow.cc: Likewise
* expmed.cc: Likewise
* expr.cc: Likewise
* expr.h: Likewise
* final.cc: Likewise
* flags.h: Likewise
* fold-const.cc: Likewise
* function.cc: Likewise
* function.h: Likewise
* fwprop.cc: Likewise
* gcc-ar.cc: Likewise
* gcc.cc: Likewise
* gcov-dump.cc: Likewise
* gcov-io.cc: Likewise
* gcov.cc: Likewise
* gcse-common.cc: Likewise
* gcse.cc: Likewise
* genattrtab.cc: Likewise
* genautomata.cc: Likewise
* genchecksum.cc: Likewise
* genemit.cc: Likewise
* genextract.cc: Likewise
* gengenrtl.cc: Likewise
* gengtype-parse.cc: Likewise
* gengtype-state.cc: Likewise
* gengtype.cc: Likewise
* gengtype.h: Likewise
* genhooks.cc: Likewise
* genmatch.cc: Likewise
* genmddump.cc: Likewise
* genmodes.cc: Likewise
* genopinit.cc: Likewise
* genoutput.cc: Likewise
* genpeep.cc: Likewise
* genpreds.cc: Likewise
* genrecog.cc: Likewise
* gensupport.cc: Likewise
* ggc-common.cc: Likewise
* ggc-page.cc: Likewise
* ggc-tests.cc: Likewise
* ggc.h: Likewise
* gimple-array-bounds.cc: Likewise
* gimple-fold.cc: Likewise
* gimple-iterator.h: Likewise
* gimple-loop-jam.cc: Likewise
* gimple-low.cc: Likewise
* gimple-match.h: Likewise
* gimple-pretty-print.cc: Likewise
* gimple-range-cache.cc: Likewise
* gimple-range-cache.h: Likewise
* gimple-range-edge.cc: Likewise
* gimple-range-edge.h: Likewise
* gimple-range-gori.h: Likewise
* gimple-range.cc: Likewise
* gimple-ssa-store-merging.cc: Likewise
* gimple-ssa-strength-reduction.cc: Likewise
* gimple-ssa-warn-access.cc: Likewise
* gimple.cc: Likewise
* gimplify-me.cc: Likewise
* gimplify.cc: Likewise
* ginclude/float.h: Likewise
* ginclude/stdarg.h: Likewise
* ginclude/stdatomic.h: Likewise
* ginclude/stddef.h: Likewise
* graphite-isl-ast-to-gimple.cc: Likewise
* graphite-scop-detection.cc: Likewise
* graphite.cc: Likewise
* haifa-sched.cc: Likewise
* hash-table.cc: Likewise
* hw-doloop.cc: Likewise
* hw-doloop.h: Likewise
* hwint.h: Likewise
* ifcvt.cc: Likewise
* incpath.cc: Likewise
* internal-fn.cc: Likewise
* ipa-comdats.cc: Likewise
* ipa-devirt.cc: Likewise
* ipa-fnsummary.cc: Likewise
* ipa-fnsummary.h: Likewise
* ipa-free-lang-data.cc: Likewise
* ipa-icf.cc: Likewise
* ipa-inline-transform.cc: Likewise
* ipa-inline.cc: Likewise
* ipa-polymorphic-call.cc: Likewise
* ipa-profile.cc: Likewise
* ipa-prop.cc: Likewise
* ipa-pure-const.cc: Likewise
* ipa-reference.cc: Likewise
* ipa-split.cc: Likewise
* ipa-utils.cc: Likewise
* ipa-utils.h: Likewise
* ipa-visibility.cc: Likewise
* ipa.cc: Likewise
* ira-build.cc: Likewise
* ira-color.cc: Likewise
* ira-conflicts.cc: Likewise
* ira-costs.cc: Likewise
* ira-emit.cc: Likewise
* ira-int.h: Likewise
* ira-lives.cc: Likewise
* ira.cc: Likewise
* json.cc: Likewise
* jump.cc: Likewise
* langhooks.h: Likewise
* lcm.cc: Likewise
* loop-doloop.cc: Likewise
* loop-init.cc: Likewise
* loop-invariant.cc: Likewise
* loop-unroll.cc: Likewise
* lower-subreg.cc: Likewise
* lra-assigns.cc: Likewise
* lra-coalesce.cc: Likewise
* lra-constraints.cc: Likewise
* lra-eliminations.cc: Likewise
* lra-int.h: Likewise
* lra-lives.cc: Likewise
* lra-remat.cc: Likewise
* lra-spills.cc: Likewise
* lra.cc: Likewise
* lto-cgraph.cc: Likewise
* lto-streamer-in.cc: Likewise
* lto-streamer-out.cc: Likewise
* lto-streamer.cc: Likewise
* lto-streamer.h: Likewise
* lto-wrapper.cc: Likewise
* mode-switching.cc: Likewise
* modulo-sched.cc: Likewise
* omp-expand.cc: Likewise
* omp-general.h: Likewise
* omp-low.cc: Likewise
* omp-offload.cc: Likewise
* optabs.cc: Likewise
* optabs.h: Likewise
* opts-common.cc: Likewise
* opts-global.cc: Likewise
* opts.cc: Likewise
* opts.h: Likewise
* passes.cc: Likewise
* plugin.cc: Likewise
* pointer-query.cc: Likewise
* postreload-gcse.cc: Likewise
* postreload.cc: Likewise
* predict.cc: Likewise
* pretty-print.cc: Likewise
* print-tree.cc: Likewise
* profile-count.cc: Likewise
* profile-count.h: Likewise
* profile.cc: Likewise
* range-op.cc: Likewise
* read-rtl.cc: Likewise
* real.cc: Likewise
* real.h: Likewise
* recog.cc: Likewise
* ree.cc: Likewise
* reg-stack.cc: Likewise
* regcprop.cc: Likewise
* reginfo.cc: Likewise
* regrename.cc: Likewise
* regs.h: Likewise
* reload.cc: Likewise
* reload1.cc: Likewise
* reorg.cc: Likewise
* resource.cc: Likewise
* rtl.cc: Likewise
* rtl.h: Likewise
* rtlanal.cc: Likewise
* rtlhooks.cc: Likewise
* sbitmap.h: Likewise
* sched-deps.cc: Likewise
* sched-ebb.cc: Likewise
* sched-int.h: Likewise
* sched-rgn.cc: Likewise
* sel-sched-dump.cc: Likewise
* sel-sched-dump.h: Likewise
* sel-sched-ir.cc: Likewise
* sel-sched-ir.h: Likewise
* sel-sched.cc: Likewise
* sese.cc: Likewise
* shrink-wrap.cc: Likewise
* simplify-rtx.cc: Likewise
* ssa-iterators.h: Likewise
* ssa.h: Likewise
* stmt.cc: Likewise
* stor-layout.cc: Likewise
* store-motion.cc: Likewise
* stringpool.cc: Likewise
* symtab.cc: Likewise
* system.h: Likewise
* target-hooks-macros.h: Likewise
* targhooks.cc: Likewise
* toplev.cc: Likewise
* tracer.cc: Likewise
* trans-mem.cc: Likewise
* tree-call-cdce.cc: Likewise
* tree-cfg.cc: Likewise
* tree-chrec.cc: Likewise
* tree-chrec.h: Likewise
* tree-complex.cc: Likewise
* tree-data-ref.cc: Likewise
* tree-data-ref.h: Likewise
* tree-diagnostic.cc: Likewise
* tree-eh.cc: Likewise
* tree-emutls.cc: Likewise
* tree-if-conv.cc: Likewise
* tree-inline.cc: Likewise
* tree-into-ssa.cc: Likewise
* tree-loop-distribution.cc: Likewise
* tree-outof-ssa.cc: Likewise
* tree-parloops.cc: Likewise
* tree-predcom.cc: Likewise
* tree-pretty-print.cc: Likewise
* tree-scalar-evolution.cc: Likewise
* tree-sra.cc: Likewise
* tree-ssa-alias.cc: Likewise
* tree-ssa-ccp.cc: Likewise
* tree-ssa-coalesce.cc: Likewise
* tree-ssa-dom.cc: Likewise
* tree-ssa-dse.h: Likewise
* tree-ssa-forwprop.cc: Likewise
* tree-ssa-ifcombine.cc: Likewise
* tree-ssa-live.cc: Likewise
* tree-ssa-loop-ch.cc: Likewise
* tree-ssa-loop-im.cc: Likewise
* tree-ssa-loop-ivcanon.cc: Likewise
* tree-ssa-loop-niter.cc: Likewise
* tree-ssa-loop-prefetch.cc: Likewise
* tree-ssa-loop-split.cc: Likewise
* tree-ssa-math-opts.cc: Likewise
* tree-ssa-phiopt.cc: Likewise
* tree-ssa-pre.cc: Likewise
* tree-ssa-propagate.cc: Likewise
* tree-ssa-reassoc.cc: Likewise
* tree-ssa-sccvn.cc: Likewise
* tree-ssa-scopedtables.cc: Likewise
* tree-ssa-scopedtables.h: Likewise
* tree-ssa-sink.cc: Likewise
* tree-ssa-strlen.cc: Likewise
* tree-ssa-structalias.cc: Likewise
* tree-ssa.cc: Likewise
* tree-stdarg.cc: Likewise
* tree-switch-conversion.cc: Likewise
* tree-vect-generic.cc: Likewise
* tree-vect-loop-manip.cc: Likewise
* tree-vect-loop.cc: Likewise
* tree-vect-patterns.cc: Likewise
* tree-vect-stmts.cc: Likewise
* tree-vectorizer.cc: Likewise
* tree.cc: Likewise
* tree.h: Likewise
* ubsan.cc: Likewise
* value-prof.cc: Likewise
* value-prof.h: Likewise
* var-tracking.cc: Likewise
* varasm.cc: Likewise
* varpool.cc: Likewise
* vec.h: Likewise
* vmsdbgout.cc: Likewise
* vtable-verify.cc: Likewise
* web.cc: Likewise
* wide-int.cc: Likewise
gcc/analyzer/ChangeLog:
* exploded-graph.h: Likewise
* program-point.cc: Likewise
* program-state.cc: Likewise
* region-model.cc: Likewise
* region-model.h: Likewise
* state-purge.cc: Likewise
* supergraph.cc: Likewise
gcc/c-family/ChangeLog:
* c-ada-spec.cc: Likewise
* c-attribs.cc: Likewise
* c-common.cc: Likewise
* c-common.h: Likewise
* c-cppbuiltin.cc: Likewise
* c-format.cc: Likewise
* c-indentation.cc: Likewise
* c-lex.cc: Likewise
* c-objc.h: Likewise
* c-omp.cc: Likewise
* c-opts.cc: Likewise
* c-ppoutput.cc: Likewise
* c-pragma.cc: Likewise
* c-pretty-print.cc: Likewise
* c-ubsan.cc: Likewise
* stub-objc.cc: Likewise
gcc/c/ChangeLog:
* c-aux-info.cc: Likewise
* c-convert.cc: Likewise
* c-decl.cc: Likewise
* c-parser.cc: Likewise
* c-tree.h: Likewise
* c-typeck.cc: Likewise
* gimple-parser.cc: Likewise
gcc/cp/ChangeLog:
* call.cc: Likewise
* class.cc: Likewise
* constexpr.cc: Likewise
* coroutines.cc: Likewise
* cp-gimplify.cc: Likewise
* cp-lang.cc: Likewise
* cp-tree.h: Likewise
* cvt.cc: Likewise
* cxx-pretty-print.cc: Likewise
* decl.cc: Likewise
* decl2.cc: Likewise
* error.cc: Likewise
* except.cc: Likewise
* g++spec.cc: Likewise
* init.cc: Likewise
* lambda.cc: Likewise
* lex.cc: Likewise
* logic.cc: Likewise
* mangle.cc: Likewise
* mapper-client.cc: Likewise
* method.cc: Likewise
* module.cc: Likewise
* name-lookup.cc: Likewise
* name-lookup.h: Likewise
* optimize.cc: Likewise
* parser.cc: Likewise
* pt.cc: Likewise
* ptree.cc: Likewise
* rtti.cc: Likewise
* search.cc: Likewise
* semantics.cc: Likewise
* tree.cc: Likewise
* typeck.cc: Likewise
* typeck2.cc: Likewise
* vtable-class-hierarchy.cc: Likewise
gcc/fortran/ChangeLog:
* array.cc: Likewise
* decl.cc: Likewise
* dependency.h: Likewise
* dump-parse-tree.cc: Likewise
* f95-lang.cc: Likewise
* gfortranspec.cc: Likewise
* io.cc: Likewise
* iresolve.cc: Likewise
* match.h: Likewise
* module.cc: Likewise
* openmp.cc: Likewise
* options.cc: Likewise
* scanner.cc: Likewise
* trans-array.cc: Likewise
* trans-common.cc: Likewise
* trans-openmp.cc: Likewise
* trans-types.cc: Likewise
* trans.h: Likewise
gcc/go/ChangeLog:
* go-gcc.cc: Likewise
* gofrontend/types.cc: Likewise
* gospec.cc: Likewise
gcc/jit/ChangeLog:
* docs/examples/tut04-toyvm/toyvm.cc: Likewise
* jit-playback.cc: Likewise
gcc/lto/ChangeLog:
* lang-specs.h: Likewise
* lto-lang.cc: Likewise
* lto-object.cc: Likewise
* lto-partition.cc: Likewise
* lto-symtab.cc: Likewise
gcc/m2/ChangeLog:
* mc-boot/GDebug.h: Likewise
* mc-boot/GFormatStrings.h: Likewise
* pge-boot/GDebug.h: Likewise
* pge-boot/GFormatStrings.h: Likewise
gcc/objc/ChangeLog:
* objc-act.cc: Likewise
* objc-encoding.cc: Likewise
* objc-map.cc: Likewise
* objc-map.h: Likewise
* objc-next-runtime-abi-01.cc: Likewise
gcc/objcp/ChangeLog:
* objcp-decl.cc: Likewise
* objcp-decl.h: Likewise
* objcp-lang.cc: Likewise
gcc/testsuite/ChangeLog:
* c-c++-common/dfp/func-vararg-alternate.h: Likewise
* g++.dg/abi/lambda-sig1.h: Likewise
* g++.dg/abi/lambda-tpl1.h: Likewise
* g++.dg/abi/pr39188-1.h: Likewise
* g++.dg/abi/pr39188-2.h: Likewise
* g++.dg/abi/pr39188-3.h: Likewise
* g++.dg/asan/dejagnu-gtest.h: Likewise
* g++.dg/compat/break/vbase10.h: Likewise
* g++.dg/compat/eh/ctor2.h: Likewise
* g++.dg/coroutines/coro.h: Likewise
* g++.dg/coroutines/coro1-refs-and-ctors.h: Likewise
* g++.dg/coroutines/coro1-ret-int-yield-int.h: Likewise
* g++.dg/coroutines/ramp-return.h: Likewise
* g++.dg/cpp1y/lambda-mangle-1.h: Likewise
* g++.dg/lto/20090311-1.h: Likewise
* g++.dg/modules/auto-1.h: Likewise
* g++.dg/modules/deferred-1.h: Likewise
* g++.dg/modules/merge-11.h: Likewise
* g++.dg/modules/merge-4.h: Likewise
* g++.dg/modules/pmf-1.h: Likewise
* g++.dg/modules/pr98531-1.h: Likewise
* g++.dg/modules/pr98531-2.h: Likewise
* g++.dg/modules/pr98531-3.h: Likewise
* g++.dg/modules/pr99425-1.h: Likewise
* g++.dg/modules/tmpl-part-req-1.h: Likewise
* g++.dg/modules/tmpl-part-req-2.h: Likewise
* g++.dg/modules/tpl-alias-1.h: Likewise
* g++.dg/torture/stackalign/test-unwind.h: Likewise
* g++.dg/vect/pr60729.cc: Likewise
* g++.dg/vect/pr70729-nest.cc: Likewise
* g++.dg/vect/pr70729.cc: Likewise
* g++.dg/vect/pr87914.cc: Likewise
* g++.dg/vect/slp-pr50413.cc: Likewise
* g++.dg/warn/pragma-system_header1.h: Likewise
* g++.dg/warn/pragma-system_header2.h: Likewise
* g++.old-deja/g++.abi/vtable3.h: Likewise
* gcc.dg/analyzer/taint-CVE-2020-13143.h: Likewise
* gcc.dg/analyzer/test-setjmp.h: Likewise
* gcc.dg/builtins-config.h: Likewise
* gcc.dg/compat/compat-common.h: Likewise
* gcc.dg/compat/struct-align-2.h: Likewise
* gcc.dg/cpp/mi2a.h: Likewise
* gcc.dg/cpp/mi2b.h: Likewise
* gcc.dg/cpp/mi2c.h: Likewise
* gcc.dg/cpp/trad/mi2a.h: Likewise
* gcc.dg/cpp/trad/mi2b.h: Likewise
* gcc.dg/cpp/trad/mi2c.h: Likewise
* gcc.dg/pthread-init-common.h: Likewise
* gcc.dg/simulate-thread/simulate-thread.h: Likewise
* gcc.dg/tg-tests.h: Likewise
* gcc.dg/torture/pr35771.h: Likewise
* gcc.dg/tree-ssa/vrp.h: Likewise
* gcc.dg/vect/tree-vect.h: Likewise
* gcc.dg/vect/tsvc/tsvc.h: Likewise
* gcc.dg/vmx/harness.h: Likewise
* gcc.misc-tests/dhry.h: Likewise
* gcc.target/arm/aapcs/neon-constants.h: Likewise
* gcc.target/avr/pr71151-common.h: Likewise
* gcc.target/avr/torture/addr-space-1.h: Likewise
* gcc.target/avr/torture/addr-space-2.h: Likewise
* gcc.target/i386/aes-avx-check.h: Likewise
* gcc.target/i386/aes-check.h: Likewise
* gcc.target/i386/amx-check.h: Likewise
* gcc.target/i386/avx-check.h: Likewise
* gcc.target/i386/avx512-check.h: Likewise
* gcc.target/i386/avx512f-mask-type.h: Likewise
* gcc.target/i386/avx512fp16-helper.h: Likewise
* gcc.target/i386/fma4-check.h: Likewise
* gcc.target/i386/fma_main.h: Likewise
* gcc.target/i386/l_fma_main.h: Likewise
* gcc.target/i386/m128-check.h: Likewise
* gcc.target/i386/m256-check.h: Likewise
* gcc.target/i386/m512-check.h: Likewise
* gcc.target/i386/mmx-3dnow-check.h: Likewise
* gcc.target/i386/mmx-check.h: Likewise
* gcc.target/i386/pclmul-avx-check.h: Likewise
* gcc.target/i386/pclmul-check.h: Likewise
* gcc.target/i386/rao-helper.h: Likewise
* gcc.target/i386/set-v16qi-1.h: Likewise
* gcc.target/i386/set-v16qi-2.h: Likewise
* gcc.target/i386/sse-check.h: Likewise
* gcc.target/i386/sse2-check.h: Likewise
* gcc.target/i386/sse3-check.h: Likewise
* gcc.target/i386/sse4_1-check.h: Likewise
* gcc.target/i386/sse4_2-check.h: Likewise
* gcc.target/i386/sse4_2-crc32.h: Likewise
* gcc.target/i386/sse4_2-pcmpstr.h: Likewise
* gcc.target/i386/sse4_2-popcnt.h: Likewise
* gcc.target/i386/sse4a-check.h: Likewise
* gcc.target/i386/ssse3-check.h: Likewise
* gcc.target/i386/ssse3-vals.h: Likewise
* gcc.target/i386/xop-check.h: Likewise
* gcc.target/msp430/mul_main.h: Likewise
* gcc.target/powerpc/m128-check.h: Likewise
* gcc.target/powerpc/recip-test2.h: Likewise
* gcc.target/powerpc/ssse3-vals.h: Likewise
* gcc.target/powerpc/vec-extract-v16qiu-v2.h: Likewise
* gcc.target/powerpc/vec-extract.h: Likewise
* gcc.target/x86_64/abi/avx/avx-check.h: Likewise
* gcc.target/x86_64/abi/avx512fp16/defines.h: Likewise
* gcc.target/x86_64/abi/bf16/defines.h: Likewise
* gcc.target/x86_64/abi/defines.h: Likewise
* objc-obj-c++-shared/CF-CFString.h: Likewise
* objc-obj-c++-shared/F-NSArray.h: Likewise
* objc-obj-c++-shared/F-NSAutoreleasePool.h: Likewise
* objc-obj-c++-shared/F-NSObject.h: Likewise
* objc-obj-c++-shared/F-NSString.h: Likewise
* objc-obj-c++-shared/F-NSValue.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFArray.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFAvailability.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFBase.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFCharacterSet.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFData.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFDictionary.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFLocale.h: Likewise
* objc-obj-c++-shared/GNUStep/CoreFoundation/CFString.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSArray.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSAutoreleasePool.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSObject.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSRange.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSString.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSValue.h: Likewise
* objc-obj-c++-shared/GNUStep/Foundation/NSZone.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/GNUstep.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/GSConfig.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/GSObjCRuntime.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/GSVersionMacros.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/NSArray+GNUstepBase.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/NSMutableString+GNUstepBase.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/NSNumber+GNUstepBase.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h: Likewise
* objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h: Likewise
* objc-obj-c++-shared/next-abi.h: Likewise
* objc-obj-c++-shared/nsconstantstring-class-impl.h: Likewise
* objc-obj-c++-shared/nsconstantstring-class.h: Likewise
* objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h: Likewise
* objc-obj-c++-shared/objc-test-suite-next-encode-assist.h: Likewise
* objc-obj-c++-shared/objc-test-suite-types.h: Likewise
* objc-obj-c++-shared/runtime.h: Likewise
* objc.dg/gnu-encoding/compat-common.h: Likewise
* objc/execute/bf-common.h: Likewise
* objc/execute/class-tests-1.h: Likewise
* objc/execute/class-tests-2.h: Likewise
---
gcc/alias.cc | 18 +-
gcc/alloc-pool.h | 2 +-
gcc/analyzer/exploded-graph.h | 2 +-
gcc/analyzer/program-point.cc | 2 +-
gcc/analyzer/program-state.cc | 4 +-
gcc/analyzer/region-model.cc | 4 +-
gcc/analyzer/region-model.h | 2 +-
gcc/analyzer/state-purge.cc | 6 +-
gcc/analyzer/supergraph.cc | 6 +-
gcc/asan.cc | 2 +-
gcc/attribs.cc | 8 +-
gcc/auto-profile.cc | 2 +-
gcc/backend.h | 2 +-
gcc/basic-block.h | 4 +-
gcc/bb-reorder.cc | 6 +-
gcc/bitmap.cc | 32 +-
gcc/bitmap.h | 6 +-
gcc/builtins.cc | 72 ++--
gcc/c-family/c-ada-spec.cc | 2 +-
gcc/c-family/c-attribs.cc | 6 +-
gcc/c-family/c-common.cc | 94 ++---
gcc/c-family/c-common.h | 6 +-
gcc/c-family/c-cppbuiltin.cc | 24 +-
gcc/c-family/c-format.cc | 30 +-
gcc/c-family/c-indentation.cc | 2 +-
gcc/c-family/c-lex.cc | 4 +-
gcc/c-family/c-objc.h | 2 +-
gcc/c-family/c-omp.cc | 4 +-
gcc/c-family/c-opts.cc | 14 +-
gcc/c-family/c-ppoutput.cc | 2 +-
gcc/c-family/c-pragma.cc | 2 +-
gcc/c-family/c-pretty-print.cc | 10 +-
gcc/c-family/c-ubsan.cc | 2 +-
gcc/c-family/stub-objc.cc | 14 +-
gcc/c/c-aux-info.cc | 2 +-
gcc/c/c-convert.cc | 4 +-
gcc/c/c-decl.cc | 80 ++--
gcc/c/c-parser.cc | 94 ++---
gcc/c/c-tree.h | 2 +-
gcc/c/c-typeck.cc | 78 ++--
gcc/c/gimple-parser.cc | 8 +-
gcc/caller-save.cc | 14 +-
gcc/calls.cc | 8 +-
gcc/ccmp.cc | 2 +-
gcc/cfg.cc | 24 +-
gcc/cfganal.cc | 8 +-
gcc/cfgbuild.cc | 8 +-
gcc/cfgcleanup.cc | 24 +-
gcc/cfgexpand.cc | 10 +-
gcc/cfghooks.h | 4 +-
gcc/cfgloop.cc | 4 +-
gcc/cfgloopanal.cc | 4 +-
gcc/cfgloopmanip.cc | 6 +-
gcc/cfgrtl.cc | 58 +--
gcc/cgraph.cc | 14 +-
gcc/cgraph.h | 16 +-
gcc/cgraphbuild.cc | 2 +-
gcc/cgraphclones.cc | 16 +-
gcc/cgraphunit.cc | 12 +-
gcc/collect-utils.cc | 4 +-
gcc/collect2.cc | 24 +-
gcc/combine-stack-adj.cc | 4 +-
gcc/combine.cc | 114 +++---
gcc/common/config/avr/avr-common.cc | 4 +-
gcc/common/config/epiphany/epiphany-common.cc | 2 +-
gcc/common/config/i386/i386-common.cc | 2 +-
gcc/common/config/mcore/mcore-common.cc | 2 +-
gcc/common/config/msp430/msp430-common.cc | 2 +-
gcc/common/config/nds32/nds32-common.cc | 4 +-
gcc/common/config/pdp11/pdp11-common.cc | 2 +-
gcc/common/config/riscv/riscv-common.cc | 2 +-
gcc/common/config/rs6000/rs6000-common.cc | 2 +-
gcc/common/config/rx/rx-common.cc | 4 +-
gcc/compare-elim.cc | 12 +-
gcc/config/aarch64/aarch64-builtins.cc | 2 +-
gcc/config/aarch64/aarch64-cost-tables.h | 2 +-
gcc/config/aarch64/aarch64-protos.h | 2 +-
gcc/config/aarch64/aarch64.cc | 6 +-
gcc/config/aarch64/aarch64.h | 10 +-
.../aarch64/falkor-tag-collision-avoidance.cc | 2 +-
gcc/config/alpha/alpha.cc | 94 ++---
gcc/config/alpha/alpha.h | 22 +-
gcc/config/alpha/driver-alpha.cc | 2 +-
gcc/config/alpha/elf.h | 2 +-
gcc/config/alpha/openbsd.h | 2 +-
gcc/config/alpha/vms.h | 8 +-
gcc/config/arc/arc.cc | 2 +-
gcc/config/arm/aout.h | 12 +-
gcc/config/arm/arm.cc | 126 +++---
gcc/config/arm/arm.h | 38 +-
gcc/config/arm/bpabi.h | 2 +-
gcc/config/arm/elf.h | 8 +-
gcc/config/arm/linux-eabi.h | 2 +-
gcc/config/arm/symbian.h | 6 +-
gcc/config/arm/unknown-elf.h | 2 +-
gcc/config/arm/vxworks.h | 4 +-
gcc/config/avr/avr-arch.h | 2 +-
gcc/config/avr/avr-c.cc | 6 +-
gcc/config/avr/avr-devices.cc | 8 +-
gcc/config/avr/avr-log.cc | 8 +-
gcc/config/avr/avr-protos.h | 2 +-
gcc/config/avr/avr.cc | 16 +-
gcc/config/avr/avr.h | 16 +-
gcc/config/avr/elf.h | 4 +-
gcc/config/avr/gen-avr-mmcu-specs.cc | 4 +-
gcc/config/avr/gen-avr-mmcu-texi.cc | 12 +-
gcc/config/avr/stdfix.h | 4 +-
gcc/config/bfin/bfin-protos.h | 2 +-
gcc/config/bfin/bfin.cc | 120 +++---
gcc/config/bfin/bfin.h | 16 +-
gcc/config/c6x/c6x.cc | 46 +--
gcc/config/c6x/c6x.h | 10 +-
gcc/config/cris/cris.cc | 4 +-
gcc/config/darwin-c.cc | 12 +-
gcc/config/darwin-driver.cc | 10 +-
gcc/config/darwin-protos.h | 8 +-
gcc/config/darwin.h | 6 +-
gcc/config/elfos.h | 8 +-
gcc/config/epiphany/epiphany.cc | 24 +-
gcc/config/epiphany/epiphany.h | 38 +-
gcc/config/fr30/fr30.cc | 130 +++---
gcc/config/fr30/fr30.h | 104 ++---
gcc/config/freebsd-spec.h | 18 +-
gcc/config/freebsd.h | 6 +-
gcc/config/frv/frv.cc | 168 ++++----
gcc/config/frv/frv.h | 68 ++--
gcc/config/gcn/gcn-run.cc | 2 +-
gcc/config/gcn/gcn-tree.cc | 10 +-
gcc/config/gcn/gcn.cc | 120 +++---
gcc/config/gcn/gcn.h | 24 +-
gcc/config/h8300/h8300.cc | 80 ++--
gcc/config/h8300/h8300.h | 16 +-
gcc/config/host-darwin.h | 2 +-
gcc/config/host-hpux.cc | 2 +-
gcc/config/host-linux.cc | 4 +-
gcc/config/host-netbsd.cc | 2 +-
gcc/config/host-openbsd.cc | 4 +-
gcc/config/host-solaris.cc | 6 +-
gcc/config/i386/att.h | 4 +-
gcc/config/i386/avx512dqintrin.h | 2 +-
gcc/config/i386/biarch64.h | 2 +-
gcc/config/i386/bsd.h | 6 +-
gcc/config/i386/cpuid.h | 6 +-
gcc/config/i386/cygming.h | 6 +-
gcc/config/i386/cygwin.h | 2 +-
gcc/config/i386/djgpp.h | 2 +-
gcc/config/i386/driver-i386.cc | 6 +-
gcc/config/i386/freebsd.h | 6 +-
gcc/config/i386/gas.h | 4 +-
gcc/config/i386/gmm_malloc.h | 6 +-
gcc/config/i386/gnu-user.h | 8 +-
gcc/config/i386/host-cygwin.cc | 2 +-
gcc/config/i386/host-mingw32.cc | 20 +-
gcc/config/i386/i386-builtins.cc | 10 +-
gcc/config/i386/i386-c.cc | 6 +-
gcc/config/i386/i386-expand.cc | 22 +-
gcc/config/i386/i386-features.cc | 18 +-
gcc/config/i386/i386-options.cc | 12 +-
gcc/config/i386/i386-opts.h | 2 +-
gcc/config/i386/i386.cc | 112 +++---
gcc/config/i386/i386.h | 42 +-
gcc/config/i386/openbsdelf.h | 2 +-
gcc/config/i386/smmintrin.h | 2 +-
gcc/config/i386/sol2.h | 2 +-
gcc/config/i386/unix.h | 2 +-
gcc/config/i386/winnt-cxx.cc | 34 +-
gcc/config/i386/winnt.cc | 32 +-
gcc/config/i386/wmmintrin.h | 8 +-
gcc/config/ia64/freebsd.h | 2 +-
gcc/config/ia64/ia64.cc | 156 ++++----
gcc/config/ia64/ia64.h | 72 ++--
gcc/config/iq2000/iq2000.cc | 160 ++++----
gcc/config/iq2000/iq2000.h | 78 ++--
gcc/config/kopensolaris-gnu.h | 2 +-
gcc/config/lm32/lm32-protos.h | 4 +-
gcc/config/lm32/lm32.cc | 76 ++--
gcc/config/lm32/lm32.h | 4 +-
gcc/config/loongarch/loongarch-protos.h | 2 +-
gcc/config/m32c/m32c.cc | 10 +-
gcc/config/m32r/m32r.cc | 48 +--
gcc/config/m32r/m32r.h | 46 +--
gcc/config/m68k/linux.h | 2 +-
gcc/config/m68k/m68k.cc | 72 ++--
gcc/config/m68k/m68k.h | 20 +-
gcc/config/m68k/m68kelf.h | 4 +-
gcc/config/m68k/netbsd-elf.h | 2 +-
gcc/config/mcore/mcore-elf.h | 6 +-
gcc/config/mcore/mcore.cc | 370 +++++++++---------
gcc/config/mcore/mcore.h | 30 +-
gcc/config/microblaze/microblaze-c.cc | 8 +-
gcc/config/microblaze/microblaze-protos.h | 4 +-
gcc/config/microblaze/microblaze.cc | 128 +++---
gcc/config/microblaze/microblaze.h | 34 +-
| 2 +-
gcc/config/mips/mips.cc | 172 ++++----
gcc/config/mips/mips.h | 46 +--
gcc/config/mips/sde.h | 2 +-
gcc/config/mmix/mmix.cc | 2 +-
gcc/config/mn10300/linux.h | 4 +-
gcc/config/mn10300/mn10300.cc | 46 +--
gcc/config/mn10300/mn10300.h | 20 +-
gcc/config/moxie/moxie.cc | 48 +--
gcc/config/moxie/moxie.h | 12 +-
gcc/config/msp430/msp430.cc | 26 +-
gcc/config/msp430/msp430.h | 22 +-
gcc/config/nds32/nds32-protos.h | 6 +-
gcc/config/nds32/nds32.cc | 98 ++---
gcc/config/nds32/nds32.h | 60 +--
gcc/config/netbsd.h | 2 +-
gcc/config/nios2/elf.h | 2 +-
gcc/config/nios2/nios2.cc | 140 +++----
gcc/config/nios2/nios2.h | 6 +-
gcc/config/nvptx/nvptx.cc | 142 +++----
gcc/config/nvptx/nvptx.h | 10 +-
gcc/config/openbsd-stdint.h | 8 +-
gcc/config/openbsd.h | 48 +--
gcc/config/pa/pa-64.h | 2 +-
gcc/config/pa/pa.cc | 92 ++---
gcc/config/pa/pa.h | 44 +--
gcc/config/pa/pa32-regs.h | 2 +-
gcc/config/pa/som.h | 6 +-
gcc/config/pdp11/pdp11.cc | 162 ++++----
gcc/config/pdp11/pdp11.h | 40 +-
gcc/config/pru/pru-passes.cc | 2 +-
gcc/config/pru/pru.cc | 30 +-
gcc/config/riscv/riscv.cc | 12 +-
gcc/config/riscv/riscv.h | 2 +-
gcc/config/rl78/rl78-protos.h | 2 +-
gcc/config/rl78/rl78.cc | 28 +-
gcc/config/rl78/rl78.h | 16 +-
gcc/config/rs6000/aix.h | 2 +-
gcc/config/rs6000/aix71.h | 4 +-
gcc/config/rs6000/altivec.h | 2 +-
gcc/config/rs6000/darwin.h | 4 +-
gcc/config/rs6000/driver-rs6000.cc | 2 +-
gcc/config/rs6000/freebsd.h | 2 +-
gcc/config/rs6000/freebsd64.h | 2 +-
gcc/config/rs6000/host-darwin.cc | 14 +-
gcc/config/rs6000/linux.h | 2 +-
gcc/config/rs6000/ppu_intrinsics.h | 20 +-
gcc/config/rs6000/rs6000-c.cc | 4 +-
gcc/config/rs6000/rs6000-call.cc | 32 +-
gcc/config/rs6000/rs6000-internal.h | 2 +-
gcc/config/rs6000/rs6000-logue.cc | 16 +-
gcc/config/rs6000/rs6000-p8swap.cc | 12 +-
gcc/config/rs6000/rs6000-pcrel-opt.cc | 6 +-
gcc/config/rs6000/rs6000-string.cc | 6 +-
gcc/config/rs6000/rs6000.cc | 162 ++++----
gcc/config/rs6000/rs6000.h | 30 +-
gcc/config/rs6000/si2vmx.h | 144 +++----
gcc/config/rs6000/spu2vmx.h | 14 +-
gcc/config/rs6000/sysv4.h | 2 +-
gcc/config/rs6000/vec_types.h | 4 +-
gcc/config/rs6000/xcoff.h | 6 +-
gcc/config/rtems.h | 2 +-
gcc/config/rx/rx.cc | 72 ++--
gcc/config/rx/rx.h | 20 +-
gcc/config/s390/s390.cc | 2 +-
gcc/config/sh/elf.h | 2 +-
gcc/config/sh/embed-elf.h | 2 +-
gcc/config/sh/netbsd-elf.h | 2 +-
gcc/config/sh/sh.cc | 98 ++---
gcc/config/sh/sh.h | 36 +-
gcc/config/sh/sh_treg_combine.cc | 2 +-
gcc/config/sh/vxworks.h | 4 +-
gcc/config/sol2.cc | 2 +-
gcc/config/sol2.h | 2 +-
gcc/config/sparc/freebsd.h | 4 +-
gcc/config/sparc/linux.h | 12 +-
gcc/config/sparc/linux64.h | 6 +-
gcc/config/sparc/sol2.h | 6 +-
gcc/config/sparc/sp-elf.h | 4 +-
gcc/config/sparc/sp64-elf.h | 4 +-
gcc/config/sparc/sparc-protos.h | 2 +-
gcc/config/sparc/sparc.cc | 70 ++--
gcc/config/sparc/sparc.h | 38 +-
gcc/config/sparc/sysv4.h | 4 +-
gcc/config/stormy16/stormy16-protos.h | 6 +-
gcc/config/stormy16/stormy16.cc | 24 +-
gcc/config/stormy16/stormy16.h | 58 +--
gcc/config/v850/v850-c.cc | 54 +--
gcc/config/v850/v850.cc | 218 +++++------
gcc/config/v850/v850.h | 48 +--
gcc/config/vax/vax.cc | 18 +-
gcc/config/vax/vax.h | 20 +-
gcc/config/visium/visium.h | 4 +-
gcc/config/vx-common.h | 2 +-
gcc/config/vxworks.cc | 16 +-
gcc/config/vxworksae.h | 2 +-
gcc/config/xtensa/xtensa.cc | 4 +-
gcc/config/xtensa/xtensa.h | 2 +-
gcc/convert.cc | 6 +-
gcc/coretypes.h | 2 +-
gcc/coverage.cc | 48 +--
gcc/cp/call.cc | 32 +-
gcc/cp/class.cc | 50 +--
gcc/cp/constexpr.cc | 12 +-
gcc/cp/coroutines.cc | 2 +-
gcc/cp/cp-gimplify.cc | 2 +-
gcc/cp/cp-lang.cc | 2 +-
gcc/cp/cp-tree.h | 28 +-
gcc/cp/cvt.cc | 8 +-
gcc/cp/cxx-pretty-print.cc | 16 +-
gcc/cp/decl.cc | 128 +++---
gcc/cp/decl2.cc | 30 +-
gcc/cp/error.cc | 26 +-
gcc/cp/except.cc | 4 +-
gcc/cp/g++spec.cc | 2 +-
gcc/cp/init.cc | 14 +-
gcc/cp/lambda.cc | 8 +-
gcc/cp/lex.cc | 12 +-
gcc/cp/logic.cc | 2 +-
gcc/cp/mangle.cc | 10 +-
gcc/cp/mapper-client.cc | 4 +-
gcc/cp/method.cc | 4 +-
gcc/cp/module.cc | 96 ++---
gcc/cp/name-lookup.cc | 48 +--
gcc/cp/name-lookup.h | 12 +-
gcc/cp/optimize.cc | 2 +-
gcc/cp/parser.cc | 20 +-
gcc/cp/pt.cc | 28 +-
gcc/cp/ptree.cc | 2 +-
gcc/cp/rtti.cc | 8 +-
gcc/cp/search.cc | 14 +-
gcc/cp/semantics.cc | 18 +-
gcc/cp/tree.cc | 36 +-
gcc/cp/typeck.cc | 128 +++---
gcc/cp/typeck2.cc | 24 +-
gcc/cp/vtable-class-hierarchy.cc | 8 +-
gcc/cprop.cc | 16 +-
gcc/cse.cc | 76 ++--
gcc/cselib.cc | 4 +-
gcc/data-streamer-out.cc | 4 +-
gcc/data-streamer.h | 2 +-
gcc/ddg.cc | 10 +-
gcc/ddg.h | 4 +-
gcc/df-core.cc | 10 +-
gcc/df-problems.cc | 30 +-
gcc/df-scan.cc | 14 +-
gcc/df.h | 6 +-
gcc/diagnostic.cc | 16 +-
gcc/diagnostic.h | 2 +-
gcc/dojump.cc | 8 +-
gcc/dominance.cc | 8 +-
gcc/double-int.cc | 2 +-
gcc/dse.cc | 16 +-
gcc/dumpfile.cc | 2 +-
gcc/dwarf2asm.cc | 6 +-
gcc/dwarf2cfi.cc | 16 +-
gcc/dwarf2out.cc | 106 ++---
gcc/emit-rtl.cc | 66 ++--
gcc/except.cc | 42 +-
gcc/explow.cc | 22 +-
gcc/expmed.cc | 38 +-
gcc/expr.cc | 64 +--
gcc/expr.h | 4 +-
gcc/final.cc | 38 +-
gcc/flags.h | 4 +-
gcc/fold-const.cc | 78 ++--
gcc/fortran/array.cc | 6 +-
gcc/fortran/decl.cc | 8 +-
gcc/fortran/dependency.h | 2 +-
gcc/fortran/dump-parse-tree.cc | 2 +-
gcc/fortran/f95-lang.cc | 106 ++---
gcc/fortran/gfortranspec.cc | 2 +-
gcc/fortran/io.cc | 34 +-
gcc/fortran/iresolve.cc | 2 +-
gcc/fortran/match.h | 2 +-
gcc/fortran/module.cc | 4 +-
gcc/fortran/openmp.cc | 10 +-
gcc/fortran/options.cc | 16 +-
gcc/fortran/scanner.cc | 38 +-
gcc/fortran/trans-array.cc | 8 +-
gcc/fortran/trans-common.cc | 56 +--
gcc/fortran/trans-openmp.cc | 8 +-
gcc/fortran/trans-types.cc | 30 +-
gcc/fortran/trans.h | 2 +-
gcc/function.cc | 46 +--
gcc/function.h | 6 +-
gcc/fwprop.cc | 2 +-
gcc/gcc-ar.cc | 12 +-
gcc/gcc.cc | 74 ++--
gcc/gcov-dump.cc | 4 +-
gcc/gcov-io.cc | 2 +-
gcc/gcov.cc | 4 +-
gcc/gcse-common.cc | 4 +-
gcc/gcse.cc | 48 +--
gcc/genattrtab.cc | 4 +-
gcc/genautomata.cc | 62 +--
gcc/genchecksum.cc | 2 +-
gcc/genemit.cc | 14 +-
| 4 +-
gcc/gengenrtl.cc | 2 +-
gcc/gengtype-parse.cc | 10 +-
gcc/gengtype-state.cc | 14 +-
gcc/gengtype.cc | 58 +--
gcc/gengtype.h | 6 +-
gcc/genhooks.cc | 4 +-
gcc/genmatch.cc | 14 +-
gcc/genmddump.cc | 2 +-
gcc/genmodes.cc | 4 +-
gcc/genopinit.cc | 2 +-
gcc/genoutput.cc | 20 +-
gcc/genpeep.cc | 6 +-
gcc/genpreds.cc | 4 +-
gcc/genrecog.cc | 8 +-
gcc/gensupport.cc | 16 +-
gcc/ggc-common.cc | 2 +-
gcc/ggc-page.cc | 18 +-
gcc/ggc-tests.cc | 20 +-
gcc/ggc.h | 4 +-
gcc/gimple-array-bounds.cc | 2 +-
gcc/gimple-fold.cc | 40 +-
gcc/gimple-iterator.h | 2 +-
gcc/gimple-loop-jam.cc | 4 +-
gcc/gimple-low.cc | 4 +-
gcc/gimple-match.h | 2 +-
gcc/gimple-pretty-print.cc | 6 +-
gcc/gimple-range-cache.cc | 10 +-
gcc/gimple-range-cache.h | 4 +-
gcc/gimple-range-edge.cc | 2 +-
gcc/gimple-range-edge.h | 2 +-
gcc/gimple-range-gori.h | 4 +-
gcc/gimple-range.cc | 4 +-
gcc/gimple-ssa-store-merging.cc | 4 +-
gcc/gimple-ssa-strength-reduction.cc | 132 +++----
gcc/gimple-ssa-warn-access.cc | 2 +-
gcc/gimple.cc | 4 +-
gcc/gimplify-me.cc | 2 +-
gcc/gimplify.cc | 14 +-
gcc/ginclude/float.h | 6 +-
gcc/ginclude/stdarg.h | 2 +-
gcc/ginclude/stdatomic.h | 4 +-
gcc/ginclude/stddef.h | 2 +-
gcc/go/go-gcc.cc | 2 +-
gcc/go/gofrontend/types.cc | 4 +-
gcc/go/gospec.cc | 2 +-
gcc/graphite-isl-ast-to-gimple.cc | 6 +-
gcc/graphite-scop-detection.cc | 4 +-
gcc/graphite.cc | 2 +-
gcc/haifa-sched.cc | 38 +-
gcc/hash-table.cc | 2 +-
gcc/hw-doloop.cc | 4 +-
gcc/hw-doloop.h | 2 +-
gcc/hwint.h | 2 +-
gcc/ifcvt.cc | 18 +-
gcc/incpath.cc | 2 +-
gcc/internal-fn.cc | 14 +-
gcc/ipa-comdats.cc | 2 +-
gcc/ipa-devirt.cc | 42 +-
gcc/ipa-fnsummary.cc | 24 +-
gcc/ipa-fnsummary.h | 4 +-
gcc/ipa-free-lang-data.cc | 2 +-
gcc/ipa-icf.cc | 4 +-
gcc/ipa-inline-transform.cc | 6 +-
gcc/ipa-inline.cc | 28 +-
gcc/ipa-polymorphic-call.cc | 46 +--
gcc/ipa-profile.cc | 6 +-
gcc/ipa-prop.cc | 10 +-
gcc/ipa-pure-const.cc | 4 +-
gcc/ipa-reference.cc | 8 +-
gcc/ipa-split.cc | 20 +-
gcc/ipa-utils.cc | 10 +-
gcc/ipa-utils.h | 6 +-
gcc/ipa-visibility.cc | 12 +-
gcc/ipa.cc | 8 +-
gcc/ira-build.cc | 32 +-
gcc/ira-color.cc | 80 ++--
gcc/ira-conflicts.cc | 8 +-
gcc/ira-costs.cc | 28 +-
gcc/ira-emit.cc | 4 +-
gcc/ira-int.h | 28 +-
gcc/ira-lives.cc | 10 +-
gcc/ira.cc | 142 +++----
gcc/jit/docs/examples/tut04-toyvm/toyvm.cc | 2 +-
gcc/jit/jit-playback.cc | 2 +-
gcc/json.cc | 2 +-
gcc/jump.cc | 28 +-
gcc/langhooks.h | 2 +-
gcc/lcm.cc | 2 +-
gcc/loop-doloop.cc | 12 +-
gcc/loop-init.cc | 16 +-
gcc/loop-invariant.cc | 4 +-
gcc/loop-unroll.cc | 4 +-
gcc/lower-subreg.cc | 2 +-
gcc/lra-assigns.cc | 12 +-
gcc/lra-coalesce.cc | 2 +-
gcc/lra-constraints.cc | 46 +--
gcc/lra-eliminations.cc | 18 +-
gcc/lra-int.h | 2 +-
gcc/lra-lives.cc | 6 +-
gcc/lra-remat.cc | 44 +--
gcc/lra-spills.cc | 10 +-
gcc/lra.cc | 36 +-
gcc/lto-cgraph.cc | 22 +-
gcc/lto-streamer-in.cc | 4 +-
gcc/lto-streamer-out.cc | 2 +-
gcc/lto-streamer.cc | 4 +-
gcc/lto-streamer.h | 6 +-
gcc/lto-wrapper.cc | 18 +-
gcc/lto/lang-specs.h | 2 +-
gcc/lto/lto-lang.cc | 2 +-
gcc/lto/lto-object.cc | 2 +-
gcc/lto/lto-partition.cc | 18 +-
gcc/lto/lto-symtab.cc | 10 +-
gcc/m2/mc-boot/GDebug.h | 2 +-
gcc/m2/mc-boot/GFormatStrings.h | 2 +-
gcc/m2/pge-boot/GDebug.h | 2 +-
gcc/m2/pge-boot/GFormatStrings.h | 2 +-
gcc/mode-switching.cc | 4 +-
gcc/modulo-sched.cc | 62 +--
gcc/objc/objc-act.cc | 46 +--
gcc/objc/objc-encoding.cc | 2 +-
gcc/objc/objc-map.cc | 12 +-
gcc/objc/objc-map.h | 10 +-
gcc/objc/objc-next-runtime-abi-01.cc | 2 +-
gcc/objcp/objcp-decl.cc | 8 +-
gcc/objcp/objcp-decl.h | 4 +-
gcc/objcp/objcp-lang.cc | 2 +-
gcc/omp-expand.cc | 2 +-
gcc/omp-general.h | 2 +-
gcc/omp-low.cc | 12 +-
gcc/omp-offload.cc | 12 +-
gcc/optabs.cc | 92 ++---
gcc/optabs.h | 2 +-
gcc/opts-common.cc | 24 +-
gcc/opts-global.cc | 2 +-
gcc/opts.cc | 6 +-
gcc/opts.h | 4 +-
gcc/passes.cc | 2 +-
gcc/plugin.cc | 2 +-
gcc/pointer-query.cc | 4 +-
gcc/postreload-gcse.cc | 34 +-
gcc/postreload.cc | 12 +-
gcc/predict.cc | 24 +-
gcc/pretty-print.cc | 10 +-
gcc/print-tree.cc | 2 +-
gcc/profile-count.cc | 2 +-
gcc/profile-count.h | 4 +-
gcc/profile.cc | 18 +-
gcc/range-op.cc | 8 +-
gcc/read-rtl.cc | 4 +-
gcc/real.cc | 34 +-
gcc/real.h | 6 +-
gcc/recog.cc | 28 +-
gcc/ree.cc | 2 +-
gcc/reg-stack.cc | 42 +-
gcc/regcprop.cc | 6 +-
gcc/reginfo.cc | 20 +-
gcc/regrename.cc | 8 +-
gcc/regs.h | 2 +-
gcc/reload.cc | 60 +--
gcc/reload1.cc | 66 ++--
gcc/reorg.cc | 62 +--
gcc/resource.cc | 22 +-
gcc/rtl.cc | 12 +-
gcc/rtl.h | 12 +-
gcc/rtlanal.cc | 66 ++--
gcc/rtlhooks.cc | 4 +-
gcc/sbitmap.h | 4 +-
gcc/sched-deps.cc | 26 +-
gcc/sched-ebb.cc | 6 +-
gcc/sched-int.h | 10 +-
gcc/sched-rgn.cc | 10 +-
gcc/sel-sched-dump.cc | 10 +-
gcc/sel-sched-dump.h | 2 +-
gcc/sel-sched-ir.cc | 56 +--
gcc/sel-sched-ir.h | 28 +-
gcc/sel-sched.cc | 30 +-
gcc/sese.cc | 2 +-
gcc/shrink-wrap.cc | 6 +-
gcc/simplify-rtx.cc | 38 +-
gcc/ssa-iterators.h | 6 +-
gcc/ssa.h | 2 +-
gcc/stmt.cc | 20 +-
gcc/stor-layout.cc | 18 +-
gcc/store-motion.cc | 4 +-
gcc/stringpool.cc | 4 +-
gcc/symtab.cc | 12 +-
gcc/system.h | 6 +-
gcc/target-hooks-macros.h | 4 +-
gcc/targhooks.cc | 4 +-
.../c-c++-common/dfp/func-vararg-alternate.h | 2 +-
gcc/testsuite/g++.dg/abi/lambda-sig1.h | 8 +-
gcc/testsuite/g++.dg/abi/lambda-tpl1.h | 2 +-
gcc/testsuite/g++.dg/abi/pr39188-1.h | 2 +-
gcc/testsuite/g++.dg/abi/pr39188-2.h | 2 +-
gcc/testsuite/g++.dg/abi/pr39188-3.h | 2 +-
gcc/testsuite/g++.dg/asan/dejagnu-gtest.h | 2 +-
gcc/testsuite/g++.dg/compat/break/vbase10.h | 2 +-
gcc/testsuite/g++.dg/compat/eh/ctor2.h | 4 +-
gcc/testsuite/g++.dg/coroutines/coro.h | 4 +-
.../g++.dg/coroutines/coro1-refs-and-ctors.h | 4 +-
.../coroutines/coro1-ret-int-yield-int.h | 2 +-
gcc/testsuite/g++.dg/coroutines/ramp-return.h | 2 +-
gcc/testsuite/g++.dg/cpp1y/lambda-mangle-1.h | 6 +-
gcc/testsuite/g++.dg/lto/20090311-1.h | 2 +-
gcc/testsuite/g++.dg/modules/auto-1.h | 4 +-
gcc/testsuite/g++.dg/modules/deferred-1.h | 2 +-
gcc/testsuite/g++.dg/modules/merge-11.h | 2 +-
gcc/testsuite/g++.dg/modules/merge-4.h | 4 +-
gcc/testsuite/g++.dg/modules/pmf-1.h | 2 +-
gcc/testsuite/g++.dg/modules/pr98531-1.h | 2 +-
gcc/testsuite/g++.dg/modules/pr98531-2.h | 2 +-
gcc/testsuite/g++.dg/modules/pr98531-3.h | 2 +-
gcc/testsuite/g++.dg/modules/pr99425-1.h | 2 +-
.../g++.dg/modules/tmpl-part-req-1.h | 2 +-
.../g++.dg/modules/tmpl-part-req-2.h | 4 +-
gcc/testsuite/g++.dg/modules/tpl-alias-1.h | 4 +-
.../g++.dg/torture/stackalign/test-unwind.h | 2 +-
gcc/testsuite/g++.dg/vect/pr60729.cc | 4 +-
gcc/testsuite/g++.dg/vect/pr70729-nest.cc | 8 +-
gcc/testsuite/g++.dg/vect/pr70729.cc | 8 +-
gcc/testsuite/g++.dg/vect/pr87914.cc | 2 +-
gcc/testsuite/g++.dg/vect/slp-pr50413.cc | 4 +-
| 2 +-
| 2 +-
gcc/testsuite/g++.old-deja/g++.abi/vtable3.h | 8 +-
.../gcc.dg/analyzer/taint-CVE-2020-13143.h | 2 +-
gcc/testsuite/gcc.dg/analyzer/test-setjmp.h | 2 +-
gcc/testsuite/gcc.dg/builtins-config.h | 2 +-
gcc/testsuite/gcc.dg/compat/compat-common.h | 2 +-
gcc/testsuite/gcc.dg/compat/struct-align-2.h | 2 +-
gcc/testsuite/gcc.dg/cpp/mi2a.h | 2 +-
gcc/testsuite/gcc.dg/cpp/mi2b.h | 2 +-
gcc/testsuite/gcc.dg/cpp/mi2c.h | 2 +-
gcc/testsuite/gcc.dg/cpp/trad/mi2a.h | 2 +-
gcc/testsuite/gcc.dg/cpp/trad/mi2b.h | 2 +-
gcc/testsuite/gcc.dg/cpp/trad/mi2c.h | 2 +-
gcc/testsuite/gcc.dg/pthread-init-common.h | 2 +-
.../gcc.dg/simulate-thread/simulate-thread.h | 6 +-
gcc/testsuite/gcc.dg/tg-tests.h | 2 +-
gcc/testsuite/gcc.dg/torture/pr35771.h | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/vrp.h | 2 +-
gcc/testsuite/gcc.dg/vect/tree-vect.h | 2 +-
gcc/testsuite/gcc.dg/vect/tsvc/tsvc.h | 4 +-
gcc/testsuite/gcc.dg/vmx/harness.h | 2 +-
gcc/testsuite/gcc.misc-tests/dhry.h | 46 +--
.../gcc.target/arm/aapcs/neon-constants.h | 6 +-
gcc/testsuite/gcc.target/avr/pr71151-common.h | 2 +-
.../gcc.target/avr/torture/addr-space-1.h | 2 +-
.../gcc.target/avr/torture/addr-space-2.h | 6 +-
gcc/testsuite/gcc.target/i386/aes-avx-check.h | 2 +-
gcc/testsuite/gcc.target/i386/aes-check.h | 2 +-
gcc/testsuite/gcc.target/i386/amx-check.h | 4 +-
gcc/testsuite/gcc.target/i386/avx-check.h | 2 +-
gcc/testsuite/gcc.target/i386/avx512-check.h | 2 +-
.../gcc.target/i386/avx512f-mask-type.h | 6 +-
.../gcc.target/i386/avx512fp16-helper.h | 20 +-
gcc/testsuite/gcc.target/i386/fma4-check.h | 2 +-
gcc/testsuite/gcc.target/i386/fma_main.h | 2 +-
gcc/testsuite/gcc.target/i386/l_fma_main.h | 2 +-
gcc/testsuite/gcc.target/i386/m128-check.h | 6 +-
gcc/testsuite/gcc.target/i386/m256-check.h | 8 +-
gcc/testsuite/gcc.target/i386/m512-check.h | 8 +-
.../gcc.target/i386/mmx-3dnow-check.h | 2 +-
gcc/testsuite/gcc.target/i386/mmx-check.h | 2 +-
.../gcc.target/i386/pclmul-avx-check.h | 2 +-
gcc/testsuite/gcc.target/i386/pclmul-check.h | 2 +-
gcc/testsuite/gcc.target/i386/rao-helper.h | 2 +-
gcc/testsuite/gcc.target/i386/set-v16qi-1.h | 2 +-
gcc/testsuite/gcc.target/i386/set-v16qi-2.h | 2 +-
gcc/testsuite/gcc.target/i386/sse-check.h | 2 +-
gcc/testsuite/gcc.target/i386/sse2-check.h | 2 +-
gcc/testsuite/gcc.target/i386/sse3-check.h | 4 +-
gcc/testsuite/gcc.target/i386/sse4_1-check.h | 2 +-
gcc/testsuite/gcc.target/i386/sse4_2-check.h | 2 +-
gcc/testsuite/gcc.target/i386/sse4_2-crc32.h | 20 +-
.../gcc.target/i386/sse4_2-pcmpstr.h | 16 +-
gcc/testsuite/gcc.target/i386/sse4_2-popcnt.h | 2 +-
gcc/testsuite/gcc.target/i386/sse4a-check.h | 2 +-
gcc/testsuite/gcc.target/i386/ssse3-check.h | 2 +-
gcc/testsuite/gcc.target/i386/ssse3-vals.h | 2 +-
gcc/testsuite/gcc.target/i386/xop-check.h | 2 +-
gcc/testsuite/gcc.target/msp430/mul_main.h | 2 +-
gcc/testsuite/gcc.target/powerpc/m128-check.h | 6 +-
.../gcc.target/powerpc/recip-test2.h | 14 +-
gcc/testsuite/gcc.target/powerpc/ssse3-vals.h | 2 +-
| 6 +-
| 16 +-
.../gcc.target/x86_64/abi/avx/avx-check.h | 2 +-
.../x86_64/abi/avx512fp16/defines.h | 2 +-
.../gcc.target/x86_64/abi/bf16/defines.h | 2 +-
gcc/testsuite/gcc.target/x86_64/abi/defines.h | 2 +-
.../objc-obj-c++-shared/CF-CFString.h | 2 +-
gcc/testsuite/objc-obj-c++-shared/F-NSArray.h | 2 +-
.../objc-obj-c++-shared/F-NSAutoreleasePool.h | 2 +-
.../objc-obj-c++-shared/F-NSObject.h | 2 +-
.../objc-obj-c++-shared/F-NSString.h | 2 +-
gcc/testsuite/objc-obj-c++-shared/F-NSValue.h | 2 +-
.../GNUStep/CoreFoundation/CFArray.h | 12 +-
.../GNUStep/CoreFoundation/CFAvailability.h | 12 +-
.../GNUStep/CoreFoundation/CFBase.h | 14 +-
.../GNUStep/CoreFoundation/CFCharacterSet.h | 12 +-
.../GNUStep/CoreFoundation/CFData.h | 4 +-
.../GNUStep/CoreFoundation/CFDictionary.h | 4 +-
.../GNUStep/CoreFoundation/CFLocale.h | 20 +-
.../GNUStep/CoreFoundation/CFString.h | 26 +-
.../GNUStep/Foundation/NSArray.h | 2 +-
.../GNUStep/Foundation/NSAutoreleasePool.h | 24 +-
.../GNUStep/Foundation/NSGeometry.h | 18 +-
.../GNUStep/Foundation/NSObjCRuntime.h | 2 +-
.../GNUStep/Foundation/NSObject.h | 18 +-
.../GNUStep/Foundation/NSRange.h | 26 +-
.../GNUStep/Foundation/NSString.h | 44 +--
.../GNUStep/Foundation/NSValue.h | 16 +-
.../GNUStep/Foundation/NSZone.h | 6 +-
.../GNUStep/GNUstepBase/GNUstep.h | 20 +-
.../GNUStep/GNUstepBase/GSConfig.h | 10 +-
.../GNUStep/GNUstepBase/GSObjCRuntime.h | 16 +-
.../GNUStep/GNUstepBase/GSVersionMacros.h | 8 +-
.../GNUStep/GNUstepBase/NSArray+GNUstepBase.h | 4 +-
.../GNUstepBase/NSMutableString+GNUstepBase.h | 2 +-
.../GNUstepBase/NSNumber+GNUstepBase.h | 2 +-
.../GNUstepBase/NSObject+GNUstepBase.h | 6 +-
.../GNUstepBase/NSString+GNUstepBase.h | 2 +-
gcc/testsuite/objc-obj-c++-shared/next-abi.h | 6 +-
.../nsconstantstring-class-impl.h | 4 +-
.../nsconstantstring-class.h | 2 +-
.../objc-test-suite-next-encode-assist-impl.h | 2 +-
.../objc-test-suite-next-encode-assist.h | 10 +-
.../objc-test-suite-types.h | 2 +-
gcc/testsuite/objc-obj-c++-shared/runtime.h | 2 +-
.../objc.dg/gnu-encoding/compat-common.h | 2 +-
gcc/testsuite/objc/execute/bf-common.h | 6 +-
gcc/testsuite/objc/execute/class-tests-1.h | 12 +-
gcc/testsuite/objc/execute/class-tests-2.h | 16 +-
gcc/toplev.cc | 6 +-
gcc/tracer.cc | 2 +-
gcc/trans-mem.cc | 24 +-
gcc/tree-call-cdce.cc | 6 +-
gcc/tree-cfg.cc | 20 +-
gcc/tree-chrec.cc | 8 +-
gcc/tree-chrec.h | 2 +-
gcc/tree-complex.cc | 4 +-
gcc/tree-data-ref.cc | 4 +-
gcc/tree-data-ref.h | 2 +-
gcc/tree-diagnostic.cc | 8 +-
gcc/tree-eh.cc | 24 +-
gcc/tree-emutls.cc | 6 +-
gcc/tree-if-conv.cc | 8 +-
gcc/tree-inline.cc | 10 +-
gcc/tree-into-ssa.cc | 4 +-
gcc/tree-loop-distribution.cc | 4 +-
gcc/tree-outof-ssa.cc | 2 +-
gcc/tree-parloops.cc | 10 +-
gcc/tree-predcom.cc | 2 +-
gcc/tree-pretty-print.cc | 2 +-
gcc/tree-scalar-evolution.cc | 14 +-
gcc/tree-sra.cc | 2 +-
gcc/tree-ssa-alias.cc | 16 +-
gcc/tree-ssa-ccp.cc | 10 +-
gcc/tree-ssa-coalesce.cc | 2 +-
gcc/tree-ssa-dom.cc | 4 +-
gcc/tree-ssa-dse.h | 2 +-
gcc/tree-ssa-forwprop.cc | 10 +-
gcc/tree-ssa-ifcombine.cc | 4 +-
gcc/tree-ssa-live.cc | 4 +-
gcc/tree-ssa-loop-ch.cc | 6 +-
gcc/tree-ssa-loop-im.cc | 4 +-
gcc/tree-ssa-loop-ivcanon.cc | 24 +-
gcc/tree-ssa-loop-niter.cc | 18 +-
gcc/tree-ssa-loop-prefetch.cc | 16 +-
gcc/tree-ssa-loop-split.cc | 2 +-
gcc/tree-ssa-math-opts.cc | 36 +-
gcc/tree-ssa-phiopt.cc | 8 +-
gcc/tree-ssa-pre.cc | 10 +-
gcc/tree-ssa-propagate.cc | 2 +-
gcc/tree-ssa-reassoc.cc | 16 +-
gcc/tree-ssa-sccvn.cc | 10 +-
gcc/tree-ssa-scopedtables.cc | 6 +-
gcc/tree-ssa-scopedtables.h | 2 +-
gcc/tree-ssa-sink.cc | 4 +-
gcc/tree-ssa-strlen.cc | 2 +-
gcc/tree-ssa-structalias.cc | 14 +-
gcc/tree-ssa.cc | 6 +-
gcc/tree-stdarg.cc | 4 +-
gcc/tree-switch-conversion.cc | 2 +-
gcc/tree-vect-generic.cc | 8 +-
gcc/tree-vect-loop-manip.cc | 2 +-
gcc/tree-vect-loop.cc | 40 +-
gcc/tree-vect-patterns.cc | 10 +-
gcc/tree-vect-stmts.cc | 18 +-
gcc/tree-vectorizer.cc | 14 +-
gcc/tree.cc | 86 ++--
gcc/tree.h | 4 +-
gcc/ubsan.cc | 2 +-
gcc/value-prof.cc | 4 +-
gcc/value-prof.h | 2 +-
gcc/var-tracking.cc | 2 +-
gcc/varasm.cc | 58 +--
gcc/varpool.cc | 8 +-
gcc/vec.h | 2 +-
gcc/vmsdbgout.cc | 4 +-
gcc/vtable-verify.cc | 4 +-
gcc/web.cc | 4 +-
gcc/wide-int.cc | 2 +-
797 files changed, 6746 insertions(+), 6746 deletions(-)
diff --git a/gcc/alias.cc b/gcc/alias.cc
index 3672bf277b9..661efbdd95b 100644
--- a/gcc/alias.cc
+++ b/gcc/alias.cc
@@ -278,7 +278,7 @@ static bool copying_arguments;
/* The splay-tree used to store the various alias set entries. */
static GTY (()) vec<alias_set_entry *, va_gc> *alias_sets;
-\f
+
/* Build a decomposed reference object for querying the alias-oracle
from the MEM rtx and store it in *REF.
Returns false if MEM is not suitable for the alias-oracle. */
@@ -621,7 +621,7 @@ objects_must_conflict_p (tree t1, tree t2)
overlaps on the stack. */
return alias_sets_must_conflict_p (set1, set2);
}
-\f
+
/* Return true if T is an end of the access path which can be used
by type based alias oracle. */
@@ -684,7 +684,7 @@ component_uses_parent_alias_set_from (const_tree t)
t = TREE_OPERAND (t, 0);
}
-
+
if (found)
return TREE_OPERAND (found, 0);
@@ -751,7 +751,7 @@ get_deref_alias_set (tree t)
memory reference tree *T or NULL_TREE in which case *T is
adjusted to point to the outermost component reference that
can be used for assigning an alias set. */
-
+
tree
reference_alias_ptr_type_1 (tree *t)
{
@@ -1259,12 +1259,12 @@ record_component_aliases (tree type, alias_set_type superset)
case UNION_TYPE:
case QUAL_UNION_TYPE:
{
- /* LTO non-ODR type merging does not make any difference between
+ /* LTO non-ODR type merging does not make any difference between
component pointer types. We may have
struct foo {int *a;};
- as TYPE_CANONICAL of
+ as TYPE_CANONICAL of
struct bar {float *a;};
@@ -2186,7 +2186,7 @@ compare_base_decls (tree base1, tree base2)
symtab_node *node2 = symtab_node::get (base2);
if (!node2)
return 0;
-
+
ret = node1->equal_address_to (node2, true);
return ret;
}
@@ -2826,7 +2826,7 @@ adjust_offset_for_component_ref (tree x, bool *known_p,
}
/* Return nonzero if we can determine the exprs corresponding to memrefs
- X and Y and they do not overlap.
+ X and Y and they do not overlap.
If LOOP_VARIANT is set, skip offset-based disambiguation */
int
@@ -3236,7 +3236,7 @@ canon_output_dependence (const_rtx mem, bool mem_canonicalized,
mem_canonicalized, /*x_canonicalized=*/true,
/*writep=*/true);
}
-\f
+
/* Check whether X may be aliased with MEM. Don't do offset-based
diff --git a/gcc/alloc-pool.h b/gcc/alloc-pool.h
index e56709b7cf0..f9dff2703e1 100644
--- a/gcc/alloc-pool.h
+++ b/gcc/alloc-pool.h
@@ -445,7 +445,7 @@ base_pool_allocator <TBlockAllocator>::remove (void *object)
memset (object, 0xaf, size);
}
-#if CHECKING_P
+#if CHECKING_P
/* Mark the element to be free. */
allocation_object::get_instance (object)->id = 0;
#endif
diff --git a/gcc/analyzer/exploded-graph.h b/gcc/analyzer/exploded-graph.h
index 86644c10835..ffc35928765 100644
--- a/gcc/analyzer/exploded-graph.h
+++ b/gcc/analyzer/exploded-graph.h
@@ -398,7 +398,7 @@ class dynamic_call_info_t : public custom_edge_info
public:
dynamic_call_info_t (const gcall *dynamic_call,
const bool is_returning_call = false)
- : m_dynamic_call (dynamic_call),
+ : m_dynamic_call (dynamic_call),
m_is_returning_call (is_returning_call)
{}
diff --git a/gcc/analyzer/program-point.cc b/gcc/analyzer/program-point.cc
index 23635a18de1..86cad31df27 100644
--- a/gcc/analyzer/program-point.cc
+++ b/gcc/analyzer/program-point.cc
@@ -344,7 +344,7 @@ program_point::to_json () const
/* Update the callstack to represent a call from caller to callee.
- Generally used to push a custom call to a perticular program point
+ Generally used to push a custom call to a perticular program point
where we don't have a superedge representing the call. */
void
program_point::push_to_call_stack (const supernode *caller,
diff --git a/gcc/analyzer/program-state.cc b/gcc/analyzer/program-state.cc
index 3942b5fdc18..543035f2529 100644
--- a/gcc/analyzer/program-state.cc
+++ b/gcc/analyzer/program-state.cc
@@ -1144,7 +1144,7 @@ program_state::on_edge (exploded_graph &eg,
/* Update this program_state to reflect a call to function
represented by CALL_STMT.
- currently used only when the call doesn't have a superedge representing
+ currently used only when the call doesn't have a superedge representing
the call ( like call via a function pointer ) */
void
program_state::push_call (exploded_graph &eg,
@@ -1167,7 +1167,7 @@ program_state::push_call (exploded_graph &eg,
/* Update this program_state to reflect a return from function
call to which is represented by CALL_STMT.
- currently used only when the call doesn't have a superedge representing
+ currently used only when the call doesn't have a superedge representing
the return */
void
program_state::returning_call (exploded_graph &eg,
diff --git a/gcc/analyzer/region-model.cc b/gcc/analyzer/region-model.cc
index 55064400a08..92eae545e19 100644
--- a/gcc/analyzer/region-model.cc
+++ b/gcc/analyzer/region-model.cc
@@ -4250,7 +4250,7 @@ region_model::update_for_return_gcall (const gcall *call_stmt,
pop_frame (lhs, NULL, ctxt);
}
-/* Extract calling information from the superedge and update the model for the
+/* Extract calling information from the superedge and update the model for the
call */
void
@@ -4261,7 +4261,7 @@ region_model::update_for_call_superedge (const call_superedge &call_edge,
update_for_gcall (call_stmt, ctxt, call_edge.get_callee_function ());
}
-/* Extract calling information from the return superedge and update the model
+/* Extract calling information from the return superedge and update the model
for the returning call */
void
diff --git a/gcc/analyzer/region-model.h b/gcc/analyzer/region-model.h
index e8767e5ed41..eb8f2767098 100644
--- a/gcc/analyzer/region-model.h
+++ b/gcc/analyzer/region-model.h
@@ -331,7 +331,7 @@ class region_model
void update_for_gcall (const gcall *call_stmt,
region_model_context *ctxt,
function *callee = NULL);
-
+
void update_for_return_gcall (const gcall *call_stmt,
region_model_context *ctxt);
diff --git a/gcc/analyzer/state-purge.cc b/gcc/analyzer/state-purge.cc
index e9bcb4b0345..aae2d9744e3 100644
--- a/gcc/analyzer/state-purge.cc
+++ b/gcc/analyzer/state-purge.cc
@@ -584,17 +584,17 @@ state_purge_per_ssa_name::process_point (const function_point &point,
superedge *sedge
= map.get_sg ().get_intraprocedural_edge_for_call (cedge);
gcc_assert (sedge);
- add_to_worklist
+ add_to_worklist
(function_point::after_supernode (sedge->m_src),
worklist, logger);
}
else
{
- supernode *callernode
+ supernode *callernode
= map.get_sg ().get_supernode_for_stmt (returning_call);
gcc_assert (callernode);
- add_to_worklist
+ add_to_worklist
(function_point::after_supernode (callernode),
worklist, logger);
}
diff --git a/gcc/analyzer/supergraph.cc b/gcc/analyzer/supergraph.cc
index 8195fe8e7f8..a2434b4c102 100644
--- a/gcc/analyzer/supergraph.cc
+++ b/gcc/analyzer/supergraph.cc
@@ -197,14 +197,14 @@ supergraph::supergraph (logger *logger)
// maybe call is via a function pointer
if (gcall *call = dyn_cast<gcall *> (stmt))
{
- cgraph_edge *edge
+ cgraph_edge *edge
= cgraph_node::get (fun->decl)->get_edge (stmt);
if (!edge || !edge->callee)
{
supernode *old_node_for_stmts = node_for_stmts;
node_for_stmts = add_node (fun, bb, call, NULL);
- superedge *sedge
+ superedge *sedge
= new callgraph_superedge (old_node_for_stmts,
node_for_stmts,
SUPEREDGE_INTRAPROCEDURAL_CALL,
@@ -1216,7 +1216,7 @@ callgraph_superedge::get_call_stmt () const
{
if (m_cedge)
return m_cedge->call_stmt;
-
+
return m_src->get_final_call ();
}
diff --git a/gcc/asan.cc b/gcc/asan.cc
index d833f89cc4f..bc97b48e9bd 100644
--- a/gcc/asan.cc
+++ b/gcc/asan.cc
@@ -2111,7 +2111,7 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
& ~(ASAN_MIN_RED_ZONE_SIZE - HOST_WIDE_INT_1))
- offset;
- /* Unpoison shadow memory that corresponds to a variable that is
+ /* Unpoison shadow memory that corresponds to a variable that is
is subject of use-after-return sanitization. */
if (l > 2)
{
diff --git a/gcc/attribs.cc b/gcc/attribs.cc
index 49cb299a3c1..23685c5f08a 100644
--- a/gcc/attribs.cc
+++ b/gcc/attribs.cc
@@ -1046,7 +1046,7 @@ make_attribute (const char *name, const char *arg_name, tree chain)
return attr;
}
-\f
+
/* Common functions used for target clone support. */
/* Comparator function to be used in qsort routine to sort attribute
@@ -1216,7 +1216,7 @@ make_dispatcher_decl (const tree decl)
fn_type = TREE_TYPE (decl);
func_type = build_function_type (TREE_TYPE (fn_type),
TYPE_ARG_TYPES (fn_type));
-
+
func_decl = build_fn_decl (func_name, func_type);
XDELETEVEC (func_name);
TREE_USED (func_decl) = 1;
@@ -1229,7 +1229,7 @@ make_dispatcher_decl (const tree decl)
/* This will be of type IFUNCs have to be externally visible. */
TREE_PUBLIC (func_decl) = 1;
- return func_decl;
+ return func_decl;
}
/* Returns true if decl is multi-versioned and DECL is the default function,
@@ -1590,7 +1590,7 @@ build_type_attribute_variant (tree ttype, tree attribute)
return build_type_attribute_qual_variant (ttype, attribute,
TYPE_QUALS (ttype));
}
-\f
+
/* A variant of lookup_attribute() that can be used with an identifier
as the first argument, and where the identifier can be either
'text' or '__text__'.
diff --git a/gcc/auto-profile.cc b/gcc/auto-profile.cc
index f88d00934e1..11b67bb9510 100644
--- a/gcc/auto-profile.cc
+++ b/gcc/auto-profile.cc
@@ -471,7 +471,7 @@ string_table::get_index (const char *name) const
return iter->second;
}
-/* Return the index of a given function DECL. Return -1 if DECL is not
+/* Return the index of a given function DECL. Return -1 if DECL is not
found in string table. */
int
diff --git a/gcc/backend.h b/gcc/backend.h
index 42c6b762e63..882166a8ac0 100644
--- a/gcc/backend.h
+++ b/gcc/backend.h
@@ -1,4 +1,4 @@
-/* Common Backend requirements.
+/* Common Backend requirements.
Copyright (C) 2015-2023 Free Software Foundation, Inc.
Contributed by Andrew MacLeod <amacleod@redhat.com>
diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 7c06a7db45d..2e1263817fb 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -244,7 +244,7 @@ enum cfg_bb_flags
#define FOR_ALL_BB_FN(BB, FN) \
for (BB = ENTRY_BLOCK_PTR_FOR_FN (FN); BB; BB = BB->next_bb)
-\f
+
/* Stuff for recording basic block info. */
/* For now, these will be functions (so that they can include checked casts
@@ -563,7 +563,7 @@ check_probability (int prob)
gcc_checking_assert (prob >= 0 && prob <= REG_BR_PROB_BASE);
}
-/* Given PROB1 and PROB2, return PROB1*PROB2/REG_BR_PROB_BASE.
+/* Given PROB1 and PROB2, return PROB1*PROB2/REG_BR_PROB_BASE.
Used to combine BB probabilities. */
static inline int
diff --git a/gcc/bb-reorder.cc b/gcc/bb-reorder.cc
index 6f606420da8..a139c98f893 100644
--- a/gcc/bb-reorder.cc
+++ b/gcc/bb-reorder.cc
@@ -208,7 +208,7 @@ static bool better_edge_p (const_basic_block, const_edge, profile_probability,
profile_count, profile_probability, profile_count,
const_edge);
static bool copy_bb_p (const_basic_block, int);
-\f
+
/* Return the trace number in which BB was visited. */
static int
@@ -1207,7 +1207,7 @@ connect_traces (int n_traces, struct trace *traces)
/* If dest has multiple predecessors, skip it. We expect
that one predecessor with smaller index connects with it
later. */
- if (count != 1)
+ if (count != 1)
break;
}
@@ -3018,7 +3018,7 @@ pass_partition_blocks::execute (function *fun)
Which means that the bb_has_eh_pred test in df_bb_refs_collect
will *always* fail, because no edges can have been added to the
- block yet. Which of course means we don't add the right
+ block yet. Which of course means we don't add the right
artificial refs, which means we fail df_verify (much) later.
Cleanest solution would seem to make DF_DEFER_INSN_RESCAN imply
diff --git a/gcc/bitmap.cc b/gcc/bitmap.cc
index 20de562caac..341ec28dd46 100644
--- a/gcc/bitmap.cc
+++ b/gcc/bitmap.cc
@@ -70,7 +70,7 @@ static int bitmap_default_obstack_depth;
static GTY((deletable)) bitmap_element *bitmap_ggc_free; /* Freelist of
GC'd elements. */
-\f
+
/* Bitmap memory management. */
/* Add ELT to the appropriate freelist. */
@@ -200,7 +200,7 @@ bitmap_elt_clear_from (bitmap head, bitmap_element *elt)
bitmap_ggc_free = elt;
}
}
-\f
+
/* Linked-list view of bitmaps.
In this representation, the bitmap elements form a double-linked list
@@ -340,7 +340,7 @@ bitmap_list_insert_element_after (bitmap head,
}
/* Return the element for INDX, or NULL if the element doesn't exist.
- Update the `current' field even if we can't find an element that
+ Update the `current' field even if we can't find an element that
would hold the bitmap's bit to make eventual allocation
faster. */
@@ -411,14 +411,14 @@ bitmap_list_find_element (bitmap head, unsigned int indx)
return element;
}
-\f
+
/* Splay-tree view of bitmaps.
This is an almost one-to-one the implementatin of the simple top-down
splay tree in Sleator and Tarjan's "Self-adjusting Binary Search Trees".
It is probably not the most efficient form of splay trees, but it should
be good enough to experiment with this idea of bitmaps-as-trees.
-
+
For all functions below, the variable or function argument "t" is a node
in the tree, and "e" is a temporary or new node in the tree. The rest
is sufficiently straigh-forward (and very well explained in the paper)
@@ -586,7 +586,7 @@ bitmap_tree_find_element (bitmap head, unsigned int indx)
element = 0;
return element;
}
-\f
+
/* Converting bitmap views from linked-list to tree and vice versa. */
/* Splice element E and all elements with a larger index from
@@ -706,7 +706,7 @@ bitmap_tree_view (bitmap head)
head->tree_form = true;
}
-\f
+
/* Clear a bitmap by freeing all its elements. */
void
@@ -725,7 +725,7 @@ bitmap_clear (bitmap head)
}
bitmap_elt_clear_from (head, head->first);
}
-\f
+
/* Initialize a bitmap obstack. If BIT_OBSTACK is NULL, initialize
the default bitmap obstack. */
@@ -828,7 +828,7 @@ bitmap_obstack_free (bitmap map)
}
}
-\f
+
/* Return nonzero if all bits in an element are zero. */
static inline int
@@ -846,7 +846,7 @@ bitmap_element_zerop (const bitmap_element *element)
return 1;
#endif
}
-\f
+
/* Copy a bitmap to another bitmap. */
void
@@ -909,7 +909,7 @@ bitmap_move (bitmap to, bitmap from)
if (GATHER_STATISTICS)
release_overhead (from, sz, false);
}
-\f
+
/* Clear a single bit in a bitmap. Return true if the bit changed. */
bool
@@ -1003,7 +1003,7 @@ bitmap_bit_p (const_bitmap head, int bit)
return (ptr->bits[word_num] >> bit_num) & 1;
}
-\f
+
/* Set CHUNK_SIZE bits at a time in bitmap HEAD.
Store CHUNK_VALUE starting at bits CHUNK * chunk_size.
This is the set routine for viewing bitmap as a multi-bit sparse array. */
@@ -1080,7 +1080,7 @@ bitmap_get_aligned_chunk (const_bitmap head, unsigned int chunk,
// Return 4 bits.
return (ptr->bits[word_num] >> bit_num) & max_value;
}
-\f
+
#if GCC_VERSION < 3400
/* Table of number of set bits in a character, indexed by value of char. */
static const unsigned char popcount_table[] =
@@ -1321,7 +1321,7 @@ bitmap_last_set_bit (const_bitmap a)
return bit_no;
}
-\f
+
/* DST = A & B. */
@@ -2389,7 +2389,7 @@ bitmap_intersect_compl_p (const_bitmap a, const_bitmap b)
return a_elt != NULL;
}
-\f
+
/* DST = A | (FROM1 & ~FROM2). Return true if DST changes. */
bool
@@ -2676,7 +2676,7 @@ bitmap_hash (const_bitmap head)
return (hashval_t)hash;
}
-\f
+
/* Function to obtain a vector of bitmap elements in bit order from
HEAD in tree view. */
diff --git a/gcc/bitmap.h b/gcc/bitmap.h
index a439f933867..c385313b4a0 100644
--- a/gcc/bitmap.h
+++ b/gcc/bitmap.h
@@ -60,7 +60,7 @@ along with GCC; see the file COPYING3. If not see
sparse sets. The canonical example in GCC is, of course, the "set of
sets" for some CFG-based data flow problems (liveness analysis, dominance
frontiers, etc.).
-
+
For random-access sparse sets of unknown universe, the binary tree
representation is likely to be a more suitable choice. Theoretical
access times for the binary tree representation are better than those
@@ -99,7 +99,7 @@ along with GCC; see the file COPYING3. If not see
efficiently. The downside is that many random-access operations are
relatively slow, because the linked list has to be traversed to test
membership (i.e. member_p/ add_member/remove_member).
-
+
To improve the performance of this set representation, the last
accessed element and its index are cached. For membership tests on
members close to recently accessed members, the cached last element
@@ -174,7 +174,7 @@ along with GCC; see the file COPYING3. If not see
of clearing the set, and the relatively large number of operations
necessary to balance the tree. Also, iterating the set members is
not supported.
-
+
As for the linked-list representation, the last accessed element and
its index are cached, so that membership tests on the latest accessed
members is a constant-time operation. Other lookups take O(logE)
diff --git a/gcc/builtins.cc b/gcc/builtins.cc
index af45829875e..79b91b44c0e 100644
--- a/gcc/builtins.cc
+++ b/gcc/builtins.cc
@@ -1412,7 +1412,7 @@ get_memory_rtx (tree exp, tree len)
set_mem_alias_set (mem, 0);
return mem;
}
-\f
+
/* Built-in functions to perform an untyped call and return. */
#define apply_args_mode \
@@ -3524,7 +3524,7 @@ builtin_memcpy_read_str (void *data, void *, HOST_WIDE_INT offset,
}
/* LEN specify length of the block of memcpy/memset operation.
- Figure out its range and put it into MIN_SIZE/MAX_SIZE.
+ Figure out its range and put it into MIN_SIZE/MAX_SIZE.
In some cases we can make very likely guess on max size, then we
set it into PROBABLE_MAX_SIZE. */
@@ -5943,7 +5943,7 @@ expand_builtin_fork_or_exec (tree fn, tree exp, rtx target, int ignore)
}
-\f
+
/* Reconstitute a mode for a __sync intrinsic operation. Since the type of
the pointer in these functions is void*, the tree optimizers may remove
casts. The mode computed in expand_builtin isn't reliable either, due
@@ -5994,7 +5994,7 @@ get_builtin_sync_mem (tree loc, machine_mode mode)
}
/* Make sure an argument is in the right mode.
- EXP is the tree argument.
+ EXP is the tree argument.
MODE is the mode it should be in. */
static rtx
@@ -6219,15 +6219,15 @@ expand_builtin_atomic_exchange (machine_mode mode, tree exp, rtx target)
}
/* Expand the __atomic_compare_exchange intrinsic:
- bool __atomic_compare_exchange (TYPE *object, TYPE *expect,
- TYPE desired, BOOL weak,
+ bool __atomic_compare_exchange (TYPE *object, TYPE *expect,
+ TYPE desired, BOOL weak,
enum memmodel success,
enum memmodel failure)
EXP is the CALL_EXPR.
TARGET is an optional place for us to store the results. */
static rtx
-expand_builtin_atomic_compare_exchange (machine_mode mode, tree exp,
+expand_builtin_atomic_compare_exchange (machine_mode mode, tree exp,
rtx target)
{
rtx expect, desired, mem, oldval;
@@ -6240,14 +6240,14 @@ expand_builtin_atomic_compare_exchange (machine_mode mode, tree exp,
if (failure > success)
success = MEMMODEL_SEQ_CST;
-
+
if (is_mm_release (failure) || is_mm_acq_rel (failure))
{
failure = MEMMODEL_SEQ_CST;
success = MEMMODEL_SEQ_CST;
}
-
+
if (!flag_inline_atomics)
return NULL_RTX;
@@ -6726,7 +6726,7 @@ expand_ifn_atomic_op_fetch_cmp_0 (gcall *call)
EXP is the call expression. */
static rtx
-expand_builtin_atomic_clear (tree exp)
+expand_builtin_atomic_clear (tree exp)
{
machine_mode mode = int_mode_for_size (BOOL_TYPE_SIZE, 0).require ();
rtx mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode);
@@ -6838,9 +6838,9 @@ fold_builtin_atomic_always_lock_free (tree arg0, tree arg1)
/* Return true if the parameters to call EXP represent an object which will
always generate lock free instructions. The first argument represents the
- size of the object, and the second parameter is a pointer to the object
- itself. If NULL is passed for the object, then the result is based on
- typical alignment for an object of the specified size. Otherwise return
+ size of the object, and the second parameter is a pointer to the object
+ itself. If NULL is passed for the object, then the result is based on
+ typical alignment for an object of the specified size. Otherwise return
false. */
static rtx
@@ -6862,7 +6862,7 @@ expand_builtin_atomic_always_lock_free (tree exp)
return const0_rtx;
}
-/* Return a one or zero if it can be determined that object ARG1 of size ARG
+/* Return a one or zero if it can be determined that object ARG1 of size ARG
is lock free on this architecture. */
static tree
@@ -6870,7 +6870,7 @@ fold_builtin_atomic_is_lock_free (tree arg0, tree arg1)
{
if (!flag_inline_atomics)
return NULL_TREE;
-
+
/* If it isn't always lock free, don't generate a result. */
if (fold_builtin_atomic_always_lock_free (arg0, arg1) == boolean_true_node)
return boolean_true_node;
@@ -6880,9 +6880,9 @@ fold_builtin_atomic_is_lock_free (tree arg0, tree arg1)
/* Return true if the parameters to call EXP represent an object which will
always generate lock free instructions. The first argument represents the
- size of the object, and the second parameter is a pointer to the object
- itself. If NULL is passed for the object, then the result is based on
- typical alignment for an object of the specified size. Otherwise return
+ size of the object, and the second parameter is a pointer to the object
+ itself. If NULL is passed for the object, then the result is based on
+ typical alignment for an object of the specified size. Otherwise return
NULL*/
static rtx
@@ -6899,7 +6899,7 @@ expand_builtin_atomic_is_lock_free (tree exp)
}
if (!flag_inline_atomics)
- return NULL_RTX;
+ return NULL_RTX;
/* If the value is known at compile time, return the RTX for it. */
size = fold_builtin_atomic_is_lock_free (arg0, arg1);
@@ -6973,7 +6973,7 @@ expand_builtin_set_thread_pointer (tree exp)
{
class expand_operand op;
rtx val = expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX,
- Pmode, EXPAND_NORMAL);
+ Pmode, EXPAND_NORMAL);
create_input_operand (&op, val, Pmode);
expand_insn (icode, 1, &op);
return;
@@ -6981,7 +6981,7 @@ expand_builtin_set_thread_pointer (tree exp)
error ("%<__builtin_set_thread_pointer%> is not supported on this target");
}
-\f
+
/* Emit code to restore the current value of stack. */
static void
@@ -7089,7 +7089,7 @@ expand_builtin_goacc_parlevel_id_size (tree exp, rtx target, int ignore)
LENGTH is the number of chars to compare;
CONST_STR_N indicates which source string is the constant string;
IS_MEMCMP indicates whether it's a memcmp or strcmp.
-
+
to: (assume const_str_n is 2, i.e., arg2 is a constant string)
target = (int) (unsigned char) var_str[0]
@@ -8074,7 +8074,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
if (!target || !register_operand (target, mode))
target = gen_reg_rtx (mode);
- mode = get_builtin_sync_mode
+ mode = get_builtin_sync_mode
(fcode - BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_1);
target = expand_builtin_compare_and_swap (mode, exp, true, target);
if (target)
@@ -8086,7 +8086,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_4:
case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_8:
case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_16:
- mode = get_builtin_sync_mode
+ mode = get_builtin_sync_mode
(fcode - BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_1);
target = expand_builtin_compare_and_swap (mode, exp, false, target);
if (target)
@@ -8137,7 +8137,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
unsigned int nargs, z;
vec<tree, va_gc> *vec;
- mode =
+ mode =
get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_COMPARE_EXCHANGE_1);
target = expand_builtin_atomic_compare_exchange (mode, exp, target);
if (target)
@@ -8186,7 +8186,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
{
enum built_in_function lib;
mode = get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_ADD_FETCH_1);
- lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_ADD_1 +
+ lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_ADD_1 +
(fcode - BUILT_IN_ATOMIC_ADD_FETCH_1));
target = expand_builtin_atomic_fetch_op (mode, exp, target, PLUS, true,
ignore, lib);
@@ -8202,7 +8202,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
{
enum built_in_function lib;
mode = get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_SUB_FETCH_1);
- lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_SUB_1 +
+ lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_SUB_1 +
(fcode - BUILT_IN_ATOMIC_SUB_FETCH_1));
target = expand_builtin_atomic_fetch_op (mode, exp, target, MINUS, true,
ignore, lib);
@@ -8218,7 +8218,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
{
enum built_in_function lib;
mode = get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_AND_FETCH_1);
- lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_AND_1 +
+ lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_AND_1 +
(fcode - BUILT_IN_ATOMIC_AND_FETCH_1));
target = expand_builtin_atomic_fetch_op (mode, exp, target, AND, true,
ignore, lib);
@@ -8234,7 +8234,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
{
enum built_in_function lib;
mode = get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_NAND_FETCH_1);
- lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_NAND_1 +
+ lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_NAND_1 +
(fcode - BUILT_IN_ATOMIC_NAND_FETCH_1));
target = expand_builtin_atomic_fetch_op (mode, exp, target, NOT, true,
ignore, lib);
@@ -8250,7 +8250,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
{
enum built_in_function lib;
mode = get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_XOR_FETCH_1);
- lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_XOR_1 +
+ lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_XOR_1 +
(fcode - BUILT_IN_ATOMIC_XOR_FETCH_1));
target = expand_builtin_atomic_fetch_op (mode, exp, target, XOR, true,
ignore, lib);
@@ -8266,7 +8266,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
{
enum built_in_function lib;
mode = get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_OR_FETCH_1);
- lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_OR_1 +
+ lib = (enum built_in_function)((int)BUILT_IN_ATOMIC_FETCH_OR_1 +
(fcode - BUILT_IN_ATOMIC_OR_FETCH_1));
target = expand_builtin_atomic_fetch_op (mode, exp, target, IOR, true,
ignore, lib);
@@ -8285,7 +8285,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
if (target)
return target;
break;
-
+
case BUILT_IN_ATOMIC_FETCH_SUB_1:
case BUILT_IN_ATOMIC_FETCH_SUB_2:
case BUILT_IN_ATOMIC_FETCH_SUB_4:
@@ -8309,7 +8309,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
if (target)
return target;
break;
-
+
case BUILT_IN_ATOMIC_FETCH_NAND_1:
case BUILT_IN_ATOMIC_FETCH_NAND_2:
case BUILT_IN_ATOMIC_FETCH_NAND_4:
@@ -8321,7 +8321,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
if (target)
return target;
break;
-
+
case BUILT_IN_ATOMIC_FETCH_XOR_1:
case BUILT_IN_ATOMIC_FETCH_XOR_2:
case BUILT_IN_ATOMIC_FETCH_XOR_4:
@@ -8333,7 +8333,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
if (target)
return target;
break;
-
+
case BUILT_IN_ATOMIC_FETCH_OR_1:
case BUILT_IN_ATOMIC_FETCH_OR_2:
case BUILT_IN_ATOMIC_FETCH_OR_4:
@@ -8351,7 +8351,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, machine_mode mode,
case BUILT_IN_ATOMIC_CLEAR:
return expand_builtin_atomic_clear (exp);
-
+
case BUILT_IN_ATOMIC_ALWAYS_LOCK_FREE:
return expand_builtin_atomic_always_lock_free (exp);
diff --git a/gcc/c-family/c-ada-spec.cc b/gcc/c-family/c-ada-spec.cc
index faf71742522..a763246218d 100644
--- a/gcc/c-family/c-ada-spec.cc
+++ b/gcc/c-family/c-ada-spec.cc
@@ -3176,7 +3176,7 @@ dump_ada_declaration (pretty_printer *buffer, tree t, tree type, int spc)
}
}
- TREE_VISITED (t) = 1;
+ TREE_VISITED (t) = 1;
if (is_interface)
{
pp_string (buffer, "limited interface -- ");
diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc
index ec2239c9390..4f897486fae 100644
--- a/gcc/c-family/c-attribs.cc
+++ b/gcc/c-family/c-attribs.cc
@@ -564,11 +564,11 @@ const struct attribute_spec c_common_attribute_table[] =
{ "tainted_args", 0, 0, true, false, false, false,
handle_tainted_args_attribute, NULL },
{ "fd_arg", 1, 1, false, true, true, false,
- handle_fd_arg_attribute, NULL},
+ handle_fd_arg_attribute, NULL},
{ "fd_arg_read", 1, 1, false, true, true, false,
handle_fd_arg_attribute, NULL},
{ "fd_arg_write", 1, 1, false, true, true, false,
- handle_fd_arg_attribute, NULL},
+ handle_fd_arg_attribute, NULL},
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
@@ -4577,7 +4577,7 @@ handle_nonnull_attribute (tree *node, tree name,
TREE_VALUE (args) = val;
else
{
- *no_add_attrs = true;
+ *no_add_attrs = true;
break;
}
args = next;
diff --git a/gcc/c-family/c-common.cc b/gcc/c-family/c-common.cc
index f08c89142e5..e01e79af3d6 100644
--- a/gcc/c-family/c-common.cc
+++ b/gcc/c-family/c-common.cc
@@ -171,7 +171,7 @@ machine_mode c_default_pointer_mode = VOIDmode;
*/
tree c_global_trees[CTI_MAX];
-\f
+
/* Switches common to the C front ends. */
/* Nonzero means don't output line number information. */
@@ -900,7 +900,7 @@ c_get_substring_location (const substring_loc &substr_loc,
out_loc);
}
-\f
+
/* Return true iff T is a boolean promoted to int. */
bool
@@ -1762,7 +1762,7 @@ convert_and_check (location_t loc, tree type, tree expr, bool init_const)
return result;
}
-\f
+
/* A node in a list that describes references to variables (EXPR), which are
either read accesses if WRITER is zero, or write accesses, in which case
WRITER is the parent of EXPR. */
@@ -2229,7 +2229,7 @@ verify_sequence_points (tree expr)
warn_for_collisions (after_sp);
obstack_free (&tlist_obstack, tlist_firstobj);
}
-\f
+
/* Validate the expression after `case' and apply default promotions. */
static tree
@@ -2251,7 +2251,7 @@ check_case_value (location_t loc, tree value)
return value;
}
-\f
+
/* Return an integer type with BITS bits of precision,
that is unsigned if UNSIGNEDP is nonzero, otherwise signed. */
@@ -2805,7 +2805,7 @@ c_register_builtin_type (tree type, const char* name)
registered_builtin_types = tree_cons (0, type, registered_builtin_types);
}
-\f
+
/* Print an error message for invalid operands to arith operation
CODE with TYPE0 for operand 0, and TYPE1 for operand 1.
RICHLOC is a rich location for the message, containing either
@@ -2878,7 +2878,7 @@ binary_op_error (rich_location *richloc, enum tree_code code,
"invalid operands to binary %s (have %qT and %qT)",
opname, type0, type1);
}
-\f
+
/* Given an expression as a tree, return its original type. Do this
by stripping any conversion that preserves the sign and precision. */
static tree
@@ -3216,14 +3216,14 @@ shorten_compare (location_t loc, tree *op0_ptr, tree *op1_ptr,
the comparison isn't an issue, so suppress the
warning. */
tree folded_op0 = fold_for_warn (op0);
- bool warn =
+ bool warn =
warn_type_limits && !in_system_header_at (loc)
&& !(TREE_CODE (folded_op0) == INTEGER_CST
&& !TREE_OVERFLOW (convert (c_common_signed_type (type),
folded_op0)))
/* Do not warn for enumeration types. */
&& (TREE_CODE (expr_original_type (folded_op0)) != ENUMERAL_TYPE);
-
+
switch (code)
{
case GE_EXPR:
@@ -3264,7 +3264,7 @@ shorten_compare (location_t loc, tree *op0_ptr, tree *op1_ptr,
return NULL_TREE;
}
-\f
+
/* Return a tree for the sum or difference (RESULTCODE says which)
of pointer PTROP and integer INTOP. */
@@ -3382,7 +3382,7 @@ pointer_int_sum (location_t loc, enum tree_code resultcode,
return ret;
}
-\f
+
/* Wrap a C_MAYBE_CONST_EXPR around an expression that is fully folded
and if NON_CONST is known not to be permitted in an evaluated part
of a constant expression. */
@@ -3738,7 +3738,7 @@ c_common_truthvalue_conversion (location_t location, tree expr)
protected_set_expr_location (expr, location);
return expr;
}
-\f
+
static void def_builtin_1 (enum built_in_function fncode,
const char *name,
enum built_in_class fnclass,
@@ -3825,7 +3825,7 @@ c_common_get_alias_set (tree t)
return -1;
}
-\f
+
/* Compute the value of 'sizeof (TYPE)' or '__alignof__ (TYPE)', where
the IS_SIZEOF parameter indicates which operator is being applied.
The COMPLAIN flag controls whether we should diagnose possibly
@@ -3974,7 +3974,7 @@ c_alignof_expr (location_t loc, tree expr)
return fold_convert_loc (loc, size_type_node, t);
}
-\f
+
/* Handle C and C++ default attributes. */
enum built_in_attribute
@@ -4947,7 +4947,7 @@ def_builtin_1 (enum built_in_function fncode,
add_builtin_function (libname, libtype, fncode, fnclass,
NULL, fnattrs);
}
-\f
+
/* Nonzero if the type T promotes to int. This is (nearly) the
integral promotions defined in ISO C99 6.3.1.1/2. */
@@ -5309,7 +5309,7 @@ finish_label_address_expr (tree label, location_t loc)
return result;
}
-\f
+
/* Given a boolean expression ARG, return a tree representing an increment
or decrement (as indicated by CODE) of ARG. The front end must check for
@@ -5349,7 +5349,7 @@ boolean_increment (enum tree_code code, tree arg)
TREE_SIDE_EFFECTS (val) = 1;
return val;
}
-\f
+
/* Built-in macros for stddef.h and stdint.h, that require macros
defined in this file. */
void
@@ -6046,7 +6046,7 @@ attribute_fallthrough_p (tree attr)
return true;
}
-\f
+
/* Check for valid arguments being passed to a function with FNTYPE.
There are NARGS arguments in the array ARGARRAY. LOC should be used
for diagnostics. Return true if either -Wnonnull or -Wrestrict has
@@ -6837,7 +6837,7 @@ fold_offsetof (tree expr, tree type, enum tree_code ctx)
return size_binop (PLUS_EXPR, base, convert (type, off));
return fold_build_pointer_plus (base, off);
}
-\f
+
/* *PTYPE is an incomplete array. Complete it with a domain based on
INITIAL_VALUE. If INITIAL_VALUE is not present, use 1 if DO_DEFAULT
is true. Return 0 if successful, 1 if INITIAL_VALUE can't be deciphered,
@@ -7006,9 +7006,9 @@ complete_flexible_array_elts (tree init)
}
/* Like c_mark_addressable but don't check register qualifier. */
-void
+void
c_common_mark_addressable_vec (tree t)
-{
+{
while (handled_component_p (t) || TREE_CODE (t) == C_MAYBE_CONST_EXPR)
{
if (TREE_CODE (t) == C_MAYBE_CONST_EXPR)
@@ -7030,7 +7030,7 @@ c_common_mark_addressable_vec (tree t)
}
-\f
+
/* Used to help initialize the builtin-types.def table. When a type of
the correct size doesn't exist, use error_mark_node instead of NULL.
The later results in segfaults even when a decl using the type doesn't
@@ -7382,7 +7382,7 @@ get_atomic_generic_size (location_t loc, tree function,
/* Types must be compile time constant sizes. */
if (!tree_fits_uhwi_p ((TYPE_SIZE_UNIT (TREE_TYPE (type_0)))))
{
- error_at (loc,
+ error_at (loc,
"argument 1 of %qE must be a pointer to a constant size type",
function);
return 0;
@@ -7393,7 +7393,7 @@ get_atomic_generic_size (location_t loc, tree function,
/* Zero size objects are not allowed. */
if (size_0 == 0)
{
- error_at (loc,
+ error_at (loc,
"argument 1 of %qE must be a pointer to a nonzero size object",
function);
return 0;
@@ -7507,12 +7507,12 @@ get_atomic_generic_size (location_t loc, tree function,
/* This will take an __atomic_ generic FUNCTION call, and add a size parameter N
at the beginning of the parameter list PARAMS representing the size of the
objects. This is to match the library ABI requirement. LOC is the location
- of the function call.
+ of the function call.
The new function is returned if it needed rebuilding, otherwise NULL_TREE is
returned to allow the external call to be constructed. */
static tree
-add_atomic_size_parameter (unsigned n, location_t loc, tree function,
+add_atomic_size_parameter (unsigned n, location_t loc, tree function,
vec<tree, va_gc> *params)
{
tree size_node;
@@ -7570,12 +7570,12 @@ atomic_size_supported_p (int n)
PARAMS is the argument list for the call. The return value is non-null
TRUE is returned if it is translated into the proper format for a call to the
external library, and NEW_RETURN is set the tree for that function.
- FALSE is returned if processing for the _N variation is required, and
+ FALSE is returned if processing for the _N variation is required, and
NEW_RETURN is set to the return value the result is copied into. */
static bool
-resolve_overloaded_atomic_exchange (location_t loc, tree function,
+resolve_overloaded_atomic_exchange (location_t loc, tree function,
vec<tree, va_gc> *params, tree *new_return)
-{
+{
tree p0, p1, p2, p3;
tree I_type, I_type_ptr;
int n = get_atomic_generic_size (loc, function, params);
@@ -7603,14 +7603,14 @@ resolve_overloaded_atomic_exchange (location_t loc, tree function,
p1 = (*params)[1];
p2 = (*params)[2];
p3 = (*params)[3];
-
+
/* Create pointer to appropriate size. */
I_type = builtin_type_for_size (BITS_PER_UNIT * n, 1);
I_type_ptr = build_pointer_type (I_type);
/* Convert object pointer to required type. */
p0 = build1 (VIEW_CONVERT_EXPR, I_type_ptr, p0);
- (*params)[0] = p0;
+ (*params)[0] = p0;
/* Convert new value to required type, and dereference it. */
p1 = build_indirect_ref (loc, p1, RO_UNARY_STAR);
p1 = build1 (VIEW_CONVERT_EXPR, I_type, p1);
@@ -7627,7 +7627,7 @@ resolve_overloaded_atomic_exchange (location_t loc, tree function,
}
-/* This will process an __atomic_compare_exchange function call, determine
+/* This will process an __atomic_compare_exchange function call, determine
whether it needs to be mapped to the _N variation, or turned into a lib call.
LOC is the location of the builtin call.
FUNCTION is the DECL that has been invoked;
@@ -7637,10 +7637,10 @@ resolve_overloaded_atomic_exchange (location_t loc, tree function,
FALSE is returned if processing for the _N variation is required. */
static bool
-resolve_overloaded_atomic_compare_exchange (location_t loc, tree function,
- vec<tree, va_gc> *params,
+resolve_overloaded_atomic_compare_exchange (location_t loc, tree function,
+ vec<tree, va_gc> *params,
tree *new_return)
-{
+{
tree p0, p1, p2;
tree I_type, I_type_ptr;
int n = get_atomic_generic_size (loc, function, params);
@@ -7655,7 +7655,7 @@ resolve_overloaded_atomic_compare_exchange (location_t loc, tree function,
/* If not a lock-free size, change to the library generic format. */
if (!atomic_size_supported_p (n))
{
- /* The library generic format does not have the weak parameter, so
+ /* The library generic format does not have the weak parameter, so
remove it from the param list. Since a parameter has been removed,
we can be sure that there is room for the SIZE_T parameter, meaning
there will not be a recursive rebuilding of the parameter list, so
@@ -7678,7 +7678,7 @@ resolve_overloaded_atomic_compare_exchange (location_t loc, tree function,
p0 = (*params)[0];
p1 = (*params)[1];
p2 = (*params)[2];
-
+
/* Create pointer to appropriate size. */
I_type = builtin_type_for_size (BITS_PER_UNIT * n, 1);
I_type_ptr = build_pointer_type (I_type);
@@ -7710,13 +7710,13 @@ resolve_overloaded_atomic_compare_exchange (location_t loc, tree function,
PARAMS is the argument list for the call. The return value is non-null
TRUE is returned if it is translated into the proper format for a call to the
external library, and NEW_RETURN is set the tree for that function.
- FALSE is returned if processing for the _N variation is required, and
+ FALSE is returned if processing for the _N variation is required, and
NEW_RETURN is set to the return value the result is copied into. */
static bool
-resolve_overloaded_atomic_load (location_t loc, tree function,
+resolve_overloaded_atomic_load (location_t loc, tree function,
vec<tree, va_gc> *params, tree *new_return)
-{
+{
tree p0, p1, p2;
tree I_type, I_type_ptr;
int n = get_atomic_generic_size (loc, function, params);
@@ -7743,7 +7743,7 @@ resolve_overloaded_atomic_load (location_t loc, tree function,
p0 = (*params)[0];
p1 = (*params)[1];
p2 = (*params)[2];
-
+
/* Create pointer to appropriate size. */
I_type = builtin_type_for_size (BITS_PER_UNIT * n, 1);
I_type_ptr = build_pointer_type (I_type);
@@ -7770,13 +7770,13 @@ resolve_overloaded_atomic_load (location_t loc, tree function,
PARAMS is the argument list for the call. The return value is non-null
TRUE is returned if it is translated into the proper format for a call to the
external library, and NEW_RETURN is set the tree for that function.
- FALSE is returned if processing for the _N variation is required, and
+ FALSE is returned if processing for the _N variation is required, and
NEW_RETURN is set to the return value the result is copied into. */
static bool
-resolve_overloaded_atomic_store (location_t loc, tree function,
+resolve_overloaded_atomic_store (location_t loc, tree function,
vec<tree, va_gc> *params, tree *new_return)
-{
+{
tree p0, p1;
tree I_type, I_type_ptr;
int n = get_atomic_generic_size (loc, function, params);
@@ -7802,7 +7802,7 @@ resolve_overloaded_atomic_store (location_t loc, tree function,
p0 = (*params)[0];
p1 = (*params)[1];
-
+
/* Create pointer to appropriate size. */
I_type = builtin_type_for_size (BITS_PER_UNIT * n, 1);
I_type_ptr = build_pointer_type (I_type);
@@ -7815,7 +7815,7 @@ resolve_overloaded_atomic_store (location_t loc, tree function,
p1 = build_indirect_ref (loc, p1, RO_UNARY_STAR);
p1 = build1 (VIEW_CONVERT_EXPR, I_type, p1);
(*params)[1] = p1;
-
+
/* The memory model is in the right spot already. Return is void. */
*new_return = NULL_TREE;
@@ -9152,7 +9152,7 @@ c_family_tests (void)
#endif /* #if CHECKING_P */
/* Attempt to locate a suitable location within FILE for a
- #include directive to be inserted before.
+ #include directive to be inserted before.
LOC is the location of the relevant diagnostic.
Attempt to return the location within FILE immediately
diff --git a/gcc/c-family/c-common.h b/gcc/c-family/c-common.h
index f9d0d2945a5..bee2e2458f0 100644
--- a/gcc/c-family/c-common.h
+++ b/gcc/c-family/c-common.h
@@ -80,7 +80,7 @@ enum rid
are keywords only in specific contexts) */
RID_IN, RID_OUT, RID_INOUT, RID_BYCOPY, RID_BYREF, RID_ONEWAY,
- /* ObjC ("PATTR" reserved words - they do not appear after a '@'
+ /* ObjC ("PATTR" reserved words - they do not appear after a '@'
and are keywords only as property attributes) */
RID_GETTER, RID_SETTER,
RID_READONLY, RID_READWRITE,
@@ -201,7 +201,7 @@ enum rid
RID_AT_PRIVATE, RID_AT_PROTECTED, RID_AT_PUBLIC, RID_AT_PACKAGE,
RID_AT_PROTOCOL, RID_AT_SELECTOR,
RID_AT_THROW, RID_AT_TRY, RID_AT_CATCH,
- RID_AT_FINALLY, RID_AT_SYNCHRONIZED,
+ RID_AT_FINALLY, RID_AT_SYNCHRONIZED,
RID_AT_OPTIONAL, RID_AT_REQUIRED, RID_AT_PROPERTY,
RID_AT_SYNTHESIZE, RID_AT_DYNAMIC,
RID_AT_INTERFACE,
@@ -626,7 +626,7 @@ extern tree build_indirect_ref (location_t, tree, ref_operator);
extern bool has_c_linkage (const_tree decl);
extern bool c_decl_implicit (const_tree);
-\f
+
/* Switches common to the C front ends. */
/* Nonzero means don't output line number information. */
diff --git a/gcc/c-family/c-cppbuiltin.cc b/gcc/c-family/c-cppbuiltin.cc
index 35f3919dfa0..da2dc27fcef 100644
--- a/gcc/c-family/c-cppbuiltin.cc
+++ b/gcc/c-family/c-cppbuiltin.cc
@@ -660,7 +660,7 @@ c_cpp_builtins_optimize_pragma (cpp_reader *pfile, tree prev_tree,
/* This function will emit cpp macros to indicate the presence of various lock
free atomic operations. */
-
+
static void
cpp_atomic_builtins (cpp_reader *pfile)
{
@@ -741,26 +741,26 @@ cpp_atomic_builtins (cpp_reader *pfile)
lock free. */
#define SIZEOF_NODE(T) (tree_to_uhwi (TYPE_SIZE_UNIT (T)))
#define SWAP_INDEX(T) ((SIZEOF_NODE (T) < SWAP_LIMIT) ? SIZEOF_NODE (T) : 0)
- builtin_define_with_int_value ("__GCC_ATOMIC_BOOL_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_BOOL_LOCK_FREE",
(have_swap[SWAP_INDEX (boolean_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_CHAR_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_CHAR_LOCK_FREE",
(have_swap[SWAP_INDEX (signed_char_type_node)]? 2 : 1));
if (flag_char8_t)
builtin_define_with_int_value ("__GCC_ATOMIC_CHAR8_T_LOCK_FREE",
(have_swap[SWAP_INDEX (char8_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_CHAR16_T_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_CHAR16_T_LOCK_FREE",
(have_swap[SWAP_INDEX (char16_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_CHAR32_T_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_CHAR32_T_LOCK_FREE",
(have_swap[SWAP_INDEX (char32_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_WCHAR_T_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_WCHAR_T_LOCK_FREE",
(have_swap[SWAP_INDEX (wchar_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_SHORT_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_SHORT_LOCK_FREE",
(have_swap[SWAP_INDEX (short_integer_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_INT_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_INT_LOCK_FREE",
(have_swap[SWAP_INDEX (integer_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_LONG_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_LONG_LOCK_FREE",
(have_swap[SWAP_INDEX (long_integer_type_node)]? 2 : 1));
- builtin_define_with_int_value ("__GCC_ATOMIC_LLONG_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_LLONG_LOCK_FREE",
(have_swap[SWAP_INDEX (long_long_integer_type_node)]? 2 : 1));
/* If we're dealing with a "set" value that doesn't exactly correspond
@@ -787,7 +787,7 @@ cpp_atomic_builtins (cpp_reader *pfile)
psize = POINTER_SIZE_UNITS;
if (psize >= SWAP_LIMIT)
psize = 0;
- builtin_define_with_int_value ("__GCC_ATOMIC_POINTER_LOCK_FREE",
+ builtin_define_with_int_value ("__GCC_ATOMIC_POINTER_LOCK_FREE",
(have_swap[psize]? 2 : 1));
}
@@ -1782,7 +1782,7 @@ struct GTY(()) lazy_hex_fp_value_struct
Each builtin_define_float_constants invocation calls
builtin_define_with_hex_fp_value 5 times and builtin_define_float_constants
is called for FLT, DBL, LDBL and up to NUM_FLOATN_NX_TYPES times for
- FLTNN*. */
+ FLTNN*. */
#define LAZY_HEX_FP_VALUES_CNT (5 * (3 + NUM_FLOATN_NX_TYPES))
static GTY(()) struct lazy_hex_fp_value_struct
lazy_hex_fp_values[LAZY_HEX_FP_VALUES_CNT];
diff --git a/gcc/c-family/c-format.cc b/gcc/c-family/c-format.cc
index 08643c5da7a..dd5273e1066 100644
--- a/gcc/c-family/c-format.cc
+++ b/gcc/c-family/c-format.cc
@@ -147,12 +147,12 @@ format_warning_substr (location_t fmt_string_loc, tree format_string_cst,
/* Check that we have a pointer to a string suitable for use as a format.
The default is to check for a char type.
For objective-c dialects, this is extended to include references to string
- objects validated by objc_string_ref_type_p ().
- Targets may also provide a string object type that can be used within c and
+ objects validated by objc_string_ref_type_p ().
+ Targets may also provide a string object type that can be used within c and
c++ and shared with their respective objective-c dialects. In this case the
reference to a format string is checked for validity via a hook.
-
- The function returns true if strref points to any string type valid for the
+
+ The function returns true if strref points to any string type valid for the
language dialect and target. */
bool
@@ -203,8 +203,8 @@ handle_format_arg_attribute (tree *node, tree atname,
}
/* Verify that the format_num argument is actually a string reference suitable,
- for the language dialect and target (in case the format attribute is in
- error). When we know the specific reference type expected, this is also
+ for the language dialect and target (in case the format attribute is in
+ error). When we know the specific reference type expected, this is also
checked. */
static bool
check_format_string (const_tree fntype, unsigned HOST_WIDE_INT format_num,
@@ -238,7 +238,7 @@ check_format_string (const_tree fntype, unsigned HOST_WIDE_INT format_num,
return true;
/* Now check that the arg matches the expected type. */
- is_char_ref =
+ is_char_ref =
(TYPE_MAIN_VARIANT (TREE_TYPE (ref)) == char_type_node);
fmt_flags = format_flags (expected_format_type);
@@ -272,18 +272,18 @@ check_format_string (const_tree fntype, unsigned HOST_WIDE_INT format_num,
*no_add_attrs = true;
return false;
}
-
+
/* We will assert that objective-c will support either its own string type
or the target-supplied variant. */
if (!is_objc_sref)
is_target_sref = (*targetcm.string_object_ref_type_p) ((const_tree) ref);
- if (expected_format_type == (int) gcc_objc_string_format_type
+ if (expected_format_type == (int) gcc_objc_string_format_type
&& (is_objc_sref || is_target_sref))
return true;
/* We will allow a target string ref to match only itself. */
- if (first_target_format_type
+ if (first_target_format_type
&& expected_format_type >= first_target_format_type
&& is_target_sref)
return true;
@@ -389,7 +389,7 @@ decode_format_attr (const_tree fn, tree atname, tree args,
return true;
}
-\f
+
/* Check a call to a format function against a parameter list. */
/* The C standard version C++ is treated as equivalent to
@@ -1162,7 +1162,7 @@ decode_format_type (const char *s, bool *is_raw /* = NULL */)
return format_type_error;
}
-\f
+
/* Check the argument list of a call to printf, scanf, etc.
ATTRS are the attributes on the function type. There are NARGS argument
values in the array ARGARRAY. FN is either a function declaration or
@@ -1657,7 +1657,7 @@ check_format_arg (void *ctx, tree format_tree,
if (params == 0)
res->number_other++;
- else
+ else
{
if (res->number_extra_args == 0)
res->extra_arg_loc = EXPR_LOC_OR_LOC (TREE_VALUE (params),
@@ -1698,7 +1698,7 @@ check_format_arg (void *ctx, tree format_tree,
}
res->format_string_loc = EXPR_LOC_OR_LOC (format_tree, input_location);
format_tree = TREE_OPERAND (format_tree, 0);
- if (format_types[info->format_type].flags
+ if (format_types[info->format_type].flags
& (int) FMT_FLAG_PARSE_ARG_CONVERT_EXTERNAL)
{
bool objc_str = (info->format_type == gcc_objc_string_format_type);
@@ -1706,7 +1706,7 @@ check_format_arg (void *ctx, tree format_tree,
a valid type. */
if (TREE_CODE (format_tree) != CONST_DECL
|| !((objc_str && objc_string_ref_type_p (TREE_TYPE (format_tree)))
- || (*targetcm.string_object_ref_type_p)
+ || (*targetcm.string_object_ref_type_p)
((const_tree) TREE_TYPE (format_tree))))
{
res->number_non_literal++;
diff --git a/gcc/c-family/c-indentation.cc b/gcc/c-family/c-indentation.cc
index 85a3ae1b303..cd9c9546e06 100644
--- a/gcc/c-family/c-indentation.cc
+++ b/gcc/c-family/c-indentation.cc
@@ -320,7 +320,7 @@ should_warn_for_misleading_indentation (const token_indent_info &guard_tinfo,
" the size of the code/headers");
if (!flag_large_source_files)
inform (guard_loc,
- "adding %<-flarge-source-files%> will allow for more"
+ "adding %<-flarge-source-files%> will allow for more"
" column-tracking support, at the expense of compilation"
" time and memory");
}
diff --git a/gcc/c-family/c-lex.cc b/gcc/c-family/c-lex.cc
index 2fe562c7ccf..0ca7891d6be 100644
--- a/gcc/c-family/c-lex.cc
+++ b/gcc/c-family/c-lex.cc
@@ -57,7 +57,7 @@ static void cb_ident (cpp_reader *, unsigned int, const cpp_string *);
static void cb_def_pragma (cpp_reader *, unsigned int);
static void cb_define (cpp_reader *, unsigned int, cpp_hashnode *);
static void cb_undef (cpp_reader *, unsigned int, cpp_hashnode *);
-\f
+
void
init_c_lex (void)
{
@@ -480,7 +480,7 @@ c_common_has_builtin (cpp_reader *pfile)
return names_builtin_p (name);
}
-\f
+
/* Read a token and return its type. Fill *VALUE with its value, if
applicable. Fill *CPP_FLAGS with the token's flags, if it is
non-NULL. */
diff --git a/gcc/c-family/c-objc.h b/gcc/c-family/c-objc.h
index da0ab3c9ee4..11fe9681ab0 100644
--- a/gcc/c-family/c-objc.h
+++ b/gcc/c-family/c-objc.h
@@ -163,7 +163,7 @@ extern void objc_add_property_declaration (location_t, tree,
extern tree objc_maybe_build_component_ref (tree, tree);
extern tree objc_build_class_component_ref (tree, tree);
extern tree objc_maybe_build_modify_expr (tree, tree);
-extern tree objc_build_incr_expr_for_property_ref (location_t, enum tree_code,
+extern tree objc_build_incr_expr_for_property_ref (location_t, enum tree_code,
tree, tree);
extern void objc_add_synthesize_declaration (location_t, tree);
extern void objc_add_dynamic_declaration (location_t, tree);
diff --git a/gcc/c-family/c-omp.cc b/gcc/c-family/c-omp.cc
index 2ab99112696..783ae78a9e6 100644
--- a/gcc/c-family/c-omp.cc
+++ b/gcc/c-family/c-omp.cc
@@ -203,7 +203,7 @@ c_finish_omp_taskyield (location_t loc)
/* Complete a #pragma omp atomic construct. For CODE OMP_ATOMIC
- the expression to be implemented atomically is LHS opcode= RHS.
+ the expression to be implemented atomically is LHS opcode= RHS.
For OMP_ATOMIC_READ V = LHS, for OMP_ATOMIC_CAPTURE_{NEW,OLD} LHS
opcode= RHS with the new or old content of LHS returned.
LOC is the location of the atomic statement. The value returned
@@ -1322,7 +1322,7 @@ c_omp_is_loop_iterator (tree decl, struct c_omp_check_loop_iv_data *d)
/* Helper function called via walk_tree, to diagnose uses
of associated loop IVs inside of lb, b and incr expressions
of OpenMP loops. */
-
+
static tree
c_omp_check_loop_iv_r (tree *tp, int *walk_subtrees, void *data)
{
diff --git a/gcc/c-family/c-opts.cc b/gcc/c-family/c-opts.cc
index 70745aa4e7c..4de6a251f48 100644
--- a/gcc/c-family/c-opts.cc
+++ b/gcc/c-family/c-opts.cc
@@ -139,7 +139,7 @@ static struct deferred_opt
} *deferred_opts;
-extern const unsigned int
+extern const unsigned int
c_family_lang_mask = (CL_C | CL_CXX | CL_ObjC | CL_ObjCXX);
/* Defer option CODE with argument ARG. */
@@ -730,15 +730,15 @@ c_common_handle_option (size_t scode, const char *arg, HOST_WIDE_INT value,
switch (c_language)
{
case clk_c:
- C_handle_option_auto (&global_options, &global_options_set,
- scode, arg, value,
+ C_handle_option_auto (&global_options, &global_options_set,
+ scode, arg, value,
c_family_lang_mask, kind,
loc, handlers, global_dc);
break;
case clk_objc:
ObjC_handle_option_auto (&global_options, &global_options_set,
- scode, arg, value,
+ scode, arg, value,
c_family_lang_mask, kind,
loc, handlers, global_dc);
break;
@@ -1416,7 +1416,7 @@ sanitize_cpp_opts (void)
/* Wlong-long is disabled by default. It is enabled by:
[-Wpedantic | -Wtraditional] -std=[gnu|c]++98 ; or
- [-Wpedantic | -Wtraditional] -std=non-c99
+ [-Wpedantic | -Wtraditional] -std=non-c99
Either -Wlong-long or -Wno-long-long override any other settings.
??? These conditions should be handled in c.opt. */
@@ -1621,13 +1621,13 @@ cb_file_change (cpp_reader *reader, const line_map_ordinary *new_map)
/* We're starting the main file. Inform the FE of that. */
lang_hooks.preprocess_main_file (reader, line_table, new_map);
- if (new_map
+ if (new_map
&& (new_map->reason == LC_ENTER || new_map->reason == LC_RENAME))
{
/* Signal to plugins that a file is included. This could happen
several times with the same file path, e.g. because of
several '#include' or '#line' directives... */
- invoke_plugin_callbacks
+ invoke_plugin_callbacks
(PLUGIN_INCLUDE_FILE,
const_cast<char*> (ORDINARY_MAP_FILE_NAME (new_map)));
}
diff --git a/gcc/c-family/c-ppoutput.cc b/gcc/c-family/c-ppoutput.cc
index 6e054358e9e..a622df80792 100644
--- a/gcc/c-family/c-ppoutput.cc
+++ b/gcc/c-family/c-ppoutput.cc
@@ -196,7 +196,7 @@ class token_streamer
print.streamer = this;
}
- void begin_pragma ()
+ void begin_pragma ()
{
in_pragma = true;
}
diff --git a/gcc/c-family/c-pragma.cc b/gcc/c-family/c-pragma.cc
index 142a46441ac..a3b51709c5f 100644
--- a/gcc/c-family/c-pragma.cc
+++ b/gcc/c-family/c-pragma.cc
@@ -1892,7 +1892,7 @@ init_pragma (void)
#endif
global_sso = default_sso;
- c_register_pragma (0, "scalar_storage_order",
+ c_register_pragma (0, "scalar_storage_order",
handle_pragma_scalar_storage_order);
/* Allow plugins to register their own pragmas. */
diff --git a/gcc/c-family/c-pretty-print.cc b/gcc/c-family/c-pretty-print.cc
index c99b2ceffe6..83c0fa1771f 100644
--- a/gcc/c-family/c-pretty-print.cc
+++ b/gcc/c-family/c-pretty-print.cc
@@ -66,7 +66,7 @@ static void pp_c_logical_and_expression (c_pretty_printer *, tree);
/* declarations. */
-\f
+
/* Helper functions. */
void
@@ -219,7 +219,7 @@ pp_c_space_for_pointer_operator (c_pretty_printer *pp, tree t)
}
}
-\f
+
/* Declarations. */
/* C++ cv-qualifiers are called type-qualifiers in C. Print out the
@@ -942,7 +942,7 @@ pp_c_function_definition (c_pretty_printer *pp, tree t)
pp_newline_and_flush (pp);
}
-\f
+
/* Expressions. */
/* Print out a c-char. This is called solely for characters which are
@@ -2810,7 +2810,7 @@ c_pretty_printer::expression (tree e)
}
-\f
+
/* Statements. */
void
@@ -2907,7 +2907,7 @@ c_pretty_printer::statement (tree t)
}
}
-\f
+
/* Initialize the PRETTY-PRINTER for handling C codes. */
c_pretty_printer::c_pretty_printer ()
diff --git a/gcc/c-family/c-ubsan.cc b/gcc/c-family/c-ubsan.cc
index 360ba82250c..6ef480149e7 100644
--- a/gcc/c-family/c-ubsan.cc
+++ b/gcc/c-family/c-ubsan.cc
@@ -549,7 +549,7 @@ ubsan_maybe_instrument_reference (tree *stmt_p)
UBSAN_REF_BINDING);
if (op)
{
- if (TREE_CODE (stmt) == NOP_EXPR)
+ if (TREE_CODE (stmt) == NOP_EXPR)
TREE_OPERAND (stmt, 0) = op;
else
*stmt_p = op;
diff --git a/gcc/c-family/stub-objc.cc b/gcc/c-family/stub-objc.cc
index 00498652703..23eacd526be 100644
--- a/gcc/c-family/stub-objc.cc
+++ b/gcc/c-family/stub-objc.cc
@@ -127,7 +127,7 @@ objc_start_protocol (tree ARG_UNUSED (proto),
{
}
-void
+void
objc_set_method_opt (bool ARG_UNUSED (optional))
{
}
@@ -217,7 +217,7 @@ objc_finish_method_definition (tree ARG_UNUSED (fndecl))
{
}
-bool
+bool
objc_method_decl (enum tree_code ARG_UNUSED(opcode))
{
return false;
@@ -316,7 +316,7 @@ objc_get_class_ivars (tree ARG_UNUSED (name))
}
void
-objc_add_property_declaration (location_t ARG_UNUSED (location),
+objc_add_property_declaration (location_t ARG_UNUSED (location),
tree ARG_UNUSED (decl),
vec<property_attribute_info *>&
/*prop_attr_list*/)
@@ -363,19 +363,19 @@ objc_build_incr_expr_for_property_ref (location_t ARG_UNUSED (location),
}
void
-objc_add_synthesize_declaration (location_t ARG_UNUSED (start_locus),
+objc_add_synthesize_declaration (location_t ARG_UNUSED (start_locus),
tree ARG_UNUSED (property_and_ivar_list))
{
}
void
-objc_add_dynamic_declaration (location_t ARG_UNUSED (start_locus),
+objc_add_dynamic_declaration (location_t ARG_UNUSED (start_locus),
tree ARG_UNUSED (property_list))
{
}
const char *
-objc_maybe_printable_name (tree ARG_UNUSED (decl),
+objc_maybe_printable_name (tree ARG_UNUSED (decl),
int ARG_UNUSED (v))
{
return NULL;
@@ -449,7 +449,7 @@ objc_string_ref_type_p (tree ARG_UNUSED (strp))
}
void
-objc_check_format_arg (tree ARG_UNUSED (format_arg),
+objc_check_format_arg (tree ARG_UNUSED (format_arg),
tree ARG_UNUSED (args_list))
{
}
diff --git a/gcc/c/c-aux-info.cc b/gcc/c/c-aux-info.cc
index bf0131541d6..d7f04eecf7f 100644
--- a/gcc/c/c-aux-info.cc
+++ b/gcc/c/c-aux-info.cc
@@ -40,7 +40,7 @@ static const char *gen_formal_list_for_type (tree, formals_style);
static const char *gen_formal_list_for_func_def (tree, formals_style);
static const char *gen_type (const char *, tree, formals_style);
static const char *gen_decl (tree, int, formals_style);
-\f
+
/* Given a string representing an entire type or an entire declaration
which only lacks the actual "data-type" specifier (at its left end),
affix the data-type specifier to the left end of the given type
diff --git a/gcc/c/c-convert.cc b/gcc/c/c-convert.cc
index 8a43e5f6f33..6a94712e461 100644
--- a/gcc/c/c-convert.cc
+++ b/gcc/c/c-convert.cc
@@ -51,11 +51,11 @@ along with GCC; see the file COPYING3. If not see
In expr.cc: expand_expr, for operands of a MULT_EXPR.
In fold-const.cc: fold.
In tree.cc: get_narrower and get_unwidened. */
-\f
+
/* Subroutines of `convert'. */
-\f
+
/* Create an expression whose value is that of EXPR,
converted to type TYPE. The TREE_TYPE of the value
is always TYPE. This function implements all reasonable
diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index e47ca6718b3..4fd1f834e8b 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -85,7 +85,7 @@ enum deprecated_states {
UNAVAILABLE_DEPRECATED_SUPPRESS
};
-\f
+
/* Nonzero if we have seen an invalid cross reference
to a struct, union, or enum, but not yet printed the message. */
tree pending_invalid_xref;
@@ -160,7 +160,7 @@ vec<c_omp_declare_target_attr, va_gc> *current_omp_declare_target_attribute;
/* If non-zero, we are inside of
#pragma omp begin assumes ... #pragma omp end assumes region. */
int current_omp_begin_assumes;
-\f
+
/* Each c_binding structure describes one binding of an identifier to
a decl. All the decls in a scope - irrespective of namespace - are
chained together by the ->prev field, which (as the name implies)
@@ -619,7 +619,7 @@ static void layout_array_type (tree);
static void warn_defaults_to (location_t, int, const char *, ...)
ATTRIBUTE_GCC_DIAG(3,4);
static const char *header_for_builtin_fn (tree);
-\f
+
/* T is a statement. Add it to the statement-tree. This is the
C/ObjC version--C++ has a slightly different version of this
function. */
@@ -646,7 +646,7 @@ add_stmt (tree t)
return t;
}
-\f
+
/* Build a pointer type using the default pointer mode. */
static tree
@@ -663,7 +663,7 @@ c_build_pointer_type (tree to_type)
return build_pointer_type_for_mode (to_type, pointer_mode, false);
}
-\f
+
/* Return true if we will want to say something if a goto statement
crosses DECL. */
@@ -696,7 +696,7 @@ decl_jump_unsafe (tree decl)
return false;
}
-\f
+
void
c_print_identifier (FILE *file, tree node, int indent)
@@ -823,7 +823,7 @@ bind_label (tree name, tree label, struct c_scope *scope,
label_vars->shadowed = b->u.label;
b->u.label = label_vars;
}
-\f
+
/* Hook called at end of compilation to assume 1 elt
for a file-scope tentative array defn that wasn't complete before. */
@@ -847,7 +847,7 @@ c_finish_incomplete_decl (tree decl)
}
}
}
-\f
+
/* Record that inline function FUNC contains a reference (location
LOC) to static DECL (file-scope or function-local according to
TYPE). */
@@ -894,7 +894,7 @@ check_inline_statics (void)
}
c_inline_statics = NULL;
}
-\f
+
/* Fill in a c_spot_bindings structure. If DEFINING is true, set it
for the current state, otherwise set it to uninitialized. */
@@ -936,7 +936,7 @@ update_spot_bindings (struct c_scope *scope, struct c_spot_bindings *p)
return true;
}
-\f
+
/* The Objective-C front-end often needs to determine the current scope. */
void *
@@ -1471,7 +1471,7 @@ pop_file_scope (void)
maybe_apply_pending_pragma_weaks ();
}
-\f
+
/* Whether we are curently inside the initializer for an
underspecified object definition (C2x auto or constexpr). */
static bool in_underspecified_init;
@@ -1541,7 +1541,7 @@ finish_underspecified_init (tree name, unsigned int prev_state)
}
in_underspecified_init = (prev_state & (1u << 1)) >> 1;
}
-\f
+
/* Adjust the bindings for the start of a statement expression. */
void
@@ -1622,7 +1622,7 @@ c_bindings_end_stmt_expr (struct c_spot_bindings *switch_bindings)
gcc_assert (switch_bindings->stmt_exprs >= 0);
}
}
-\f
+
/* Push a definition or a declaration of struct, union or enum tag "name".
"type" should be the type node.
We assume that the tag "name" is not already defined, and has a location
@@ -1722,7 +1722,7 @@ c_bind (location_t loc, tree decl, bool is_global)
bind (DECL_NAME (decl), decl, scope, false, nested, loc);
}
-\f
+
/* Stores the first FILE*, const struct tm* etc. argument type (whatever
it is) seen in a declaration of a file I/O etc. built-in, corresponding
@@ -2666,7 +2666,7 @@ merge_decls (tree newdecl, tree olddecl, tree newtype, tree oldtype)
= TYPE_NEXT_VARIANT (TYPE_NEXT_VARIANT (t));
break;
}
- }
+ }
else
for (tree t = TYPE_MAIN_VARIANT (remove); ;
t = TYPE_NEXT_VARIANT (t))
@@ -3088,7 +3088,7 @@ duplicate_decls (tree newdecl, tree olddecl)
return true;
}
-\f
+
/* Check whether decl-node NEW_DECL shadows an existing declaration. */
static void
warn_if_shadowing (tree new_decl)
@@ -3449,7 +3449,7 @@ pushdecl (tree x)
}
return x;
}
-\f
+
/* Issue a warning about implicit function declaration. ID is the function
identifier, OLDDECL is a declaration of the function in a different scope,
@@ -3904,7 +3904,7 @@ undeclared_variable (location_t loc, tree id)
bind (id, error_mark_node, scope, /*invisible=*/false, /*nested=*/false,
UNKNOWN_LOCATION);
}
-\f
+
/* Subroutine of lookup_label, declare_label, define_label: construct a
LABEL_DECL with all the proper frills. Also create a struct
c_label_vars initialized for the current scope. */
@@ -4198,7 +4198,7 @@ define_label (location_t location, tree name)
DECL_INITIAL (label) = error_mark_node;
return label;
}
-\f
+
/* Get the bindings for a new switch statement. This is used to issue
warnings as appropriate for jumps from the switch to case or
default labels. */
@@ -4281,7 +4281,7 @@ c_check_switch_jump_warnings (struct c_spot_bindings *switch_bindings,
return saw_error;
}
-\f
+
/* Given NAME, an IDENTIFIER_NODE,
return the structure (or union or enum) definition for that name.
If THISLEVEL_ONLY is nonzero, searches only the current_scope.
@@ -4363,7 +4363,7 @@ pending_xref_error (void)
pending_invalid_xref = NULL_TREE;
}
-\f
+
/* Look up NAME in the current scope and its superiors
in the namespace of variables, functions and typedefs.
Return a ..._DECL node of some kind representing its definition,
@@ -4533,7 +4533,7 @@ lookup_name_fuzzy (tree name, enum lookup_name_fuzzy_kind kind, location_t loc)
return name_hint (NULL, NULL);
}
-\f
+
/* Handle the standard [[nodiscard]] attribute. */
static tree
@@ -4801,7 +4801,7 @@ c_warn_type_attributes (tree attrs)
attr_ptr = &TREE_CHAIN (*attr_ptr);
return attrs;
}
-\f
+
/* Called when a declaration is seen that contains no names to declare.
If its type is a reference to a structure, union or enum inherited
from a containing scope, shadow that tag name for the current scope
@@ -5076,7 +5076,7 @@ shadow_tag_warned (const struct c_declspecs *declspecs, int warned)
pedwarn (input_location, 0, "empty declaration");
}
}
-\f
+
/* Return the qualifiers from SPECS as a bitwise OR of TYPE_QUAL_*
bits. SPECS represents declaration specifiers that the grammar
@@ -5235,7 +5235,7 @@ add_flexible_array_elts_to_size (tree decl, tree init)
= size_binop (PLUS_EXPR, DECL_SIZE_UNIT (decl), TYPE_SIZE_UNIT (type));
}
}
-\f
+
/* Decode a "typename", such as "int **", returning a ..._TYPE node.
Set *EXPR, if EXPR not NULL, to any expression to be evaluated
before the type name, and set *EXPR_CONST_OPERANDS, if
@@ -6190,7 +6190,7 @@ mark_forward_parm_decls (void)
if (TREE_CODE (b->decl) == PARM_DECL)
TREE_ASM_WRITTEN (b->decl) = 1;
}
-\f
+
/* Build a COMPOUND_LITERAL_EXPR. TYPE is the type given in the compound
literal, which may be an incomplete array type completed by the
initializer; INIT is a CONSTRUCTOR at LOC that initializes the compound
@@ -6323,7 +6323,7 @@ check_compound_literal_type (location_t loc, struct c_type_name *type_name)
warning_at (loc, OPT_Wc___compat,
"defining a type in a compound literal is invalid in C++");
}
-\f
+
/* Performs sanity checks on the TYPE and WIDTH of the bit-field NAME,
replacing with appropriate values if they are invalid. */
@@ -6418,7 +6418,7 @@ check_bitfield_type_and_width (location_t loc, tree *type, tree *width,
}
}
-\f
+
/* Print warning about variable length array if necessary. */
@@ -8155,7 +8155,7 @@ grokdeclarator (const struct c_declarator *declarator,
return decl;
}
}
-\f
+
/* Decode the parameter-list info for a function type or function definition.
The argument is the value returned by `get_parm_info' (or made in c-parse.c
if there is an identifier list instead of a parameter decl list).
@@ -8479,7 +8479,7 @@ get_parm_info (bool ellipsis, tree expr)
arg_info->no_named_args_stdarg_p = ellipsis && !types;
return arg_info;
}
-\f
+
/* Get the struct, enum or union (CODE says which) with tag NAME.
Define the tag as a forward-reference with location LOC if it is
not defined. HAVE_STD_ATTRS says whether any standard attributes
@@ -8598,7 +8598,7 @@ xref_tag (enum tree_code code, tree name)
return parser_xref_tag (input_location, code, name, false, NULL_TREE,
false).spec;
}
-\f
+
/* Make sure that the tag NAME is defined *in the current scope*
at least as a forward reference.
LOC is the location of the struct's definition.
@@ -8783,7 +8783,7 @@ grokfield (location_t loc,
return value;
}
-\f
+
/* Subroutine of detect_field_duplicates: return whether X and Y,
which are both fields in the same struct, have duplicate field
names. */
@@ -9489,7 +9489,7 @@ layout_array_type (tree t)
layout_array_type (TREE_TYPE (t));
layout_type (t);
}
-\f
+
/* Begin compiling the definition of an enumeration type.
NAME is its name (or null if anonymous).
LOC is the enum's location.
@@ -10021,7 +10021,7 @@ c_simulate_record_decl (location_t loc, const char *name,
input_location = saved_loc;
return type;
}
-\f
+
/* Create the FUNCTION_DECL for a function definition.
DECLSPECS, DECLARATOR and ATTRIBUTES are the parts of
the declaration; they describe the function's name and the type it returns,
@@ -10280,7 +10280,7 @@ start_function (struct c_declspecs *declspecs, struct c_declarator *declarator,
return true;
}
-\f
+
/* Subroutine of store_parm_decls which handles new-style function
definitions (prototype format). The parms already have decls, so we
need only record them as in effect and complain if any redundant
@@ -10789,7 +10789,7 @@ temp_pop_parm_decls (void)
}
pop_scope ();
}
-\f
+
/* Finish up a function declaration and compile that function
all the way to assembler language output. Then free the storage
@@ -10801,7 +10801,7 @@ void
finish_function (location_t end_loc)
{
tree fndecl = current_function_decl;
-
+
if (c_dialect_objc ())
objc_finish_function ();
@@ -10952,7 +10952,7 @@ finish_function (location_t end_loc)
invoke_plugin_callbacks (PLUGIN_FINISH_PARSE_FUNCTION, current_function_decl);
current_function_decl = NULL;
}
-\f
+
/* Check the declarations given in a for-loop for satisfying the C99
constraints. If exactly one such decl is found, return it. LOC is
the location of the opening parenthesis of the for loop. The last
@@ -11056,7 +11056,7 @@ check_for_loop_decls (location_t loc, bool turn_off_iso_c99_error)
return n_decls == 1 ? one_decl : NULL_TREE;
}
-\f
+
/* Save and reinitialize the variables
used during compilation of a C function. */
@@ -12873,7 +12873,7 @@ collect_source_refs (void)
unsigned i;
FOR_EACH_VEC_ELT (*all_translation_units, i, t)
- {
+ {
decls = DECL_INITIAL (t);
for (decl = BLOCK_VARS (decls); decl; decl = TREE_CHAIN (decl))
if (!DECL_IS_UNDECLARED_BUILTIN (decl))
diff --git a/gcc/c/c-parser.cc b/gcc/c/c-parser.cc
index 3a5998007a9..9e7a9cab8cd 100644
--- a/gcc/c/c-parser.cc
+++ b/gcc/c/c-parser.cc
@@ -80,7 +80,7 @@ along with GCC; see the file COPYING3. If not see
In finish_decl(), if the decl is static, has incomplete
struct/union/enum type, it is appended to incomplete_record_decls.
In c_parser_translation_unit(), we iterate over incomplete_record_decls
- and report error if any of the decls are still incomplete. */
+ and report error if any of the decls are still incomplete. */
vec<tree> incomplete_record_decls;
@@ -103,7 +103,7 @@ set_c_expr_source_range (c_expr *expr,
set_source_range (expr->value, src_range);
}
-\f
+
/* Initialization routine for this file. */
void
@@ -181,7 +181,7 @@ c_parse_init (void)
ridpointers [RID_OMP_ALL_MEMORY] = id;
}
}
-\f
+
/* A parser structure recording information about the state and
context of parsing. Includes lexer information with up to two
tokens of look-ahead; more are not needed for C. */
@@ -395,7 +395,7 @@ c_lex_one_token (c_parser *parser, c_token *token, bool raw = false)
/* Else they are not special keywords.
*/
}
- else if (c_dialect_objc ()
+ else if (c_dialect_objc ()
&& (OBJC_IS_AT_KEYWORD (rid_code)
|| OBJC_IS_CXX_KEYWORD (rid_code)))
{
@@ -844,9 +844,9 @@ c_parser_next_token_starts_declspecs (c_parser *parser)
setter/getter on the class. c_token_starts_declspecs() can't
differentiate between the two cases because it only checks the
current token, so we have a special check here. */
- if (c_dialect_objc ()
+ if (c_dialect_objc ()
&& token->type == CPP_NAME
- && token->id_kind == C_ID_CLASSNAME
+ && token->id_kind == C_ID_CLASSNAME
&& c_parser_peek_2nd_token (parser)->type == CPP_DOT)
return false;
@@ -862,9 +862,9 @@ c_parser_next_tokens_start_declaration (c_parser *parser)
c_token *token = c_parser_peek_token (parser);
/* Same as above. */
- if (c_dialect_objc ()
+ if (c_dialect_objc ()
&& token->type == CPP_NAME
- && token->id_kind == C_ID_CLASSNAME
+ && token->id_kind == C_ID_CLASSNAME
&& c_parser_peek_2nd_token (parser)->type == CPP_DOT)
return false;
@@ -2292,7 +2292,7 @@ c_parser_declaration_or_fndef (c_parser *parser, bool fndef_ok,
return;
if (specs->attrs)
{
- warning_at (c_parser_peek_token (parser)->location,
+ warning_at (c_parser_peek_token (parser)->location,
OPT_Wattributes,
"prefix attributes are ignored for methods");
specs->attrs = NULL_TREE;
@@ -2327,12 +2327,12 @@ c_parser_declaration_or_fndef (c_parser *parser, bool fndef_ok,
return;
if (specs->attrs)
{
- warning_at (c_parser_peek_token (parser)->location,
+ warning_at (c_parser_peek_token (parser)->location,
OPT_Wattributes,
"prefix attributes are ignored for implementations");
specs->attrs = NULL_TREE;
}
- c_parser_objc_class_definition (parser, NULL_TREE);
+ c_parser_objc_class_definition (parser, NULL_TREE);
return;
}
break;
@@ -2380,7 +2380,7 @@ c_parser_declaration_or_fndef (c_parser *parser, bool fndef_ok,
should diagnose if there were no declaration specifiers) or a
function definition (in which case the diagnostic for
implicit int suffices). */
- declarator = c_parser_declarator (parser,
+ declarator = c_parser_declarator (parser,
specs->typespec_kind != ctsk_none,
C_DTR_NORMAL, &dummy);
if (declarator == NULL)
@@ -2685,7 +2685,7 @@ c_parser_declaration_or_fndef (c_parser *parser, bool fndef_ok,
if (d)
*objc_foreach_object_declaration = d;
else
- *objc_foreach_object_declaration = error_mark_node;
+ *objc_foreach_object_declaration = error_mark_node;
}
}
if (c_parser_next_token_is (parser, CPP_COMMA))
@@ -4625,7 +4625,7 @@ c_parser_parms_declarator (c_parser *parser, bool id_list_ok, tree attrs,
&& !attrs
&& c_parser_next_token_is (parser, CPP_NAME)
&& c_parser_peek_token (parser)->id_kind == C_ID_ID
-
+
/* Look ahead to detect typos in type names. */
&& c_parser_peek_2nd_token (parser)->type != CPP_NAME
&& c_parser_peek_2nd_token (parser)->type != CPP_MULT
@@ -7254,7 +7254,7 @@ c_parser_do_statement (c_parser *parser, bool ivdep, unsigned short unroll)
Here is the canonical example of the first variant:
for (object in array) { do something with object }
- we call the first expression ("object") the "object_expression" and
+ we call the first expression ("object") the "object_expression" and
the second expression ("array") the "collection_expression".
object_expression must be an lvalue of type "id" (a generic Objective-C
object) because the loop works by assigning to object_expression the
@@ -7322,10 +7322,10 @@ c_parser_for_statement (c_parser *parser, bool ivdep, unsigned short unroll,
else if (c_parser_next_tokens_start_declaration (parser)
|| c_parser_nth_token_starts_std_attributes (parser, 1))
{
- c_parser_declaration_or_fndef (parser, true, true, true, true, true,
+ c_parser_declaration_or_fndef (parser, true, true, true, true, true,
&object_expression);
parser->objc_could_be_foreach_context = false;
-
+
if (c_parser_next_token_is_keyword (parser, RID_IN))
{
c_parser_consume_token (parser);
@@ -7356,7 +7356,7 @@ c_parser_for_statement (c_parser *parser, bool ivdep, unsigned short unroll,
c_parser_declaration_or_fndef (parser, true, true, true, true,
true, &object_expression);
parser->objc_could_be_foreach_context = false;
-
+
restore_extension_diagnostics (ext);
if (c_parser_next_token_is_keyword (parser, RID_IN))
{
@@ -8103,7 +8103,7 @@ c_parser_expr_no_commas (c_parser *parser, struct c_expr *after,
exp_location = c_parser_peek_token (parser)->location;
rhs = c_parser_expr_no_commas (parser, NULL);
rhs = convert_lvalue_to_rvalue (exp_location, rhs, true, true);
-
+
ret.value = build_modify_expr (op_location, lhs.value, lhs.original_type,
code, exp_location, rhs.value,
rhs.original_type);
@@ -8738,7 +8738,7 @@ c_parser_unary_expression (c_parser *parser)
c_parser_consume_token (parser);
exp_loc = c_parser_peek_token (parser)->location;
op = c_parser_cast_expression (parser, NULL);
-
+
op = default_function_array_read_conversion (exp_loc, op);
return parser_build_unary_op (op_loc, PREDECREMENT_EXPR, op);
case CPP_AND:
@@ -9217,14 +9217,14 @@ struct c_generic_association
};
/* Parse a generic-selection. (C11 6.5.1.1).
-
+
generic-selection:
_Generic ( assignment-expression , generic-assoc-list )
-
+
generic-assoc-list:
generic-association
generic-assoc-list , generic-association
-
+
generic-association:
type-name : assignment-expression
default : assignment-expression
@@ -9668,7 +9668,7 @@ c_parser_postfix_expression (c_parser *parser)
component = component_tok->value;
location_t end_loc = component_tok->get_finish ();
c_parser_consume_token (parser);
- expr.value = objc_build_class_component_ref (class_name,
+ expr.value = objc_build_class_component_ref (class_name,
component);
set_c_expr_source_range (&expr, loc, end_loc);
break;
@@ -11537,7 +11537,7 @@ c_parser_expr_list (c_parser *parser, bool convert_p, bool fold_p,
*p_orig_types = orig_types;
return ret;
}
-\f
+
/* Parse Objective-C-specific constructs. */
/* Parse an objc-class-definition.
@@ -11744,7 +11744,7 @@ c_parser_objc_class_instance_variables (c_parser *parser)
/* There is a syntax error. We want to skip the offending
tokens up to the next ';' (included) or '}'
(excluded). */
-
+
/* First, skip manually a ')' or ']'. This is because they
reduce the nesting level, so c_parser_skip_until_found()
wouldn't be able to skip past them. */
@@ -12050,32 +12050,32 @@ c_parser_objc_methodproto (c_parser *parser)
/* Forget protocol qualifiers now. */
parser->objc_pq_context = false;
- /* Do not allow the presence of attributes to hide an erroneous
+ /* Do not allow the presence of attributes to hide an erroneous
method implementation in the interface section. */
if (!c_parser_next_token_is (parser, CPP_SEMICOLON))
{
c_parser_error (parser, "expected %<;%>");
return;
}
-
+
if (decl != error_mark_node)
objc_add_method_declaration (is_class_method, decl, attributes);
c_parser_skip_until_found (parser, CPP_SEMICOLON, "expected %<;%>");
}
-/* If we are at a position that method attributes may be present, check that
- there are not any parsed already (a syntax error) and then collect any
+/* If we are at a position that method attributes may be present, check that
+ there are not any parsed already (a syntax error) and then collect any
specified at the current location. Finally, if new attributes were present,
check that the next token is legal ( ';' for decls and '{' for defs). */
-
-static bool
+
+static bool
c_parser_objc_maybe_method_attributes (c_parser* parser, tree* attributes)
{
bool bad = false;
if (*attributes)
{
- c_parser_error (parser,
+ c_parser_error (parser,
"method attributes must be specified at the end only");
*attributes = NULL_TREE;
bad = true;
@@ -12095,7 +12095,7 @@ c_parser_objc_maybe_method_attributes (c_parser* parser, tree* attributes)
return bad;
/* We've got attributes, but not at the end. */
- c_parser_error (parser,
+ c_parser_error (parser,
"expected %<;%> or %<{%> after method attribute definition");
return true;
}
@@ -12201,7 +12201,7 @@ c_parser_objc_method_decl (c_parser *parser, bool is_class_method,
{
ellipsis = true;
c_parser_consume_token (parser);
- attr_err |= c_parser_objc_maybe_method_attributes
+ attr_err |= c_parser_objc_maybe_method_attributes
(parser, attributes) ;
break;
}
@@ -12331,7 +12331,7 @@ c_parser_objc_protocol_refs (c_parser *parser)
where '...' is to be interpreted literally, that is, it means CPP_ELLIPSIS.
PS: This function is identical to cp_parser_objc_try_catch_finally_statement
- for C++. Keep them in sync. */
+ for C++. Keep them in sync. */
static void
c_parser_objc_try_catch_finally_statement (c_parser *parser)
@@ -12390,7 +12390,7 @@ c_parser_objc_try_catch_finally_statement (c_parser *parser)
going. */
if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN))
c_parser_consume_token (parser);
-
+
/* If these is no immediate closing parenthesis, the user
probably doesn't know that parenthesis are required at
all (ie, they typed "@catch NSException *e"). So, just
@@ -12663,13 +12663,13 @@ c_parser_objc_keywordexpr (c_parser *parser)
/* A check, needed in several places, that ObjC interface, implementation or
method definitions are not prefixed by incorrect items. */
static bool
-c_parser_objc_diagnose_bad_element_prefix (c_parser *parser,
+c_parser_objc_diagnose_bad_element_prefix (c_parser *parser,
struct c_declspecs *specs)
{
if (!specs->declspecs_seen_p || specs->non_sc_seen_p
|| specs->typespec_kind != ctsk_none)
{
- c_parser_error (parser,
+ c_parser_error (parser,
"no type or storage class may be specified here,");
c_parser_skip_to_end_of_block_or_statement (parser);
return true;
@@ -13016,7 +13016,7 @@ c_parser_objc_at_dynamic_declaration (c_parser *parser)
objc_add_dynamic_declaration (loc, list);
}
-\f
+
/* Parse a pragma GCC ivdep. */
static bool
@@ -13386,7 +13386,7 @@ c_parser_pragma_pch_preprocess (c_parser *parser)
if (name)
c_common_pch_pragma (parse_in, TREE_STRING_POINTER (name));
}
-\f
+
/* OpenACC and OpenMP parsing routines. */
/* Returns name of the next clause.
@@ -15596,7 +15596,7 @@ c_parser_omp_clause_private (c_parser *parser, tree list)
One of: + * - & ^ | && ||
OpenMP 3.1:
-
+
reduction-operator:
One of: + * - & ^ | && || max min
@@ -17969,8 +17969,8 @@ c_parser_omp_all_clauses (c_parser *parser, omp_clause_mask mask,
clauses = c_parser_omp_clause_allocate (parser, clauses);
c_name = "allocate";
break;
- case PRAGMA_OMP_CLAUSE_LINEAR:
- clauses = c_parser_omp_clause_linear (parser, clauses);
+ case PRAGMA_OMP_CLAUSE_LINEAR:
+ clauses = c_parser_omp_clause_linear (parser, clauses);
c_name = "linear";
break;
case PRAGMA_OMP_CLAUSE_AFFINITY:
@@ -20229,7 +20229,7 @@ c_parser_omp_for_loop (location_t loc, c_parser *parser, enum tree_code code,
this_pre_body = pop_stmt_list (this_pre_body);
if (pre_body)
{
- tree t = pre_body;
+ tree t = pre_body;
pre_body = push_stmt_list ();
add_stmt (t);
add_stmt (this_pre_body);
@@ -22882,7 +22882,7 @@ c_finish_omp_declare_simd (c_parser *parser, tree fndecl, tree parms,
parser->tokens = clauses.address ();
parser->tokens_avail = clauses.length ();
-
+
/* c_parser_omp_declare_simd pushed 2 extra CPP_EOF tokens at the end. */
while (parser->tokens_avail > 3)
{
@@ -24566,7 +24566,7 @@ c_parser_transaction_cancel (c_parser *parser)
ret_error:
return build1 (NOP_EXPR, void_type_node, error_mark_node);
}
-\f
+
/* Parse a single source file. */
void
diff --git a/gcc/c/c-tree.h b/gcc/c/c-tree.h
index c287124c990..bf201e6b800 100644
--- a/gcc/c/c-tree.h
+++ b/gcc/c/c-tree.h
@@ -584,7 +584,7 @@ enum c_inline_static_type {
csi_modifiable
};
-\f
+
/* in c-parser.cc */
extern void c_parse_init (void);
extern bool c_keyword_starts_typename (enum rid keyword);
diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc
index e06f052eb46..68d17f4cde2 100644
--- a/gcc/c/c-typeck.cc
+++ b/gcc/c/c-typeck.cc
@@ -126,7 +126,7 @@ static void readonly_warning (tree, enum lvalue_use);
static int lvalue_or_else (location_t, const_tree, enum lvalue_use);
static void record_maybe_used_decl (tree);
static int comptypes_internal (const_tree, const_tree, bool *, bool *);
-\f
+
/* Return true if EXP is a null pointer constant, false otherwise. */
static bool
@@ -1021,7 +1021,7 @@ c_common_type (tree t1, tree t2)
else
return t2;
}
-\f
+
/* Wrapper around c_common_type that is used by c-common.cc and other
front end optimizations that remove promotions. ENUMERAL_TYPEs
are allowed here and are converted to their compatible integer types.
@@ -1095,7 +1095,7 @@ comptypes_check_different_types (tree type1, tree type2,
return val;
}
-\f
+
/* Return 1 if TYPE1 and TYPE2 are compatible types for assignment
or various other operations. Return 2 if they are compatible
but a warning may be needed if you use them together. If
@@ -1354,7 +1354,7 @@ comp_target_types (location_t location, tree ttl, tree ttr)
return val;
}
-\f
+
/* Subroutines of `comptypes'. */
/* Determine whether two trees derive from the same translation unit.
@@ -1862,7 +1862,7 @@ type_lists_compatible_p (const_tree args1, const_tree args2,
args2 = TREE_CHAIN (args2);
}
}
-\f
+
/* Compute the size to increment a pointer by. When a function type or void
type or incomplete type is passed, size_one_node is returned.
This function does not emit any diagnostics; the caller is responsible
@@ -1882,7 +1882,7 @@ c_size_in_bytes (const_tree type)
size_int (TYPE_PRECISION (char_type_node)
/ BITS_PER_UNIT));
}
-\f
+
/* Return either DECL or its known constant value (if it has one). */
tree
@@ -2366,7 +2366,7 @@ default_conversion (tree exp)
return exp;
}
-\f
+
/* Look up COMPONENT in a structure or union TYPE.
If the component name is not found, returns NULL_TREE. Otherwise,
@@ -2698,7 +2698,7 @@ build_component_ref (location_t loc, tree datum, tree component,
return error_mark_node;
}
-\f
+
/* Given an expression PTR for a pointer, return an expression
for the value pointed to.
ERRORSTRING is the name of the operator to appear in error messages.
@@ -2914,7 +2914,7 @@ build_array_ref (location_t loc, tree array, tree index)
return ret;
}
}
-\f
+
/* Build an external reference to identifier ID. FUN indicates
whether this will be used for a function call. LOC is the source
location of the identifier. This sets *TYPE to the type of the
@@ -3232,7 +3232,7 @@ build_function_call_vec (location_t loc, vec<location_t> arg_loc,
fundecl = function;
if (!orig_fundecl)
orig_fundecl = fundecl;
- /* Atomic functions have type checking/casting already done. They are
+ /* Atomic functions have type checking/casting already done. They are
often rewritten and don't match the original parameter list. */
if (name && startswith (IDENTIFIER_POINTER (name), "__atomic_"))
origtypes = NULL;
@@ -3386,7 +3386,7 @@ c_build_function_call_vec (location_t loc, const vec<location_t> &arg_loc,
}
return build_function_call_vec (loc, arg_loc, function, params, origtypes);
}
-\f
+
/* Helper for convert_arguments called to convert the VALue of argument
number ARGNUM from ORIGTYPE to the corresponding parameter number
PARMNUM and TYPE.
@@ -3864,7 +3864,7 @@ convert_arguments (location_t loc, vec<location_t> arg_loc, tree typelist,
return error_args ? -1 : (int) parmnum;
}
-\f
+
/* This is the entry point used by the parser to build unary operators
in the input. CODE, a tree_code, specifies the unary operator, and
ARG is the operand. For unary plus, the C parser currently uses
@@ -4097,7 +4097,7 @@ parser_build_binary_op (location_t location, enum tree_code code,
return result;
}
-\f
+
/* Return a tree for the difference of pointers OP0 and OP1.
The resulting tree has type ptrdiff_t. If POINTER_SUBTRACT sanitization is
enabled, assign to INSTRUMENT_EXPR call to libsanitizer. */
@@ -4198,7 +4198,7 @@ pointer_diff (location_t loc, tree op0, tree op1, tree *instrument_expr)
/* Convert to final result type if necessary. */
return convert (restype, result);
}
-\f
+
/* Expand atomic compound assignments into an appropriate sequence as
specified by the C11 standard section 6.5.16.2.
@@ -5126,7 +5126,7 @@ lvalue_p (const_tree ref)
return false;
}
}
-\f
+
/* Give a warning for storing in something that is read-only in GCC
terms but not const in ISO C terms. */
@@ -5166,7 +5166,7 @@ lvalue_or_else (location_t loc, const_tree ref, enum lvalue_use use)
return win;
}
-\f
+
/* Mark EXP saying that we need to be able to take the
address of it; it should not be allocated in a register.
Returns true if successful. ARRAY_REF_P is true if this
@@ -5252,7 +5252,7 @@ c_mark_addressable (tree exp, bool array_ref_p)
return true;
}
}
-\f
+
/* Convert EXPR to TYPE, warning about conversion problems with
constants. SEMANTIC_TYPE is the type this conversion would use
without excess precision. If SEMANTIC_TYPE is NULL, this function
@@ -5734,7 +5734,7 @@ build_conditional_expr (location_t colon_loc, tree ifexp, bool ifexp_bcp,
return ret;
}
-\f
+
/* EXPR is an expression, location LOC, whose result is discarded.
Warn if it is a call to a nodiscard function (or a COMPOUND_EXPR
whose right-hand operand is such a call, possibly recursively). */
@@ -6352,7 +6352,7 @@ c_cast_expr (location_t loc, struct c_type_name *type_name, tree expr)
return ret;
}
-\f
+
/* Build an assignment expression of lvalue LHS from value RHS.
If LHS_ORIGTYPE is not NULL, it is the original type of LHS, which
may differ from TREE_TYPE (LHS) for an enum bitfield.
@@ -6590,7 +6590,7 @@ return_result:
result = build2 (COMPOUND_EXPR, TREE_TYPE (result), rhseval, result);
return result;
}
-\f
+
/* Return whether STRUCT_TYPE has an anonymous field with type TYPE.
This is used to implement -fplan9-extensions. */
@@ -6767,7 +6767,7 @@ warning_init (location_t loc, int opt, const char *gmsgid)
if (*ofwhat && warned)
inform (exploc, "(near initialization for %qs)", ofwhat);
}
-\f
+
/* If TYPE is an array type and EXPR is a parenthesized string
constant, warn if pedantic that EXPR is being used to initialize an
object of type TYPE. */
@@ -7889,7 +7889,7 @@ convert_for_assignment (location_t location, location_t expr_loc, tree type,
return error_mark_node;
}
-\f
+
/* If VALUE is a compound expr all of whose expressions are constant, then
return its value. Otherwise, return error_mark_node.
@@ -7912,7 +7912,7 @@ valid_compound_expr_initializer (tree value, tree endtype)
else
return value;
}
-\f
+
/* Perform appropriate conversions on the initial value of a variable,
store it in the declaration DECL,
and print any error messages that are appropriate.
@@ -7997,7 +7997,7 @@ store_init_value (location_t init_loc, tree decl, tree init, tree origtype)
}
}
}
-\f
+
/* Methods for storing and printing names for error messages. */
/* Implement a spelling stack that allows components of a name to be pushed
@@ -8632,7 +8632,7 @@ digest_init (location_t init_loc, tree type, tree init, tree origtype,
error_init (init_loc, "invalid initializer");
return error_mark_node;
}
-\f
+
/* Handle initializers that use braces. */
/* Type of object we are accumulating a constructor for.
@@ -8723,7 +8723,7 @@ static int designator_depth;
/* Nonzero if there were diagnosed errors in this designator list. */
static int designator_erroneous;
-\f
+
/* This stack has a level for each implicit or explicit level of
structuring in the initializer, including the outermost one. It
saves the values of most of the variables above. */
@@ -8798,7 +8798,7 @@ struct initializer_stack
};
static struct initializer_stack *initializer_stack;
-\f
+
/* Prepare to parse and output the initializer for variable DECL. */
void
@@ -8889,7 +8889,7 @@ finish_init (void)
initializer_stack = p->next;
XDELETE (p);
}
-\f
+
/* Call here when we see the initializer is surrounded by braces.
This is instead of a call to push_init_level;
it is matched by a call to pop_init_level.
@@ -9006,7 +9006,7 @@ really_start_incremental_init (tree type)
constructor_unfilled_fields = constructor_type;
}
}
-\f
+
extern location_t last_init_list_comma;
/* Called when we see an open brace for a nested initializer. Finish
@@ -9673,7 +9673,7 @@ set_init_label (location_t loc, tree fieldname, location_t fieldname_loc,
}
while (field != NULL_TREE);
}
-\f
+
/* Add a new initializer to the tree of pending initializers. PURPOSE
identifies the initializer, either array index or field in a structure.
VALUE is the value of that index or field. If ORIGTYPE is not
@@ -10550,7 +10550,7 @@ output_pending_init_elements (int all, struct obstack * braced_init_obstack)
initializer to output. */
goto retry;
}
-\f
+
/* Expression VALUE coincides with the start of type TYPE in a braced
initializer. Return true if we should treat VALUE as initializing
the first element of TYPE, false if we should treat it as initializing
@@ -11052,7 +11052,7 @@ process_init_element (location_t loc, struct c_expr value, bool implicit,
constructor_range_stack = 0;
}
-\f
+
/* Build a complete asm-statement, whose components are a CV_QUALIFIER
(guaranteed to be 'volatile' or null) and ARGS (represented using
an ASM_EXPR node). */
@@ -11191,7 +11191,7 @@ build_asm_expr (location_t loc, tree string, tree outputs, tree inputs,
return args;
}
-\f
+
/* Generate a goto statement to LABEL. LOC is the location of the
GOTO. */
@@ -11409,7 +11409,7 @@ c_finish_return (location_t loc, tree retval, tree origtype)
suppress_warning (ret_stmt, OPT_Wreturn_type);
return add_stmt (ret_stmt);
}
-\f
+
struct c_switch {
/* The SWITCH_STMT being built. */
tree switch_stmt;
@@ -11593,7 +11593,7 @@ c_finish_switch (tree body, tree type)
c_release_switch_bindings (cs->bindings);
XDELETE (cs);
}
-\f
+
/* Emit an if statement. IF_LOCUS is the location of the 'if'. COND,
THEN_BLOCK and ELSE_BLOCK are expressions to be used; ELSE_BLOCK
may be null. */
@@ -11903,7 +11903,7 @@ c_finish_stmt_expr (location_t loc, tree body)
return t;
}
}
-\f
+
/* Begin and end compound statements. This is as simple as pushing
and popping new statement lists from the tree. */
@@ -11971,7 +11971,7 @@ push_cleanup (tree decl, tree cleanup, bool eh_only)
TREE_OPERAND (stmt, 0) = list;
STATEMENT_LIST_STMT_EXPR (list) = stmt_expr;
}
-\f
+
/* Build a vector comparison of ARG0 and ARG1 using CODE opcode
into a value of TYPE type. Comparison is done via VEC_COND_EXPR. */
@@ -13384,7 +13384,7 @@ c_objc_common_truthvalue_conversion (location_t location, tree expr)
return build1 (NOP_EXPR, TREE_TYPE (expr), expr);
return expr;
}
-\f
+
/* Convert EXPR to a contained DECL, updating *TC, *TI and *SE as
required. */
@@ -13404,7 +13404,7 @@ c_expr_to_decl (tree expr, bool *tc ATTRIBUTE_UNUSED, bool *se)
else
return expr;
}
-\f
+
/* Generate OMP construct CODE, with BODY and CLAUSES as its compound
statement. LOC is the location of the construct. */
diff --git a/gcc/c/gimple-parser.cc b/gcc/c/gimple-parser.cc
index 18ed4d4236d..0378f78b9bd 100644
--- a/gcc/c/gimple-parser.cc
+++ b/gcc/c/gimple-parser.cc
@@ -694,7 +694,7 @@ expr_stmt:
gimple-assign-statement:
gimple-unary-expression = gimple-assign-rhs
-
+
gimple-assign-rhs:
gimple-cast-expression
gimple-unary-expression
@@ -1247,7 +1247,7 @@ c_parser_parse_ssa_name_id (tree id, unsigned *version, unsigned *ver_offset)
/* Get at the actual SSA name ID with VERSION starting at VER_OFFSET.
TYPE is the type if the SSA name is being declared. */
-static tree
+static tree
c_parser_parse_ssa_name (gimple_parser &parser,
tree id, tree type, unsigned version,
unsigned ver_offset)
@@ -1264,7 +1264,7 @@ c_parser_parse_ssa_name (gimple_parser &parser,
{
if (! type)
{
- c_parser_error (parser, "SSA name undeclared");
+ c_parser_error (parser, "SSA name undeclared");
return error_mark_node;
}
name = make_ssa_name_fn (cfun, type, NULL, version);
@@ -1286,7 +1286,7 @@ c_parser_parse_ssa_name (gimple_parser &parser,
XDELETEVEC (var_name);
if (! parent || parent == error_mark_node)
{
- c_parser_error (parser, "base variable or SSA name undeclared");
+ c_parser_error (parser, "base variable or SSA name undeclared");
return error_mark_node;
}
if (!(VAR_P (parent)
diff --git a/gcc/caller-save.cc b/gcc/caller-save.cc
index b8915dab128..001b73040de 100644
--- a/gcc/caller-save.cc
+++ b/gcc/caller-save.cc
@@ -97,7 +97,7 @@ static class insn_chain *insert_one_insn (class insn_chain *, int, int,
rtx);
static void add_stored_regs (rtx, const_rtx, void *);
-\f
+
static GTY(()) rtx savepat;
static GTY(()) rtx restpat;
@@ -169,7 +169,7 @@ reg_restore_code (int reg, machine_mode mode)
reg_save_code (reg, mode);
return cached_reg_restore_code[reg][mode];
}
-\f
+
/* Initialize for caller-save.
Look at all the hard registers that are used by a call and for which
@@ -268,7 +268,7 @@ init_caller_save (void)
}
}
-\f
+
/* Initialize save areas by showing that we haven't allocated any yet. */
@@ -654,7 +654,7 @@ setup_save_areas (void)
}
else
{
- /* We are not sharing slots.
+ /* We are not sharing slots.
Run through all the call-used hard-registers and allocate
space for each in the caller-save area. Try to allocate space
@@ -720,7 +720,7 @@ setup_save_areas (void)
set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
}
-\f
+
/* Find the places where hard regs are live across calls and save them. */
@@ -851,7 +851,7 @@ save_call_clobbered_regs (void)
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
n_regs_saved++;
-
+
if (cheap
&& HARD_REGISTER_P (cheap)
&& callee_abi.clobbers_reg_p (GET_MODE (cheap),
@@ -1142,7 +1142,7 @@ replace_reg_with_saved_mem (rtx *loc,
*loc = mem;
}
-\f
+
/* Insert a sequence of insns to restore. Place these insns in front of
CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
the maximum number of registers which should be restored during this call.
diff --git a/gcc/calls.cc b/gcc/calls.cc
index 4492ae0a86a..63f819d3a0e 100644
--- a/gcc/calls.cc
+++ b/gcc/calls.cc
@@ -169,7 +169,7 @@ static tree split_complex_types (tree);
static rtx save_fixed_argument_area (int, rtx, int *, int *);
static void restore_fixed_argument_area (rtx, rtx, int, int);
#endif
-\f
+
/* Return true if bytes [LOWER_BOUND, UPPER_BOUND) of the outgoing
stack region might already be in use. */
@@ -4070,7 +4070,7 @@ split_complex_types (tree types)
return types;
}
-\f
+
/* Output a library call to function ORGFUN (a SYMBOL_REF rtx)
for a value of mode OUTMODE,
with NARGS different arguments, passed as ARGS.
@@ -4615,7 +4615,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
rtx val = argvec[argnum].value;
rtx reg = argvec[argnum].reg;
int partial = argvec[argnum].partial;
-
+
/* Handle calls that pass values in multiple non-contiguous
locations. The PA64 has examples of this for library calls. */
if (reg != 0 && GET_CODE (reg) == PARALLEL)
@@ -4851,7 +4851,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
return value;
}
-\f
+
/* Store a single argument for a function call
into the register or memory area where it must be passed.
diff --git a/gcc/ccmp.cc b/gcc/ccmp.cc
index 1bd6fadea35..1ac7558ff72 100644
--- a/gcc/ccmp.cc
+++ b/gcc/ccmp.cc
@@ -52,7 +52,7 @@ ccmp_tree_comparison_p (tree t, basic_block bb)
return (TREE_CODE (TREE_TYPE (t)) == BOOLEAN_TYPE);
/* Check to see if SSA name is set by a comparison operator in
- the same basic block. */
+ the same basic block. */
if (!is_gimple_assign (g))
return false;
if (bb != gimple_bb (g))
diff --git a/gcc/cfg.cc b/gcc/cfg.cc
index 897ef534ff5..e5280e232d1 100644
--- a/gcc/cfg.cc
+++ b/gcc/cfg.cc
@@ -45,7 +45,7 @@ along with GCC; see the file COPYING3. If not see
TODO: Document these "Available functionality" functions in the files
that implement them.
*/
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -58,7 +58,7 @@ along with GCC; see the file COPYING3. If not see
#include "cfgloop.h" /* FIXME: For struct loop. */
#include "dumpfile.h"
-\f
+
/* Called once at initialization time. */
@@ -82,7 +82,7 @@ init_flow (struct function *the_fun)
the_fun->cfg->edge_flags_allocated = EDGE_ALL_FLAGS;
the_fun->cfg->bb_flags_allocated = BB_ALL_FLAGS;
}
-\f
+
/* Helper function for remove_edge and free_cffg. Frees edge structure
without actually removing it from the pred/succ arrays. */
@@ -125,13 +125,13 @@ free_cfg (struct function *fn)
gcc_assert (!n_edges_for_fn (fn));
/* Sanity check that dominance tree is freed. */
gcc_assert (!fn->cfg->x_dom_computed[0] && !fn->cfg->x_dom_computed[1]);
-
+
vec_free (fn->cfg->x_label_to_block_map);
vec_free (basic_block_info_for_fn (fn));
ggc_free (fn->cfg);
fn->cfg = NULL;
}
-\f
+
/* Allocate memory for basic_block. */
basic_block
@@ -207,7 +207,7 @@ expunge_block (basic_block b)
We should be able to release all dead SSA_NAMES and at the same time we
should clear out BB pointer of dead statements consistently. */
}
-\f
+
/* Connect E to E->src. */
static inline void
@@ -410,7 +410,7 @@ clear_bb_flags (void)
FOR_ALL_BB_FN (bb, cfun)
bb->flags &= flags_to_preserve;
}
-\f
+
/* Check the consistency of profile information. We can't do that
in verify_flow_info, as the counts may get invalid for incompletely
solved graphs, later eliminating of conditionals or roundoff errors.
@@ -497,13 +497,13 @@ check_bb_profile (basic_block bb, FILE * file, int indent)
}
}
}
-\f
+
void
dump_edge_info (FILE *file, edge e, dump_flags_t flags, int do_succ)
{
basic_block side = (do_succ ? e->dest : e->src);
bool do_details = false;
-
+
if ((flags & TDF_DETAILS) != 0
&& (flags & TDF_SLIM) == 0)
do_details = true;
@@ -588,7 +588,7 @@ debug_slim (edge e)
DEFINE_DEBUG_VEC (edge)
DEFINE_DEBUG_HASH_SET (edge)
-\f
+
/* Simple routines to easily allocate AUX fields of basic blocks. */
static struct obstack block_aux_obstack;
@@ -909,7 +909,7 @@ brief_dump_cfg (FILE *file, dump_flags_t flags)
frequency or count is believed to be lower than COUNT
respectively. */
void
-update_bb_profile_for_threading (basic_block bb,
+update_bb_profile_for_threading (basic_block bb,
profile_count count, edge taken_edge)
{
edge c;
@@ -936,7 +936,7 @@ update_bb_profile_for_threading (basic_block bb,
{
fprintf (dump_file, "Jump threading proved probability of edge "
"%i->%i too small (it is ",
- taken_edge->src->index, taken_edge->dest->index);
+ taken_edge->src->index, taken_edge->dest->index);
taken_edge->probability.dump (dump_file);
fprintf (dump_file, " should be ");
prob.dump (dump_file);
diff --git a/gcc/cfganal.cc b/gcc/cfganal.cc
index ef24c5e4d15..84dd2e304de 100644
--- a/gcc/cfganal.cc
+++ b/gcc/cfganal.cc
@@ -47,7 +47,7 @@ private:
auto_sbitmap m_visited_blocks;
};
}
-\f
+
/* Mark the back edges in DFS traversal.
Return nonzero if a loop (natural or otherwise) is present.
Inspired by Depth_First_Search_PP described in:
@@ -239,7 +239,7 @@ verify_no_unreachable_blocks (void)
gcc_assert ((bb->flags & BB_REACHABLE) != 0);
}
-\f
+
/* Functions to access an edge list with a vector representation.
Enough data is kept such that given an index number, the
pred and succ that edge represents can be determined, or
@@ -551,7 +551,7 @@ find_edge_index (struct edge_list *edge_list, basic_block pred, basic_block succ
return (EDGE_INDEX_NO_EDGE);
}
-\f
+
/* This routine will remove any fake predecessor edges for a basic block.
When the edge is removed, it is also removed from whatever successor
list it is in. */
@@ -645,7 +645,7 @@ connect_infinite_loops_to_exit (void)
dfs.add_bb (deadend_block);
}
}
-\f
+
/* Compute reverse top sort order. This is computing a post order
numbering of the graph. If INCLUDE_ENTRY_EXIT is true, then
ENTRY_BLOCK and EXIT_BLOCK are included. If DELETE_UNREACHABLE is
diff --git a/gcc/cfgbuild.cc b/gcc/cfgbuild.cc
index 15ed4deb5f7..915d710e8c0 100644
--- a/gcc/cfgbuild.cc
+++ b/gcc/cfgbuild.cc
@@ -17,7 +17,7 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -36,7 +36,7 @@ static void make_edges (basic_block, basic_block, int);
static void make_label_edge (sbitmap, basic_block, rtx, int);
static void find_bb_boundaries (basic_block);
static void compute_outgoing_frequencies (basic_block);
-\f
+
/* Return true if insn is something that should be contained inside basic
block. */
@@ -118,7 +118,7 @@ control_flow_insn_p (const rtx_insn *insn)
return can_throw_internal (insn);
}
-\f
+
/* Create an edge between two basic blocks. FLAGS are auxiliary information
about the edge that is accumulated between calls. */
@@ -379,7 +379,7 @@ make_edges (basic_block min, basic_block max, int update_p)
if (edge_cache)
sbitmap_free (edge_cache);
}
-\f
+
static void
mark_tablejump_edge (rtx label)
{
diff --git a/gcc/cfgcleanup.cc b/gcc/cfgcleanup.cc
index 194e0e5de12..41111c100e3 100644
--- a/gcc/cfgcleanup.cc
+++ b/gcc/cfgcleanup.cc
@@ -82,7 +82,7 @@ static bool mark_effect (rtx, bitmap);
static void notice_new_block (basic_block);
static void update_forwarder_flag (basic_block);
static void merge_memattrs (rtx, rtx);
-\f
+
/* Set flags for newly created block. */
static void
@@ -105,7 +105,7 @@ update_forwarder_flag (basic_block bb)
else
bb->flags &= ~BB_FORWARDER_BLOCK;
}
-\f
+
/* Simplify a conditional jump around an unconditional jump.
Return true if something changed. */
@@ -189,7 +189,7 @@ try_simplify_condjump (basic_block cbranch_block)
return true;
}
-\f
+
/* Attempt to prove that operation is NOOP using CSElib or mark the effect
on register. Used by jump threading. */
@@ -394,7 +394,7 @@ failed_exit:
cselib_finish ();
return NULL;
}
-\f
+
/* Attempt to forward edges leaving basic block B.
Return true if successful. */
@@ -609,7 +609,7 @@ try_forward_edges (int mode, basic_block b)
free (threaded_edges);
return changed;
}
-\f
+
/* Blocks A and B are to be merged into a single block. A has no incoming
fallthru edge, so it can be moved before B without adding or modifying
@@ -818,7 +818,7 @@ merge_blocks_move (edge e, basic_block b, basic_block c, int mode)
return NULL;
}
-\f
+
/* Removes the memory attributes of MEM expression
if they are not equal. */
@@ -973,7 +973,7 @@ equal_different_set_p (rtx p1, rtx s1, rtx p2, rtx s2)
that is a single_set with a SET_SRC of SRC1. Similarly
for NOTE2/SRC2.
- So effectively NOTE1/NOTE2 are an alternate form of
+ So effectively NOTE1/NOTE2 are an alternate form of
SRC1/SRC2 respectively.
Return nonzero if SRC1 or NOTE1 has the same constant
@@ -1274,7 +1274,7 @@ old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx_insn *i1, rtx_insn *i2)
return can_replace_by (i1, i2);
}
-\f
+
/* When comparing insns I1 and I2 in flow_find_cross_jump or
flow_find_head_matching_sequence, ensure the notes match. */
@@ -2992,7 +2992,7 @@ try_optimize_cfg (int mode)
return changed_overall;
}
-\f
+
/* Delete all unreachable basic blocks. */
bool
@@ -3103,7 +3103,7 @@ delete_dead_jumptables (void)
}
}
-\f
+
/* Tidy the CFG by deleting unreachable code and whatnot. */
bool
@@ -3203,7 +3203,7 @@ cleanup_cfg (int mode)
return changed;
}
-\f
+
namespace {
const pass_data pass_data_jump =
@@ -3250,7 +3250,7 @@ make_pass_jump (gcc::context *ctxt)
{
return new pass_jump (ctxt);
}
-\f
+
namespace {
const pass_data pass_data_jump_after_combine =
diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc
index 86783a6b661..04575cdac34 100644
--- a/gcc/cfgexpand.cc
+++ b/gcc/cfgexpand.cc
@@ -2122,7 +2122,7 @@ static bool
stack_protect_return_slot_p ()
{
basic_block bb;
-
+
FOR_ALL_BB_FN (bb, cfun)
for (gimple_stmt_iterator gsi = gsi_start_bb (bb);
!gsi_end_p (gsi); gsi_next (&gsi))
@@ -3540,7 +3540,7 @@ expand_asm_stmt (gasm *stmt)
ASM_OPERANDS_OUTPUT_CONSTRAINT (body) = constraints[0];
if (nlabels > 0)
emit_jump_insn (gen_rtx_SET (output_rvec[0], body));
- else
+ else
emit_insn (gen_rtx_SET (output_rvec[0], body));
}
else
@@ -3625,7 +3625,7 @@ expand_asm_stmt (gasm *stmt)
{
edge e;
edge_iterator ei;
-
+
FOR_EACH_EDGE (e, ei, gimple_bb (stmt)->succs)
{
start_sequence ();
@@ -6489,7 +6489,7 @@ expand_stack_alignment (void)
fixup_tail_calls ();
}
}
-\f
+
static void
expand_main_function (void)
@@ -6501,7 +6501,7 @@ expand_main_function (void)
emit_library_call (init_one_libfunc (NAME__MAIN), LCT_NORMAL, VOIDmode);
#endif
}
-\f
+
/* Expand code to initialize the stack_protect_guard. This is invoked at
the beginning of a function to be protected. */
diff --git a/gcc/cfghooks.h b/gcc/cfghooks.h
index aebd080cf8b..65cbd65839a 100644
--- a/gcc/cfghooks.h
+++ b/gcc/cfghooks.h
@@ -31,7 +31,7 @@ along with GCC; see the file COPYING3. If not see
For every field[2], field[0] is the count before the pass runs, and
field[1] is the post-pass count. This allows us to monitor the effect
of each individual pass on the profile consistency.
-
+
This structure is not supposed to be used by anything other than passes.cc
and one CFG hook per CFG mode. */
struct profile_record
@@ -189,7 +189,7 @@ struct cfg_hooks
/* Add PHI arguments queued in PENDINT_STMT list on edge E to edge
E->dest (only in tree-ssa loop versioning. */
void (*flush_pending_stmts) (edge);
-
+
/* True if a block contains no executable instructions. */
bool (*empty_block_p) (basic_block);
diff --git a/gcc/cfgloop.cc b/gcc/cfgloop.cc
index ccda7415d70..26126591cfc 100644
--- a/gcc/cfgloop.cc
+++ b/gcc/cfgloop.cc
@@ -35,7 +35,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-pretty-print.h"
static void flow_loops_cfg_dump (FILE *);
-\f
+
/* Dump loop related CFG information. */
static void
@@ -87,7 +87,7 @@ superloop_at_depth (class loop *loop, unsigned depth)
/* Returns the list of the latch edges of LOOP. */
-static vec<edge>
+static vec<edge>
get_loop_latch_edges (const class loop *loop)
{
edge_iterator ei;
diff --git a/gcc/cfgloopanal.cc b/gcc/cfgloopanal.cc
index fd867448d63..bf89aa6e202 100644
--- a/gcc/cfgloopanal.cc
+++ b/gcc/cfgloopanal.cc
@@ -249,7 +249,7 @@ expected_loop_iterations_unbounded (const class loop *loop,
edge e;
edge_iterator ei;
gcov_type expected = -1;
-
+
if (read_profile_p)
*read_profile_p = false;
@@ -306,7 +306,7 @@ expected_loop_iterations_unbounded (const class loop *loop,
if (max != -1 && max < expected)
return max;
}
-
+
return expected;
}
diff --git a/gcc/cfgloopmanip.cc b/gcc/cfgloopmanip.cc
index 0e3ad8ed742..35b1d16bc89 100644
--- a/gcc/cfgloopmanip.cc
+++ b/gcc/cfgloopmanip.cc
@@ -170,7 +170,7 @@ fix_loop_placement (class loop *loop, bool *irred_invalidated)
successors we consider edges coming out of the loops.
If the changes may invalidate the information about irreducible regions,
- IRRED_INVALIDATED is set to true.
+ IRRED_INVALIDATED is set to true.
If LOOP_CLOSED_SSA_INVLIDATED is non-zero then all basic blocks with
changed loop_father are collected there. */
@@ -850,7 +850,7 @@ create_empty_loop_on_edge (edge entry_edge,
have no successor, which caller is expected to fix somehow.
If this may cause the information about irreducible regions to become
- invalid, IRRED_INVALIDATED is set to true.
+ invalid, IRRED_INVALIDATED is set to true.
LOOP_CLOSED_SSA_INVALIDATED, if non-NULL, is a bitmap where we store
basic blocks that had non-trivial update on their loop_father.*/
@@ -971,7 +971,7 @@ duplicate_loop (class loop *loop, class loop *target, class loop *after)
class loop *cloop;
cloop = alloc_loop ();
place_new_loop (cfun, cloop);
-
+
copy_loop_info (loop, cloop);
/* Mark the new loop as copy of LOOP. */
diff --git a/gcc/cfgrtl.cc b/gcc/cfgrtl.cc
index 1d84b29ce61..e445a489414 100644
--- a/gcc/cfgrtl.cc
+++ b/gcc/cfgrtl.cc
@@ -36,7 +36,7 @@ along with GCC; see the file COPYING3. If not see
compute_bb_for_insn, update_bb_for_insn, set_block_for_insn,
- Edge redirection with updating and optimizing of insn chain
block_label, tidy_fallthru_edge, force_nonfallthru */
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -100,7 +100,7 @@ static void rtl_dump_bb (FILE *, basic_block, int, dump_flags_t);
static int rtl_verify_flow_info_1 (void);
static void rtl_make_forwarder_block (edge);
static bool rtl_bb_info_initialized_p (basic_block bb);
-\f
+
/* Return true if NOTE is not one of the ones that must be kept paired,
so that we may simply delete it. */
@@ -282,7 +282,7 @@ delete_insn_chain (rtx start, rtx_insn *finish, bool clear_bb)
current = prev;
}
}
-\f
+
/* Create a new basic block consisting of the instructions between HEAD and END
inclusive. This function is designed to allow fast BB construction - reuses
the note and basic block struct in BB_NOTE, if any and do not grow
@@ -396,7 +396,7 @@ cfg_layout_create_basic_block (void *head, void *end, basic_block after)
return newbb;
}
-\f
+
/* Delete the insns in a (non-live) block. We physically delete every
non-deleted-note insn, and update the flow graph appropriately.
@@ -426,7 +426,7 @@ rtl_delete_block (basic_block b)
fprintf (dump_file, "deleting block %d\n", b->index);
df_bb_delete (b->index);
}
-\f
+
/* Records the basic block struct in BLOCK_FOR_INSN for every insn. */
void
@@ -559,7 +559,7 @@ update_bb_for_insn (basic_block bb)
update_bb_for_insn_chain (BB_HEAD (bb), BB_END (bb), bb);
}
-\f
+
/* Like active_insn_p, except keep the return value use or clobber around
even after reload. */
@@ -681,7 +681,7 @@ could_fall_through (basic_block src, basic_block target)
return 0;
return true;
}
-\f
+
/* Return the NOTE_INSN_BASIC_BLOCK of BB. */
rtx_note *
bb_note (basic_block bb)
@@ -1002,7 +1002,7 @@ rtl_can_merge_blocks (basic_block a, basic_block b)
|| (reload_completed
? simplejump_p (BB_END (a)) : onlyjump_p (BB_END (a)))));
}
-\f
+
/* Return the label in the head of basic block BLOCK. Create one if it doesn't
exist. */
@@ -1824,7 +1824,7 @@ rtl_tidy_fallthru_edge (edge e)
e->flags |= EDGE_FALLTHRU;
}
-\f
+
/* Should move basic block BB after basic block AFTER. NIY. */
static bool
@@ -2129,7 +2129,7 @@ commit_edge_insertions (void)
}
}
}
-\f
+
/* Print out RTL-specific basic block information (live information
at start and end with TDF_DETAILS). FLAGS are the TDF_* masks
@@ -2176,7 +2176,7 @@ rtl_dump_bb (FILE *outf, basic_block bb, int indent, dump_flags_t flags)
}
}
-\f
+
/* Like dump_function_to_file, but for RTL. Print out dataflow information
for the start of each basic block. FLAGS are the TDF_* masks documented
in dumpfile.h. */
@@ -2297,7 +2297,7 @@ print_rtl_with_bb (FILE *outf, const rtx_insn *rtx_first, dump_flags_t flags)
free (in_bb_p);
}
}
-\f
+
/* Update the branch probability of BB if a REG_BR_PROB is present. */
void
@@ -2533,7 +2533,7 @@ verify_hot_cold_block_grouping (void)
return err;
}
-\f
+
/* Perform several checks on the edges out of each block, such as
the consistency of the branch probabilities, the correctness
@@ -3135,7 +3135,7 @@ rtl_verify_flow_info (void)
return err;
}
-\f
+
/* Assume that the preceding pass has possibly eliminated jump instructions
or converted the unconditional jumps. Eliminate the edges from CFG.
Return true if any edges are eliminated. */
@@ -3468,7 +3468,7 @@ fixup_abnormal_edges (void)
return inserted;
}
-\f
+
/* Delete the unconditional jump INSN and adjust the CFG correspondingly.
Note that the INSN should be deleted *after* removing dead edges, so
that the kept edge is the fallthrough edge for a (set (pc) (pc))
@@ -3515,7 +3515,7 @@ update_cfg_for_uncondjump (rtx_insn *insn)
break;
}
}
-\f
+
/* Cut the insns from FIRST to LAST out of the insns stream. */
rtx_insn *
@@ -3536,7 +3536,7 @@ unlink_insn_chain (rtx_insn *first, rtx_insn *last)
set_first_insn (nextlast);
return first;
}
-\f
+
/* Skip over inter-block insns occurring after BB which are typically
associated with BB (e.g., barriers). If there are any such insns,
we return the last one. Otherwise, we return the end of BB. */
@@ -3674,7 +3674,7 @@ record_effective_endpoints (void)
if (cfg_layout_function_footer)
cfg_layout_function_footer = unlink_insn_chain (cfg_layout_function_footer, get_last_insn ());
}
-\f
+
namespace {
const pass_data pass_data_into_cfg_layout_mode =
@@ -3762,7 +3762,7 @@ make_pass_outof_cfg_layout_mode (gcc::context *ctxt)
{
return new pass_outof_cfg_layout_mode (ctxt);
}
-\f
+
/* Link the basic blocks in the correct order, compacting the basic
block queue while at it. If STAY_IN_CFGLAYOUT_MODE is false, this
@@ -3837,7 +3837,7 @@ relink_block_chain (bool stay_in_cfglayout_mode)
/* Finally, put basic_block_info in the new order. */
compact_blocks ();
}
-\f
+
/* Given a reorder chain, rearrange the code to match. */
@@ -4070,7 +4070,7 @@ fixup_reorder_chain (void)
dest = e_fall->dest;
}
- /* We got here if we need to add a new jump insn.
+ /* We got here if we need to add a new jump insn.
Note force_nonfallthru can delete E_FALL and thus we have to
save E_FALL->src prior to the call to force_nonfallthru. */
nb = force_nonfallthru_and_redirect (e_fall, dest, ret_label);
@@ -4168,7 +4168,7 @@ fixup_reorder_chain (void)
if (remove_unreachable_blocks)
delete_unreachable_blocks ();
}
-\f
+
/* Perform sanity checks on the insn chain.
1. Check that next/prev pointers are consistent in both the forward and
reverse direction.
@@ -4195,7 +4195,7 @@ verify_insn_chain (void)
gcc_assert (insn_cnt1 == insn_cnt2);
}
-\f
+
/* If we have assembler epilogues, the block falling through to exit must
be the last one in the reordered chain when we reach final. Ensure
that this condition is met. */
@@ -4291,7 +4291,7 @@ force_one_exit_fallthru (void)
}
}
}
-\f
+
/* Return true in case it is possible to duplicate the basic block BB. */
static bool
@@ -4496,7 +4496,7 @@ cfg_layout_duplicate_bb (basic_block bb, copy_bb_data *id)
return new_bb;
}
-\f
+
/* Main entry point to this module - initialize the datastructures for
CFG layout changes. It keeps LOOPS up-to-date if not null.
@@ -4900,7 +4900,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
else
{
rtx_insn *last = BB_HEADER (b);
-
+
while (NEXT_INSN (last))
last = NEXT_INSN (last);
SET_NEXT_INSN (last) = BB_FOOTER (a);
@@ -5011,10 +5011,10 @@ rtl_split_block_before_cond_jump (basic_block bb)
last = insn;
}
- /* Did not find everything. */
+ /* Did not find everything. */
if (found_code && split_point)
return split_block (bb, split_point)->dest;
- else
+ else
return NULL;
}
@@ -5409,7 +5409,7 @@ struct cfg_hooks cfg_layout_rtl_cfg_hooks = {
rtl_lv_add_condition_to_bb, /* lv_add_condition_to_bb */
NULL, /* lv_adjust_loop_header_phi*/
rtl_extract_cond_bb_edges, /* extract_cond_bb_edges */
- NULL, /* flush_pending_stmts */
+ NULL, /* flush_pending_stmts */
rtl_block_empty_p, /* block_empty_p */
rtl_split_block_before_cond_jump, /* split_block_before_cond_jump */
rtl_account_profile_record,
diff --git a/gcc/cgraph.cc b/gcc/cgraph.cc
index 5e60c2b73db..c576ebfc1bb 100644
--- a/gcc/cgraph.cc
+++ b/gcc/cgraph.cc
@@ -1082,7 +1082,7 @@ cgraph_edge::remove (cgraph_edge *edge)
/* Turn edge into speculative call calling N2. Update
the profile so the direct call is taken COUNT times
- with FREQUENCY.
+ with FREQUENCY.
At clone materialization time, the indirect call E will
be expanded as:
@@ -1094,7 +1094,7 @@ cgraph_edge::remove (cgraph_edge *edge)
At this time the function just creates the direct call,
the reference representing the if conditional and attaches
- them all to the original indirect call statement.
+ them all to the original indirect call statement.
speculative_id is used to link direct calls with their corresponding
IPA_REF_ADDR references when representing speculative calls.
@@ -2222,7 +2222,7 @@ cgraph_node::dump (FILE *f)
thunk_info::get (this)->dump (f);
}
else gcc_checking_assert (!thunk_info::get (this));
-
+
fprintf (f, " Called by: ");
profile_count sum = profile_count::zero ();
@@ -2774,7 +2774,7 @@ set_const_flag_1 (cgraph_node *node, bool set_const, bool looping,
When setting the flag be careful about possible interposition and
do not set the flag for functions that can be interposed and set pure
- flag for functions that can bind to other definition.
+ flag for functions that can bind to other definition.
Return true if any change was done. */
@@ -2956,7 +2956,7 @@ cgraph_node::can_remove_if_no_direct_calls_p (bool will_inline)
{
struct ipa_ref *ref;
- /* For local symbols or non-comdat group it is the same as
+ /* For local symbols or non-comdat group it is the same as
can_remove_if_no_direct_calls_p. */
if (!externally_visible || !same_comdat_group)
{
@@ -3927,7 +3927,7 @@ cgraph_node::function_symbol (enum availability *availability,
/* Walk the alias chain to return the function cgraph_node is alias of.
Walk through non virtual thunks, too. Thus we return either a function
or a virtual thunk node.
- When AVAILABILITY is non-NULL, get minimal availability in the chain.
+ When AVAILABILITY is non-NULL, get minimal availability in the chain.
When REF is non-NULL, assume that reference happens in symbol REF
when determining the availability. */
@@ -4019,7 +4019,7 @@ cgraph_node::get_untransformed_body ()
return true;
}
-/* Prepare function body. When doing LTO, read cgraph_node's body from disk
+/* Prepare function body. When doing LTO, read cgraph_node's body from disk
if it is not already present. When some IPA transformations are scheduled,
apply them. */
diff --git a/gcc/cgraph.h b/gcc/cgraph.h
index 5d3ced1b5d5..58915e52673 100644
--- a/gcc/cgraph.h
+++ b/gcc/cgraph.h
@@ -432,7 +432,7 @@ public:
/* Return 0 if symbol is known to have different address than S2,
Return 1 if symbol is known to have same address as S2,
- return 2 otherwise.
+ return 2 otherwise.
If MEMORY_ACCESSED is true, assume that both memory pointer to THIS
and S2 is going to be accessed. This eliminates the situations when
@@ -915,7 +915,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
/* Walk the alias chain to return the function cgraph_node is alias of.
Walk through thunk, too.
- When AVAILABILITY is non-NULL, get minimal availability in the chain.
+ When AVAILABILITY is non-NULL, get minimal availability in the chain.
When REF is non-NULL, assume that reference happens in symbol REF
when determining the availability. */
cgraph_node *function_symbol (enum availability *avail = NULL,
@@ -924,7 +924,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
/* Walk the alias chain to return the function cgraph_node is alias of.
Walk through non virtual thunks, too. Thus we return either a function
or a virtual thunk node.
- When AVAILABILITY is non-NULL, get minimal availability in the chain.
+ When AVAILABILITY is non-NULL, get minimal availability in the chain.
When REF is non-NULL, assume that reference happens in symbol REF
when determining the availability. */
cgraph_node *function_or_virtual_thunk_symbol
@@ -1097,7 +1097,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
present. */
bool get_untransformed_body ();
- /* Prepare function body. When doing LTO, read cgraph_node's body from disk
+ /* Prepare function body. When doing LTO, read cgraph_node's body from disk
if it is not already present. When some IPA transformations are scheduled,
apply them. */
bool get_body ();
@@ -1180,7 +1180,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
When setting the flag be careful about possible interposition and
do not set the flag for functions that can be interposed and set pure
- flag for functions that can bind to other definition.
+ flag for functions that can bind to other definition.
Return true if any change was done. */
@@ -1252,7 +1252,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
all uses of COMDAT function does not make it necessarily disappear from
the program unless we are compiling whole program or we do LTO. In this
case we know we win since dynamic linking will not really discard the
- linkonce section.
+ linkonce section.
If WILL_INLINE is true, assume that function will be inlined into all the
direct calls. */
@@ -1265,7 +1265,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public symtab_node
bool can_remove_if_no_direct_calls_and_refs_p (void);
/* Return true when function cgraph_node and its aliases can be removed from
- callgraph if all direct calls are eliminated.
+ callgraph if all direct calls are eliminated.
If WILL_INLINE is true, assume that function will be inlined into all the
direct calls. */
bool can_remove_if_no_direct_calls_p (bool will_inline = false);
@@ -2216,7 +2216,7 @@ public:
friend struct cgraph_node;
friend struct cgraph_edge;
- symbol_table ():
+ symbol_table ():
cgraph_count (0), cgraph_max_uid (1), cgraph_max_summary_id (0),
edges_count (0), edges_max_uid (1), edges_max_summary_id (0),
cgraph_released_summary_ids (), edge_released_summary_ids (),
diff --git a/gcc/cgraphbuild.cc b/gcc/cgraphbuild.cc
index f13abca1b93..1f6b38e9c5c 100644
--- a/gcc/cgraphbuild.cc
+++ b/gcc/cgraphbuild.cc
@@ -107,7 +107,7 @@ record_type_list (cgraph_node *node, tree list)
for (; list; list = TREE_CHAIN (list))
{
tree type = TREE_VALUE (list);
-
+
if (TYPE_P (type))
type = lookup_type_for_runtime (type);
STRIP_NOPS (type);
diff --git a/gcc/cgraphclones.cc b/gcc/cgraphclones.cc
index 3d97ee42f77..e13c96e553a 100644
--- a/gcc/cgraphclones.cc
+++ b/gcc/cgraphclones.cc
@@ -105,7 +105,7 @@ cgraph_edge::clone (cgraph_node *n, gcall *call_stmt, unsigned stmt_uid,
tree decl;
if (call_stmt && (decl = gimple_call_fndecl (call_stmt))
- /* When the call is speculative, we need to resolve it
+ /* When the call is speculative, we need to resolve it
via cgraph_resolve_speculation and not here. */
&& !speculative)
{
@@ -145,7 +145,7 @@ cgraph_edge::clone (cgraph_node *n, gcall *call_stmt, unsigned stmt_uid,
/* Update IPA profile. Local profiles need no updating in original. */
if (update_original)
- count = count.combine_with_ipa_count_within (count.ipa ()
+ count = count.combine_with_ipa_count_within (count.ipa ()
- new_edge->count.ipa (),
caller->count);
symtab->call_edge_duplication_hooks (this, new_edge);
@@ -339,7 +339,7 @@ localize_profile (cgraph_node *n)
When UPDATE_ORIGINAL is true, the counts are subtracted from the original
function's profile to reflect the fact that part of execution is handled
- by node.
+ by node.
When CALL_DUPLICATION_HOOK is true, the ipa passes are acknowledged about
the new clone. Otherwise the caller is responsible for doing so later.
@@ -597,7 +597,7 @@ cgraph_node::create_virtual_clone (const vec<cgraph_edge *> &redirect_callers,
DECL_STRUCT_FUNCTION (new_decl) = NULL;
DECL_ARGUMENTS (new_decl) = NULL;
DECL_INITIAL (new_decl) = NULL;
- DECL_RESULT (new_decl) = NULL;
+ DECL_RESULT (new_decl) = NULL;
/* We cannot do DECL_RESULT (new_decl) = NULL; here because of LTO partitioning
sometimes storing only clone decl instead of original. */
@@ -656,7 +656,7 @@ cgraph_node::create_virtual_clone (const vec<cgraph_edge *> &redirect_callers,
}
/* callgraph node being removed from symbol table; see if its entry can be
- replaced by other inline clone.
+ replaced by other inline clone.
INFO is clone info to attach to the new root. */
cgraph_node *
cgraph_node::find_replacement (clone_info *info)
@@ -748,7 +748,7 @@ cgraph_node::find_replacement (clone_info *info)
}
/* Like cgraph_set_call_stmt but walk the clone tree and update all
- clones sharing the same function body.
+ clones sharing the same function body.
When WHOLE_SPECULATIVE_EDGES is true, all three components of
speculative edge gets updated. Otherwise we update only direct
call. */
@@ -913,9 +913,9 @@ update_call_expr (cgraph_node *new_version)
edges which should be redirected to point to
NEW_VERSION. ALL the callees edges of the node
are cloned to the new version node. Return the new
- version node.
+ version node.
- If non-NULL BLOCK_TO_COPY determine what basic blocks
+ If non-NULL BLOCK_TO_COPY determine what basic blocks
was copied to prevent duplications of calls that are dead
in the clone. */
diff --git a/gcc/cgraphunit.cc b/gcc/cgraphunit.cc
index 59ce2708b7b..39a30ed4b43 100644
--- a/gcc/cgraphunit.cc
+++ b/gcc/cgraphunit.cc
@@ -92,7 +92,7 @@ along with GCC; see the file COPYING3. If not see
Interprocedural passes differ from small interprocedural
passes by their ability to operate across whole program
at linktime. Their analysis stage is performed early to
- both reduce linking times and linktime memory usage by
+ both reduce linking times and linktime memory usage by
not having to represent whole program in memory.
d) LTO streaming. When doing LTO, everything important gets
@@ -142,7 +142,7 @@ along with GCC; see the file COPYING3. If not see
out and thus all variables are output to the file.
Note that with -fno-toplevel-reorder passes 5 and 6
- are combined together in cgraph_output_in_order.
+ are combined together in cgraph_output_in_order.
Finally there are functions to manipulate the callgraph from
backend.
@@ -277,7 +277,7 @@ symtab_node::needed_p (void)
static symtab_node symtab_terminator (SYMTAB_SYMBOL);
static symtab_node *queued_nodes = &symtab_terminator;
-/* Add NODE to queue starting at QUEUED_NODES.
+/* Add NODE to queue starting at QUEUED_NODES.
The queue is linked via AUX pointers and terminated by pointer to 1. */
static void
@@ -985,7 +985,7 @@ varpool_node::finalize_decl (tree decl)
}
/* EDGE is an polymorphic call. Mark all possible targets as reachable
- and if there is only one target, perform trivial devirtualization.
+ and if there is only one target, perform trivial devirtualization.
REACHABLE_CALL_TARGETS collects target lists we already walked to
avoid duplicate work. */
@@ -1003,7 +1003,7 @@ walk_polymorphic_call_targets (hash_set<void *> *reachable_call_targets,
if (!reachable_call_targets->add (cache_token))
{
if (symtab->dump_file)
- dump_possible_polymorphic_call_targets
+ dump_possible_polymorphic_call_targets
(symtab->dump_file, edge);
for (i = 0; i < targets.length (); i++)
@@ -1690,7 +1690,7 @@ mark_functions_to_output (void)
/* DECL is FUNCTION_DECL. Initialize datastructures so DECL is a function
in lowered gimple form. IN_SSA is true if the gimple is in SSA.
-
+
Set current_function_decl and cfun to newly constructed empty function body.
return basic block in the function body. */
diff --git a/gcc/collect-utils.cc b/gcc/collect-utils.cc
index 2444aa6a3d5..e597b382484 100644
--- a/gcc/collect-utils.cc
+++ b/gcc/collect-utils.cc
@@ -94,7 +94,7 @@ setup_signals (void)
signal (SIGCHLD, SIG_DFL);
#endif
}
-\f
+
/* Wait for a process to finish, and exit if a nonzero status is found. */
int
@@ -136,7 +136,7 @@ do_wait (const char *prog, struct pex_obj *pex)
fatal_error (input_location, "%s returned %d exit status", prog, ret);
}
-\f
+
/* Execute a program, and wait for the reply. */
struct pex_obj *
diff --git a/gcc/collect2.cc b/gcc/collect2.cc
index 63b9a0c233a..8d55f709417 100644
--- a/gcc/collect2.cc
+++ b/gcc/collect2.cc
@@ -51,7 +51,7 @@ along with GCC; see the file COPYING3. If not see
#include "obstack.h"
#include "intl.h"
#include "version.h"
-\f
+
/* On certain systems, we have code that works by scanning the object file
directly. But this code uses system-specific header files and library
functions, so turn it off in a cross-compiler. Likewise, the names of
@@ -161,7 +161,7 @@ int do_collecting = 0;
/* Nonzero if we should suppress the automatic demangling of identifiers
in linker error messages. Set from COLLECT_NO_DEMANGLE. */
int no_demangle;
-\f
+
/* Linked lists of constructor and destructor names. */
struct id
@@ -376,7 +376,7 @@ typedef int scanfilter;
static void scan_prog_file (const char *, scanpass, scanfilter);
-\f
+
/* Delete tempfiles and exit function. */
void
@@ -417,7 +417,7 @@ notice_translated (const char *cmsgid, ...)
vfprintf (stderr, cmsgid, ap);
va_end (ap);
}
-\f
+
int
file_exists (const char *name)
{
@@ -455,7 +455,7 @@ extract_string (const char **pp)
*pp = p;
return XOBFINISH (&temporary_obstack, char *);
}
-\f
+
/* Return the kind of symbol denoted by name S. */
static symkind
@@ -507,7 +507,7 @@ is_ctor_dtor (const char *s)
}
return SYM_REGULAR;
}
-\f
+
/* We maintain two prefix lists: one from COMPILER_PATH environment variable
and one from the PATH variable. */
@@ -763,7 +763,7 @@ do_link (char **ld_argv, const char *atsuffix)
may_unlink_output_file = true;
}
}
-\f
+
/* Main program. */
int
@@ -1812,7 +1812,7 @@ main (int argc, char **argv)
return 0;
}
-\f
+
/* Unlink FILE unless we are debugging or this is the output_file
and we may not unlink it. */
@@ -1843,7 +1843,7 @@ maybe_unlink_list (char **file_list)
maybe_unlink (*(tmp++));
}
-\f
+
static long sequence_number = 0;
/* Add a name to a linked list. */
@@ -2265,7 +2265,7 @@ write_aix_file (FILE *stream, struct id *list)
}
}
#endif
-\f
+
#ifdef OBJECT_FORMAT_NONE
/* Check to make sure the file is an LTO object file. */
@@ -2629,7 +2629,7 @@ scan_libraries (const char *prog_name)
#endif /* OBJECT_FORMAT_NONE */
-\f
+
/*
* COFF specific stuff.
*/
@@ -3068,7 +3068,7 @@ static void
post_ld_pass (bool temp_file) {
if (!(temp_file && flag_idsym) && !flag_dsym)
return;
-
+
do_dsymutil (output_file);
}
#else
diff --git a/gcc/combine-stack-adj.cc b/gcc/combine-stack-adj.cc
index e479aea71a1..84100e886e0 100644
--- a/gcc/combine-stack-adj.cc
+++ b/gcc/combine-stack-adj.cc
@@ -52,7 +52,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-pass.h"
#include "rtl-iter.h"
-\f
+
/* This structure records two kinds of stack references between stack
adjusting instructions: stack references in memory addresses for
regular insns and all stack references for debug insns. */
@@ -790,7 +790,7 @@ combine_stack_adjustments_for_block (basic_block bb, bitmap live)
if (copy)
BITMAP_FREE (copy);
}
-\f
+
static unsigned int
rest_of_handle_stack_adjustments (void)
{
diff --git a/gcc/combine.cc b/gcc/combine.cc
index 053879500b7..9e44020b0cc 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -128,7 +128,7 @@ static rtx i2mod_old_rhs;
/* When I2MOD is nonnull, this is a copy of the new right hand side. */
static rtx i2mod_new_rhs;
-\f
+
struct reg_stat_type {
/* Record last point of death of (hard or pseudo) register n. */
rtx_insn *last_death;
@@ -297,7 +297,7 @@ static rtx_insn *added_notes_insn;
static basic_block this_basic_block;
static bool optimize_this_for_speed_p;
-\f
+
/* Length of the currently allocated uid_insn_cost array. */
static int max_uid_known;
@@ -371,7 +371,7 @@ static scalar_int_mode nonzero_bits_mode;
static int nonzero_sign_valid;
-\f
+
/* Record one modification to rtl structure
to be undone by storing old_contents into *where. */
@@ -481,7 +481,7 @@ static bool unmentioned_reg_p (rtx, rtx);
static void record_truncated_values (rtx *, void *);
static bool reg_truncated_to_mode (machine_mode, const_rtx);
static rtx gen_lowpart_or_truncate (machine_mode, rtx);
-\f
+
/* It is not safe to use ordinary gen_lowpart in combine.
See comments in gen_lowpart_for_combine. */
@@ -503,7 +503,7 @@ static rtx gen_lowpart_or_truncate (machine_mode, rtx);
static const struct rtl_hooks combine_rtl_hooks = RTL_HOOKS_INITIALIZER;
-\f
+
/* Convenience wrapper for the canonicalize_comparison target hook.
Target hooks cannot use enum rtx_code. */
static inline void
@@ -671,7 +671,7 @@ find_single_use (rtx dest, rtx_insn *insn, rtx_insn **ploc)
return 0;
}
-\f
+
/* Substitute NEWVAL, an rtx expression, into INTO, a place in some
insn. The substitution can be undone by undo_all. If INTO is already
set to NEWVAL, do not record this change. Because computing NEWVAL might
@@ -808,7 +808,7 @@ do_SUBST_LINK (struct insn_link **into, struct insn_link *newval)
}
#define SUBST_LINK(oldval, newval) do_SUBST_LINK (&oldval, newval)
-\f
+
/* Subroutine of try_combine. Determine whether the replacement patterns
NEWPAT, NEWI2PAT and NEWOTHERPAT are cheaper according to insn_cost
than the original sequence I0, I1, I2, I3 and undobuf.other_insn. Note
@@ -979,7 +979,7 @@ delete_noop_moves (void)
return edges_deleted;
}
-\f
+
/* Return false if we do not want to (or cannot) combine DEF. */
static bool
can_combine_def_p (df_ref def)
@@ -1107,7 +1107,7 @@ insn_a_feeds_b (rtx_insn *a, rtx_insn *b)
return true;
return false;
}
-\f
+
/* Main entry point for combiner. F is the first insn of the function.
NREGS is the first unused pseudo-reg number.
@@ -1475,7 +1475,7 @@ init_reg_last (void)
FOR_EACH_VEC_ELT (reg_stat, i, p)
memset (p, 0, offsetof (reg_stat_type, sign_bit_copies));
}
-\f
+
/* Set up any promoted values for incoming argument registers. */
static void
@@ -1711,7 +1711,7 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
}
}
}
-\f
+
/* See if INSN can be combined into I3. PRED, PRED2, SUCC and SUCC2 are
optionally insns that were previously combined into I3 or that will be
combined into the merger of INSN and I3. The order is PRED, PRED2,
@@ -1752,7 +1752,7 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED,
}
else if (next_active_insn (insn) != i3)
all_adjacent = false;
-
+
/* Can combine only if previous insn is a SET of a REG or a SUBREG,
or a PARALLEL consisting of such a SET and CLOBBERs.
@@ -2047,7 +2047,7 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED,
return 1;
}
-\f
+
/* LOC is the location within I3 that contains its pattern or the component
of a PARALLEL of the pattern. We validate that it is valid for combining.
@@ -2176,7 +2176,7 @@ combinable_i3pat (rtx_insn *i3, rtx *loc, rtx i2dest, rtx i1dest, rtx i0dest,
return 1;
}
-\f
+
/* Return 1 if X is an arithmetic expression that contains a multiplication
and division. We don't count multiplications by powers of two here. */
@@ -2202,7 +2202,7 @@ contains_muldiv (rtx x)
return 0;
}
}
-\f
+
/* Determine whether INSN can be used in a combination. Return nonzero if
not. This is used in try_combine to detect early some cases where we
can't perform combinations. */
@@ -2611,7 +2611,7 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
/* If I0 loads a memory and I3 sets the same memory, then I1 and I2
are likely manipulating its value. Ideally we'll be able to combine
- all four insns into a bitfield insertion of some kind.
+ all four insns into a bitfield insertion of some kind.
Note the source in I0 might be inside a sign/zero extension and the
memory modes in I0 and I3 might be different. So extract the address
@@ -4757,7 +4757,7 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
return ret;
}
-\f
+
/* Get a marker for undoing to the current state. */
static void *
@@ -4828,7 +4828,7 @@ undo_commit (void)
}
undobuf.undos = 0;
}
-\f
+
/* Find the innermost point within the rtx at LOC, possibly LOC itself,
where we have an arithmetic expression and return that point. LOC will
be inside INSN.
@@ -5301,7 +5301,7 @@ find_split_point (rtx *loc, rtx_insn *insn, bool set_src)
return 0;
}
}
-\f
+
/* Throughout X, replace FROM with TO, and return the result.
The result is TO if X is FROM;
otherwise the result is X, but its contents may have been modified.
@@ -5616,7 +5616,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy)
return x;
}
-\f
+
/* If X is a commutative operation whose operands are not in the canonical
order, use substitutions to swap them. */
@@ -6368,7 +6368,7 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest,
return x;
}
-\f
+
/* Simplify X, an IF_THEN_ELSE expression. Return the new expression. */
static rtx
@@ -6734,7 +6734,7 @@ simplify_if_then_else (rtx x)
return x;
}
-\f
+
/* Simplify X, a SET expression. Return the new expression. */
static rtx
@@ -7047,7 +7047,7 @@ simplify_set (rtx x)
/* Convert this into a field assignment operation, if possible. */
return make_field_assignment (x);
}
-\f
+
/* Simplify, X, and AND, IOR, or XOR operation, and return the simplified
result. */
@@ -7119,7 +7119,7 @@ simplify_logical (rtx x)
return x;
}
-\f
+
/* We consider ZERO_EXTRACT, SIGN_EXTRACT, and SIGN_EXTEND as "compound
operations" because they can be replaced with two more basic operations.
ZERO_EXTEND is also considered "compound" because it can be replaced with
@@ -7337,7 +7337,7 @@ expand_compound_operation (rtx x)
return tem;
}
-\f
+
/* X is a SET which contains an assignment of one object into
a part of another (such as a bit-field assignment, STRICT_LOW_PART,
or certain SUBREGS). If possible, convert it into a series of
@@ -7467,7 +7467,7 @@ expand_field_assignment (const_rtx x)
return x;
}
-\f
+
/* Return an RTX for a reference to LEN bits of INNER. If POS_RTX is nonzero,
it is an RTX that represents the (variable) starting position; otherwise,
POS is the (constant) starting bit position. Both are counted from the LSB.
@@ -7902,7 +7902,7 @@ make_extraction (machine_mode mode, rtx inner, HOST_WIDE_INT pos,
return new_rtx;
}
-\f
+
/* See if X (of mode MODE) contains an ASHIFT of COUNT or more bits that
can be commuted with any other operations in X. Return X without
that shift if so. */
@@ -7951,7 +7951,7 @@ extract_left_shift (scalar_int_mode mode, rtx x, int count)
return 0;
}
-\f
+
/* Subroutine of make_compound_operation. *X_PTR is the rtx at the current
level of the expression and MODE is its mode. IN_CODE is as for
make_compound_operation. *NEXT_CODE_PTR is the value of IN_CODE
@@ -8447,7 +8447,7 @@ make_compound_operation (rtx x, enum rtx_code in_code)
maybe_swap_commutative_operands (x);
return x;
}
-\f
+
/* Given M see if it is a value that would select a field of bits
within an item, but not the entire word. Return -1 if not.
Otherwise, return the starting position of the field, where 0 is the
@@ -8473,7 +8473,7 @@ get_pos_from_mask (unsigned HOST_WIDE_INT m, unsigned HOST_WIDE_INT *plen)
*plen = len;
return pos;
}
-\f
+
/* If X refers to a register that equals REG in value, replace these
references with REG. */
static rtx
@@ -9188,7 +9188,7 @@ force_int_to_mode (rtx x, scalar_int_mode mode, scalar_int_mode xmode,
/* Ensure we return a value of the proper mode. */
return gen_lowpart_or_truncate (mode, x);
}
-\f
+
/* Return nonzero if X is an expression that has one of two values depending on
whether some other value is zero or nonzero. In that case, we return the
value that is being tested, *PTRUE is set to the value if the rtx being
@@ -9421,7 +9421,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
*ptrue = *pfalse = x;
return 0;
}
-\f
+
/* Return the value of expression X given the fact that condition COND
is known to be true when applied to REG as its first operand and VAL
as its second. X is known to not be shared and so can be modified in
@@ -9579,7 +9579,7 @@ known_cond (rtx x, enum rtx_code cond, rtx reg, rtx val)
return x;
}
-\f
+
/* See if X and Y are equal for the purposes of seeing if we can rewrite an
assignment as a field assignment. */
@@ -9625,7 +9625,7 @@ rtx_equal_for_field_assignment_p (rtx x, rtx y, bool widen_x)
above cases are true. */
return 0;
}
-\f
+
/* See if X, a SET operation, can be rewritten as a bit-field assignment.
Return that assignment if so.
@@ -9753,7 +9753,7 @@ make_field_assignment (rtx x)
&& rtx_equal_for_field_assignment_p (XEXP (rhs, 0), dest))
c1 = INTVAL (XEXP (rhs, 1)), other = lhs;
/* The second SUBREG that might get in the way is a paradoxical
- SUBREG around the first operand of the AND. We want to
+ SUBREG around the first operand of the AND. We want to
pretend the operand is as wide as the destination here. We
do this by adjusting the MEM to wider mode for the sole
purpose of the call to rtx_equal_for_field_assignment_p. Also
@@ -9770,7 +9770,7 @@ make_field_assignment (rtx x)
&& rtx_equal_for_field_assignment_p (XEXP (lhs, 0), dest))
c1 = INTVAL (XEXP (lhs, 1)), other = rhs;
/* The second SUBREG that might get in the way is a paradoxical
- SUBREG around the first operand of the AND. We want to
+ SUBREG around the first operand of the AND. We want to
pretend the operand is as wide as the destination here. We
do this by adjusting the MEM to wider mode for the sole
purpose of the call to rtx_equal_for_field_assignment_p. Also
@@ -9826,7 +9826,7 @@ make_field_assignment (rtx x)
return gen_rtx_SET (assign, src);
}
-\f
+
/* See if X is of the form (+ (* a c) (* b c)) and convert to (* (+ a b) c)
if so. */
@@ -10015,7 +10015,7 @@ distribute_and_simplify_rtx (rtx x, int n)
return NULL_RTX;
}
-\f
+
/* Simplify a logical `and' of VAROP with the constant CONSTOP, to be done
in MODE. Return an equivalent form, if different from (and VAROP
(const_int CONSTOP)). Otherwise, return NULL_RTX. */
@@ -10151,7 +10151,7 @@ simplify_and_const_int (rtx x, scalar_int_mode mode, rtx varop,
x = gen_lowpart (mode, x);
return x;
}
-\f
+
/* Given a REG X of mode XMODE, compute which bits in X can be nonzero.
We don't care about bits outside of those defined in MODE.
We DO care about all the bits in MODE, even if XMODE is smaller than MODE.
@@ -10263,7 +10263,7 @@ reg_num_sign_bit_copies_for_combine (const_rtx x, scalar_int_mode xmode,
return NULL;
}
-\f
+
/* Return the number of "extended" bits there are in X, when interpreted
as a quantity in MODE whose signedness is indicated by UNSIGNEDP. For
unsigned quantities, this is the number of high-order zero bits.
@@ -10421,7 +10421,7 @@ merge_outer_ops (enum rtx_code *pop0, HOST_WIDE_INT *pconst0, enum rtx_code op1,
return 1;
}
-\f
+
/* A helper to simplify_shift_const_1 to determine the mode we can perform
the shift in. The original shift operation CODE is performed on OP in
ORIG_MODE. Return the wider mode MODE if we can perform the operation
@@ -11319,7 +11319,7 @@ simplify_shift_const (rtx x, enum rtx_code code, machine_mode result_mode,
return x;
}
-\f
+
/* A subroutine of recog_for_combine. See there for arguments and
return value. */
@@ -11669,7 +11669,7 @@ recog_for_combine (rtx *pnewpat, rtx_insn *insn, rtx *pnotes)
return insn_code_number;
}
-\f
+
/* Like gen_lowpart_general but for use by combine. In combine it
is not possible to create any new pseudoregs. However, it is
safe to create invalid memory addresses, because combine will
@@ -11764,7 +11764,7 @@ gen_lowpart_for_combine (machine_mode omode, rtx x)
fail:
return gen_rtx_CLOBBER (omode, const0_rtx);
}
-\f
+
/* Try to simplify a comparison between OP0 and a constant OP1,
where CODE is the comparison code that will be tested, into a
(CODE OP0 const0_rtx) form.
@@ -11964,7 +11964,7 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
*pop1 = GEN_INT (const_op);
return code;
}
-\f
+
/* Simplify a comparison between *POP0 and *POP1 where CODE is the
comparison code that will be tested.
@@ -13056,7 +13056,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
return code;
}
-\f
+
/* Utility function for record_value_for_reg. Count number of
rtxs in X. */
static int
@@ -13100,7 +13100,7 @@ count_rtxs (rtx x)
return ret;
}
-\f
+
/* Utility function for following routine. Called when X is part of a value
being stored into last_set_value. Sets last_set_table_tick
for each register mentioned. Similar to mention_regs in cse.cc */
@@ -13574,7 +13574,7 @@ check_promoted_subreg (rtx_insn *insn, rtx x)
}
}
}
-\f
+
/* Verify that all the registers and memory references mentioned in *LOC are
still valid. *LOC was part of a value set in INSN when label_tick was
equal to TICK. Return 0 if some are not. If REPLACE is nonzero, replace
@@ -13753,7 +13753,7 @@ get_last_value (const_rtx x)
return 0;
}
-\f
+
/* Define three variables used for communication between the following
routines. */
@@ -13842,7 +13842,7 @@ reg_dead_at_p (rtx reg, rtx_insn *insn)
return 1;
}
-\f
+
/* Note hard registers in X that are used. */
static void
@@ -13931,7 +13931,7 @@ mark_used_regs_combine (rtx x)
}
}
}
-\f
+
/* Remove register number REGNO from the dead registers list of INSN.
Return the note used to record the death, if there was one. */
@@ -14117,7 +14117,7 @@ move_deaths (rtx x, rtx maybe_kill_insn, int from_luid, rtx_insn *to_insn,
move_deaths (XEXP (x, i), maybe_kill_insn, from_luid, to_insn, pnotes);
}
}
-\f
+
/* Return 1 if X is the target of a bit-field assignment in BODY, the
pattern of an insn. X must be a REG. */
@@ -14162,7 +14162,7 @@ reg_bitfield_target_p (rtx x, rtx body)
return 0;
}
-\f
+
/* Given a chain of REG_NOTES originally from FROM_INSN, try to place them
as appropriate. I3 and I2 are the insns resulting from the combination
insns including FROM (I2 may be zero).
@@ -14765,7 +14765,7 @@ distribute_notes (rtx notes, rtx_insn *from_insn, rtx_insn *i3, rtx_insn *i2,
}
}
}
-\f
+
/* Similarly to above, distribute the LOG_LINKS that used to be present on
I3, I2, and I1 to new locations. This is also called to add a link
pointing at I3 when I3's destination is changed. */
@@ -14883,7 +14883,7 @@ distribute_links (struct insn_link *links)
}
}
}
-\f
+
/* Check for any register or memory mentioned in EQUIV that is not
mentioned in EXPR. This is used to restrict EQUIV to "specializations"
of EXPR where some registers may have been replaced by constants. */
@@ -14901,7 +14901,7 @@ unmentioned_reg_p (rtx equiv, rtx expr)
}
return false;
}
-\f
+
DEBUG_FUNCTION void
dump_combine_stats (FILE *file)
{
@@ -14919,7 +14919,7 @@ dump_combine_total_stats (FILE *file)
"\n;; Combiner totals: %d attempts, %d substitutions (%d requiring new space),\n;; %d successes.\n",
total_attempts, total_merges, total_extras, total_successes);
}
-\f
+
/* Make pseudo-to-pseudo copies after every hard-reg-to-pseudo-copy, because
the reg-to-reg copy can usefully combine with later instructions, but we
do not want to combine the hard reg into later instructions, for that
diff --git a/gcc/common/config/avr/avr-common.cc b/gcc/common/config/avr/avr-common.cc
index f4e3f550b07..518da891982 100644
--- a/gcc/common/config/avr/avr-common.cc
+++ b/gcc/common/config/avr/avr-common.cc
@@ -7,12 +7,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
diff --git a/gcc/common/config/epiphany/epiphany-common.cc b/gcc/common/config/epiphany/epiphany-common.cc
index 175d5a0c945..9cb0ed18fc2 100644
--- a/gcc/common/config/epiphany/epiphany-common.cc
+++ b/gcc/common/config/epiphany/epiphany-common.cc
@@ -34,7 +34,7 @@ along with GCC; see the file COPYING3. If not see
#define TARGET_HAVE_NAMED_SECTIONS true
#include "common/common-target-def.h"
-\f
+
/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
static const struct default_options epiphany_option_optimization_table[] =
{
diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index 34737b3661a..fd8c53c72ed 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -824,7 +824,7 @@ ix86_handle_option (struct gcc_options *opts,
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_UINTR_UNSET;
}
return true;
-
+
case OPT_mhreset:
if (value)
{
diff --git a/gcc/common/config/mcore/mcore-common.cc b/gcc/common/config/mcore/mcore-common.cc
index 8c12299db9b..d91f21683fc 100644
--- a/gcc/common/config/mcore/mcore-common.cc
+++ b/gcc/common/config/mcore/mcore-common.cc
@@ -26,7 +26,7 @@
/* What options are we going to default to specific settings when
-O* happens; the user can subsequently override these settings.
-
+
Omitting the frame pointer is a very good idea on the MCore.
Scheduling isn't worth anything on the current MCore implementation. */
diff --git a/gcc/common/config/msp430/msp430-common.cc b/gcc/common/config/msp430/msp430-common.cc
index 7da73900495..d98ac0d817d 100644
--- a/gcc/common/config/msp430/msp430-common.cc
+++ b/gcc/common/config/msp430/msp430-common.cc
@@ -57,7 +57,7 @@ msp430_handle_option (struct gcc_options *opts ATTRIBUTE_UNUSED,
}
break;
}
-
+
return true;
}
diff --git a/gcc/common/config/nds32/nds32-common.cc b/gcc/common/config/nds32/nds32-common.cc
index a2ce0bb362d..a608d9a531f 100644
--- a/gcc/common/config/nds32/nds32-common.cc
+++ b/gcc/common/config/nds32/nds32-common.cc
@@ -116,7 +116,7 @@ nds32_except_unwind_info (struct gcc_options *opts ATTRIBUTE_UNUSED)
/* ------------------------------------------------------------------------ */
-\f
+
/* Run-time Target Specification. */
/* The default target flags consist of
@@ -152,7 +152,7 @@ nds32_except_unwind_info (struct gcc_options *opts ATTRIBUTE_UNUSED)
#undef TARGET_OPTION_OPTIMIZATION_TABLE
#define TARGET_OPTION_OPTIMIZATION_TABLE nds32_option_optimization_table
-\f
+
/* Defining the Output Assembler Language. */
#undef TARGET_EXCEPT_UNWIND_INFO
diff --git a/gcc/common/config/pdp11/pdp11-common.cc b/gcc/common/config/pdp11/pdp11-common.cc
index 81a57bbdf84..2b88be425cf 100644
--- a/gcc/common/config/pdp11/pdp11-common.cc
+++ b/gcc/common/config/pdp11/pdp11-common.cc
@@ -50,7 +50,7 @@ pdp11_handle_option (struct gcc_options *opts,
opts->x_target_flags &= ~MASK_40;
opts->x_target_flags |= MASK_45;
return true;
-
+
case OPT_msoft_float:
opts->x_target_flags &= ~MASK_AC0;
return true;
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 0a89fdaffe2..78305644a90 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -104,7 +104,7 @@ static const riscv_implied_info_t riscv_implied_info[] =
{"zfh", "zfhmin"},
{"zfhmin", "f"},
-
+
{"zhinx", "zhinxmin"},
{"zhinxmin", "zfinx"},
diff --git a/gcc/common/config/rs6000/rs6000-common.cc b/gcc/common/config/rs6000/rs6000-common.cc
index c76b5c27bb6..4eb2fefd5ca 100644
--- a/gcc/common/config/rs6000/rs6000-common.cc
+++ b/gcc/common/config/rs6000/rs6000-common.cc
@@ -174,7 +174,7 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
if (invert)
opts->x_rs6000_debug &= ~mask;
- else
+ else
opts->x_rs6000_debug |= mask;
}
break;
diff --git a/gcc/common/config/rx/rx-common.cc b/gcc/common/config/rx/rx-common.cc
index 36ee9d2cb7a..80aba36c3b9 100644
--- a/gcc/common/config/rx/rx-common.cc
+++ b/gcc/common/config/rx/rx-common.cc
@@ -51,11 +51,11 @@ rx_handle_option (struct gcc_options *opts,
return value >= 0 && value <= 4;
case OPT_mcpu_:
- if ((enum rx_cpu_types) value == RX200 ||
+ if ((enum rx_cpu_types) value == RX200 ||
(enum rx_cpu_types) value == RX100)
opts->x_target_flags |= MASK_NO_USE_FPU;
break;
-
+
case OPT_fpu:
if (opts->x_rx_cpu_type == RX200)
error_at (loc, "the RX200 cpu does not have FPU hardware");
diff --git a/gcc/compare-elim.cc b/gcc/compare-elim.cc
index 5cbd2c027b1..dd59a12cb91 100644
--- a/gcc/compare-elim.cc
+++ b/gcc/compare-elim.cc
@@ -45,7 +45,7 @@ along with GCC; see the file COPYING3. If not see
[(set (reg:CCM) (compare:CCM (operation) (immediate)))
(set (reg) (operation)]
-
+
The mode CCM will be chosen as if by SELECT_CC_MODE.
Note that unlike NOTICE_UPDATE_CC, we do not handle memory operands.
@@ -68,7 +68,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-pass.h"
#include "domwalk.h"
-\f
+
/* These structures describe a comparison and how it is used. */
/* The choice of maximum 3 uses comes from wanting to eliminate the two
@@ -125,7 +125,7 @@ struct comparison
/* Whether IN_A is wrapped in a NOT before being compared. */
bool not_in_a;
};
-
+
static vec<comparison *> all_compares;
/* Return whether X is a NOT unary expression. */
@@ -874,13 +874,13 @@ try_eliminate_compare (struct comparison *cmp)
rtvec v = rtvec_alloc (2);
RTVEC_ELT (v, 0) = y;
RTVEC_ELT (v, 1) = x;
-
+
rtx pat = gen_rtx_PARALLEL (VOIDmode, v);
-
+
/* Succeed if the new instruction is valid. Note that we may have started
a change group within maybe_select_cc_mode, therefore we must continue. */
validate_change (insn, &PATTERN (insn), pat, true);
-
+
if (!apply_change_group ())
return false;
diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index 5c9f727b255..bbc3bd939cb 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -1068,7 +1068,7 @@ aarch64_simd_builtin_type (machine_mode mode,
return type;
}
-
+
static void
aarch64_init_simd_builtin_types (void)
{
diff --git a/gcc/config/aarch64/aarch64-cost-tables.h b/gcc/config/aarch64/aarch64-cost-tables.h
index 48522606fbe..5f3a391c1a8 100644
--- a/gcc/config/aarch64/aarch64-cost-tables.h
+++ b/gcc/config/aarch64/aarch64-cost-tables.h
@@ -346,7 +346,7 @@ const struct cpu_cost_table thunderx2t99_extra_costs =
}
};
-const struct cpu_cost_table thunderx3t110_extra_costs =
+const struct cpu_cost_table thunderx3t110_extra_costs =
{
/* ALU */
{
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index fcc3a66cdf2..1ccffafa563 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -613,7 +613,7 @@ struct aarch64_address_info {
};
#define AARCH64_FUSION_PAIR(x, name) \
- AARCH64_FUSE_##name##_index,
+ AARCH64_FUSE_##name##_index,
/* Supported fusion operations. */
enum aarch64_fusion_pairs_index
{
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 7591a66e008..f1bbff3d863 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -9391,7 +9391,7 @@ aarch64_process_components (sbitmap components, bool prologue_p)
{
bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno);
machine_mode mode = aarch64_reg_save_mode (regno);
-
+
rtx reg = gen_rtx_REG (mode, regno);
poly_int64 offset = cfun->machine->frame.reg_offset[regno];
if (frame_pointer_needed)
@@ -9779,7 +9779,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2,
considered live at the start of the called function.
For SIMD functions we need to return 1 for FP registers that are saved and
- restored by a function but are not zero in call_used_regs. If we do not do
+ restored by a function but are not zero in call_used_regs. If we do not do
this optimizations may remove the restore of the register. */
int
@@ -10416,7 +10416,7 @@ aarch64_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
/* Implement TARGET_CASE_VALUES_THRESHOLD.
The expansion for a table switch is quite expensive due to the number
of instructions, the table lookup and hard to predict indirect jump.
- When optimizing for speed, and -O3 enabled, use the per-core tuning if
+ When optimizing for speed, and -O3 enabled, use the per-core tuning if
set, otherwise use tables for >= 11 cases as a tradeoff between size and
performance. When optimizing for size, use 8 for smallest codesize. */
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index db6ec5c48d8..f9e0c509979 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -37,7 +37,7 @@
#define TARGET_CPU_CPP_BUILTINS() \
aarch64_cpu_cpp_builtins (pfile)
-\f
+
#define REGISTER_TARGET_PRAGMAS() aarch64_register_pragmas ()
@@ -629,7 +629,7 @@ enum class aarch64_feature : unsigned char {
#define FP_SIMD_SAVED_REGNUM_P(REGNO) \
(((unsigned) (REGNO - V8_REGNUM)) <= (V23_REGNUM - V8_REGNUM))
-\f
+
/* Register and constant classes. */
enum reg_class
@@ -746,7 +746,7 @@ extern enum aarch64_processor aarch64_tune;
/* RTL generation support. */
#define INIT_EXPANDERS aarch64_init_expanders ()
-\f
+
/* Stack layout; function entry, exit and calling. */
#define STACK_GROWS_DOWNWARD 1
@@ -944,7 +944,7 @@ typedef struct
#define FUNCTION_ARG_REGNO_P(REGNO) \
aarch64_function_arg_regno_p(REGNO)
-\f
+
/* ISA Features. */
@@ -1086,7 +1086,7 @@ typedef struct
/* To start with. */
#define BRANCH_COST(SPEED_P, PREDICTABLE_P) \
(aarch64_branch_cost (SPEED_P, PREDICTABLE_P))
-\f
+
/* Assembly output. */
diff --git a/gcc/config/aarch64/falkor-tag-collision-avoidance.cc b/gcc/config/aarch64/falkor-tag-collision-avoidance.cc
index 5f198290568..0bd0b3aec4c 100644
--- a/gcc/config/aarch64/falkor-tag-collision-avoidance.cc
+++ b/gcc/config/aarch64/falkor-tag-collision-avoidance.cc
@@ -419,7 +419,7 @@ avoid_collisions (tag_map_t &tag_map)
}
while (map_changed);
}
-\f
+
/* Find the use def chain in which INSN exists and then see if there is a
diff --git a/gcc/config/alpha/alpha.cc b/gcc/config/alpha/alpha.cc
index 1d826085198..3395c4df3fa 100644
--- a/gcc/config/alpha/alpha.cc
+++ b/gcc/config/alpha/alpha.cc
@@ -216,7 +216,7 @@ static bool vms_valid_pointer_mode (scalar_int_mode);
#else
#define vms_patch_builtins() gcc_unreachable()
#endif
-\f
+
static unsigned int
rest_of_handle_trap_shadows (void)
{
@@ -623,7 +623,7 @@ alpha_override_options_after_change (void)
if (flag_align_functions && !str_align_functions)
str_align_functions = "16";
}
-\f
+
/* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
int
@@ -745,7 +745,7 @@ tls_symbolic_operand_type (rtx symbol)
return model;
}
-\f
+
/* Return true if the function DECL will share the same GP as any
function in the current unit of translation. */
@@ -1322,7 +1322,7 @@ alpha_legitimize_reload_address (rtx x,
return NULL_RTX;
}
-\f
+
/* Return the cost of moving between registers of various classes. Moving
between FLOAT_REGS and anything else except float regs is expensive.
In fact, we make it quite expensive because we really don't want to
@@ -1516,7 +1516,7 @@ alpha_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno, int *total,
return false;
}
}
-\f
+
/* REF is an alignable memory location. Place an aligned SImode
reference into *PALIGNED_MEM and the number of bits to shift into
*PBITNUM. SCRATCH is a free register for use in reloading out
@@ -1707,7 +1707,7 @@ alpha_secondary_memory_needed_mode (machine_mode mode)
return mode;
return mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0).require ();
}
-\f
+
/* Given SEQ, which is an INSN list, look for any MEMs in either
a SET_DEST or a SET_SRC and copy the in-struct, unchanging, and
volatile flags from REF into each of the MEMs found. If REF is not
@@ -1752,7 +1752,7 @@ alpha_set_memflags (rtx seq, rtx ref)
else
gcc_unreachable ();
}
-\f
+
static rtx alpha_emit_set_const (rtx, machine_mode, HOST_WIDE_INT,
int, bool);
@@ -2960,7 +2960,7 @@ alpha_split_conditional_move (enum rtx_code code, rtx dest, rtx cond,
return 1;
}
-\f
+
/* Look up the function X_floating library function name for the
given operation. */
@@ -3263,7 +3263,7 @@ alpha_emit_xfloating_cvt (enum rtx_code orig_code, rtx operands[])
set (OP[1] OP[3])
is valid. Naturally, output operand ordering is little-endian.
This is used by *movtf_internal and *movti_internal. */
-
+
void
alpha_split_tmode_pair (rtx operands[4], machine_mode mode,
bool fixup_overlap)
@@ -3356,7 +3356,7 @@ alpha_split_tfmode_frobsign (rtx operands[3], rtx (*operation) (rtx, rtx, rtx))
emit_move_insn (operands[1], scratch);
}
}
-\f
+
/* Use ext[wlq][lh] as the Architecture Handbook describes for extracting
unaligned data:
@@ -4392,7 +4392,7 @@ emit_insxl (machine_mode mode, rtx op1, rtx op2)
}
/* Expand an atomic fetch-and-operate pattern. CODE is the binary operation
- to perform. MEM is the memory on which to operate. VAL is the second
+ to perform. MEM is the memory on which to operate. VAL is the second
operand of the binary operator. BEFORE and AFTER are optional locations to
return the value of MEM either before of after the operation. SCRATCH is
a scratch register. */
@@ -4576,7 +4576,7 @@ alpha_split_compare_and_swap_12 (rtx operands[])
label2 = gen_rtx_LABEL_REF (DImode, gen_label_rtx ());
emit_insn (gen_load_locked (DImode, scratch, mem));
-
+
width = GEN_INT (GET_MODE_BITSIZE (mode));
mask = GEN_INT (mode == QImode ? 0xff : 0xffff);
emit_insn (gen_extxl (dest, scratch, width, addr));
@@ -4707,7 +4707,7 @@ alpha_split_atomic_exchange_12 (rtx operands[])
emit_label (XEXP (label, 0));
emit_insn (gen_load_locked (DImode, scratch, mem));
-
+
width = GEN_INT (GET_MODE_BITSIZE (mode));
mask = GEN_INT (mode == QImode ? 0xff : 0xffff);
emit_insn (gen_extxl (dest, scratch, width, addr));
@@ -4722,7 +4722,7 @@ alpha_split_atomic_exchange_12 (rtx operands[])
alpha_post_atomic_barrier (model);
}
-\f
+
/* Adjust the cost of a scheduling dependency. Return the new cost of
a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
@@ -4776,7 +4776,7 @@ alpha_multipass_dfa_lookahead (void)
{
return (alpha_tune == PROCESSOR_EV6 ? 4 : 2);
}
-\f
+
/* Machine-specific function data. */
struct GTY(()) alpha_links;
@@ -4932,7 +4932,7 @@ alpha_ra_ever_killed (void)
return reg_set_between_p (gen_rtx_REG (Pmode, REG_RA), top, NULL);
}
-\f
+
/* Return the trap mode suffix applicable to the current
instruction, or NULL. */
@@ -5001,7 +5001,7 @@ get_trap_mode_suffix (void)
gcc_unreachable ();
}
break;
-
+
default:
gcc_unreachable ();
}
@@ -5038,7 +5038,7 @@ get_round_mode_suffix (void)
case ROUND_SUFFIX_C:
return "c";
-
+
default:
gcc_unreachable ();
}
@@ -5465,7 +5465,7 @@ alpha_print_operand_address (FILE *file, machine_mode /*mode*/, rtx addr)
fprintf (file, HOST_WIDE_INT_PRINT_DEC "($%d)", offset, basereg);
}
-\f
+
/* Emit RTL insns to initialize the variable parts of a trampoline at
M_TRAMP. FNDECL is target function's decl. CHAIN_VALUE is an rtx
for the static chain value for the function. */
@@ -5537,7 +5537,7 @@ alpha_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
#endif
}
}
-\f
+
/* Determine where to put an argument to a function.
Value is zero to push the argument on the stack,
or a hard register in which to store the argument.
@@ -6132,7 +6132,7 @@ alpha_setup_incoming_varargs (cumulative_args_t pcum,
/* Detect whether integer registers or floating-point registers
are needed by the detected va_arg statements. See above for
how these values are computed. Note that the "escape" value
- is VA_LIST_MAX_FPR_SIZE, which is 255, which has both of
+ is VA_LIST_MAX_FPR_SIZE, which is 255, which has both of
these bits set. */
gcc_assert ((VA_LIST_MAX_FPR_SIZE & 3) == 3);
@@ -6362,7 +6362,7 @@ alpha_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
return r;
}
-\f
+
/* Builtins. */
enum alpha_builtin
@@ -6735,7 +6735,7 @@ alpha_fold_builtin_cmpbge (unsigned HOST_WIDE_INT opint[], long op_const)
return NULL;
}
-/* Fold the builtin for the ZAPNOT instruction. This is essentially a
+/* Fold the builtin for the ZAPNOT instruction. This is essentially a
specialized form of an AND operation. Other byte manipulation instructions
are defined in terms of this instruction, so this is also used as a
subroutine for other builtins.
@@ -6802,7 +6802,7 @@ alpha_fold_builtin_extxx (tree op[], unsigned HOST_WIDE_INT opint[],
else
zap_op = op;
}
-
+
opint[1] = bytemask;
return alpha_fold_builtin_zapnot (zap_op, opint, zap_const);
}
@@ -7178,7 +7178,7 @@ alpha_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return changed;
}
-\f
+
/* This page contains routines that are used to determine what the function
prologue and epilogue code will do and write them out. */
@@ -7403,7 +7403,7 @@ alpha_vms_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
HOST_WIDE_INT
alpha_vms_initial_elimination_offset (unsigned int from, unsigned int to)
-{
+{
/* The only possible attempts we ever expect are ARG or FRAME_PTR to
HARD_FRAME or STACK_PTR. We need the alpha_procedure_type to decide
on the proper computations and will need the register save area size
@@ -7414,7 +7414,7 @@ alpha_vms_initial_elimination_offset (unsigned int from, unsigned int to)
/* PT_NULL procedures have no frame of their own and we only allow
elimination to the stack pointer. This is the argument pointer and we
resolve the soft frame pointer to that as well. */
-
+
if (alpha_procedure_type == PT_NULL)
return 0;
@@ -7429,13 +7429,13 @@ alpha_vms_initial_elimination_offset (unsigned int from, unsigned int to)
^ ^ ^ ^
ARG_PTR FRAME_PTR HARD_FRAME_PTR STACK_PTR
-
+
PT_REGISTER procedures are similar in that they may have a frame of their
own. They have no regs-sa/pv/outgoing-args area.
We first compute offset to HARD_FRAME_PTR, then add what we need to get
to STACK_PTR if need be. */
-
+
{
HOST_WIDE_INT offset;
HOST_WIDE_INT pv_save_size = alpha_procedure_type == PT_STACK ? 8 : 0;
@@ -7454,10 +7454,10 @@ alpha_vms_initial_elimination_offset (unsigned int from, unsigned int to)
default:
gcc_unreachable ();
}
-
+
if (to == STACK_POINTER_REGNUM)
offset += ALPHA_ROUND (crtl->outgoing_args_size);
-
+
return offset;
}
}
@@ -7634,7 +7634,7 @@ alpha_store_data_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
return true;
}
-\f
+
/* Helper function to set RTX_FRAME_RELATED_P on instructions, including
sequences. */
@@ -8323,7 +8323,7 @@ alpha_expand_epilogue (void)
}
}
}
-\f
+
/* Output the rest of the textual info surrounding the epilogue. */
void
@@ -8458,7 +8458,7 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
assemble_end_function (thunk_fndecl, fnname);
}
#endif /* TARGET_ABI_OSF */
-\f
+
/* Name of the file containing the current function. */
static const char *current_function_file = "";
@@ -8467,7 +8467,7 @@ static const char *current_function_file = "";
long alpha_arg_offset;
long alpha_auto_offset;
-\f
+
/* Emit a new filename to a stream. */
void
@@ -8496,7 +8496,7 @@ alpha_output_filename (FILE *stream, const char *name)
fprintf (stream, "\n");
}
}
-\f
+
/* Structure to show the current status of registers and memory. */
struct shadow_summary
@@ -8806,12 +8806,12 @@ alpha_handle_trap_shadows (void)
}
}
}
-\f
+
/* Alpha can only issue instruction groups simultaneously if they are
suitably aligned. This is very processor-specific. */
/* There are a number of entries in alphaev4_insn_pipe and alphaev5_insn_pipe
that are marked "fake". These instructions do not exist on that target,
- but it is possible to see these insns with deranged combinations of
+ but it is possible to see these insns with deranged combinations of
command-line options, such as "-mtune=ev4 -mmax". Instead of aborting,
choose a result at random. */
@@ -9391,7 +9391,7 @@ alpha_pad_function_end (void)
}
}
}
-\f
+
/* Machine dependent reorg pass. */
static void
@@ -9448,7 +9448,7 @@ And in the noreturn case:
after the insn. In case trap is the last insn in the function,
emit NOP to guarantee that PC remains inside function boundaries.
This workaround is needed to get reliable backtraces. */
-
+
rtx_insn *insn = prev_active_insn (get_last_insn ());
if (insn && NONJUMP_INSN_P (insn))
@@ -9463,7 +9463,7 @@ And in the noreturn case:
}
}
}
-\f
+
static void
alpha_file_start (void)
{
@@ -9533,7 +9533,7 @@ alpha_elf_section_type_flags (tree decl, const char *name, int reloc)
flags |= default_section_type_flags (decl, name, reloc);
return flags;
}
-\f
+
/* Structure to collect function names for final output in link section. */
/* Note that items marked with GTY can't be ifdef'ed out. */
@@ -9582,7 +9582,7 @@ alpha_arg_info_reg_val (CUMULATIVE_ARGS cum)
return GEN_INT (regval);
}
-\f
+
/* Return a SYMBOL_REF representing the reference to the .linkage entry
of function FUNC built for calls made from CFUNDECL. LFLAG is 1 if
@@ -9708,7 +9708,7 @@ alpha_write_linkage (FILE *stream, const char *funname)
the section; 0 if the default should be used. */
static void
-vms_asm_named_section (const char *name, unsigned int flags,
+vms_asm_named_section (const char *name, unsigned int flags,
tree decl ATTRIBUTE_UNUSED)
{
fputc ('\n', asm_out_file);
@@ -9753,7 +9753,7 @@ alpha_use_linkage (rtx func ATTRIBUTE_UNUSED,
}
#endif /* TARGET_ABI_OPEN_VMS */
-\f
+
static void
alpha_init_libfuncs (void)
{
@@ -9911,7 +9911,7 @@ alpha_can_change_mode_class (machine_mode from, machine_mode to,
return (GET_MODE_SIZE (from) == GET_MODE_SIZE (to)
|| !reg_classes_intersect_p (FLOAT_REGS, rclass));
}
-\f
+
/* Initialize the GCC target structure. */
#if TARGET_ABI_OPEN_VMS
# undef TARGET_ATTRIBUTE_TABLE
@@ -10120,5 +10120,5 @@ alpha_can_change_mode_class (machine_mode from, machine_mode to,
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
#include "gt-alpha.h"
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index fff781b5fe3..359c936b966 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -186,7 +186,7 @@ extern enum alpha_fp_trap_mode alpha_fptm;
{"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
-\f
+
/* target machine storage layout */
/* Define the size of `int'. The default is the same as the word size. */
@@ -405,7 +405,7 @@ extern enum alpha_fp_trap_mode alpha_fptm;
current_file functions. Moreover, we do not expose the ldgp
until after reload, so we're probably safe. */
/* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -480,7 +480,7 @@ enum reg_class {
/* Provide the cost of a branch. Exact meaning under development. */
#define BRANCH_COST(speed_p, predictable_p) 5
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -545,7 +545,7 @@ enum reg_class {
#define FUNCTION_ARG_REGNO_P(N) \
(IN_RANGE ((N), 16, 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -618,7 +618,7 @@ enum reg_class {
/* Define registers used by the epilogue and return instruction. */
#define EPILOGUE_USES(REGNO) ((REGNO) == 26)
-\f
+
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 32
@@ -652,7 +652,7 @@ enum reg_class {
#define EH_RETURN_HANDLER_RTX \
gen_rtx_MEM (Pmode, plus_constant (Pmode, stack_pointer_rtx, \
crtl->outgoing_args_size))
-\f
+
/* Addressing modes, and classification of registers for them. */
/* Macros to check register numbers against specific register classes. */
@@ -668,7 +668,7 @@ enum reg_class {
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
|| (REGNO) == 63 || reg_renumber[REGNO] == 63)
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 1
@@ -720,7 +720,7 @@ enum reg_class {
#else
#define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
#endif
-\f
+
/* Try a machine-dependent way of reloading an illegitimate address
operand. If we find one, push the reload and jump to WIN. This
macro is used in only one place: `find_reloads_address' in reload.cc. */
@@ -735,7 +735,7 @@ do { \
} \
} while (0)
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE SImode
@@ -827,7 +827,7 @@ do { \
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */
#define SHIFT_COUNT_TRUNCATED 1
-\f
+
/* Control the assembler format that we output. */
/* Output to assembler file text saying following lines
@@ -891,7 +891,7 @@ do { \
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t.gprel32 $L%d\n", (VALUE))
-\f
+
/* If we use NM, pass -g to it so it only lists globals. */
#define NM_FLAGS "-pg"
diff --git a/gcc/config/alpha/driver-alpha.cc b/gcc/config/alpha/driver-alpha.cc
index 6757dd9f148..e67e472545d 100644
--- a/gcc/config/alpha/driver-alpha.cc
+++ b/gcc/config/alpha/driver-alpha.cc
@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see
/* Bit defines for amask instruction. */
#define AMASK_BWX 0x1 /* byte/word extension. */
-#define AMASK_FIX 0x2 /* sqrt and f <-> i conversions
+#define AMASK_FIX 0x2 /* sqrt and f <-> i conversions
extension. */
#define AMASK_CIX 0x4 /* count extension. */
#define AMASK_MVI 0x100 /* multimedia extension. */
diff --git a/gcc/config/alpha/elf.h b/gcc/config/alpha/elf.h
index b0e329e81d6..c6105d1aaab 100644
--- a/gcc/config/alpha/elf.h
+++ b/gcc/config/alpha/elf.h
@@ -25,7 +25,7 @@ along with GCC; see the file COPYING3. If not see
#define ASM_SPEC "%{G*} %{relax:-relax} %{mcpu=*:-m%*}"
/* Do not output a .file directive at the beginning of the input file. */
-
+
#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE false
diff --git a/gcc/config/alpha/openbsd.h b/gcc/config/alpha/openbsd.h
index bd38375af03..c73ea9794d2 100644
--- a/gcc/config/alpha/openbsd.h
+++ b/gcc/config/alpha/openbsd.h
@@ -72,5 +72,5 @@ along with GCC; see the file COPYING3. If not see
#undef WINT_TYPE
#define WINT_TYPE "int"
-\f
+
#define LOCAL_LABEL_PREFIX "."
diff --git a/gcc/config/alpha/vms.h b/gcc/config/alpha/vms.h
index f8fcb64c428..3afe4dbd9f2 100644
--- a/gcc/config/alpha/vms.h
+++ b/gcc/config/alpha/vms.h
@@ -120,7 +120,7 @@ along with GCC; see the file COPYING3. If not see
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = alpha_vms_initial_elimination_offset(FROM, TO))
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -188,15 +188,15 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info;
#define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
{ ASM_OUTPUT_ALIGN (FILE, 3); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
-/* This says how to output assembler code to declare an
- uninitialized external linkage data object. */
+/* This says how to output assembler code to declare an
+ uninitialized external linkage data object. */
#define COMMON_ASM_OP "\t.comm\t"
#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
vms_output_aligned_decl_common (FILE, DECL, NAME, SIZE, ALIGN)
-\f
+
/* Control how constructors and destructors are emitted. */
#define TARGET_ASM_CONSTRUCTOR vms_asm_out_constructor
#define TARGET_ASM_DESTRUCTOR vms_asm_out_destructor
diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc
index 22eb2e9cb45..f99df262c50 100644
--- a/gcc/config/arc/arc.cc
+++ b/gcc/config/arc/arc.cc
@@ -4389,7 +4389,7 @@ output_shift (rtx *operands)
return "";
}
-\f
+
/* Nested function support. */
/* Output assembler code for a block containing the constant parts of
diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h
index b8f8eb084c0..756825427aa 100644
--- a/gcc/config/arm/aout.h
+++ b/gcc/config/arm/aout.h
@@ -1,7 +1,7 @@
/* Definitions of target machine for GNU compiler, for ARM with a.out
Copyright (C) 1995-2023 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
-
+
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
@@ -164,7 +164,7 @@
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
#endif
-
+
/* Output an element of a dispatch table. */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
do \
@@ -173,7 +173,7 @@
asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
} \
while (0)
-
+
/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
can be used. For non-pic code where the offsets do not suitable for
@@ -244,7 +244,7 @@
fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
/* Align output to a power of two. Horrible /bin/as. */
-#ifndef ASM_OUTPUT_ALIGN
+#ifndef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
do \
{ \
@@ -270,7 +270,7 @@
} \
while (0)
#endif
-
+
/* Output a local common block. /bin/as can't do this, so hack a
`.space' into the bss segment. Note that this is *bad* practice,
which is guaranteed NOT to work since it doesn't define STATIC
@@ -286,7 +286,7 @@
} \
while (0)
#endif
-
+
/* Output a zero-initialized block. */
#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 3f171188de5..fae7b33c953 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -327,7 +327,7 @@ static rtx_insn *thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
vec<const char *> &, vec<rtx> &,
HARD_REG_SET &, location_t);
static const char *arm_identify_fpu_from_isa (sbitmap);
-\f
+
/* Table of machine attributes. */
static const struct attribute_spec arm_attribute_table[] =
{
@@ -380,7 +380,7 @@ static const struct attribute_spec arm_attribute_table[] =
{ "Advanced SIMD type", 1, 1, false, true, false, true, NULL, NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* Initialize the GCC target structure. */
#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
#undef TARGET_MERGE_DECL_ATTRIBUTES
@@ -831,7 +831,7 @@ static const struct attribute_spec arm_attribute_table[] =
#undef TARGET_VECTORIZE_GET_MASK_MODE
#define TARGET_VECTORIZE_GET_MASK_MODE arm_get_mask_mode
-\f
+
/* Obstack for minipool constant handling. */
static struct obstack minipool_obstack;
static char * minipool_startobj;
@@ -1051,7 +1051,7 @@ const char *fp_sysreg_names[NB_FP_SYSREGS] = {
| (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM \
? (1 << PIC_OFFSET_TABLE_REGNUM) \
: 0)))
-\f
+
/* Initialization code. */
struct cpu_tune
@@ -4007,7 +4007,7 @@ arm_add_gc_roots (void)
gcc_obstack_init(&minipool_obstack);
minipool_startobj = (char *) obstack_alloc (&minipool_obstack, 0);
}
-\f
+
/* A table of known ARM exception types.
For use with the interrupt function attribute. */
@@ -4138,7 +4138,7 @@ arm_warn_func_return (tree decl)
return lookup_attribute ("naked", DECL_ATTRIBUTES (decl)) == NULL_TREE;
}
-\f
+
/* Output assembler code for a block containing the constant parts
of a trampoline, leaving space for the variable parts.
@@ -4289,7 +4289,7 @@ arm_trampoline_adjust_address (rtx addr)
NULL, 0, OPTAB_LIB_WIDEN);
return addr;
}
-\f
+
/* Return 1 if REG needs to be saved. For interrupt handlers, this
includes call-clobbered registers too. If this is a leaf function
we can just examine the registers used by the RTL, but otherwise we
@@ -7331,7 +7331,7 @@ arm_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
{
return arg.type && TREE_CODE (TYPE_SIZE (arg.type)) != INTEGER_CST;
}
-\f
+
/* Encode the current state of the #pragma [no_]long_calls. */
typedef enum
{
@@ -7359,7 +7359,7 @@ arm_pr_long_calls_off (struct cpp_reader * pfile ATTRIBUTE_UNUSED)
{
arm_pragma_long_calls = OFF;
}
-\f
+
/* Handle an attribute requiring a FUNCTION_DECL;
arguments as in struct attribute_spec.handler. */
static tree
@@ -7757,7 +7757,7 @@ arm_set_default_type_attributes (tree type)
TYPE_ATTRIBUTES (type) = type_attr_list;
}
}
-\f
+
/* Return true if DECL is known to be linked into section SECTION. */
static bool
@@ -7942,7 +7942,7 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
return true;
}
-\f
+
/* Addressing mode support functions. */
/* Return nonzero if X is a legitimate immediate operand when compiling
@@ -9702,7 +9702,7 @@ arm_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
}
return arm_tls_referenced_p (x);
}
-\f
+
#define REG_OR_SUBREG_REG(X) \
(REG_P (X) \
|| (SUBREG_P (X) && REG_P (SUBREG_REG (X))))
@@ -13488,7 +13488,7 @@ neon_element_bits (machine_mode mode)
return GET_MODE_UNIT_BITSIZE (mode);
}
-\f
+
/* Predicates for `match_operand' and `match_operator'. */
/* Return TRUE if OP is a valid coprocessor memory address pattern.
@@ -14810,7 +14810,7 @@ store_multiple_sequence (rtx *operands, int nops, int nops_total,
return stm_case;
}
-\f
+
/* Routines for use in generating RTL. */
/* Generate a load-multiple instruction. COUNT is the number of loads in
@@ -15238,9 +15238,9 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
HOST_WIDE_INT srcoffset, dstoffset;
HOST_WIDE_INT src_autoinc, dst_autoinc;
rtx mem, addr;
-
+
gcc_assert (interleave_factor >= 1 && interleave_factor <= 4);
-
+
/* Use hard registers if we have aligned source or destination so we can use
load/store multiple with contiguous registers. */
if (dst_aligned || src_aligned)
@@ -15254,7 +15254,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
src = copy_addr_to_reg (XEXP (srcbase, 0));
srcoffset = dstoffset = 0;
-
+
/* Calls to arm_gen_load_multiple and arm_gen_store_multiple update SRC/DST.
For copying the last bytes we want to subtract this offset again. */
src_autoinc = dst_autoinc = 0;
@@ -15308,14 +15308,14 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
remaining -= block_size_bytes;
}
-
+
/* Copy any whole words left (note these aren't interleaved with any
subsequent halfword/byte load/stores in the interests of simplicity). */
-
+
words = remaining / UNITS_PER_WORD;
gcc_assert (words < interleave_factor);
-
+
if (src_aligned && words > 1)
{
emit_insn (arm_gen_load_multiple (regnos, words, src, TRUE, srcbase,
@@ -15361,11 +15361,11 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
}
remaining -= words * UNITS_PER_WORD;
-
+
gcc_assert (remaining < 4);
-
+
/* Copy a halfword if necessary. */
-
+
if (remaining >= 2)
{
halfword_tmp = gen_reg_rtx (SImode);
@@ -15389,11 +15389,11 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
remaining -= 2;
srcoffset += 2;
}
-
+
gcc_assert (remaining < 2);
-
+
/* Copy last byte. */
-
+
if ((remaining & 1) != 0)
{
byte_tmp = gen_reg_rtx (SImode);
@@ -15414,9 +15414,9 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
remaining--;
srcoffset++;
}
-
+
/* Store last halfword if we haven't done so already. */
-
+
if (halfword_tmp)
{
addr = plus_constant (Pmode, dst, dstoffset - dst_autoinc);
@@ -15435,7 +15435,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
emit_move_insn (mem, gen_lowpart (QImode, byte_tmp));
dstoffset++;
}
-
+
gcc_assert (remaining == 0 && srcoffset == dstoffset);
}
@@ -15454,7 +15454,7 @@ arm_adjust_block_mem (rtx mem, HOST_WIDE_INT length, rtx *loop_reg,
rtx *loop_mem)
{
*loop_reg = copy_addr_to_reg (XEXP (mem, 0));
-
+
/* Although the new mem does not refer to a known location,
it does keep up to LENGTH bytes of alignment. */
*loop_mem = change_address (mem, BLKmode, *loop_reg);
@@ -15474,14 +15474,14 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length,
{
rtx src_reg, dest_reg, final_src, test;
HOST_WIDE_INT leftover;
-
+
leftover = length % bytes_per_iter;
length -= leftover;
-
+
/* Create registers and memory references for use within the loop. */
arm_adjust_block_mem (src, bytes_per_iter, &src_reg, &src);
arm_adjust_block_mem (dest, bytes_per_iter, &dest_reg, &dest);
-
+
/* Calculate the value that SRC_REG should have after the last iteration of
the loop. */
final_src = expand_simple_binop (Pmode, PLUS, src_reg, GEN_INT (length),
@@ -15490,7 +15490,7 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length,
/* Emit the start of the loop. */
rtx_code_label *label = gen_label_rtx ();
emit_label (label);
-
+
/* Emit the loop body. */
arm_block_move_unaligned_straight (dest, src, bytes_per_iter,
interleave_factor);
@@ -15498,11 +15498,11 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length,
/* Move on to the next block. */
emit_move_insn (src_reg, plus_constant (Pmode, src_reg, bytes_per_iter));
emit_move_insn (dest_reg, plus_constant (Pmode, dest_reg, bytes_per_iter));
-
+
/* Emit the loop condition. */
test = gen_rtx_NE (VOIDmode, src_reg, final_src);
emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label));
-
+
/* Mop up any left-over bytes. */
if (leftover)
arm_block_move_unaligned_straight (dest, src, leftover, interleave_factor);
@@ -15516,7 +15516,7 @@ static int
arm_cpymemqi_unaligned (rtx *operands)
{
HOST_WIDE_INT length = INTVAL (operands[2]);
-
+
if (optimize_size)
{
bool src_aligned = MEM_ALIGN (operands[1]) >= BITS_PER_WORD;
@@ -15527,7 +15527,7 @@ arm_cpymemqi_unaligned (rtx *operands)
resulting code can be smaller. */
unsigned int interleave_factor = (src_aligned || dst_aligned) ? 2 : 1;
HOST_WIDE_INT bytes_per_iter = (src_aligned || dst_aligned) ? 8 : 4;
-
+
if (length > 12)
arm_block_move_unaligned_loop (operands[0], operands[1], length,
interleave_factor, bytes_per_iter);
@@ -15545,7 +15545,7 @@ arm_cpymemqi_unaligned (rtx *operands)
else
arm_block_move_unaligned_straight (operands[0], operands[1], length, 4);
}
-
+
return 1;
}
@@ -17261,7 +17261,7 @@ valid_operands_ldrd_strd (rtx *operands, bool load)
false, load);
}
-\f
+
/* Print a symbolic form of X to the debug file, F. */
static void
arm_print_value (FILE *f, rtx x)
@@ -17327,7 +17327,7 @@ arm_print_value (FILE *f, rtx x)
return;
}
}
-\f
+
/* Routines for manipulation of the constant pool. */
/* Arm instructions cannot load a large constant directly into a
@@ -19609,7 +19609,7 @@ arm_reorg (void)
/* Free the minipool memory. */
obstack_free (&minipool_obstack, minipool_startobj);
}
-\f
+
/* Routines to output assembly language. */
/* Return string representation of passed in real value. */
@@ -21070,7 +21070,7 @@ output_ascii_pseudo_op (FILE *stream, const unsigned char *p, int len)
fputs ("\"\n", stream);
}
-\f
+
/* Compute the register save mask for registers 0 through 12
inclusive. This code is used by arm_compute_save_core_reg_mask (). */
@@ -23841,7 +23841,7 @@ arm_expand_prologue (void)
if ((live_regs_mask & (1 << LR_REGNUM)) == 0)
cfun->machine->lr_save_eliminated = 1;
}
-\f
+
/* Print condition code to STREAM. Helper function for arm_print_operand. */
static void
arm_print_condition (FILE *stream)
@@ -24638,7 +24638,7 @@ arm_print_operand (FILE *stream, rtx x, int code)
}
}
}
-\f
+
/* Target hook for printing a memory address. */
static void
arm_print_operand_address (FILE *stream, machine_mode mode, rtx x)
@@ -24757,7 +24757,7 @@ arm_print_operand_address (FILE *stream, machine_mode mode, rtx x)
output_addr_const (stream, x);
}
}
-\f
+
/* Target hook for indicating whether a punctuation character for
TARGET_PRINT_OPERAND is valid. */
static bool
@@ -24769,7 +24769,7 @@ arm_print_operand_punct_valid_p (unsigned char code)
|| (TARGET_THUMB2 && (code == '!'))
|| (TARGET_THUMB && (code == '_')));
}
-\f
+
/* Target hook for assembling integer objects. The ARM version needs to
handle word-sized values specially. */
static bool
@@ -24916,7 +24916,7 @@ arm_elf_asm_destructor (rtx symbol, int priority)
{
arm_elf_asm_cdtor (symbol, priority, /*is_ctor=*/false);
}
-\f
+
/* A finite state machine takes care of noticing whether or not instructions
can be conditionally executed, and thus decrease execution time and code
size by deleting branch instructions. The fsm is controlled by
@@ -25802,7 +25802,7 @@ arm_debugger_arg_offset (int value, rtx addr)
return value;
}
-\f
+
/* Implement TARGET_PROMOTED_TYPE. */
static tree
@@ -25972,7 +25972,7 @@ neon_split_vcombine (rtx operands[3])
emit_move_insn (destlo, operands[1]);
}
}
-\f
+
/* Return the number (counting from 0) of
the least significant set bit in MASK. */
@@ -26410,7 +26410,7 @@ thumb_exit (FILE *f, int reg_containing_return_addr)
else
asm_fprintf (f, "\tbx\t%r\n", reg_containing_return_addr);
}
-\f
+
/* Scan INSN just before assembler is output for it.
For Thumb-1, we track the status of the condition codes; this
information is used in the cbranchsi4_insn pattern. */
@@ -30778,10 +30778,10 @@ int
vfp3_const_double_for_fract_bits (rtx operand)
{
REAL_VALUE_TYPE r0;
-
+
if (!CONST_DOUBLE_P (operand))
return 0;
-
+
r0 = *CONST_DOUBLE_REAL_VALUE (operand);
if (exact_real_inverse (DFmode, &r0)
&& !REAL_VALUE_NEGATIVE (r0))
@@ -30832,7 +30832,7 @@ vfp3_const_double_for_bits (rtx x)
return hwint;
}
-\f
+
/* Emit a memory barrier around an atomic sequence according to MODEL. */
static void
@@ -31258,7 +31258,7 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem,
|| !(use_acquire || use_release))
arm_post_atomic_barrier (model);
}
-\f
+
/* Return the mode for the MVE vector of predicates corresponding to MODE. */
opt_machine_mode
arm_mode_to_pred_mode (machine_mode mode)
@@ -31459,7 +31459,7 @@ arm_expand_vcond (rtx *operands, machine_mode cmp_result_mode)
}
}
}
-\f
+
#define MAX_VECT_LEN 16
struct expand_vec_perm_d
@@ -32042,7 +32042,7 @@ arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code)
else
return false;
}
-
+
return true;
case ARM_POST_DEC:
@@ -32059,10 +32059,10 @@ arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code)
return false;
return true;
-
+
default:
return false;
-
+
}
return false;
@@ -32073,7 +32073,7 @@ arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code)
Additionally, the default expansion code is not available or suitable
for post-reload insn splits (this can occur when the register allocator
chooses not to do a shift in NEON).
-
+
This function is used in both initial expand and post-reload splits, and
handles all kinds of 64-bit shifts.
@@ -33071,7 +33071,7 @@ arm_asan_shadow_offset (void)
/* This is a temporary fix for PR60655. Ideally we need
to handle most of these cases in the generic part but
- currently we reject minus (..) (sym_ref). We try to
+ currently we reject minus (..) (sym_ref). We try to
ameliorate the case with minus (sym_ref1) (sym_ref2)
where they are in the same section. */
@@ -33394,7 +33394,7 @@ arm_valid_target_attribute_tree (tree args, struct gcc_options *opts,
return build_target_option_node (opts, opts_set);
}
-static void
+static void
add_attribute (const char * mode, tree *attributes)
{
size_t len = strlen (mode);
@@ -33425,7 +33425,7 @@ arm_insert_attributes (tree fndecl, tree * attributes)
/* Nested definitions must inherit mode. */
if (current_function_decl)
{
- mode = TARGET_THUMB ? "thumb" : "arm";
+ mode = TARGET_THUMB ? "thumb" : "arm";
add_attribute (mode, attributes);
return;
}
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 6f7ecf91280..b11ee251cc7 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -83,7 +83,7 @@ extern tree arm_fp16_type_node;
extern tree arm_bf16_type_node;
extern tree arm_bf16_ptr_type_node;
-\f
+
#undef CPP_SPEC
#define CPP_SPEC "%(subtarget_cpp_spec)"
@@ -112,7 +112,7 @@ extern tree arm_bf16_ptr_type_node;
#ifndef SUBTARGET_CPP_SPEC
#define SUBTARGET_CPP_SPEC ""
#endif
-\f
+
/* Tree Target Specification. */
#define TARGET_ARM_P(flags) (!TARGET_THUMB_P (flags))
#define TARGET_THUMB1_P(flags) (TARGET_THUMB_P (flags) && !arm_arch_thumb2)
@@ -618,7 +618,7 @@ extern const int arm_arch_cde_coproc_bits[];
#ifndef GOT_PCREL
#define GOT_PCREL 1
#endif
-\f
+
/* Target machine storage Layout. */
/* Nonzero if this chip provides Armv8.1-M Mainline
@@ -766,7 +766,7 @@ extern const int arm_arch_cde_coproc_bits[];
#define MAX_SYNC_LIBFUNC_SIZE (2 * UNITS_PER_WORD)
#endif
-\f
+
/* Standard register usage. */
/* Register allocation in ARM Procedure Call Standard
@@ -1261,7 +1261,7 @@ extern int arm_regs_in_sequence[];
#define HARD_REGNO_RENAME_OK(SRC, DST) \
(! IS_INTERRUPT (cfun->machine->func_type) || \
df_regs_ever_live_p (DST))
-\f
+
/* Register and constant classes. */
/* Register classes. */
@@ -1400,7 +1400,7 @@ extern const char *fp_sysreg_names[NB_FP_SYSREGS];
but prevents the compiler from extending the lifetime of these
registers. */
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \
- arm_small_register_classes_for_mode_p
+ arm_small_register_classes_for_mode_p
/* Must leave BASE_REGS reloads alone */
#define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
@@ -1453,7 +1453,7 @@ extern const char *fp_sysreg_names[NB_FP_SYSREGS];
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS.
- ARM regs are UNITS_PER_WORD bits.
+ ARM regs are UNITS_PER_WORD bits.
FIXME: Is this true for iWMMX? */
#define CLASS_MAX_NREGS(CLASS, MODE) \
(CLASS == VPR_REG) \
@@ -1462,7 +1462,7 @@ extern const char *fp_sysreg_names[NB_FP_SYSREGS];
/* If defined, gives a class of registers that cannot be used as the
operand of a SUBREG that changes the mode of the object illegally. */
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -1618,14 +1618,14 @@ machine_function;
#define ARM_Q_BIT_READ (arm_q_bit_access ())
#define ARM_GE_BITS_READ (arm_ge_bits_access ())
-/* As in the machine_function, a global set of call-via labels, for code
+/* As in the machine_function, a global set of call-via labels, for code
that is in text_section. */
extern GTY(()) rtx thumb_call_via_label[14];
/* The number of potential ways of assigning to a co-processor. */
#define ARM_NUM_COPROC_SLOTS 1
-/* Enumeration of procedure calling standard variants. We don't really
+/* Enumeration of procedure calling standard variants. We don't really
support all of these yet. */
enum arm_pcs
{
@@ -1702,7 +1702,7 @@ typedef struct
|| (TARGET_IWMMXT_ABI \
&& IN_RANGE ((REGNO), FIRST_IWMMXT_REGNUM, FIRST_IWMMXT_REGNUM + 9)))
-\f
+
/* If your target environment doesn't prefix user functions with an
underscore, you may wish to re-define this to prevent any conflicts. */
#ifndef ARM_MCOUNT_NAME
@@ -1814,7 +1814,7 @@ typedef struct
/* Alignment required for a trampoline in bits. */
#define TRAMPOLINE_ALIGNMENT 32
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT 1
#define HAVE_PRE_INCREMENT TARGET_32BIT
@@ -2054,13 +2054,13 @@ enum arm_auto_incmodes
For Thumb, we cannot use SP + reg, so reject SP. */
#define REG_MODE_OK_FOR_REG_BASE_P(X, MODE) \
REG_OK_FOR_INDEX_P (X)
-\f
+
#define ARM_BASE_REGISTER_RTX_P(X) \
(REG_P (X) && ARM_REG_OK_FOR_BASE_P (X))
#define ARM_INDEX_REGISTER_RTX_P(X) \
(REG_P (X) && ARM_REG_OK_FOR_INDEX_P (X))
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE Pmode
@@ -2150,7 +2150,7 @@ enum arm_auto_incmodes
: TARGET_THUMB ? static_cast<bool> (current_tune->logical_op_non_short_circuit_thumb) \
: static_cast<bool> (current_tune->logical_op_non_short_circuit_arm))
-\f
+
/* Position Independent Code. */
/* We decide which register to use based on the compilation options and
the assembler in use; this is more general than the APCS restriction of
@@ -2188,7 +2188,7 @@ extern unsigned arm_pic_register;
whether data needs to be in the GOT or can be referenced via a GOT
offset. */
extern int making_const_table;
-\f
+
/* Handle pragmas for compatibility with Intel's compilers. */
/* Also abuse this to register additional C specific EABI attributes. */
#define REGISTER_TARGET_PRAGMAS() do { \
@@ -2216,7 +2216,7 @@ extern int making_const_table;
((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
-\f
+
#define CC_STATUS_INIT \
do { cfun->machine->thumb1_cc_insn = NULL_RTX; } while (0)
@@ -2313,7 +2313,7 @@ extern int making_const_table;
(int) (LOG), (int) (MAX_SKIP)); \
}
#endif
-\f
+
/* Add two bytes to the length of conditionally executed Thumb-2
instructions for the IT instruction. */
#define ADJUST_INSN_LENGTH(insn, length) \
@@ -2366,7 +2366,7 @@ extern int making_const_table;
? (gen_int_mode ((unsigned long)0xffffffff, Pmode)) \
: arm_gen_return_addr_mask ())
-\f
+
/* Do not emit .note.GNU-stack by default. */
#ifndef NEED_INDICATE_EXEC_STACK
#define NEED_INDICATE_EXEC_STACK 0
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index aa78c647c72..81ba6995104 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -1,6 +1,6 @@
/* Configuration file for ARM BPABI targets.
Copyright (C) 2004-2023 Free Software Foundation, Inc.
- Contributed by CodeSourcery, LLC
+ Contributed by CodeSourcery, LLC
This file is part of GCC.
diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h
index 5766cb4a988..6046921cee7 100644
--- a/gcc/config/arm/elf.h
+++ b/gcc/config/arm/elf.h
@@ -3,7 +3,7 @@
Copyright (C) 1995-2023 Free Software Foundation, Inc.
Contributed by Philip Blundell <philb@gnu.org> and
Catherine Moore <clm@cygnus.com>
-
+
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
@@ -101,15 +101,15 @@
#ifndef LINK_SPEC
#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X"
#endif
-
+
/* Run-time Target Specification. */
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_APCS_FRAME)
#endif
-\f
+
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
-\f
+
/* Output an element in the static constructor array. */
#undef TARGET_ASM_CONSTRUCTOR
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 57f830f0176..ca14b88f8db 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -1,6 +1,6 @@
/* Configuration file for ARM GNU/Linux EABI targets.
Copyright (C) 2004-2023 Free Software Foundation, Inc.
- Contributed by CodeSourcery, LLC
+ Contributed by CodeSourcery, LLC
This file is part of GCC.
diff --git a/gcc/config/arm/symbian.h b/gcc/config/arm/symbian.h
index d9cd1513f8c..6b9a27d6f7d 100644
--- a/gcc/config/arm/symbian.h
+++ b/gcc/config/arm/symbian.h
@@ -1,6 +1,6 @@
/* Configuration file for Symbian OS on ARM processors.
Copyright (C) 2004-2023 Free Software Foundation, Inc.
- Contributed by CodeSourcery, LLC
+ Contributed by CodeSourcery, LLC
This file is part of GCC.
@@ -29,7 +29,7 @@
Make all symbols hidden by default. Symbian OS expects that all
exported symbols will be explicitly marked with
- "__declspec(dllexport)".
+ "__declspec(dllexport)".
Enumeration types use 4 bytes, even if the enumerals are small,
unless explicitly overridden.
@@ -63,7 +63,7 @@
#undef SUBTARGET_ASM_FLOAT_SPEC
#define SUBTARGET_ASM_FLOAT_SPEC \
"%{!mfpu=*:-mfpu=vfp} %{!mcpu=*:%{!march=*:-march=armv5t}}"
-
+
/* Define the __symbian__ macro. */
#undef TARGET_OS_CPP_BUILTINS
#define TARGET_OS_CPP_BUILTINS() \
diff --git a/gcc/config/arm/unknown-elf.h b/gcc/config/arm/unknown-elf.h
index 464d38b6cc6..54df2299cde 100644
--- a/gcc/config/arm/unknown-elf.h
+++ b/gcc/config/arm/unknown-elf.h
@@ -91,6 +91,6 @@
/* The libgcc udivmod functions may throw exceptions. If newlib is
configured to support long longs in I/O, then printf will depend on
udivmoddi4, which will depend on the exception unwind routines,
- which will depend on abort, which is defined in libc. */
+ which will depend on abort, which is defined in libc. */
#undef LINK_GCC_C_SEQUENCE_SPEC
#define LINK_GCC_C_SEQUENCE_SPEC "--start-group %G %{!nolibc:%L} --end-group"
diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h
index 738d1f3e47b..eccaeff430e 100644
--- a/gcc/config/arm/vxworks.h
+++ b/gcc/config/arm/vxworks.h
@@ -1,10 +1,10 @@
/* Definitions of target machine for GCC,
- for ARM with targeting the VXWorks run time environment.
+ for ARM with targeting the VXWorks run time environment.
Copyright (C) 1999-2023 Free Software Foundation, Inc.
Contributed by: Mike Stump <mrs@wrs.com>
Brought up to date by CodeSourcery, LLC.
-
+
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
diff --git a/gcc/config/avr/avr-arch.h b/gcc/config/avr/avr-arch.h
index 79445fe7987..366a7069fda 100644
--- a/gcc/config/avr/avr-arch.h
+++ b/gcc/config/avr/avr-arch.h
@@ -14,7 +14,7 @@ GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
diff --git a/gcc/config/avr/avr-c.cc b/gcc/config/avr/avr-c.cc
index 07677a271c2..96a255c0b86 100644
--- a/gcc/config/avr/avr-c.cc
+++ b/gcc/config/avr/avr-c.cc
@@ -7,12 +7,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
@@ -244,7 +244,7 @@ avr_resolve_overloaded_builtin (unsigned int iloc, tree fndecl, void *vargs)
return fold;
}
-
+
/* Implement `REGISTER_TARGET_PRAGMAS'. */
diff --git a/gcc/config/avr/avr-devices.cc b/gcc/config/avr/avr-devices.cc
index 4b638b48fcc..abf958eb895 100644
--- a/gcc/config/avr/avr-devices.cc
+++ b/gcc/config/avr/avr-devices.cc
@@ -7,12 +7,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
@@ -126,7 +126,7 @@ avr_mcu_types[] =
};
-\f
+
#ifndef IN_GEN_AVR_MMCU_TEXI
@@ -144,7 +144,7 @@ avr_archs_str (void)
return archs;
}
-
+
void
avr_inform_core_architectures (void)
{
diff --git a/gcc/config/avr/avr-log.cc b/gcc/config/avr/avr-log.cc
index 5cd0f5bb48b..edd93c8b4c4 100644
--- a/gcc/config/avr/avr-log.cc
+++ b/gcc/config/avr/avr-log.cc
@@ -8,12 +8,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
@@ -85,7 +85,7 @@ int
avr_vdump (FILE *stream, const char *caller, ...)
{
va_list ap;
-
+
if (stream == NULL && dump_file)
stream = dump_file;
@@ -283,7 +283,7 @@ avr_log_set_avr_log (void)
if (all)
avr_log_details = "all";
-
+
if (all || avr_log_details)
{
/* Adding , at beginning and end of string makes searching easier. */
diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h
index ec96fd45865..12a04de329b 100644
--- a/gcc/config/avr/avr-protos.h
+++ b/gcc/config/avr/avr-protos.h
@@ -1,5 +1,5 @@
/* Prototypes for exported functions defined in avr.cc
-
+
Copyright (C) 2000-2023 Free Software Foundation, Inc.
Contributed by Denis Chertykov (chertykov@gmail.com)
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index c193430cf07..c48550b4433 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -8,12 +8,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
@@ -233,7 +233,7 @@ bool avr_have_dimode = true;
bool avr_need_clear_bss_p = false;
bool avr_need_copy_data_p = false;
-\f
+
/* Transform UP into lowercase and write the result to LO.
You must provide enough space for LO. Return LO. */
@@ -1554,7 +1554,7 @@ avr_hregs_split_reg (HARD_REG_SET *set)
&& TEST_HARD_REG_BIT (*set, REG_Z)
&& TEST_HARD_REG_BIT (*set, REG_Z + 1))
continue;
-
+
CLEAR_HARD_REG_BIT (*set, regno);
return regno;
}
@@ -10593,7 +10593,7 @@ avr_mul_highpart_cost (rtx x, int)
{
// This is the wider mode.
machine_mode mode = GET_MODE (x);
-
+
// The middle-end might still have PR81444, i.e. it is calling the cost
// functions with strange modes. Fix this now by also considering
// PSImode (should actually be SImode instead).
@@ -13422,7 +13422,7 @@ avr_out_cpymem (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
}
-\f
+
/* Helper for __builtin_avr_delay_cycles */
static rtx
@@ -14522,7 +14522,7 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code)
return false;
}
-\f
+
/* Initialize the GCC target structure. */
@@ -14713,5 +14713,5 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code)
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
#include "gt-avr.h"
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 8e7e00db13b..88ac5acfcf7 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -321,7 +321,7 @@ enum reg_class {
#define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
-/* Don't use Push rounding. expr.cc: emit_single_push_insn is broken
+/* Don't use Push rounding. expr.cc: emit_single_push_insn is broken
for POST_DEC targets (PR27386). */
/*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
@@ -476,7 +476,7 @@ typedef struct avr_args
/* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen
by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES
- was 4. When optimizing for size, allow memory moves upto 2 bytes.
+ was 4. When optimizing for size, allow memory moves upto 2 bytes.
Also see avr_use_by_pieces_infrastructure_p. */
#define MOVE_RATIO(speed) ((speed) ? 3 : 2)
@@ -544,22 +544,22 @@ struct GTY(()) machine_function
/* 'true' - if current function is a naked function. */
int is_naked;
- /* 'true' - if current function is an interrupt function
+ /* 'true' - if current function is an interrupt function
as specified by the "interrupt" attribute. */
int is_interrupt;
- /* 'true' - if current function is a signal function
+ /* 'true' - if current function is a signal function
as specified by the "signal" attribute. */
int is_signal;
-
- /* 'true' - if current function is a 'task' function
+
+ /* 'true' - if current function is a 'task' function
as specified by the "OS_task" attribute. */
int is_OS_task;
- /* 'true' - if current function is a 'main' function
+ /* 'true' - if current function is a 'main' function
as specified by the "OS_main" attribute. */
int is_OS_main;
-
+
/* Current function stack size. */
int stack_usage;
diff --git a/gcc/config/avr/elf.h b/gcc/config/avr/elf.h
index 86be435319e..d603b0df746 100644
--- a/gcc/config/avr/elf.h
+++ b/gcc/config/avr/elf.h
@@ -7,12 +7,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
diff --git a/gcc/config/avr/gen-avr-mmcu-specs.cc b/gcc/config/avr/gen-avr-mmcu-specs.cc
index 9344246cb72..ef464cd937d 100644
--- a/gcc/config/avr/gen-avr-mmcu-specs.cc
+++ b/gcc/config/avr/gen-avr-mmcu-specs.cc
@@ -7,12 +7,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
diff --git a/gcc/config/avr/gen-avr-mmcu-texi.cc b/gcc/config/avr/gen-avr-mmcu-texi.cc
index f6eca3adcaa..188eb740a98 100644
--- a/gcc/config/avr/gen-avr-mmcu-texi.cc
+++ b/gcc/config/avr/gen-avr-mmcu-texi.cc
@@ -7,12 +7,12 @@
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
-
+
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
@@ -118,23 +118,23 @@ comparator (const void *va, const void *vb)
if (*a != *b)
return *a - *b;
-
+
a++;
b++;
}
return *a - *b;
-}
+}
static void
print_mcus (size_t n_mcus)
{
int duplicate = 0;
size_t i;
-
+
if (!n_mcus)
return;
-
+
qsort (mcus, n_mcus, sizeof (avr_mcu_t*), comparator);
printf ("@*@var{mcu}@tie{}=");
diff --git a/gcc/config/avr/stdfix.h b/gcc/config/avr/stdfix.h
index 7ede39db219..fb9abcd711f 100644
--- a/gcc/config/avr/stdfix.h
+++ b/gcc/config/avr/stdfix.h
@@ -108,12 +108,12 @@ typedef long long unsigned int uint_uk_t;
/* The Embedded-C paper specifies results only for rounding points
0 < RP < FBIT
-
+
As an extension, the following functions work as expected
with rounding points
-IBIT < RP < FBIT
-
+
For example, rounding an accum with a rounding point of -1 will
result in an even integer value. */
diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h
index 3b5da6d2b4c..0eac513431f 100644
--- a/gcc/config/bfin/bfin-protos.h
+++ b/gcc/config/bfin/bfin-protos.h
@@ -71,7 +71,7 @@ extern char *bfin_asm_long (void);
extern char *bfin_asm_short (void);
extern int log2constp (unsigned HOST_WIDE_INT);
-extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx);
+extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx);
extern HOST_WIDE_INT bfin_initial_elimination_offset (int, int);
extern int effective_address_32bit_p (rtx, machine_mode);
diff --git a/gcc/config/bfin/bfin.cc b/gcc/config/bfin/bfin.cc
index b2a9142f5f9..a3b30760c30 100644
--- a/gcc/config/bfin/bfin.cc
+++ b/gcc/config/bfin/bfin.cc
@@ -97,14 +97,14 @@ bfin_globalize_label (FILE *stream, const char *name)
fputc ('\n',stream);
}
-static void
-output_file_start (void)
+static void
+output_file_start (void)
{
FILE *file = asm_out_file;
int i;
fprintf (file, ".file \"%s\";\n", LOCATION_FILE (input_location));
-
+
for (i = 0; arg_regs[i] >= 0; i++)
;
max_arg_registers = i; /* how many arg reg used */
@@ -126,7 +126,7 @@ funkind (const_tree funtype)
else
return SUBROUTINE;
}
-\f
+
/* Legitimize PIC addresses. If the address is already position-independent,
we return ORIG. Newly generated position-independent addresses go into a
reg. This is REG if nonzero, otherwise we allocate register(s) as
@@ -208,7 +208,7 @@ legitimize_pic_address (rtx orig, rtx reg, rtx picreg)
return new_rtx;
}
-\f
+
/* Stack frame layout. */
/* For a given REGNO, determine whether it must be saved in the function
@@ -417,7 +417,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
}
}
for (i = REG_P7 + 1; i < REG_CC; i++)
- if (saveall
+ if (saveall
|| (is_inthandler
&& (df_regs_ever_live_p (i)
|| (!leaf_function_p () && call_used_or_fixed_reg_p (i)))))
@@ -548,7 +548,7 @@ expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler)
it.
Normally, this macro will push all remaining incoming registers on the
- stack and set PRETEND_SIZE to the length of the registers pushed.
+ stack and set PRETEND_SIZE to the length of the registers pushed.
Blackfin specific :
- VDSP C compiler manual (our ABI) says that a variable args function
@@ -590,7 +590,7 @@ setup_incoming_varargs (cumulative_args_t cum,
be accessed via the stack pointer) in functions that seem suitable. */
static bool
-bfin_frame_pointer_required (void)
+bfin_frame_pointer_required (void)
{
e_funkind fkind = funkind (TREE_TYPE (current_function_decl));
@@ -906,7 +906,7 @@ do_unlink (rtx spreg, HOST_WIDE_INT frame_size, bool all, int epilogue_p)
if (stack_frame_needed_p ())
emit_insn (gen_unlink ());
- else
+ else
{
rtx postinc = gen_rtx_MEM (Pmode, gen_rtx_POST_INC (Pmode, spreg));
@@ -968,7 +968,7 @@ expand_interrupt_handler_prologue (rtx spreg, e_funkind fkind, bool all)
emit_insn (gen_movsi_low (p5reg, p5reg, chipid));
emit_insn (gen_dummy_load (p5reg, bfin_cc_rtx));
}
-
+
if (lookup_attribute ("nesting", attrs))
{
rtx srcreg = gen_rtx_REG (Pmode, ret_regs[fkind]);
@@ -1046,7 +1046,7 @@ bfin_load_pic_reg (rtx dest)
pic reg, since the caller always passes a usable one. */
if (local_info_node && local_info_node->local)
return pic_offset_table_rtx;
-
+
if (OPTION_SET_P (bfin_library_id))
addr = plus_constant (Pmode, pic_offset_table_rtx,
-4 - bfin_library_id * 4);
@@ -1173,7 +1173,7 @@ bfin_expand_epilogue (int need_return, int eh_return, bool sibcall_p)
emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, REG_RETS)));
}
-\f
+
/* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
int
@@ -1236,7 +1236,7 @@ bfin_delegitimize_address (rtx orig_x)
32-bit instruction. */
int
-effective_address_32bit_p (rtx op, machine_mode mode)
+effective_address_32bit_p (rtx op, machine_mode mode)
{
HOST_WIDE_INT offset;
@@ -1312,7 +1312,7 @@ print_address_operand (FILE *file, rtx x)
case PRE_DEC:
fprintf (file, "--");
- output_address (VOIDmode, XEXP (x, 0));
+ output_address (VOIDmode, XEXP (x, 0));
break;
case POST_INC:
output_address (VOIDmode, XEXP (x, 0));
@@ -1390,7 +1390,7 @@ print_operand (FILE *file, rtx x, char code)
output_operand_lossage ("invalid %%j value");
}
break;
-
+
case 'J': /* reverse logic */
switch (GET_CODE(x))
{
@@ -1491,7 +1491,7 @@ print_operand (FILE *file, rtx x, char code)
else
output_operand_lossage ("invalid operand for code '%c'", code);
}
- else
+ else
fprintf (file, "%s", reg_names[REGNO (x)]);
break;
@@ -1615,12 +1615,12 @@ print_operand (FILE *file, rtx x, char code)
}
}
}
-\f
+
/* Argument support functions. */
/* Initialize a variable CUM of type CUMULATIVE_ARGS
for a call to a function whose data type is FNTYPE.
- For a library call, FNTYPE is 0.
+ For a library call, FNTYPE is 0.
VDSP C Compiler manual, our ABI says that
first 3 words of arguments will use R0, R1 and R2.
*/
@@ -1718,7 +1718,7 @@ bfin_arg_partial_bytes (cumulative_args_t cum, const function_arg_info &arg)
{
int bytes = arg.promoted_size_in_bytes ();
int bytes_left = get_cumulative_args (cum)->nregs * UNITS_PER_WORD;
-
+
if (bytes == -1)
return 0;
@@ -1759,7 +1759,7 @@ bfin_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
/* Return true when register may be used to pass function parameters. */
-bool
+bool
function_arg_regno_p (int n)
{
int i;
@@ -1829,7 +1829,7 @@ bfin_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
return false;
return !called_func->local || this_func->local;
}
-\f
+
/* Write a template for a trampoline to F. */
static void
@@ -1948,7 +1948,7 @@ expand_move (rtx *operands, machine_mode mode)
operands[1] = force_reg (mode, operands[1]);
return false;
}
-\f
+
/* Split one or more DImode RTL references into pairs of SImode
references. The RTL can be REG, offsettable MEM, integer constant, or
CONST_DOUBLE. "operands" is a pointer to an array of DImode RTL to
@@ -1980,7 +1980,7 @@ split_di (rtx operands[], int num, rtx lo_half[], rtx hi_half[])
}
}
}
-\f
+
bool
bfin_longcall_p (rtx op, int call_cookie)
{
@@ -2101,7 +2101,7 @@ bfin_expand_call (rtx retval, rtx fnaddr, rtx callarg1, rtx cookie, int sibcall)
if (use)
CALL_INSN_FUNCTION_USAGE (call) = use;
}
-\f
+
/* Implement TARGET_HARD_REGNO_NREGS. */
static unsigned int
@@ -2327,7 +2327,7 @@ bfin_class_likely_spilled_p (reg_class_t rclass)
return false;
}
-\f
+
static struct machine_function *
bfin_init_machine_status (void)
{
@@ -2544,7 +2544,7 @@ bfin_gen_compare (rtx cmp, machine_mode mode ATTRIBUTE_UNUSED)
return gen_rtx_fmt_ee (code2, BImode, tem, CONST0_RTX (BImode));
}
-\f
+
/* Return nonzero iff C has exactly one bit set if it is interpreted
as a 32-bit constant. */
@@ -2672,7 +2672,7 @@ split_load_immediate (rtx operands[])
}
return 0;
}
-\f
+
/* Return true if the legitimate memory address for a memory operand of mode
MODE. Return false if not. */
@@ -2701,7 +2701,7 @@ bfin_valid_reg_p (unsigned int regno, int strict, machine_mode mode,
/* Recognize an RTL expression that is a valid memory address for an
instruction. The MODE argument is the machine mode for the MEM expression
- that wants to use this address.
+ that wants to use this address.
Blackfin addressing modes are as follows:
@@ -2710,7 +2710,7 @@ bfin_valid_reg_p (unsigned int regno, int strict, machine_mode mode,
B [ Preg + uimm15 ]
W [ Preg + uimm16m2 ]
- [ Preg + uimm17m4 ]
+ [ Preg + uimm17m4 ]
[preg++]
[preg--]
@@ -2887,8 +2887,8 @@ bfin_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
else
*total = cost2;
return true;
-
- case ASHIFT:
+
+ case ASHIFT:
case ASHIFTRT:
case LSHIFTRT:
if (mode == DImode)
@@ -2903,7 +2903,7 @@ bfin_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
*total += rtx_cost (op0, mode, code, 0, speed);
return true;
-
+
case IOR:
case AND:
case XOR:
@@ -3006,7 +3006,7 @@ bfin_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
return false;
}
}
-\f
+
/* Used for communication between {push,pop}_multiple_operation (which
we use not only as a predicate) and the corresponding output functions. */
static int first_preg_to_save, first_dreg_to_save;
@@ -3151,11 +3151,11 @@ output_push_multiple (rtx insn, rtx *operands)
{
char buf[80];
int ok;
-
+
/* Validate the insn again, and compute first_[dp]reg_to_save. */
ok = analyze_push_multiple_operation (PATTERN (insn));
gcc_assert (ok);
-
+
if (first_dreg_to_save == 8)
sprintf (buf, "[--sp] = ( p5:%d );\n", first_preg_to_save);
else if (first_preg_to_save == 6)
@@ -3175,7 +3175,7 @@ output_pop_multiple (rtx insn, rtx *operands)
{
char buf[80];
int ok;
-
+
/* Validate the insn again, and compute first_[dp]reg_to_save. */
ok = analyze_pop_multiple_operation (PATTERN (insn));
gcc_assert (ok);
@@ -3296,7 +3296,7 @@ bfin_expand_cpymem (rtx dst, rtx src, rtx count_exp, rtx align_exp)
}
return false;
}
-\f
+
/* Compute the alignment for a local variable.
TYPE is the data type, and ALIGN is the alignment that
the object would ordinarily have. The value of this macro is used
@@ -3314,7 +3314,7 @@ bfin_local_alignment (tree type, unsigned align)
return 32;
return align;
}
-\f
+
/* Implement TARGET_SCHED_ISSUE_RATE. */
static int
@@ -3359,7 +3359,7 @@ bfin_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
return cost;
}
-\f
+
/* This function acts like NEXT_INSN, but is aware of three-insn bundles and
skips all subsequent parallel instructions if INSN is the start of such
a group. */
@@ -3389,7 +3389,7 @@ find_prev_insn_start (rtx_insn *insn)
}
return insn;
}
-\f
+
/* Implement TARGET_CAN_USE_DOLOOP_P. */
static bool
@@ -3855,7 +3855,7 @@ static void
hwloop_fail (hwloop_info loop)
{
rtx insn = loop->loop_end;
-
+
if (DPREG_P (loop->iter_reg))
{
/* If loop->iter_reg is a DREG or PREG, we can split it here
@@ -3879,7 +3879,7 @@ hwloop_fail (hwloop_info loop)
}
else
{
- splitting_loops = 1;
+ splitting_loops = 1;
try_split (PATTERN (insn), safe_as_a <rtx_insn *> (insn), 1);
splitting_loops = 0;
}
@@ -3919,7 +3919,7 @@ bfin_reorg_loops (void)
{
reorg_loops (true, &bfin_doloop_hooks);
}
-\f
+
/* Possibly generate a SEQUENCE out of three insns found in SLOT.
Returns true if we modified the insn chain, false otherwise. */
static bool
@@ -4112,7 +4112,7 @@ reorder_var_tracking_notes (void)
}
}
}
-\f
+
/* On some silicon revisions, functions shorter than a certain number of cycles
can cause unpredictable behavior. Work around this by adding NOPs as
needed. */
@@ -4131,7 +4131,7 @@ workaround_rts_anomaly (void)
if (BARRIER_P (insn))
return;
-
+
if (NOTE_P (insn) || LABEL_P (insn))
continue;
@@ -4285,7 +4285,7 @@ indirect_call_p (rtx pat)
pat = XEXP (pat, 0);
gcc_assert (GET_CODE (pat) == MEM);
pat = XEXP (pat, 0);
-
+
return REG_P (pat);
}
@@ -4328,7 +4328,7 @@ workaround_speculation (void)
int delay_needed = 0;
next = find_next_insn_start (insn);
-
+
if (NOTE_P (insn) || BARRIER_P (insn))
continue;
if (JUMP_TABLE_DATA_P (insn))
@@ -4343,7 +4343,7 @@ workaround_speculation (void)
pat = PATTERN (insn);
if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
continue;
-
+
if (GET_CODE (pat) == ASM_INPUT || asm_noperands (pat) >= 0)
{
np_check_regno = -1;
@@ -4602,7 +4602,7 @@ add_sched_insns_for_speculation (void)
if (GET_CODE (PATTERN (next)) == UNSPEC_VOLATILE
&& get_attr_type (next) == TYPE_STALL)
continue;
- emit_insn_before (gen_stall (GEN_INT (1)), next);
+ emit_insn_before (gen_stall (GEN_INT (1)), next);
}
}
}
@@ -4675,7 +4675,7 @@ bfin_reorg (void)
workaround_rts_anomaly ();
}
-\f
+
/* Handle interrupt_handler, exception_handler and nmi_handler function
attributes; arguments as in struct attribute_spec.handler. */
@@ -4718,7 +4718,7 @@ bfin_comp_type_attributes (const_tree type1, const_tree type2)
if (kind1 != kind2)
return 0;
-
+
/* Check for mismatched modifiers */
if (!lookup_attribute ("nesting", TYPE_ATTRIBUTES (type1))
!= !lookup_attribute ("nesting", TYPE_ATTRIBUTES (type2)))
@@ -4743,9 +4743,9 @@ bfin_comp_type_attributes (const_tree type1, const_tree type2)
struct attribute_spec.handler. */
static tree
-bfin_handle_longcall_attribute (tree *node, tree name,
- tree args ATTRIBUTE_UNUSED,
- int flags ATTRIBUTE_UNUSED,
+bfin_handle_longcall_attribute (tree *node, tree name,
+ tree args ATTRIBUTE_UNUSED,
+ int flags ATTRIBUTE_UNUSED,
bool *no_add_attrs)
{
if (TREE_CODE (*node) != FUNCTION_TYPE
@@ -4923,7 +4923,7 @@ static const struct attribute_spec bfin_attribute_table[] =
{ "l2", 0, 0, true, false, false, false, bfin_handle_l2_attribute, NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* Implementation of TARGET_ASM_INTEGER. When using FD-PIC, we need to
tell the assembler to generate pointers to function descriptors in
some cases. */
@@ -4951,7 +4951,7 @@ bfin_assemble_integer (rtx value, unsigned int size, int aligned_p)
}
return default_assemble_integer (value, size, aligned_p);
}
-\f
+
/* Output the assembler code for a thunk function. THUNK_DECL is the
declaration for the thunk function itself, FUNCTION is the decl for
the target function. DELTA is an immediate constant offset to be
@@ -5025,7 +5025,7 @@ bfin_output_mi_thunk (FILE *file ATTRIBUTE_UNUSED,
output_asm_insn ("jump.l\t%P0", xops);
assemble_end_function (thunk, fnname);
}
-\f
+
/* Codes for all the Blackfin builtins. */
enum bfin_builtins
{
@@ -5154,7 +5154,7 @@ bfin_init_builtins (void)
= build_function_type_list (integer_type_node,
build_pointer_type (integer_type_node),
NULL_TREE);
-
+
/* Add the remaining MMX insns with somewhat more complicated types. */
def_builtin ("__builtin_bfin_csync", void_ftype_void, BFIN_BUILTIN_CSYNC);
def_builtin ("__builtin_bfin_ssync", void_ftype_void, BFIN_BUILTIN_SSYNC);
@@ -5738,7 +5738,7 @@ bfin_conditional_register_usage (void)
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
}
}
-\f
+
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS bfin_init_builtins
@@ -5746,7 +5746,7 @@ bfin_conditional_register_usage (void)
#define TARGET_EXPAND_BUILTIN bfin_expand_builtin
#undef TARGET_ASM_GLOBALIZE_LABEL
-#define TARGET_ASM_GLOBALIZE_LABEL bfin_globalize_label
+#define TARGET_ASM_GLOBALIZE_LABEL bfin_globalize_label
#undef TARGET_ASM_FILE_START
#define TARGET_ASM_FILE_START output_file_start
diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h
index 1d75c655df8..4baeefebb2c 100644
--- a/gcc/config/bfin/bfin.h
+++ b/gcc/config/bfin/bfin.h
@@ -295,10 +295,10 @@ extern const char *bfin_library_id_string;
/* Define this if the above stack space is to be considered part of the
* space allocated by the caller. */
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
-
+
/* Define this if the maximum size of all the outgoing args is to be
accumulated and pushed during the prologue. The amount can be
- found in the variable crtl->outgoing_args_size. */
+ found in the variable crtl->outgoing_args_size. */
#define ACCUMULATE_OUTGOING_ARGS 1
/*#define DATA_ALIGNMENT(TYPE, BASIC-ALIGN) for arrays.. */
@@ -316,7 +316,7 @@ extern const char *bfin_library_id_string;
#define LOCAL_ALIGNMENT(TYPE, ALIGN) bfin_local_alignment ((TYPE), (ALIGN))
#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 30 : 18)
-\f
+
/* Definitions for register eliminations.
This is an array of structures. Each structure initializes one pair
@@ -340,7 +340,7 @@ extern const char *bfin_library_id_string;
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = bfin_initial_elimination_offset ((FROM), (TO)))
-\f
+
/* This processor has
8 data register for doing arithmetic
8 pointer register for doing addressing, including
@@ -875,11 +875,11 @@ typedef struct {
/* Define this as 1 if `char' should by default be signed; else as 0. */
#define DEFAULT_SIGNED_CHAR 1
#define FLOAT_TYPE_SIZE BITS_PER_WORD
-#define SHORT_TYPE_SIZE 16
+#define SHORT_TYPE_SIZE 16
#define CHAR_TYPE_SIZE 8
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE 32
-#define LONG_LONG_TYPE_SIZE 64
+#define LONG_LONG_TYPE_SIZE 64
/* Note: Fix this to depend on target switch. -- lev */
@@ -942,7 +942,7 @@ typedef struct {
#define JUMP_TABLES_IN_TEXT_SECTION flag_pic
/* Define if operations between registers always perform the operation
- on the full register even if a narrower mode is specified.
+ on the full register even if a narrower mode is specified.
#define WORD_REGISTER_OPERATIONS 1
*/
@@ -1094,7 +1094,7 @@ extern rtx bfin_cc_rtx, bfin_rets_rtx;
#define SET_ASM_OP ".set "
/* Debugger register number for a given compiler register number */
-#define DEBUGGER_REGNO(REGNO) (REGNO)
+#define DEBUGGER_REGNO(REGNO) (REGNO)
#define SIZE_ASM_OP "\t.size\t"
diff --git a/gcc/config/c6x/c6x.cc b/gcc/config/c6x/c6x.cc
index 15be3b23716..f72f0eb5abd 100644
--- a/gcc/config/c6x/c6x.cc
+++ b/gcc/config/c6x/c6x.cc
@@ -97,7 +97,7 @@ static rtx_insn *c6x_current_insn = NULL;
/* A decl we build to access __c6xabi_DSBT_base. */
static GTY(()) tree dsbt_decl;
-\f
+
/* Determines whether we run our final scheduling pass or not. We always
avoid the normal second scheduling pass. */
static int c6x_flag_schedule_insns2;
@@ -111,7 +111,7 @@ static int c6x_flag_modulo_sched;
/* Record the state of flag_pic before we set it to 1 for DSBT. */
int c6x_initial_flag_pic;
-\f
+
typedef struct
{
/* We record the clock cycle for every insn during scheduling. */
@@ -193,7 +193,7 @@ enum unitreqs
iteration intervals. */
typedef int unit_req_table[2][UNIT_REQ_MAX];
static unit_req_table unit_reqs;
-\f
+
/* Register map for debugging. */
unsigned const debugger_register_map[FIRST_PSEUDO_REGISTER] =
{
@@ -206,7 +206,7 @@ unsigned const debugger_register_map[FIRST_PSEUDO_REGISTER] =
66, 67, 68,
-1, -1, -1 /* FP, ARGP, ILC. */
};
-\f
+
/* Allocate a new, cleared machine_function structure. */
static struct machine_function *
@@ -276,7 +276,7 @@ c6x_conditional_register_usage (void)
REG_A0);
}
}
-\f
+
static GTY(()) rtx eqdf_libfunc;
static GTY(()) rtx nedf_libfunc;
static GTY(()) rtx ledf_libfunc;
@@ -470,7 +470,7 @@ c6x_output_fn_unwind (FILE * f)
fputs ("\t.endp\n", f);
}
-\f
+
/* Stack and Calling. */
int argument_registers[10] =
@@ -677,7 +677,7 @@ c6x_build_builtin_va_list (void)
{
return build_pointer_type (char_type_node);
}
-\f
+
static void
c6x_asm_trampoline_template (FILE *f)
{
@@ -732,7 +732,7 @@ c6x_initialize_trampoline (rtx tramp, tree fndecl, rtx cxt)
TRAMPOLINE_SIZE));
#endif
}
-\f
+
/* Determine whether c6x_output_mi_thunk can succeed. */
static bool
@@ -841,7 +841,7 @@ c6x_output_mi_thunk (FILE *file ATTRIBUTE_UNUSED,
}
assemble_end_function (thunk, fnname);
}
-\f
+
/* Return true if EXP goes in small data/bss. */
static bool
@@ -1079,7 +1079,7 @@ c6x_section_type_flags (tree decl, const char *name, int reloc)
return flags;
}
-\f
+
/* Checks whether the given CALL_EXPR would use a caller saved
register. This is used to decide whether sibling call optimization
could be performed on the respective function call. */
@@ -1813,7 +1813,7 @@ c6x_expand_cpymem (rtx dst, rtx src, rtx count_exp, rtx align_exp,
}
return true;
}
-\f
+
/* Subroutine of print_address_operand, print a single address offset OFF for
a memory access of mode MEM_MODE, choosing between normal form and scaled
form depending on the type of the insn. Misaligned memory references must
@@ -2284,7 +2284,7 @@ c6x_print_operand (FILE *file, rtx x, int code)
}
}
}
-\f
+
/* Return TRUE if OP is a valid memory address with a base register of
class C. If SMALL_OFFSET is true, we disallow memory references which would
require a long offset with B14/B15. */
@@ -2455,7 +2455,7 @@ c6x_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED,
{
return true;
}
-\f
+
/* Implements TARGET_PREFERRED_RENAME_CLASS. */
static reg_class_t
c6x_preferred_rename_class (reg_class_t cl)
@@ -2468,7 +2468,7 @@ c6x_preferred_rename_class (reg_class_t cl)
return NONPREDICATE_REGS;
return NO_REGS;
}
-\f
+
/* Implements FINAL_PRESCAN_INSN. */
void
c6x_final_prescan_insn (rtx_insn *insn, rtx *opvec ATTRIBUTE_UNUSED,
@@ -2476,7 +2476,7 @@ c6x_final_prescan_insn (rtx_insn *insn, rtx *opvec ATTRIBUTE_UNUSED,
{
c6x_current_insn = insn;
}
-\f
+
/* A structure to describe the stack layout of a function. The layout is
as follows:
@@ -2948,7 +2948,7 @@ c6x_return_addr_rtx (int count)
return get_hard_reg_initial_val (Pmode, RETURN_ADDR_REGNO);
}
-\f
+
/* Return true iff TYPE is one of the shadow types. */
static bool
shadow_type_p (enum attr_type type)
@@ -2976,7 +2976,7 @@ shadow_or_blockage_p (rtx_insn *insn)
type = get_attr_type (insn);
return shadow_type_p (type) || type == TYPE_BLOCKAGE;
}
-\f
+
/* Translate UNITS into a bitmask of units we can reserve for this
insn. */
static int
@@ -3571,7 +3571,7 @@ reshuffle_units (basic_block loop)
}
regrename_finish ();
}
-\f
+
/* Backend scheduling state. */
typedef struct c6x_sched_context
{
@@ -4576,7 +4576,7 @@ c6x_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
return cost - shadow_bonus;
}
-\f
+
/* Create a SEQUENCE rtx to replace the instructions in SLOT, of which there
are N_FILLED. REAL_FIRST identifies the slot if the insn that appears
first in the original stream. */
@@ -5978,7 +5978,7 @@ c6x_function_end (FILE *file, const char *fname)
if (!flag_inhibit_size_directive)
ASM_OUTPUT_MEASURED_SIZE (file, fname);
}
-\f
+
/* Determine whether X is a shift with code CODE and an integer amount
AMOUNT. */
static bool
@@ -6317,7 +6317,7 @@ c6x_dwarf_register_span (rtx rtl)
return p;
}
-\f
+
/* Codes for all the C6X builtins. */
enum c6x_builtins
{
@@ -6397,7 +6397,7 @@ c6x_init_builtins (void)
tree v2si_ftype_v2hi_v2hi
= build_function_type_list (V2SI_type_node, V2HI_type_node,
V2HI_type_node, NULL_TREE);
-
+
def_builtin ("__builtin_c6x_sadd", int_ftype_int_int,
C6X_BUILTIN_SADD);
def_builtin ("__builtin_c6x_ssub", int_ftype_int_int,
@@ -6701,7 +6701,7 @@ c6x_regno_reg_class (int reg)
return B_REGS;
}
-\f
+
/* Target Structure. */
/* Initialize the GCC target structure. */
diff --git a/gcc/config/c6x/c6x.h b/gcc/config/c6x/c6x.h
index 26b2f2f0700..7febd7e5d7c 100644
--- a/gcc/config/c6x/c6x.h
+++ b/gcc/config/c6x/c6x.h
@@ -349,7 +349,7 @@ struct c6x_args {
/* Trampolines. */
#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT 256
-\f
+
#define ELIMINABLE_REGS \
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
@@ -361,7 +361,7 @@ struct c6x_args {
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = c6x_initial_elimination_offset ((FROM), (TO)))
-\f
+
/* Addressing Modes. */
#define CONSTANT_ADDRESS_P(x) (CONSTANT_P(x) && GET_CODE(x) != CONST_DOUBLE)
@@ -379,13 +379,13 @@ struct c6x_args {
#define LEGITIMATE_PIC_OPERAND_P(X) \
(!symbolic_operand (X, SImode))
-\f
+
struct GTY(()) machine_function
{
/* True if we expanded a sibling call. */
int contains_sibcall;
};
-\f
+
/* Costs. */
#define NO_FUNCTION_CSE 1
@@ -393,7 +393,7 @@ struct GTY(()) machine_function
#define BRANCH_COST(speed_p, predictable_p) 6
-\f
+
/* Model costs for the vectorizer. */
/* Cost of conditional branch. */
diff --git a/gcc/config/cris/cris.cc b/gcc/config/cris/cris.cc
index f0017d63022..50f234cd2c2 100644
--- a/gcc/config/cris/cris.cc
+++ b/gcc/config/cris/cris.cc
@@ -2219,7 +2219,7 @@ cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
/* Queue an .ident string in the queue of top-level asm statements.
If the front-end is done, we must be being called from toplev.cc.
In that case, do nothing. */
-void
+void
cris_asm_output_ident (const char *string)
{
if (symtab->state != PARSING)
@@ -3404,7 +3404,7 @@ cris_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
if (for_return == 1)
return mode;
return CRIS_PROMOTED_MODE (mode, *punsignedp, type);
-}
+}
/* Atomic types require alignment to be at least their "natural" size. */
diff --git a/gcc/config/darwin-c.cc b/gcc/config/darwin-c.cc
index 579b9fa9317..0c49bfdada1 100644
--- a/gcc/config/darwin-c.cc
+++ b/gcc/config/darwin-c.cc
@@ -733,7 +733,7 @@ darwin_cpp_builtins (cpp_reader *pfile)
/* Since we do not (at 4.6) support ObjC gc for the NeXT runtime, the
following will cause a syntax error if one tries to compile gc attributed
- items. However, without this, NeXT system headers cannot be parsed
+ items. However, without this, NeXT system headers cannot be parsed
properly (on systems >= darwin 9). */
if (flag_objc_gc)
{
@@ -805,24 +805,24 @@ darwin_cfstring_ref_p (const_tree strp)
return false;
tn = TYPE_NAME (strp);
- if (tn)
+ if (tn)
tn = DECL_NAME (tn);
- return (tn
+ return (tn
&& IDENTIFIER_POINTER (tn)
&& startswith (IDENTIFIER_POINTER (tn), "CFStringRef"));
}
/* At present the behavior of this is undefined and it does nothing. */
static void
-darwin_check_cfstring_format_arg (tree ARG_UNUSED (format_arg),
+darwin_check_cfstring_format_arg (tree ARG_UNUSED (format_arg),
tree ARG_UNUSED (args_list))
{
}
/* The extra format types we recognize. */
EXPORTED_CONST format_kind_info darwin_additional_format_types[] = {
- { "CFString", NULL, NULL, NULL, NULL,
- NULL, NULL,
+ { "CFString", NULL, NULL, NULL, NULL,
+ NULL, NULL,
FMT_FLAG_ARG_CONVERT|FMT_FLAG_PARSE_ARG_CONVERT_EXTERNAL, 0, 0, 0, 0, 0, 0,
NULL, NULL
}
diff --git a/gcc/config/darwin-driver.cc b/gcc/config/darwin-driver.cc
index 9c1dcc3d794..294373022aa 100644
--- a/gcc/config/darwin-driver.cc
+++ b/gcc/config/darwin-driver.cc
@@ -191,8 +191,8 @@ darwin_find_version_from_kernel (void)
/* When running on a Darwin system and using that system's headers and
libraries, default the -mmacosx-version-min flag to be the version
- of the system on which the compiler is running.
-
+ of the system on which the compiler is running.
+
When building cross or native cross compilers, default to the OSX
version of the target (as provided by the most specific target header
included in tm.h). This may be overidden by setting the flag explicitly
@@ -287,7 +287,7 @@ darwin_driver_init (unsigned int *decoded_options_count,
case OPT_arch:
/* Support provision of a single -arch xxxx flag as a means of
specifying the sub-target/multi-lib. Translate this into -m32/64
- as appropriate. */
+ as appropriate. */
if (!strcmp ((*decoded_options)[i].arg, "i386"))
seenX86 = true;
else if (!strcmp ((*decoded_options)[i].arg, "x86_64"))
@@ -307,7 +307,7 @@ darwin_driver_init (unsigned int *decoded_options_count,
* sizeof (struct cl_decoded_option)));
}
--i;
- --*decoded_options_count;
+ --*decoded_options_count;
break;
case OPT_m32:
@@ -384,7 +384,7 @@ darwin_driver_init (unsigned int *decoded_options_count,
" (%<-m32%> ignored)");
if (! seenM64) /* Add -m64 if the User didn't. */
appendM64 = true;
- }
+ }
#elif DARWIN_PPC
if (seenX86 || seenX86_64)
warning (0, "this compiler does not support x86"
diff --git a/gcc/config/darwin-protos.h b/gcc/config/darwin-protos.h
index 747745fa577..2d68b14a4e5 100644
--- a/gcc/config/darwin-protos.h
+++ b/gcc/config/darwin-protos.h
@@ -59,7 +59,7 @@ extern void darwin_set_default_type_attributes (tree);
extern int machopic_reloc_rw_mask (void);
extern section *machopic_select_section (tree, int, unsigned HOST_WIDE_INT);
-extern section *darwin_function_section (tree, enum node_frequency, bool, bool);
+extern section *darwin_function_section (tree, enum node_frequency, bool, bool);
extern section *darwin_tm_clone_table_section (void);
extern void darwin_function_switched_text_sections (FILE *, tree, bool);
@@ -105,11 +105,11 @@ extern void darwin_asm_declare_constant_name (FILE *, const char *,
extern void darwin_output_aligned_bss (FILE *, tree, const char *,
unsigned HOST_WIDE_INT, unsigned int);
-extern void darwin_asm_output_aligned_decl_local (FILE *, tree, const char *,
- unsigned HOST_WIDE_INT,
+extern void darwin_asm_output_aligned_decl_local (FILE *, tree, const char *,
+ unsigned HOST_WIDE_INT,
unsigned int);
extern void darwin_asm_output_aligned_decl_common (FILE *, tree, const char *,
- unsigned HOST_WIDE_INT,
+ unsigned HOST_WIDE_INT,
unsigned int);
extern bool darwin_binds_local_p (const_tree);
diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h
index e6f76e598e6..027a346b8f9 100644
--- a/gcc/config/darwin.h
+++ b/gcc/config/darwin.h
@@ -785,7 +785,7 @@ ASM_OPTIONS ASM_MMACOSX_VERSION_MIN_SPEC
#define TARGET_ASM_DECLARE_CONSTANT_NAME darwin_asm_declare_constant_name
/* Wrap new method names in quotes so the assembler doesn't gag.
- Make Objective-C internal symbols local and in doing this, we need
+ Make Objective-C internal symbols local and in doing this, we need
to accommodate the name mangling done by c++ on file scope locals. */
int darwin_label_is_anonymous_local_objc_name (const char *name);
@@ -1140,7 +1140,7 @@ void add_framework_path (char *);
#undef GTM_SELF_SPECS
#define GTM_SELF_SPECS ""
-/* Darwin disables section anchors by default.
+/* Darwin disables section anchors by default.
They should be enabled per arch where support exists in that arch. */
#define TARGET_ASM_OUTPUT_ANCHOR NULL
#define DARWIN_SECTION_ANCHORS 0
@@ -1171,7 +1171,7 @@ extern void darwin_driver_init (unsigned int *,struct cl_decoded_option **);
#undef STACK_CHECK_STATIC_BUILTIN
#define STACK_CHECK_STATIC_BUILTIN 1
-/* When building cross-compilers (and native crosses) we shall default to
+/* When building cross-compilers (and native crosses) we shall default to
providing an osx-version-min of this unless overridden by the User.
10.5 is the only version that fully supports all our archs so that's the
fall-back default. */
diff --git a/gcc/config/elfos.h b/gcc/config/elfos.h
index f294f3b5704..6bed2ed02c5 100644
--- a/gcc/config/elfos.h
+++ b/gcc/config/elfos.h
@@ -43,10 +43,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
-/* The biggest alignment supported by ELF in bits. 32-bit ELF
- supports section alignment up to (0x80000000 * 8), while
- 64-bit ELF supports (0x8000000000000000 * 8). If this macro
- is not defined, the default is the largest alignment supported
+/* The biggest alignment supported by ELF in bits. 32-bit ELF
+ supports section alignment up to (0x80000000 * 8), while
+ 64-bit ELF supports (0x8000000000000000 * 8). If this macro
+ is not defined, the default is the largest alignment supported
by 32-bit ELF and representable on a 32-bit host. Use this
macro to limit the alignment which can be specified using
the `__attribute__ ((aligned (N)))' construct. */
diff --git a/gcc/config/epiphany/epiphany.cc b/gcc/config/epiphany/epiphany.cc
index fdd4df71456..5290b2da25f 100644
--- a/gcc/config/epiphany/epiphany.cc
+++ b/gcc/config/epiphany/epiphany.cc
@@ -74,7 +74,7 @@ static tree epiphany_handle_forwarder_attribute (tree *, tree, tree, int,
static bool epiphany_pass_by_reference (cumulative_args_t,
const function_arg_info &);
static rtx_insn *frame_insn (rtx);
-\f
+
/* defines for the initialization of the GCC target structure. */
#define TARGET_ATTRIBUTE_TABLE epiphany_attribute_table
@@ -181,7 +181,7 @@ static rtx_insn *frame_insn (rtx);
#undef TARGET_STARTING_FRAME_OFFSET
#define TARGET_STARTING_FRAME_OFFSET epiphany_starting_frame_offset
-\f
+
bool
epiphany_is_interrupt_p (tree decl)
{
@@ -448,7 +448,7 @@ epiphany_init_reg_tables (void)
epiphany_regno_reg_class[i] = NO_REGS;
}
}
-\f
+
/* EPIPHANY specific attribute support.
The EPIPHANY has these attributes:
@@ -553,7 +553,7 @@ epiphany_handle_forwarder_attribute (tree *node ATTRIBUTE_UNUSED,
return NULL_TREE;
}
-\f
+
/* Misc. utilities. */
/* Generate a SYMBOL_REF for the special function NAME. When the address
@@ -684,7 +684,7 @@ gen_compare_reg (machine_mode cmode, enum rtx_code code,
emit_insn (pat);
return gen_rtx_fmt_ee (code, cmode, cc_reg, const0_rtx);
}
-\f
+
/* The ROUND_ADVANCE* macros are local to this file. */
/* Round SIZE up to a word boundary. */
#define ROUND_ADVANCE(SIZE) \
@@ -766,7 +766,7 @@ epiphany_arg_partial_bytes (cumulative_args_t cum,
}
return words * UNITS_PER_WORD;
}
-\f
+
/* Cost functions. */
/* Compute a (partial) cost for rtx X. Return true if the complete
@@ -832,7 +832,7 @@ epiphany_rtx_costs (rtx x, machine_mode mode, int outer_code,
return false;
}
-
+
case SET:
{
rtx src = SET_SRC (x);
@@ -918,7 +918,7 @@ epiphany_memory_move_cost (machine_mode mode,
{
return GET_MODE_CLASS (mode) == MODE_INT ? 3 : 4;
}
-\f
+
/* Function prologue/epilogue handlers. */
/* EPIPHANY stack frames look like:
@@ -1264,7 +1264,7 @@ epiphany_compute_frame_size (int size /* # of var. bytes allocated. */)
/* Ok, we're done. */
return total_size;
}
-\f
+
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
For `%' followed by punctuation, CODE is the punctuation and X is null. */
@@ -1473,7 +1473,7 @@ epiphany_final_prescan_insn (rtx_insn *insn ATTRIBUTE_UNUSED,
fputs ("\tnop\n", asm_out_file);
}
-\f
+
/* Worker function for TARGET_RETURN_IN_MEMORY. */
static bool
@@ -2282,7 +2282,7 @@ epiphany_function_arg_advance (cumulative_args_t cum_v,
*cum = (ROUND_ADVANCE_CUM (*cum, arg.mode, arg.type)
+ ROUND_ADVANCE_ARG (arg.mode, arg.type));
}
-\f
+
/* Nested function support.
An epiphany trampoline looks like this:
mov r16,%low(fnaddr)
@@ -2324,7 +2324,7 @@ epiphany_trampoline_init (rtx tramp_mem, tree fndecl, rtx cxt)
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (Pmode, tramp, 16)),
GEN_INT (0x0802014f));
}
-\f
+
bool
epiphany_optimize_mode_switching (int entity)
{
diff --git a/gcc/config/epiphany/epiphany.h b/gcc/config/epiphany/epiphany.h
index c742709309e..1e4a6f1b987 100644
--- a/gcc/config/epiphany/epiphany.h
+++ b/gcc/config/epiphany/epiphany.h
@@ -28,7 +28,7 @@ along with GCC; see the file COPYING3. If not see
#undef PTRDIFF_TYPE
#undef WCHAR_TYPE
#undef WCHAR_TYPE_SIZE
-\f
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. If not see
interface still lacks mkdir. */
#define TARGET_POSIX_IO
#endif
-\f
+
/* Target machine storage layout. */
/* Define this if most significant bit is lowest numbered
@@ -183,7 +183,7 @@ along with GCC; see the file COPYING3. If not see
#define ADJUST_FIELD_ALIGN(FIELD, TYPE, COMPUTED) \
epiphany_adjust_field_align((TYPE), (COMPUTED))
-\f
+
/* Layout of source language data types. */
#define SHORT_TYPE_SIZE 16
@@ -201,7 +201,7 @@ along with GCC; see the file COPYING3. If not see
#define PTRDIFF_TYPE "long int"
#define WCHAR_TYPE "unsigned int"
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -415,7 +415,7 @@ extern enum reg_class epiphany_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define SIMM16(X) (IN_RANGE ((X), -65536, 65535))
#define SIMM11(X) (IN_RANGE ((X), -1024, 1023))
#define IMM5(X) (IN_RANGE ((X), 0, 0x1F))
-\f
+
typedef struct GTY (()) machine_function
{
unsigned args_parsed : 1;
@@ -434,7 +434,7 @@ typedef struct GTY (()) machine_function
#define MACHINE_FUNCTION(fun) (fun)->machine
#define INIT_EXPANDERS epiphany_init_expanders ()
-\f
+
/* Stack layout and stack pointer usage. */
/* Define this macro if pushing a word onto the stack moves the stack
@@ -486,7 +486,7 @@ typedef struct GTY (()) machine_function
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = epiphany_initial_elimination_offset ((FROM), (TO)))
-\f
+
/* Function argument passing. */
/* If defined, the maximum amount of space required for outgoing
@@ -525,10 +525,10 @@ typedef struct GTY (()) machine_function
of varargs handling. */
#define PASS_IN_REG_P(CUM, MODE, TYPE) \
(ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < MAX_EPIPHANY_PARM_REGS)
-\f
+
/* Tell GCC to use TARGET_RETURN_IN_MEMORY. */
#define DEFAULT_PCC_STRUCT_RETURN 0
-\f
+
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers.
@@ -562,7 +562,7 @@ typedef struct GTY (()) machine_function
: gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), UNSPEC_RETURN_ADDR))
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (EPIPHANY_RETURN_REGNO)
-\f
+
/* Trampolines.
An epiphany trampoline looks like this:
mov r16,%low(fnaddr)
@@ -573,7 +573,7 @@ typedef struct GTY (()) machine_function
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 20
-\f
+
/* Addressing modes, and classification of registers for them. */
/* Maximum number of registers that can appear in a valid memory address. */
@@ -620,7 +620,7 @@ typedef struct GTY (()) machine_function
((X) == frame_pointer_rtx \
|| (GET_CODE (X) == PLUS && XEXP ((X), 0) == frame_pointer_rtx \
&& CONST_INT_P (XEXP ((X), 1))))
-\f
+
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
return the mode to be used for the comparison. */
#define SELECT_CC_MODE(OP, X, Y) \
@@ -641,7 +641,7 @@ typedef struct GTY (()) machine_function
((MODE) == CCmode || (MODE) == CC_FPmode || (MODE) == CC_FP_EQmode \
|| (MODE) == CC_FP_GTEmode || (MODE) == CC_FP_ORDmode \
|| (MODE) == CC_FP_UNEQmode)
-\f
+
/* Costs. */
/* The cost of a branch insn. */
@@ -660,7 +660,7 @@ typedef struct GTY (()) machine_function
function address than to call an address kept in a register. */
/* On the EPIPHANY, calling through registers is slow. */
#define NO_FUNCTION_CSE 1
-\f
+
/* Section selection. */
/* WARNING: These section names also appear in dwarf2out.cc. */
@@ -677,7 +677,7 @@ typedef struct GTY (()) machine_function
Otherwise, the readonly data section is used.
This macro is irrelevant if there is no separate readonly data section. */
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
-\f
+
/* PIC */
/* The register number of the register used to address a table of static
@@ -688,7 +688,7 @@ typedef struct GTY (()) machine_function
is up to the machine-dependent files to allocate such a register (if
necessary). */
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? PIC_REGNO : INVALID_REGNUM)
-\f
+
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
@@ -792,13 +792,13 @@ do \
} \
} \
while (0)
-\f
+
/* Debugging information. */
/* Generate DWARF debugging information. */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
-\f
+
/* Miscellaneous. */
/* Specify the machine mode that this machine uses
@@ -831,7 +831,7 @@ do \
/* A function address in a call instruction. */
#define FUNCTION_MODE SImode
-\f
+
/* EPIPHANY function types. */
enum epiphany_function_type
{
diff --git a/gcc/config/fr30/fr30.cc b/gcc/config/fr30/fr30.cc
index 334bb44e37f..74991bc678a 100644
--- a/gcc/config/fr30/fr30.cc
+++ b/gcc/config/fr30/fr30.cc
@@ -18,7 +18,7 @@
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/*{{{ Includes */
+/*{{{ Includes */
#define IN_TARGET_CODE 1
@@ -45,13 +45,13 @@
#include "target-def.h"
/*}}}*/
-/*{{{ Function Prologues & Epilogues */
+/*{{{ Function Prologues & Epilogues */
/* The FR30 stack looks like this:
Before call After call
FP ->| | | |
- +-----------------------+ +-----------------------+ high
+ +-----------------------+ +-----------------------+ high
| | | | memory
| local variables, | | local variables, |
| reg save area, etc. | | reg save area, etc. |
@@ -63,32 +63,32 @@
SP ->| do not fit in regs | | |
+-----------------------+ +-----------------------+
| args that used to be | \
- | in regs; only created | | pretend_size
- AP-> | for vararg funcs | /
- +-----------------------+
- | | \
+ | in regs; only created | | pretend_size
+ AP-> | for vararg funcs | /
+ +-----------------------+
+ | | \
| register save area | |
| | |
+-----------------------+ | reg_size
- | return address | |
+ | return address | |
+-----------------------+ |
FP ->| previous frame ptr | /
- +-----------------------+
- | | \
- | local variables | | var_size
- | | /
- +-----------------------+
- | | \
+ +-----------------------+
+ | | \
+ | local variables | | var_size
+ | | /
+ +-----------------------+
+ | | \
low | room for args to | |
- memory | other funcs called | | args_size
+ memory | other funcs called | | args_size
| from this one | |
- SP ->| | /
- +-----------------------+
-
+ SP ->| | /
+ +-----------------------+
+
Note, AP is a fake hard register. It will be eliminated in favor of
SP or FP as appropriate.
- Note, Some or all of the stack sections above may be omitted if they
+ Note, Some or all of the stack sections above may be omitted if they
are not needed. */
/* Structure to be filled in by fr30_compute_frame_size() with register
@@ -149,7 +149,7 @@ static int fr30_num_arg_regs (const function_arg_info &);
#if UNITS_PER_WORD == 4
#define WORD_ALIGN(SIZE) (((SIZE) + 3) & ~3)
#endif
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
@@ -200,7 +200,7 @@ static int fr30_num_arg_regs (const function_arg_info &);
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Worker function for TARGET_CAN_ELIMINATE. */
@@ -211,7 +211,7 @@ fr30_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
}
/* Returns the number of bytes offset between FROM_REG and TO_REG
- for the current function. As a side effect it fills in the
+ for the current function. As a side effect it fills in the
current_frame_info structure, if the data is available. */
unsigned int
fr30_compute_frame_size (int from_reg, int to_reg)
@@ -259,10 +259,10 @@ fr30_compute_frame_size (int from_reg, int to_reg)
/* Calculate the required distance. */
return_value = 0;
-
+
if (to_reg == STACK_POINTER_REGNUM)
return_value += args_size + var_size;
-
+
if (from_reg == ARG_POINTER_REGNUM)
return_value += reg_size;
@@ -292,7 +292,7 @@ fr30_expand_prologue (void)
if (current_frame_info.pretend_size)
{
int regs_to_save = current_frame_info.pretend_size / UNITS_PER_WORD;
-
+
/* Push argument registers into the pretend arg area. */
for (regno = FIRST_ARG_REGNUM + FR30_NUM_ARG_REGS; regno --, regs_to_save --;)
{
@@ -317,7 +317,7 @@ fr30_expand_prologue (void)
/* Save return address if necessary. */
if (current_frame_info.save_rp)
{
- insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode,
+ insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode,
RETURN_POINTER_REGNUM)));
RTX_FRAME_RELATED_P (insn) = 1;
}
@@ -329,12 +329,12 @@ fr30_expand_prologue (void)
{
int enter_size = current_frame_info.frame_size + UNITS_PER_WORD;
rtx pattern;
-
+
insn = emit_insn (gen_enter_func (GEN_INT (enter_size)));
RTX_FRAME_RELATED_P (insn) = 1;
-
+
pattern = PATTERN (insn);
-
+
/* Also mark all 3 subexpressions as RTX_FRAME_RELATED_P. */
if (GET_CODE (pattern) == PARALLEL)
{
@@ -342,7 +342,7 @@ fr30_expand_prologue (void)
for (x = XVECLEN (pattern, 0); x--;)
{
rtx part = XVECEXP (pattern, 0, x);
-
+
/* One of the insns in the ENTER pattern updates the
frame pointer. If we do not actually need the frame
pointer in this function then this is a side effect
@@ -410,7 +410,7 @@ fr30_expand_epilogue (void)
/* Perform the inversion operations of the prologue. */
gcc_assert (current_frame_info.initialised);
-
+
/* Pop local variables and arguments off the stack.
If frame_pointer_needed is TRUE then the frame pointer register
has actually been used as a frame pointer, and we can recover
@@ -433,18 +433,18 @@ fr30_expand_epilogue (void)
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
}
}
-
+
if (current_frame_info.save_fp)
emit_insn (gen_movsi_pop (frame_pointer_rtx));
-
+
/* Pop all the registers that were pushed. */
if (current_frame_info.save_rp)
emit_insn (gen_movsi_pop (gen_rtx_REG (Pmode, RETURN_POINTER_REGNUM)));
-
+
for (regno = 0; regno < STACK_POINTER_REGNUM; regno ++)
if (current_frame_info.gmask & (1 << regno))
emit_insn (gen_movsi_pop (gen_rtx_REG (Pmode, regno)));
-
+
if (current_frame_info.pretend_size)
emit_insn (gen_add_to_stack (GEN_INT (current_frame_info.pretend_size)));
@@ -494,7 +494,7 @@ fr30_setup_incoming_varargs (cumulative_args_t arg_regs_used_so_far_v,
}
/*}}}*/
-/*{{{ Printing operands */
+/*{{{ Printing operands */
/* Print a memory address as an operand to reference that memory location. */
@@ -506,7 +506,7 @@ fr30_print_operand_address (FILE *stream, rtx address)
case SYMBOL_REF:
output_addr_const (stream, address);
break;
-
+
default:
fprintf (stderr, "code = %x\n", GET_CODE (address));
debug_rtx (address);
@@ -521,7 +521,7 @@ void
fr30_print_operand (FILE *file, rtx x, int code)
{
rtx x0;
-
+
switch (code)
{
case '#':
@@ -529,7 +529,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
if (dbr_sequence_length () != 0)
fputs (":D", file);
return;
-
+
case 'p':
/* Compute the register name of the second register in a hi/lo
register pair. */
@@ -538,7 +538,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
else
fprintf (file, "r%d", REGNO (x) + 1);
return;
-
+
case 'b':
/* Convert GCC's comparison operators into FR30 comparison codes. */
switch (GET_CODE (x))
@@ -558,7 +558,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
break;
}
return;
-
+
case 'B':
/* Convert GCC's comparison operators into the complimentary FR30
comparison codes. */
@@ -587,7 +587,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
else
{
HOST_WIDE_INT val;
-
+
val = INTVAL (x);
val &= 0xff;
@@ -595,7 +595,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
fprintf (file, HOST_WIDE_INT_PRINT_DEC, val);
}
return;
-
+
case 'x':
if (GET_CODE (x) != CONST_INT
|| INTVAL (x) < 16
@@ -617,11 +617,11 @@ fr30_print_operand (FILE *file, rtx x, int code)
fputs (str, file);
}
return;
-
+
case 0:
/* Handled below. */
break;
-
+
default:
fprintf (stderr, "unknown code = %x\n", code);
output_operand_lossage ("fr30_print_operand: unknown code");
@@ -636,7 +636,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
case MEM:
x0 = XEXP (x,0);
-
+
switch (GET_CODE (x0))
{
case REG:
@@ -677,11 +677,11 @@ fr30_print_operand (FILE *file, rtx x, int code)
fprintf (file, "@(r15, #" HOST_WIDE_INT_PRINT_DEC ")", val);
}
break;
-
+
case SYMBOL_REF:
output_address (VOIDmode, x0);
break;
-
+
default:
fprintf (stderr, "bad MEM code = %x\n", GET_CODE (x0));
debug_rtx (x);
@@ -689,7 +689,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
break;
}
break;
-
+
case CONST_DOUBLE :
/* We handle SFmode constants here as output_addr_const doesn't. */
if (GET_MODE (x) == SFmode)
@@ -740,7 +740,7 @@ fr30_function_value_regno_p (const unsigned int regno)
return (regno == RETURN_VALUE_REGNUM);
}
-/*{{{ Function arguments */
+/*{{{ Function arguments */
/* Return true if we should pass an argument on the stack rather than
in registers. */
@@ -787,7 +787,7 @@ fr30_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
register, partial stack space. */
if (*cum + fr30_num_arg_regs (arg) <= FR30_NUM_ARG_REGS)
return 0;
-
+
return (FR30_NUM_ARG_REGS - *cum) * UNITS_PER_WORD;
}
@@ -814,7 +814,7 @@ fr30_function_arg_advance (cumulative_args_t cum,
}
/*}}}*/
-/*{{{ Operand predicates */
+/*{{{ Operand predicates */
#ifndef Mmode
#define Mmode machine_mode
@@ -828,30 +828,30 @@ fr30_check_multiple_regs (rtx *operands, int num_operands, int descending)
if (descending)
{
unsigned int prev_regno = 0;
-
+
while (num_operands --)
{
if (GET_CODE (operands [num_operands]) != REG)
return 0;
-
+
if (REGNO (operands [num_operands]) < prev_regno)
return 0;
-
+
prev_regno = REGNO (operands [num_operands]);
}
}
else
{
unsigned int prev_regno = CONDITION_CODE_REGNUM;
-
+
while (num_operands --)
{
if (GET_CODE (operands [num_operands]) != REG)
return 0;
-
+
if (REGNO (operands [num_operands]) > prev_regno)
return 0;
-
+
prev_regno = REGNO (operands [num_operands]);
}
}
@@ -895,13 +895,13 @@ fr30_move_double (rtx * operands)
if (src_code == REG)
{
int reverse = (REGNO (dest) == REGNO (src) + 1);
-
+
/* We normally copy the low-numbered register first. However, if
the first register of operand 0 is the same as the second register
of operand 1, we must copy in the opposite order. */
emit_insn (gen_rtx_SET (operand_subword (dest, reverse, TRUE, mode),
operand_subword (src, reverse, TRUE, mode)));
-
+
emit_insn
(gen_rtx_SET (operand_subword (dest, !reverse, TRUE, mode),
operand_subword (src, !reverse, TRUE, mode)));
@@ -912,9 +912,9 @@ fr30_move_double (rtx * operands)
rtx dest0 = operand_subword (dest, 0, TRUE, mode);
rtx dest1 = operand_subword (dest, 1, TRUE, mode);
rtx new_mem;
-
+
gcc_assert (GET_CODE (addr) == REG);
-
+
/* Copy the address before clobbering it. See PR 34174. */
emit_insn (gen_rtx_SET (dest1, addr));
emit_insn (gen_rtx_SET (dest0, adjust_address (src, SImode, 0)));
@@ -923,7 +923,7 @@ fr30_move_double (rtx * operands)
new_mem = gen_rtx_MEM (SImode, dest1);
MEM_COPY_ATTRIBUTES (new_mem, src);
-
+
emit_insn (gen_rtx_SET (dest1, new_mem));
}
else if (src_code == CONST_INT || src_code == CONST_DOUBLE)
@@ -932,7 +932,7 @@ fr30_move_double (rtx * operands)
split_double (src, &words[0], &words[1]);
emit_insn (gen_rtx_SET (operand_subword (dest, 0, TRUE, mode),
words[0]));
-
+
emit_insn (gen_rtx_SET (operand_subword (dest, 1, TRUE, mode),
words[1]));
}
@@ -1006,7 +1006,7 @@ fr30_frame_pointer_required (void)
target are 32 bit aligned within the trampoline. That allows us to
initialize those locations with simple SImode stores. The alternative
would be to use HImode stores. */
-
+
static void
fr30_asm_trampoline_template (FILE *f)
{
diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h
index 3d0c3a9431e..b9ebefdc2df 100644
--- a/gcc/config/fr30/fr30.h
+++ b/gcc/config/fr30/fr30.h
@@ -1,6 +1,6 @@
-/*{{{ Comment. */
+/*{{{ Comment. */
-/* Definitions of FR30 target.
+/* Definitions of FR30 target.
Copyright (C) 1998-2022 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
@@ -20,8 +20,8 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/*}}}*/ \f
-/*{{{ Run-time target specifications. */
+/*}}}*/
+/*{{{ Run-time target specifications. */
#undef ASM_SPEC
#define ASM_SPEC ""
@@ -55,8 +55,8 @@ along with GCC; see the file COPYING3. If not see
#define LINK_SPEC "%{h*} %{v:-V} \
%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
-/*}}}*/ \f
-/*{{{ Storage Layout. */
+/*}}}*/
+/*{{{ Storage Layout. */
#define BITS_BIG_ENDIAN 1
@@ -92,8 +92,8 @@ along with GCC; see the file COPYING3. If not see
#define PCC_BITFIELD_TYPE_MATTERS 1
-/*}}}*/ \f
-/*{{{ Layout of Source Language Data Types. */
+/*}}}*/
+/*{{{ Layout of Source Language Data Types. */
#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
@@ -117,8 +117,8 @@ along with GCC; see the file COPYING3. If not see
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-/*}}}*/ \f
-/*{{{ REGISTER BASICS. */
+/*}}}*/
+/*{{{ REGISTER BASICS. */
/* Number of hardware registers known to the compiler. They receive numbers 0
through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number
@@ -142,7 +142,7 @@ along with GCC; see the file COPYING3. If not see
/* A call-used register that can be used during the function prologue. */
#define PROLOGUE_TMP_REGNUM COMPILER_SCRATCH_REGISTER
-
+
/* Register numbers used for passing a function's static chain pointer. If
register windows are used, the register number as seen by the called
function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as
@@ -164,7 +164,7 @@ along with GCC; see the file COPYING3. If not see
determines which register this is. On other machines, you can choose any
register you wish for this purpose. */
#define FRAME_POINTER_REGNUM 14
-
+
/* The register number of the stack pointer register, which must also be a
fixed register according to `FIXED_REGISTERS'. On most machines, the
hardware determines which register this is. */
@@ -233,8 +233,8 @@ along with GCC; see the file COPYING3. If not see
{"r13", 13}, {"r14", 14}, {"r15", 15}, {"usp", 15}, {"ps", 16}\
}
-/*}}}*/ \f
-/*{{{ Register Classes. */
+/*}}}*/
+/*{{{ Register Classes. */
/* An enumeral type that must be defined with all the register class names as
enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
@@ -334,8 +334,8 @@ enum reg_class
#define CLASS_MAX_NREGS(CLASS, MODE) targetm.hard_regno_nregs (0, MODE)
-/*}}}*/ \f
-/*{{{ Basic Stack Layout. */
+/*}}}*/
+/*{{{ Basic Stack Layout. */
/* Define this macro if pushing a word onto the stack moves the stack pointer
to a smaller address. */
@@ -369,8 +369,8 @@ enum reg_class
debugging information like that provided by DWARF 2. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
-/*}}}*/ \f
-/*{{{ Register That Address the Stack Frame. */
+/*}}}*/
+/*{{{ Register That Address the Stack Frame. */
/* The register number of the arg pointer register, which is used to access the
function's argument list. On some machines, this is the same as the frame
@@ -381,8 +381,8 @@ enum reg_class
arrange to be able to eliminate it. */
#define ARG_POINTER_REGNUM 20
-/*}}}*/ \f
-/*{{{ Eliminating the Frame Pointer and the Arg Pointer. */
+/*}}}*/
+/*{{{ Eliminating the Frame Pointer and the Arg Pointer. */
/* If defined, this macro specifies a table of register pairs used to eliminate
unneeded registers that point into the stack frame. If it is not defined,
@@ -419,8 +419,8 @@ enum reg_class
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = fr30_compute_frame_size (FROM, TO)
-/*}}}*/ \f
-/*{{{ Passing Function Arguments on the Stack. */
+/*}}}*/
+/*{{{ Passing Function Arguments on the Stack. */
/* If defined, the maximum amount of space required for outgoing arguments will
be computed and placed into the variable
@@ -432,11 +432,11 @@ enum reg_class
proper. */
#define ACCUMULATE_OUTGOING_ARGS 1
-/*}}}*/ \f
-/*{{{ Function Arguments in Registers. */
+/*}}}*/
+/*{{{ Function Arguments in Registers. */
/* The number of register assigned to holding function arguments. */
-
+
#define FR30_NUM_ARG_REGS 4
/* A C type for declaring a variable that is used as the first argument of
@@ -480,8 +480,8 @@ enum reg_class
#define FUNCTION_ARG_REGNO_P(REGNO) \
((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) < FIRST_ARG_REGNUM + FR30_NUM_ARG_REGS))
-/*}}}*/ \f
-/*{{{ How Large Values are Returned. */
+/*}}}*/
+/*{{{ How Large Values are Returned. */
/* Define this macro to be 1 if all structure and union return values must be
in memory. Since this results in slower code, this should be defined only
@@ -492,8 +492,8 @@ enum reg_class
If not defined, this defaults to the value 1. */
#define DEFAULT_PCC_STRUCT_RETURN 1
-/*}}}*/ \f
-/*{{{ Generating Code for Profiling. */
+/*}}}*/
+/*{{{ Generating Code for Profiling. */
/* A C statement or compound statement to output to FILE some assembler code to
call the profiling subroutine `mcount'. Before calling, the assembler code
@@ -514,8 +514,8 @@ enum reg_class
fprintf (FILE, ".word\tLP%d\n", LABELNO); \
}
-/*}}}*/ \f
-/*{{{ Trampolines for Nested Functions. */
+/*}}}*/
+/*{{{ Trampolines for Nested Functions. */
/* A C expression for the size in bytes of the trampoline, as an integer. */
#define TRAMPOLINE_SIZE 18
@@ -525,8 +525,8 @@ enum reg_class
the trampoline is also aligned on a 32bit boundary. */
#define TRAMPOLINE_ALIGNMENT 32
-/*}}}*/ \f
-/*{{{ Addressing Modes. */
+/*}}}*/
+/*{{{ Addressing Modes. */
/* A number, the maximum number of registers that can appear in a valid memory
address. Note that it is up to you to specify a value equal to the maximum
@@ -539,15 +539,15 @@ enum reg_class
/* On the FR30 we only have one real addressing mode - an address in a
register. There are three special cases however:
-
+
* indexed addressing using small positive offsets from the stack pointer
-
+
* indexed addressing using small signed offsets from the frame pointer
* register plus register addressing using R13 as the base register.
At the moment we only support the first two of these special cases. */
-
+
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
do \
@@ -619,8 +619,8 @@ enum reg_class
will reload one or both registers only if neither labeling works. */
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
-/*}}}*/ \f
-/*{{{ Describing Relative Costs of Operations */
+/*}}}*/
+/*{{{ Describing Relative Costs of Operations */
/* Define this macro as a C expression which is nonzero if accessing less than
a word of memory (i.e. a `char' or a `short') is no faster than accessing a
@@ -635,8 +635,8 @@ enum reg_class
same word of the structure, but to different bytes. */
#define SLOW_BYTE_ACCESS 1
-/*}}}*/ \f
-/*{{{ Dividing the output into sections. */
+/*}}}*/
+/*{{{ Dividing the output into sections. */
/* A C expression whose value is a string containing the assembler operation
that should precede instructions and read-only data. Normally `".text"' is
@@ -650,7 +650,7 @@ enum reg_class
#define BSS_SECTION_ASM_OP "\t.section .bss"
-/*}}}*/ \f
+/*}}}*/
/*{{{ The Overall Framework of an Assembler File. */
/* A C string constant describing how to begin a comment in the target
@@ -670,14 +670,14 @@ enum reg_class
for ordinary compiler output. */
#define ASM_APP_OFF "#NO_APP\n"
-/*}}}*/ \f
-/*{{{ Output and Generation of Labels. */
+/*}}}*/
+/*{{{ Output and Generation of Labels. */
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.globl "
-/*}}}*/ \f
-/*{{{ Output of Assembler Instructions. */
+/*}}}*/
+/*{{{ Output of Assembler Instructions. */
/* A C compound statement to output to stdio stream STREAM the assembler syntax
for an instruction operand X. X is an RTL expression.
@@ -715,8 +715,8 @@ enum reg_class
#define USER_LABEL_PREFIX ""
#define IMMEDIATE_PREFIX ""
-/*}}}*/ \f
-/*{{{ Output of Dispatch Tables. */
+/*}}}*/
+/*{{{ Output of Dispatch Tables. */
/* This macro should be provided on machines where the addresses in a dispatch
table are relative to the table's own address.
@@ -743,8 +743,8 @@ fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t.word .L%d\n", VALUE)
-/*}}}*/ \f
-/*{{{ Assembler Commands for Alignment. */
+/*}}}*/
+/*{{{ Assembler Commands for Alignment. */
/* A C statement to output to the stdio stream STREAM an assembler command to
advance the location counter to a multiple of 2 to the POWER bytes. POWER
@@ -752,8 +752,8 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
fprintf ((STREAM), "\t.p2align %d\n", (POWER))
-/*}}}*/ \f
-/*{{{ Miscellaneous Parameters. */
+/*}}}*/
+/*{{{ Miscellaneous Parameters. */
/* An alias for a machine mode name. This is the machine mode that elements of
a jump-table should have. */
@@ -779,7 +779,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
`QImode'. */
#define FUNCTION_MODE QImode
-/*}}}*/ \f
+/*}}}*/
/* Local Variables: */
/* folded-file: t */
diff --git a/gcc/config/freebsd-spec.h b/gcc/config/freebsd-spec.h
index 9050a8dcbf9..ea2a742638f 100644
--- a/gcc/config/freebsd-spec.h
+++ b/gcc/config/freebsd-spec.h
@@ -22,10 +22,10 @@ a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-/* Common FreeBSD configuration.
+/* Common FreeBSD configuration.
All FreeBSD architectures should include this file, which will specify
their commonalities.
- Adapted from gcc/config/freebsd.h by
+ Adapted from gcc/config/freebsd.h by
David O'Brien <obrien@FreeBSD.org>
Loren J. Rittle <ljrittle@acm.org>. */
@@ -49,7 +49,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* Define the default FreeBSD-specific per-CPU hook code. */
#define FBSD_TARGET_CPU_CPP_BUILTINS() do {} while (0)
-/* Provide a CPP_SPEC appropriate for FreeBSD. We just deal with the GCC
+/* Provide a CPP_SPEC appropriate for FreeBSD. We just deal with the GCC
option `-posix', and PIC issues. */
#define FBSD_CPP_SPEC " \
@@ -58,10 +58,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
%{posix:-D_POSIX_SOURCE}"
/* Provide a STARTFILE_SPEC appropriate for FreeBSD. Here we add
- the magical crtbegin.o file (see crtstuff.c) which provides part
- of the support for getting C++ file-scope static object constructed
+ the magical crtbegin.o file (see crtstuff.c) which provides part
+ of the support for getting C++ file-scope static object constructed
before entering `main'. */
-
+
#define FBSD_STARTFILE_SPEC \
"%{!shared: \
%{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \
@@ -71,9 +71,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
/* Provide a ENDFILE_SPEC appropriate for FreeBSD. Here we tack on
- the magical crtend.o file (see crtstuff.c) which provides part of
- the support for getting C++ file-scope static object constructed
- before entering `main', followed by a normal "finalizer" file,
+ the magical crtend.o file (see crtstuff.c) which provides part of
+ the support for getting C++ file-scope static object constructed
+ before entering `main', followed by a normal "finalizer" file,
`crtn.o'. */
#define FBSD_ENDFILE_SPEC \
diff --git a/gcc/config/freebsd.h b/gcc/config/freebsd.h
index 3f154cae456..5773948d159 100644
--- a/gcc/config/freebsd.h
+++ b/gcc/config/freebsd.h
@@ -17,11 +17,11 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* Common FreeBSD configuration.
+/* Common FreeBSD configuration.
All FreeBSD architectures should include this file, which will specify
their commonalities.
- Adapted from gcc/config/i386/freebsd-elf.h by
- David O'Brien <obrien@FreeBSD.org>.
+ Adapted from gcc/config/i386/freebsd-elf.h by
+ David O'Brien <obrien@FreeBSD.org>.
Further work by David O'Brien <obrien@FreeBSD.org> and
Loren J. Rittle <ljrittle@acm.org>. */
diff --git a/gcc/config/frv/frv.cc b/gcc/config/frv/frv.cc
index 5cdb0bfe6e9..1ecfb05bf71 100644
--- a/gcc/config/frv/frv.cc
+++ b/gcc/config/frv/frv.cc
@@ -402,7 +402,7 @@ static bool frv_class_likely_spilled_p (reg_class_t);
static unsigned int frv_hard_regno_nregs (unsigned int, machine_mode);
static bool frv_hard_regno_mode_ok (unsigned int, machine_mode);
static bool frv_modes_tieable_p (machine_mode, machine_mode);
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_PRINT_OPERAND
#define TARGET_PRINT_OPERAND frv_print_operand
@@ -536,7 +536,7 @@ struct gcc_target targetm = TARGET_INITIALIZER;
#define FRV_SYMBOL_REF_TLS_P(RTX) \
(GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
-\f
+
/* Any function call that satisfies the machine-independent
requirements is eligible on FR-V. */
@@ -616,7 +616,7 @@ frv_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED,
{
return TARGET_FDPIC;
}
-\f
+
static int
frv_default_flags_for_cpu (void)
{
@@ -782,7 +782,7 @@ frv_option_override (void)
init_machine_status = frv_init_machine_status;
}
-\f
+
/* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
static void
@@ -823,7 +823,7 @@ frv_conditional_register_usage (void)
#endif
}
-\f
+
/*
* Compute the stack frame layout
*
@@ -1322,7 +1322,7 @@ frv_stack_info (void)
return info_ptr;
}
-\f
+
/* Print the information about the frv stack offsets, etc. when debugging. */
void
@@ -1381,7 +1381,7 @@ frv_debug_stack (frv_stack_t *info)
}
-\f
+
/* Used during final to control the packing of insns. The value is
1 if the current instruction should be packed with the next one,
@@ -1450,7 +1450,7 @@ frv_function_prologue (FILE *file)
memset (frv_nops, 0, sizeof (frv_nops));
}
-\f
+
/* Return the next available temporary register in a given class. */
static rtx
@@ -1491,7 +1491,7 @@ frv_alloc_temp_reg (
return gen_rtx_REG (mode, regno);
}
-\f
+
/* Return an rtx with the value OFFSET, which will either be a register or a
signed 12-bit integer. It can be used as the second operand in an "add"
instruction, or as the index in a load or store.
@@ -1813,7 +1813,7 @@ frv_expand_prologue (void)
gen_rtx_REG (SImode, OFFSET_REGNO)));
}
-\f
+
/* Under frv, all of the work is done via frv_expand_epilogue, but
this function provides a convenient place to do cleanup. */
@@ -1829,7 +1829,7 @@ frv_function_epilogue (FILE *)
BITMAP_FREE (frv_ifcvt.scratch_insns_bitmap);
}
-\f
+
/* Called after register allocation to add any instructions needed for the
epilogue. Using an epilogue insn is favored compared to putting all of the
instructions in the TARGET_ASM_FUNCTION_PROLOGUE target hook, since
@@ -1918,7 +1918,7 @@ frv_expand_epilogue (bool emit_return)
}
}
-\f
+
/* Worker function for TARGET_ASM_OUTPUT_MI_THUNK. */
static void
@@ -2014,7 +2014,7 @@ frv_asm_output_mi_thunk (FILE *file,
assemble_end_function (thunk_fndecl, fnname);
}
-\f
+
/* On frv, create a frame whenever we need to create stack. */
@@ -2050,7 +2050,7 @@ frv_frame_pointer_required (void)
return false;
}
-\f
+
/* Worker function for TARGET_CAN_ELIMINATE. */
bool
@@ -2093,7 +2093,7 @@ frv_initial_elimination_offset (int from, int to)
return ret;
}
-\f
+
/* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
static void
@@ -2111,7 +2111,7 @@ frv_setup_incoming_varargs (cumulative_args_t cum_v,
*cum, GET_MODE_NAME (arg.mode), *pretend_size, second_time);
}
-\f
+
/* Worker function for TARGET_EXPAND_BUILTIN_SAVEREGS. */
static rtx
@@ -2126,7 +2126,7 @@ frv_expand_builtin_saveregs (void)
return gen_rtx_PLUS (Pmode, virtual_incoming_args_rtx, GEN_INT (- offset));
}
-\f
+
/* Expand __builtin_va_start to do the va_start macro. */
static void
@@ -2154,7 +2154,7 @@ frv_expand_builtin_va_start (tree valist, rtx nextarg)
expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
}
-\f
+
/* Expand a block move operation, and return 1 if successful. Return 0
if we should let the compiler generate normal code.
@@ -2264,7 +2264,7 @@ frv_expand_block_move (rtx operands[])
return TRUE;
}
-\f
+
/* Expand a block clear operation, and return 1 if successful. Return 0
if we should let the compiler generate normal code.
@@ -2333,7 +2333,7 @@ frv_expand_block_clear (rtx operands[])
return TRUE;
}
-\f
+
/* The following variable is used to output modifiers of assembler
code of the current output insn. */
@@ -2395,7 +2395,7 @@ frv_final_prescan_insn (rtx_insn *insn, rtx *opvec,
}
-\f
+
/* A C expression whose value is RTL representing the address in a stack frame
where the pointer to the caller's frame is stored. Assume that FRAMEADDR is
an RTL expression for the address of the stack frame itself.
@@ -2451,7 +2451,7 @@ frv_index_memory (rtx memref, machine_mode mode, int index)
index * GET_MODE_SIZE (mode)));
}
-\f
+
/* Print a memory address as an operand to reference that memory location. */
static void
frv_print_operand_address (FILE * stream, machine_mode /* mode */, rtx x)
@@ -2483,7 +2483,7 @@ frv_print_operand_address (FILE * stream, machine_mode /* mode */, rtx x)
See gcc/testsuite/gcc.dg/asm-4.c for an example. */
frv_print_operand_memory_reference (stream, x, 0);
return;
-
+
default:
break;
}
@@ -2491,7 +2491,7 @@ frv_print_operand_address (FILE * stream, machine_mode /* mode */, rtx x)
fatal_insn ("bad insn to frv_print_operand_address:", x);
}
-\f
+
static void
frv_print_operand_memory_reference_reg (FILE * stream, rtx x)
{
@@ -2590,7 +2590,7 @@ frv_print_operand_memory_reference (FILE * stream, rtx x, int addr_offset)
fputs (")", stream);
}
-\f
+
/* Return 2 for likely branches and 0 for non-likely branches */
#define FRV_JUMP_LIKELY 2
@@ -2658,7 +2658,7 @@ frv_print_operand_jump_hint (rtx_insn *insn)
return ret;
}
-\f
+
/* Return the comparison operator to use for CODE given that the ICC
register is OP0. */
@@ -3011,7 +3011,7 @@ frv_print_operand_punct_valid_p (unsigned char code)
|| code == '*' || code == '&');
}
-\f
+
/* A C statement (sans semicolon) for initializing the variable CUM for the
state at the beginning of the argument list. The variable has type
`CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
@@ -3063,7 +3063,7 @@ frv_init_cumulative_args (CUMULATIVE_ARGS *cum,
}
}
-\f
+
/* Return true if we should pass an argument on the stack rather than
in registers. */
@@ -3135,7 +3135,7 @@ frv_function_incoming_arg (cumulative_args_t cum, const function_arg_info &arg)
return frv_function_arg_1 (cum, arg, true);
}
-\f
+
/* Implement TARGET_FUNCTION_ARG_ADVANCE. */
static void
@@ -3158,7 +3158,7 @@ frv_function_arg_advance (cumulative_args_t cum_v,
words * UNITS_PER_WORD);
}
-\f
+
/* Implement TARGET_ARG_PARTIAL_BYTES. */
static int
@@ -3181,7 +3181,7 @@ frv_arg_partial_bytes (cumulative_args_t cum, const function_arg_info &arg)
return ret;
}
-\f
+
/* Implements TARGET_FUNCTION_VALUE. */
static rtx
@@ -3192,7 +3192,7 @@ frv_function_value (const_tree valtype,
return gen_rtx_REG (TYPE_MODE (valtype), RETURN_VALUE_REGNUM);
}
-\f
+
/* Implements TARGET_LIBCALL_VALUE. */
static rtx
@@ -3202,7 +3202,7 @@ frv_libcall_value (machine_mode mode,
return gen_rtx_REG (mode, RETURN_VALUE_REGNUM);
}
-\f
+
/* Implements FUNCTION_VALUE_REGNO_P. */
bool
@@ -3210,7 +3210,7 @@ frv_function_value_regno_p (const unsigned int regno)
{
return (regno == RETURN_VALUE_REGNUM);
}
-\f
+
/* Return true if a register is ok to use as a base or index register. */
static FRV_INLINE int
@@ -3228,7 +3228,7 @@ frv_regno_ok_for_base_p (int regno, int strict_p)
return (regno >= FIRST_PSEUDO_REGISTER);
}
-\f
+
/* A C compound statement with a conditional `goto LABEL;' executed if X (an
RTX) is a legitimate memory address on the target machine for a memory
operand of mode MODE.
@@ -3572,7 +3572,7 @@ frv_legitimize_address (rtx x,
return x;
}
-\f
+
/* Test whether a local function descriptor is canonical, i.e.,
whether we can use FUNCDESC_GOTOFF to compute the address of the
function. */
@@ -3779,7 +3779,7 @@ frv_expand_fdpic_call (rtx *operands, bool ret_value, bool sibcall)
c = gen_call_fdpicdi (picreg, const0_rtx, lr);
emit_call_insn (c);
}
-\f
+
/* Look for a SYMBOL_REF of a function in an rtx. We always want to
process these separately from any offsets, such that we add any
offsets to the function descriptor (the actual pointer), not to the
@@ -3857,7 +3857,7 @@ condexec_memory_operand (rtx op, machine_mode mode)
addr = XEXP (op, 0);
return frv_legitimate_address_p_1 (mode, addr, reload_completed, TRUE, FALSE);
}
-\f
+
/* Return true if the bare return instruction can be used outside of the
epilog code. For frv, we only do it if there was no stack allocation. */
@@ -3873,7 +3873,7 @@ direct_return_p (void)
return (info->total_size == 0);
}
-\f
+
void
frv_emit_move (machine_mode mode, rtx dest, rtx src)
{
@@ -4161,7 +4161,7 @@ frv_emit_movsi (rtx dest, rtx src)
return FALSE;
}
-\f
+
/* Return a string to output a single word move. */
const char *
@@ -4375,7 +4375,7 @@ output_move_single (rtx operands[], rtx insn)
return "";
}
-\f
+
/* Return a string to output a double word move. */
const char *
@@ -4502,7 +4502,7 @@ output_move_double (rtx operands[], rtx insn)
return "";
}
-\f
+
/* Return a string to output a single word conditional move.
Operand0 -- EQ/NE of ccr register and 0
Operand1 -- CCR register
@@ -4644,7 +4644,7 @@ output_condmove_single (rtx operands[], rtx insn)
return "";
}
-\f
+
/* Emit the appropriate code to do a comparison, returning the register the
comparison was done it. */
@@ -4671,7 +4671,7 @@ frv_emit_comparison (enum rtx_code test, rtx op0, rtx op1)
return cc_reg;
}
-\f
+
/* Emit code for a conditional branch.
XXX: I originally wanted to add a clobber of a CCR register to use in
conditional execution, but that confuses the rest of the compiler. */
@@ -4698,7 +4698,7 @@ frv_emit_cond_branch (rtx operands[])
return TRUE;
}
-\f
+
/* Emit code to set a gpr to 1/0 based on a comparison. */
int
@@ -4729,7 +4729,7 @@ frv_emit_scc (rtx operands[])
return TRUE;
}
-\f
+
/* Split a SCC instruction into component parts, returning a SEQUENCE to hold
the separate insns. */
@@ -4763,7 +4763,7 @@ frv_split_scc (rtx dest, rtx test, rtx cc_reg, rtx cr_reg, HOST_WIDE_INT value)
return ret;
}
-\f
+
/* Emit the code for a conditional move, return TRUE if we could do the
move. */
@@ -4841,7 +4841,7 @@ frv_emit_cond_move (rtx dest, rtx test_rtx, rtx src1, rtx src2)
return TRUE;
}
-\f
+
/* Split a conditional move into constituent parts, returning a SEQUENCE
containing all of the insns. */
@@ -4935,7 +4935,7 @@ frv_split_cond_move (rtx operands[])
return ret;
}
-\f
+
/* Split (set DEST SOURCE), where DEST is a double register and SOURCE is a
memory location that is not known to be dword-aligned. */
void
@@ -4991,7 +4991,7 @@ frv_split_double_store (rtx dest, rtx source)
}
}
-\f
+
/* Split a min/max operation returning a SEQUENCE containing all of the
insns. */
@@ -5066,7 +5066,7 @@ frv_split_minmax (rtx operands[])
return ret;
}
-\f
+
/* Split an integer abs operation returning a SEQUENCE containing all of the
insns. */
@@ -5105,7 +5105,7 @@ frv_split_abs (rtx operands[])
return ret;
}
-\f
+
/* Initialize machine-specific if-conversion data.
On the FR-V, we don't have any extra fields per se, but it is useful hook to
initialize the static storage. */
@@ -5122,7 +5122,7 @@ frv_ifcvt_machdep_init (void *ce_info ATTRIBUTE_UNUSED)
frv_ifcvt.last_nested_if_cr = NULL_RTX;
}
-\f
+
/* Internal function to add a potential insn to the list of insns to be inserted
if the conditional execution conversion is successful. */
@@ -5146,7 +5146,7 @@ frv_ifcvt_add_insn (rtx pattern, rtx_insn *insn, int before_p)
}
}
-\f
+
/* A C expression to modify the code described by the conditional if
information CE_INFO, possibly updating the tests in TRUE_EXPR, and
FALSE_EXPR for converting if-then and if-then-else code to conditional
@@ -5496,7 +5496,7 @@ frv_ifcvt_modify_tests (ce_if_block *ce_info, rtx *p_true, rtx *p_false)
return;
}
-\f
+
/* A C expression to modify the code described by the conditional if
information CE_INFO, for the basic block BB, possibly updating the tests in
TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or
@@ -5637,7 +5637,7 @@ frv_ifcvt_modify_multiple_tests (ce_if_block *ce_info,
return;
}
-\f
+
/* Return a register which will be loaded with a value if an IF block is
converted to conditional execution. This is used to rewrite instructions
that use constants to ones that just use registers. */
@@ -5705,7 +5705,7 @@ frv_ifcvt_load_value (rtx value, rtx insn ATTRIBUTE_UNUSED)
return reg;
}
-\f
+
/* Update a MEM used in conditional code that might contain an offset to put
the offset into a scratch register, so that the conditional load/store
operations can be used. This function returns the original pointer if the
@@ -5753,7 +5753,7 @@ frv_ifcvt_rewrite_mem (rtx mem, machine_mode mode, rtx insn)
return mem;
}
-\f
+
/* Given a PATTERN, return a SET expression if this PATTERN has only a single
SET, possibly conditionally executed. It may also have CLOBBERs, USEs. */
@@ -5798,7 +5798,7 @@ single_set_pattern (rtx pattern)
return 0;
}
-\f
+
/* A C expression to modify the code described by the conditional if
information CE_INFO with the new PATTERN in INSN. If PATTERN is a null
pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that
@@ -6063,7 +6063,7 @@ frv_ifcvt_modify_insn (ce_if_block *ce_info,
return NULL_RTX;
}
-\f
+
/* A C expression to perform any final machine dependent modifications in
converting code to conditional execution in the code described by the
conditional if information CE_INFO. */
@@ -6118,7 +6118,7 @@ frv_ifcvt_modify_final (ce_if_block *ce_info ATTRIBUTE_UNUSED)
frv_ifcvt.cur_scratch_regs = 0;
}
-\f
+
/* A C expression to cancel any machine dependent modifications in converting
code to conditional execution in the code described by the conditional if
information CE_INFO. */
@@ -6148,7 +6148,7 @@ frv_ifcvt_modify_cancel (ce_if_block *ce_info ATTRIBUTE_UNUSED)
frv_ifcvt.cur_scratch_regs = 0;
return;
}
-\f
+
/* A C expression for the size in bytes of the trampoline, as an integer.
The template is:
@@ -6168,7 +6168,7 @@ frv_trampoline_size (void)
return 5 /* instructions */ * 4 /* instruction size. */;
}
-\f
+
/* A C statement to initialize the variable parts of a trampoline. ADDR is an
RTX for the address of the trampoline; FNADDR is an RTX for the address of
the nested function; STATIC_CHAIN is an RTX for the static chain value that
@@ -6197,7 +6197,7 @@ frv_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
sc_reg, Pmode);
}
-\f
+
/* Many machines have some registers that cannot be copied directly to or from
memory or even from other types of registers. An example is the `MQ'
register, which on most machines, can only be copied to or from general
@@ -6310,7 +6310,7 @@ frv_secondary_reload_class (enum reg_class rclass,
/* This hook exists to catch the case where secondary_reload_class() is
called from init_reg_autoinc() in regclass.c - before the reload optabs
have been initialised. */
-
+
static reg_class_t
frv_secondary_reload (bool in_p, rtx x, reg_class_t reload_class_i,
machine_mode reload_mode,
@@ -6345,7 +6345,7 @@ frv_secondary_reload (bool in_p, rtx x, reg_class_t reload_class_i,
return default_secondary_reload (in_p, x, reload_class, reload_mode, sri);
}
-\f
+
/* Worker function for TARGET_CLASS_LIKELY_SPILLED_P. */
static bool
@@ -6378,7 +6378,7 @@ frv_class_likely_spilled_p (reg_class_t rclass)
return false;
}
-\f
+
/* An expression for the alignment of a structure field FIELD if the
alignment computed in the usual way is COMPUTED. GCC uses this
value instead of the value in `BIGGEST_ALIGNMENT' or
@@ -6465,7 +6465,7 @@ frv_adjust_field_align (tree field, int computed)
return computed;
}
-\f
+
/* Implement TARGET_HARD_REGNO_MODE_OK. */
static bool
@@ -6543,7 +6543,7 @@ frv_modes_tieable_p (machine_mode mode1, machine_mode mode2)
return mode1 == mode2;
}
-\f
+
/* Implement TARGET_HARD_REGNO_NREGS.
On the FRV, make the CC_FP mode take 3 words in the integer registers, so
@@ -6560,7 +6560,7 @@ frv_hard_regno_nregs (unsigned int regno, machine_mode mode)
return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
}
-\f
+
/* Implement CLASS_MAX_NREGS. */
int
@@ -6573,7 +6573,7 @@ frv_class_max_nregs (enum reg_class rclass, machine_mode mode)
return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
}
-\f
+
/* A C expression that is nonzero if X is a legitimate constant for an
immediate operand on the target machine. You can assume that X satisfies
`CONSTANT_P', so you need not check this. In fact, `1' is a suitable
@@ -6651,7 +6651,7 @@ frv_select_cc_mode (enum rtx_code code, rtx x, rtx y)
return CCmode;
}
}
-\f
+
/* Worker function for TARGET_REGISTER_MOVE_COST. */
@@ -6681,7 +6681,7 @@ frv_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
default:
break;
- case QUAD_REGS:
+ case QUAD_REGS:
case GPR_REGS:
case GR8_REGS:
case GR9_REGS:
@@ -6771,7 +6771,7 @@ frv_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
return 4;
}
-\f
+
/* Implementation of TARGET_ASM_INTEGER. In the FRV case we need to
use ".picptr" to generate safe relocations for PIC code. We also
need a fixup entry for aligned (non-debugging) code. */
@@ -6831,7 +6831,7 @@ frv_init_machine_status (void)
{
return ggc_cleared_alloc<machine_function> ();
}
-\f
+
/* Implement TARGET_SCHED_ISSUE_RATE. */
int
@@ -6861,7 +6861,7 @@ frv_issue_rate (void)
return 8;
}
}
-\f
+
/* Return the value of INSN's acc_group attribute. */
int
@@ -6927,7 +6927,7 @@ frv_issues_to_branch_unit_p (rtx_insn *insn)
{
return frv_unit_groups[frv_insn_unit (insn)] == GROUP_B;
}
-\f
+
/* The instructions in the packet, partitioned into groups. */
struct frv_packet_group {
/* How many instructions in the packet belong to this group. */
@@ -7337,7 +7337,7 @@ frv_for_each_packet (void (*handle_packet) (void))
dfa_finish ();
return true;
}
-\f
+
/* Subroutine of frv_sort_insn_group. We are trying to sort
frv_packet.groups[GROUP].sorted[0...NUM_INSNS-1] into assembly
language order. We have already picked a new position for
@@ -7473,7 +7473,7 @@ frv_sort_insn_group (enum frv_insn_group group)
}
gcc_unreachable ();
}
-\f
+
/* Sort the current packet into assembly-language order. Set packing
flags as appropriate. */
@@ -7539,7 +7539,7 @@ frv_pack_insns (void)
else
frv_insn_packing_flag = -1;
}
-\f
+
/* See whether we need to add nops to group GROUP in order to
make a valid packet. */
@@ -7877,7 +7877,7 @@ frv_optimize_membar (void)
free (first_io);
free (last_membar);
}
-\f
+
/* Used by frv_reorg to keep track of the current packet's address. */
static unsigned int frv_packet_address;
@@ -8007,7 +8007,7 @@ frv_reorg (void)
frv_packet_address = 0;
frv_for_each_packet (frv_reorg_packet);
}
-\f
+
#define def_builtin(name, type, code) \
add_builtin_function ((name), (type), (code), BUILT_IN_MD, NULL, NULL)
@@ -9315,7 +9315,7 @@ frv_in_small_data_p (const_tree decl)
return false;
}
-\f
+
static bool
frv_rtx_costs (rtx x,
machine_mode mode,
@@ -9393,7 +9393,7 @@ frv_rtx_costs (rtx x,
return false;
}
}
-\f
+
static void
frv_asm_out_constructor (rtx symbol, int priority ATTRIBUTE_UNUSED)
{
diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
index ac5e00ce777..7ef2a6917f5 100644
--- a/gcc/config/frv/frv.h
+++ b/gcc/config/frv/frv.h
@@ -24,7 +24,7 @@
/* Frv general purpose macros. */
/* Align an address. */
#define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1))
-\f
+
/* Driver configuration. */
/* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with
@@ -188,7 +188,7 @@
} \
while (0)
-\f
+
#define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA)
#define NUM_GPRS (TARGET_GPR_32? 32 : 64)
@@ -237,7 +237,7 @@
#endif
#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0)
-\f
+
/* Small Data Area Support. */
/* Maximum size of variables that go in .sdata/.sbss.
The -msdata=foo switch also controls how small variables are handled. */
@@ -358,7 +358,7 @@
#define PCC_BITFIELD_TYPE_MATTERS 1
-\f
+
/* Layout of Source Language Data Types. */
#define CHAR_TYPE_SIZE 8
@@ -387,7 +387,7 @@
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-\f
+
/* General purpose registers. */
#define GPR_FIRST 0 /* First gpr */
#define GPR_LAST (GPR_FIRST + 63) /* Last gpr */
@@ -504,7 +504,7 @@
#define MAX_STACK_IMMEDIATE_OFFSET 2047
-\f
+
/* Register Basics. */
/* Number of hardware registers known to the compiler. They receive numbers 0
@@ -656,7 +656,7 @@
1, 1 /* 171-172, iacc0 */ \
}
-\f
+
/* Order of allocation of registers. */
/* If defined, an initializer for a vector of integers, containing the numbers
@@ -732,13 +732,13 @@
IACC_FIRST + 0, IACC_FIRST + 1 \
}
-\f
+
/* Define this macro if the compiler should avoid copies to/from CCmode
registers. You should only define this macro if support fo copying to/from
CCmode is incomplete. */
#define AVOID_CCMODE_COPIES
-\f
+
/* Register Classes. */
/* An enumeral type that must be defined with all the register class names as
@@ -904,7 +904,7 @@ extern enum reg_class regno_reg_class[];
#define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x)))
-\f
+
/* Basic Stack Layout. */
/* Structure to describe information about a saved range of registers */
@@ -1012,7 +1012,7 @@ typedef struct frv_stack {
debugging information like that provided by DWARF 2. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
-\f
+
/* Register That Address the Stack Frame. */
/* The register number of the stack pointer register, which must also be a
@@ -1051,7 +1051,7 @@ typedef struct frv_stack {
#define STATIC_CHAIN_REGNUM (GPR_FIRST + 7)
#define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7)
-\f
+
/* Eliminating the Frame Pointer and the Arg Pointer. */
/* If defined, this macro specifies a table of register pairs used to eliminate
@@ -1090,7 +1090,7 @@ typedef struct frv_stack {
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = frv_initial_elimination_offset (FROM, TO)
-\f
+
/* Passing Function Arguments on the Stack. */
/* If defined, the maximum amount of space required for outgoing arguments will
@@ -1103,7 +1103,7 @@ typedef struct frv_stack {
proper. */
#define ACCUMULATE_OUTGOING_ARGS 1
-\f
+
/* The number of register assigned to holding function arguments. */
#define FRV_NUM_ARG_REGS 6
@@ -1158,7 +1158,7 @@ typedef struct frv_stack {
#define FUNCTION_ARG_REGNO_P(REGNO) \
((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
-\f
+
/* How Scalar Function Values are Returned. */
/* The number of the hard register that is used to return a scalar value from a
@@ -1167,14 +1167,14 @@ typedef struct frv_stack {
#define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO)
-\f
+
/* How Large Values are Returned. */
/* The number of the register that is used to pass the structure
value address. */
#define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
-\f
+
/* Function Entry and Exit. */
/* Define this macro as a C expression that is nonzero if the return
@@ -1187,7 +1187,7 @@ typedef struct frv_stack {
adjustment in a function that has no frame pointer, and the compiler knows
this regardless of `EXIT_IGNORE_STACK'. */
#define EXIT_IGNORE_STACK 1
-\f
+
/* Generating Code for Profiling. */
/* A C statement or compound statement to output to FILE some assembler code to
@@ -1343,7 +1343,7 @@ __asm__("\n" \
);
#endif
-\f
+
/* Addressing Modes. */
/* A number, the maximum number of registers that can appear in a valid memory
@@ -1381,7 +1381,7 @@ __asm__("\n" \
The index has to be in a register. */
#define HAVE_PRE_MODIFY_REG 1
-\f
+
/* We define extra CC modes in frv-modes.def so we need a selector. */
#define SELECT_CC_MODE frv_select_cc_mode
@@ -1403,7 +1403,7 @@ __asm__("\n" \
#define REVERSIBLE_CC_MODE(MODE) \
((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode)
-\f
+
/* Describing Relative Costs of Operations. */
/* A C expression for the cost of a branch instruction. A value of 1 is the
@@ -1427,7 +1427,7 @@ __asm__("\n" \
address than to call an address kept in a register. */
#define NO_FUNCTION_CSE 1
-\f
+
/* Dividing the output into sections. */
/* A C expression whose value is a string containing the assembler operation
@@ -1460,7 +1460,7 @@ __asm__("\n" \
program so they can be changed program startup time if the program is loaded
at a different address than linked for. */
#define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\""
-\f
+
/* Position Independent Code. */
/* A C expression that is nonzero if X is a legitimate immediate operand on the
@@ -1475,7 +1475,7 @@ __asm__("\n" \
|| (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \
|| got12_operand (X, VOIDmode)) \
-\f
+
/* The Overall Framework of an Assembler File. */
/* A C string constant describing how to begin a comment in the target
@@ -1495,7 +1495,7 @@ __asm__("\n" \
for ordinary compiler output. */
#define ASM_APP_OFF "#NO_APP\n"
-\f
+
/* Output of Data. */
/* This is how to output a label to dwarf/dwarf2. */
@@ -1507,7 +1507,7 @@ do { \
/* Whether to emit the gas specific dwarf2 line number support. */
#define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC)
-\f
+
/* Output of Uninitialized Variables. */
/* A C statement (sans semicolon) to output to the stdio stream STREAM the
@@ -1546,7 +1546,7 @@ do { \
ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \
} while (0)
-\f
+
/* Output and Generation of Labels. */
/* A C statement (sans semicolon) to output to the stdio stream STREAM the
@@ -1569,7 +1569,7 @@ do { \
sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \
} while (0)
-\f
+
/* Macros Controlling Initialization Routines. */
#undef INIT_SECTION_ASM_OP
@@ -1579,7 +1579,7 @@ do { \
init section is not actually run automatically, but is still useful for
collecting the lists of constructors and destructors. */
#define INVOKE__main
-\f
+
/* Output of Assembler Instructions. */
/* A C initializer containing the assembler's names for the machine registers,
@@ -1671,7 +1671,7 @@ do { \
#define LOCAL_LABEL_PREFIX "."
#define IMMEDIATE_PREFIX "#"
-\f
+
/* Output of dispatch tables. */
/* This macro should be provided on machines where the addresses in a dispatch
@@ -1700,7 +1700,7 @@ fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)
fprintf (STREAM, "\t.word .L%d\n", VALUE)
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
-\f
+
/* Assembler Commands for Exception Regions. */
/* Define this macro to 0 if your target supports DWARF 2 frame unwind
@@ -1718,7 +1718,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
#define DWARF2_UNWIND_INFO 1
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
-\f
+
/* Assembler Commands for Alignment. */
#undef ASM_OUTPUT_SKIP
@@ -1734,7 +1734,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
/* Inside the text section, align with unpacked nops rather than zeros. */
#define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \
fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER))
-\f
+
/* Macros Affecting all Debug Formats. */
/* A C expression that returns the debugger register number for the compiler
@@ -1758,7 +1758,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
-\f
+
/* Miscellaneous Parameters. */
/* An alias for a machine mode name. This is the machine mode that elements of
diff --git a/gcc/config/gcn/gcn-run.cc b/gcc/config/gcn/gcn-run.cc
index f0d816a4f7a..ece2346dfd4 100644
--- a/gcc/config/gcn/gcn-run.cc
+++ b/gcc/config/gcn/gcn-run.cc
@@ -425,7 +425,7 @@ load_image (const char *filename)
/* Locate the "_init_array" function, and read the kernel's properties. */
hsa_executable_symbol_t symbol;
- XHSA (hsa_fns.hsa_executable_get_symbol_fn (executable, NULL,
+ XHSA (hsa_fns.hsa_executable_get_symbol_fn (executable, NULL,
"_init_array.kd", device, 0,
&symbol),
"Find '_init_array' function");
diff --git a/gcc/config/gcn/gcn-tree.cc b/gcc/config/gcn/gcn-tree.cc
index 25d6eae40c1..562d356114e 100644
--- a/gcc/config/gcn/gcn-tree.cc
+++ b/gcc/config/gcn/gcn-tree.cc
@@ -1,17 +1,17 @@
/* Copyright (C) 2017-2022 Free Software Foundation, Inc.
This file is part of GCC.
-
+
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
-
+
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
-
+
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
@@ -184,7 +184,7 @@ gcn_lockless_update (location_t loc, gimple_stmt_iterator *gsi,
}
/* Helper function for gcn_reduction_update.
-
+
Insert code to lockfully update *PTR with *PTR OP VAR just before
GSI. This is necessary for types larger than 64 bits, where there
is no cmp&swap instruction to implement a lockless scheme. We use
@@ -488,7 +488,7 @@ gcn_goacc_reduction_teardown (gcall *call)
}
/* Implement TARGET_GOACC_REDUCTION.
-
+
Expand calls to the GOACC REDUCTION internal function, into a sequence of
gimple instructions. */
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 39e93aeaeef..d6305ec74f0 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -72,7 +72,7 @@ enum gcn_isa gcn_isa = ISA_GCN3; /* Default to GCN3. */
/* Reserve this much space for LDS (for propagating variables from
worker-single mode to worker-partitioned mode), per workgroup. Global
analysis could calculate an exact bound, but we don't do that yet.
-
+
We want to permit full occupancy, so size accordingly. */
/* Use this as a default, but allow it to grow if the user requests a large
@@ -115,7 +115,7 @@ gcn_init_machine_status (void)
}
/* Implement TARGET_OPTION_OVERRIDE.
-
+
Override option settings where defaults are variable, or we have specific
needs to consider. */
@@ -240,7 +240,7 @@ static const long default_requested_args
/* Extract parameter settings from __attribute__((amdgpu_hsa_kernel ())).
This function also sets the default values for some arguments.
-
+
Return true on success, with ARGS populated. */
static bool
@@ -337,7 +337,7 @@ gcn_parse_amdgpu_hsa_kernel_attribute (struct gcn_kernel_args *args,
}
/* Referenced by TARGET_ATTRIBUTE_TABLE.
-
+
Validates target specific attributes. */
static tree
@@ -367,7 +367,7 @@ gcn_handle_amdgpu_hsa_kernel_attribute (tree *node, tree name,
}
/* Implement TARGET_ATTRIBUTE_TABLE.
-
+
Create target-specific __attribute__ types. */
static const struct attribute_spec gcn_attribute_table[] = {
@@ -487,7 +487,7 @@ VnMODE (int n, machine_mode mode)
}
/* Implement TARGET_CLASS_MAX_NREGS.
-
+
Return the number of hard registers needed to hold a value of MODE in
a register of class RCLASS. */
@@ -512,7 +512,7 @@ gcn_class_max_nregs (reg_class_t rclass, machine_mode mode)
}
/* Implement TARGET_HARD_REGNO_NREGS.
-
+
Return the number of hard registers needed to hold a value of MODE in
REGNO. */
@@ -523,7 +523,7 @@ gcn_hard_regno_nregs (unsigned int regno, machine_mode mode)
}
/* Implement TARGET_HARD_REGNO_MODE_OK.
-
+
Return true if REGNO can hold value in MODE. */
bool
@@ -604,7 +604,7 @@ gcn_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
}
/* Implement REGNO_REG_CLASS via gcn.h.
-
+
Return smallest class containing REGNO. */
enum reg_class
@@ -637,7 +637,7 @@ gcn_regno_reg_class (int regno)
}
/* Implement TARGET_CAN_CHANGE_MODE_CLASS.
-
+
GCC assumes that lowpart contains first part of value as stored in memory.
This is not the case for vector registers. */
@@ -669,7 +669,7 @@ gcn_can_change_mode_class (machine_mode from, machine_mode to,
}
/* Implement TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P.
-
+
When this hook returns true for MODE, the compiler allows
registers explicitly used in the rtl to be used as spill registers
but prevents the compiler from extending the lifetime of these
@@ -683,7 +683,7 @@ gcn_small_register_classes_for_mode_p (machine_mode mode)
}
/* Implement TARGET_CLASS_LIKELY_SPILLED_P.
-
+
Returns true if pseudos that have been assigned to registers of class RCLASS
would likely be spilled because registers of RCLASS are needed for spill
registers. */
@@ -696,7 +696,7 @@ gcn_class_likely_spilled_p (reg_class_t rclass)
}
/* Implement TARGET_MODES_TIEABLE_P.
-
+
Returns true if a value of MODE1 is accessible in MODE2 without
copying. */
@@ -718,7 +718,7 @@ gcn_modes_tieable_p (machine_mode mode1, machine_mode mode2)
}
/* Implement TARGET_TRULY_NOOP_TRUNCATION.
-
+
Returns true if it is safe to “convert” a value of INPREC bits to one of
OUTPREC bits (where OUTPREC is smaller than INPREC) by merely operating on
it as if it had only OUTPREC bits. */
@@ -805,7 +805,7 @@ gcn_can_split_p (machine_mode, rtx op)
}
/* Implement TARGET_SPILL_CLASS.
-
+
Return class of registers which could be used for pseudo of MODE
and of class RCLASS for spilling instead of memory. Return NO_REGS
if it is not possible or non-profitable. */
@@ -821,7 +821,7 @@ gcn_spill_class (reg_class_t c, machine_mode /*mode */ )
}
/* Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS.
-
+
Change allocno class for given pseudo from allocno and best class
calculated by IRA. */
@@ -1116,7 +1116,7 @@ gcn_constant64_p (rtx x)
}
/* Implement TARGET_LEGITIMATE_CONSTANT_P.
-
+
Returns true if X is a legitimate constant for a MODE immediate operand. */
bool
@@ -1209,7 +1209,7 @@ gcn_gen_undef (machine_mode mode)
GEN_VNM - create accessor functions for all sizes of all modes
GEN_VN_NOEXEC - for insns without "_exec" variants
GEN_VNM_NOEXEC - likewise
-
+
E.g. add<mode>3
GEN_VNM (add, 3, A(rtx dest, rtx s1, rtx s2), A(dest, s1, s2)
@@ -1618,7 +1618,7 @@ gcn_global_address_p (rtx addr)
}
/* Implement TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P.
-
+
Recognizes RTL expressions that are valid memory addresses for an
instruction. The MODE argument is the machine mode for the MEM
expression that wants to use this address.
@@ -1805,7 +1805,7 @@ gcn_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict,
}
/* Implement TARGET_ADDR_SPACE_POINTER_MODE.
-
+
Return the appropriate mode for a named address pointer. */
static scalar_int_mode
@@ -1828,7 +1828,7 @@ gcn_addr_space_pointer_mode (addr_space_t addrspace)
}
/* Implement TARGET_ADDR_SPACE_ADDRESS_MODE.
-
+
Return the appropriate mode for a named address space address. */
static scalar_int_mode
@@ -1838,7 +1838,7 @@ gcn_addr_space_address_mode (addr_space_t addrspace)
}
/* Implement TARGET_ADDR_SPACE_SUBSET_P.
-
+
Determine if one named address space is a subset of another. */
static bool
@@ -1912,7 +1912,7 @@ gcn_addr_space_debug (addr_space_t as)
/* Implement REGNO_MODE_CODE_OK_FOR_BASE_P via gcn.h
-
+
Retun true if REGNO is OK for memory adressing. */
bool
@@ -1945,7 +1945,7 @@ gcn_regno_mode_code_ok_for_base_p (int regno,
}
/* Implement MODE_CODE_BASE_REG_CLASS via gcn.h.
-
+
Return a suitable register class for memory addressing. */
reg_class
@@ -1976,7 +1976,7 @@ gcn_mode_code_base_reg_class (machine_mode mode, addr_space_t as, int oc,
}
/* Implement REGNO_OK_FOR_INDEX_P via gcn.h.
-
+
Return true if REGNO is OK for index of memory addressing. */
bool
@@ -2604,7 +2604,7 @@ gcn_valid_move_p (machine_mode mode, rtx dest, rtx src)
/* {{{ Functions and ABI. */
/* Implement TARGET_FUNCTION_VALUE.
-
+
Define how to find the value returned by a function.
The register location is always the same, but the mode depends on
VALTYPE. */
@@ -2623,7 +2623,7 @@ gcn_function_value (const_tree valtype, const_tree, bool)
}
/* Implement TARGET_FUNCTION_VALUE_REGNO_P.
-
+
Return true if N is a possible register number for the function return
value. */
@@ -2669,7 +2669,7 @@ gcn_strict_argument_naming (cumulative_args_t cum_v)
}
/* Implement TARGET_PRETEND_OUTGOING_VARARGS_NAMED.
-
+
See comment on gcn_strict_argument_naming. */
static bool
@@ -2679,7 +2679,7 @@ gcn_pretend_outgoing_varargs_named (cumulative_args_t cum_v)
}
/* Implement TARGET_FUNCTION_ARG.
-
+
Return an RTX indicating whether a function argument is passed in a register
and if so, which register. */
@@ -2741,7 +2741,7 @@ gcn_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
}
/* Implement TARGET_FUNCTION_ARG_ADVANCE.
-
+
Updates the summarizer variable pointed to by CUM_V to advance past an
argument in the argument list. */
@@ -2779,7 +2779,7 @@ gcn_function_arg_advance (cumulative_args_t cum_v,
}
/* Implement TARGET_ARG_PARTIAL_BYTES.
-
+
Returns the number of bytes at the beginning of an argument that must be put
in registers. The value must be zero for arguments that are passed entirely
in registers or that are entirely pushed on the stack. */
@@ -2831,7 +2831,7 @@ gcn_detect_incoming_pointer_arg (tree fndecl)
}
/* Implement INIT_CUMULATIVE_ARGS, via gcn.h.
-
+
Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a function
whose data type is FNTYPE. For a library call, FNTYPE is 0. */
@@ -2908,7 +2908,7 @@ gcn_return_in_memory (const_tree type, const_tree ARG_UNUSED (fntype))
}
/* Implement TARGET_PROMOTE_FUNCTION_MODE.
-
+
Return the mode to use for outgoing function arguments. */
machine_mode
@@ -2924,7 +2924,7 @@ gcn_promote_function_mode (const_tree ARG_UNUSED (type), machine_mode mode,
}
/* Implement TARGET_GIMPLIFY_VA_ARG_EXPR.
-
+
Derived from hppa_gimplify_va_arg_expr. The generic routine doesn't handle
ARGS_GROW_DOWNWARDS. */
@@ -3038,7 +3038,7 @@ gcn_compute_frame_offsets (void)
/* Insert code into the prologue or epilogue to store or load any
callee-save register to/from the stack.
-
+
Helper function for gcn_expand_prologue and gcn_expand_epilogue. */
static void
@@ -3571,10 +3571,10 @@ gcn_frame_pointer_rqd (void)
}
/* Implement TARGET_CAN_ELIMINATE.
-
+
Return true if the compiler is allowed to try to replace register number
FROM_REG with register number TO_REG.
-
+
FIXME: is the default "true" not enough? Should this be a negative set? */
bool
@@ -3585,7 +3585,7 @@ gcn_can_eliminate_p (int /*from_reg */ , int to_reg)
}
/* Implement INITIAL_ELIMINATION_OFFSET.
-
+
Returns the initial difference between the specified pair of registers, in
terms of stack position. */
@@ -3652,7 +3652,7 @@ gcn_hard_regno_rename_ok (unsigned int from_reg, unsigned int to_reg)
}
/* Implement HARD_REGNO_CALLER_SAVE_MODE.
-
+
Which mode is required for saving NREGS of a pseudo-register in
call-clobbered hard register REGNO. */
@@ -3723,7 +3723,7 @@ gcn_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
/* {{{ Miscellaneous. */
/* Implement TARGET_CANNOT_COPY_INSN_P.
-
+
Return true if INSN must not be duplicated. */
static bool
@@ -3815,7 +3815,7 @@ gcn_emutls_var_init (tree, tree decl, tree)
/* {{{ Costs. */
/* Implement TARGET_RTX_COSTS.
-
+
Compute a (partial) cost for rtx X. Return true if the complete
cost has been computed, and false if subexpressions should be
scanned. In either case, *TOTAL contains the cost result. */
@@ -3852,7 +3852,7 @@ gcn_rtx_costs (rtx x, machine_mode, int, int, int *total, bool)
}
/* Implement TARGET_MEMORY_MOVE_COST.
-
+
Return the cost of moving data of mode M between a
register and memory. A value of 2 is the default; this cost is
relative to those in `REGISTER_MOVE_COST'.
@@ -3909,7 +3909,7 @@ gcn_memory_move_cost (machine_mode mode, reg_class_t regclass, bool in)
}
/* Implement TARGET_REGISTER_MOVE_COST.
-
+
Return the cost of moving data from a register in class CLASS1 to
one in class CLASS2. Base value is 2. */
@@ -4023,7 +4023,7 @@ struct gcn_builtin_description gcn_builtins[] = {
static GTY(()) tree gcn_builtin_decls[GCN_BUILTIN_MAX];
/* Implement TARGET_BUILTIN_DECL.
-
+
Return the GCN builtin for CODE. */
tree
@@ -4075,7 +4075,7 @@ gcn_init_builtin_types (void)
}
/* Implement TARGET_INIT_BUILTINS.
-
+
Set up all builtin functions for this target. */
static void
@@ -4162,7 +4162,7 @@ gcn_init_libfuncs (void)
/* Expand the CMP_SWAP GCN builtins. We have our own versions that do
not require taking the address of any object, other than the memory
cell being operated on.
-
+
Helper function for gcn_expand_builtin_1. */
static rtx
@@ -4626,7 +4626,7 @@ gcn_expand_builtin_binop (tree exp, rtx target, rtx /*subtarget */ ,
}
/* Implement TARGET_EXPAND_BUILTIN.
-
+
Expand an expression EXP that calls a built-in function, with result going
to TARGET if that's convenient (and in mode MODE if that's convenient).
SUBTARGET may be used as the target for computing one of EXP's operands.
@@ -4666,7 +4666,7 @@ gcn_vectorize_get_mask_mode (machine_mode)
/* Return an RTX that references a vector with the i-th lane containing
PERM[i]*4.
-
+
Helper function for gcn_vectorize_vec_perm_const. */
static rtx
@@ -4703,9 +4703,9 @@ gcn_make_vec_perm_address (unsigned int *perm, int nelt)
}
/* Implement TARGET_VECTORIZE_VEC_PERM_CONST.
-
+
Return true if permutation with SEL is possible.
-
+
If DST/SRC0/SRC1 are non-null, emit the instructions to perform the
permutations. */
@@ -4789,7 +4789,7 @@ gcn_vectorize_vec_perm_const (machine_mode vmode, machine_mode op_mode,
}
/* Implements TARGET_VECTOR_MODE_SUPPORTED_P.
-
+
Return nonzero if vector MODE is supported with at least move
instructions. */
@@ -5550,7 +5550,7 @@ gcn_md_reorg (void)
CLEAR_REG_SET (&live);
/* "Manually Inserted Wait States (NOPs)."
-
+
GCN hardware detects most kinds of register dependencies, but there
are some exceptions documented in the ISA manual. This pass
detects the missed cases, and inserts the documented number of NOPs
@@ -5828,7 +5828,7 @@ gcn_fork_join (gcall *call, const int dims[], bool is_fork)
/* Implement ???????
FIXME make this a real hook.
-
+
Adjust FNDECL such that options inherited from the host compiler
are made appropriate for the accelerator compiler. */
@@ -5891,7 +5891,7 @@ gcn_shared_mem_layout (unsigned HOST_WIDE_INT *lo,
/* {{{ ASM Output. */
/* Implement TARGET_ASM_FILE_START.
-
+
Print assembler file header text. */
static void
@@ -5935,9 +5935,9 @@ output_file_start (void)
}
/* Implement ASM_DECLARE_FUNCTION_NAME via gcn-hsa.h.
-
+
Print the initial definition of a function name.
-
+
For GCN kernel entry points this includes all the HSA meta-data, special
alignment constraints that don't apply to regular functions, and magic
comments that pass information to mkoffload. */
@@ -6128,7 +6128,7 @@ gcn_asm_select_section (tree exp, int reloc, unsigned HOST_WIDE_INT align)
}
/* Implement TARGET_ASM_FUNCTION_PROLOGUE.
-
+
Emits custom text into the assembler file at the head of each function. */
static void
@@ -6286,7 +6286,7 @@ gcn_asm_output_symbol_ref (FILE *file, rtx x)
}
/* Implement TARGET_CONSTANT_ALIGNMENT.
-
+
Returns the alignment in bits of a constant that is being placed in memory.
CONSTANT is the constant and BASIC_ALIGN is the alignment that the object
would ordinarily have. */
@@ -7082,7 +7082,7 @@ print_operand (FILE *file, rtx x, int code)
}
/* Implement DEBUGGER_REGNO macro.
-
+
Return the DWARF register number that corresponds to the GCC internal
REGNO. */
@@ -7119,7 +7119,7 @@ gcn_dwarf_register_number (unsigned int regno)
}
/* Implement TARGET_DWARF_REGISTER_SPAN.
-
+
DImode and Vector DImode require additional registers. */
static rtx
diff --git a/gcc/config/gcn/gcn.h b/gcc/config/gcn/gcn.h
index 1cc5981d904..ee560fc6380 100644
--- a/gcc/config/gcn/gcn.h
+++ b/gcc/config/gcn/gcn.h
@@ -56,7 +56,7 @@
#define TARGET_DEFAULT 0
#endif
-\f
+
/* Storage Layout */
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
@@ -109,7 +109,7 @@
#define ACCUMULATE_OUTGOING_ARGS 1
#define RETURN_ADDR_RTX(COUNT,FRAMEADDR) \
((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, LINK_REGNUM) : NULL_RTX)
-\f
+
/* Register Basics */
#define FIRST_SGPR_REG 0
#define SGPR_REGNO(N) ((N)+FIRST_SGPR_REG)
@@ -180,7 +180,7 @@
(((N) >= FIRST_PARM_REG && (N) < (FIRST_PARM_REG + NUM_PARM_REGS)) \
|| ((N) >= FIRST_VPARM_REG && (N) < (FIRST_VPARM_REG + NUM_PARM_REGS)))
-\f
+
#define FIXED_REGISTERS { \
/* Scalars. */ \
1, 1, 0, 0, 1, 1, 1, 1, 1, 1, \
@@ -261,7 +261,7 @@
1, 1, 1, 1, 1 \
}
-\f
+
#define HARD_REGNO_RENAME_OK(FROM, TO) \
gcn_hard_regno_rename_ok (FROM, TO)
@@ -444,7 +444,7 @@ enum reg_class
#define INDEX_REG_CLASS VGPR_REGS
#define REGNO_OK_FOR_INDEX_P(regno) regno_ok_for_index_p (regno)
-\f
+
/* Address spaces. */
enum gcn_address_spaces
{
@@ -485,7 +485,7 @@ enum gcn_address_spaces
#define AS_ANY_FLAT_P(AS) (AS_FLAT_SCRATCH_P (AS) || AS_FLAT_P (AS))
#define AS_ANY_DS_P(AS) (AS_LDS_P (AS) || AS_GDS_P (AS))
-\f
+
/* Instruction Output */
#define REGISTER_NAMES \
{"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", \
@@ -543,7 +543,7 @@ enum gcn_address_spaces
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) (CODE == '^')
-\f
+
/* Register Arguments */
#ifndef USED_FOR_TARGET
@@ -574,7 +574,7 @@ typedef struct gcn_args
gcn_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL), \
(N_NAMED_ARGS) != -1)
-\f
+
#ifndef USED_FOR_TARGET
#include "hash-table.h"
@@ -602,7 +602,7 @@ struct GTY(()) machine_function
};
#endif
-\f
+
/* Codes for all the GCN builtins. */
enum gcn_builtin_codes
@@ -618,7 +618,7 @@ enum gcn_builtin_codes
GCN_BUILTIN_MAX
};
-\f
+
/* Misc */
/* We can load/store 128-bit quantities, but having this larger than
@@ -674,14 +674,14 @@ enum gcn_builtin_codes
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1, 2)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1, 2)
-\f
+
/* Costs. */
/* Branches are to be dicouraged when theres an alternative.
FIXME: This number is plucked from the air. */
#define BRANCH_COST(SPEED_P, PREDICABLE_P) 10
-\f
+
/* Profiling */
#define FUNCTION_PROFILER(FILE, LABELNO)
#define NO_PROFILE_COUNTERS 1
diff --git a/gcc/config/h8300/h8300.cc b/gcc/config/h8300/h8300.cc
index cd7975e2fff..ca942651ae8 100644
--- a/gcc/config/h8300/h8300.cc
+++ b/gcc/config/h8300/h8300.cc
@@ -150,7 +150,7 @@ const char *h8_push_op, *h8_pop_op, *h8_mov_op;
/* Value of MOVE_RATIO. */
int h8300_move_ratio;
-\f
+
/* See below where shifts are handled for explanation of this enum. */
enum shift_alg
@@ -317,7 +317,7 @@ h8300_option_override (void)
"%<-msx%> - option ignored");
}
-#ifdef H8300_LINUX
+#ifdef H8300_LINUX
if ((TARGET_NORMAL_MODE))
{
error ("%<-mn%> is not supported for linux targets");
@@ -811,7 +811,7 @@ h8300_expand_prologue (void)
if (h8300_monitor_function_p (current_function_decl))
/* The monitor function act as normal functions, which means it
- can accept parameters and return values. In addition to this,
+ can accept parameters and return values. In addition to this,
interrupts are masked in prologue and return with "rte" in epilogue. */
emit_insn (gen_monitor_prologue ());
@@ -978,7 +978,7 @@ h8300_file_end (void)
{
fputs ("\t.end\n", asm_out_file);
}
-\f
+
/* Split an add of a small constant into two adds/subs insns.
If USE_INCDEC_P is nonzero, we generate the last insn using inc/dec
@@ -1129,7 +1129,7 @@ h8300_function_arg_advance (cumulative_args_t cum_v,
& -UNITS_PER_WORD);
}
-\f
+
/* Implements TARGET_REGISTER_MOVE_COST.
Any SI register-to-register move may need to be reloaded,
@@ -1355,7 +1355,7 @@ h8300_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
return false;
}
}
-\f
+
/* Documentation for the machine specific operand escapes:
'E' like s but negative.
@@ -1484,7 +1484,7 @@ h8300_print_operand (FILE *file, rtx x, int code)
if ((exact_log2 ((bitint >> 8) & 0xff)) == -1)
bitint = exact_log2 (bitint & 0xff);
else
- bitint = exact_log2 ((bitint >> 8) & 0xff);
+ bitint = exact_log2 ((bitint >> 8) & 0xff);
gcc_assert (bitint >= 0);
fprintf (file, "#%d", bitint);
break;
@@ -1493,7 +1493,7 @@ h8300_print_operand (FILE *file, rtx x, int code)
if ((exact_log2 ((bitint >> 8) & 0xff)) == -1 )
bitint = exact_log2 (bitint & 0xff);
else
- bitint = (exact_log2 ((bitint >> 8) & 0xff));
+ bitint = (exact_log2 ((bitint >> 8) & 0xff));
gcc_assert (bitint >= 0);
fprintf (file, "#%d", bitint);
break;
@@ -1853,7 +1853,7 @@ h8300_print_operand_address (FILE *file, machine_mode mode, rtx addr)
break;
}
}
-\f
+
/* Output all insn addresses and their sizes into the assembly language
output file. This is helpful for debugging whether the length attributes
in the md file are correct. This is not meant to be a user selectable
@@ -2022,7 +2022,7 @@ h8300_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1)
return CCmode;
}
-\f
+
/* Given that X occurs in an address of the form (plus X constant),
return the part of X that is expected to be a register. There are
four kinds of addressing mode to recognize:
@@ -2100,7 +2100,7 @@ h8300_get_index (rtx x, machine_mode mode, int *size)
*size = 0;
return x;
}
-\f
+
/* Worker function for TARGET_MODE_DEPENDENT_ADDRESS_P.
On the H8/300, the predecrement and postincrement address depend thus
@@ -2116,7 +2116,7 @@ h8300_mode_dependent_address_p (const_rtx addr,
return false;
}
-\f
+
static const h8300_length_table addb_length_table =
{
/* #xx Rs @aa @Rs @xx */
@@ -2358,7 +2358,7 @@ h8300_bitfield_length (rtx op, rtx op2)
if (GET_CODE (op) == REG)
op = op2;
gcc_assert (GET_CODE (op) != REG);
-
+
size = GET_MODE_SIZE (GET_MODE (op));
operand_length = h8300_classify_operand (op, size, &opclass);
@@ -2521,7 +2521,7 @@ h8300_insn_length_from_table (rtx_insn *insn, rtx * operands)
case LENGTH_TABLE_BITFIELD:
return h8300_bitfield_length (operands[0], operands[1]);
-
+
case LENGTH_TABLE_BITBRANCH:
return h8300_bitfield_length (operands[1], operands[2]) - 2;
@@ -2575,7 +2575,7 @@ h8300_operands_match_p (rtx *operands)
return false;
}
-\f
+
/* Return the length of mov instruction. */
unsigned int
@@ -2720,7 +2720,7 @@ compute_mov_length (rtx *operands)
return base_length;
}
-\f
+
/* Output an addition insn. */
const char *
@@ -2941,7 +2941,7 @@ compute_plussi_cc (rtx *operands)
return OLD_CC_SET_ZN;
}
-\f
+
/* Output a logical insn. */
const char *
@@ -3257,7 +3257,7 @@ compute_logical_op_length (machine_mode mode, rtx_code code, rtx *operands, rtx_
}
#if 0
-\f
+
/* Expand a conditional store. */
void
@@ -3276,7 +3276,7 @@ h8300_expand_store (rtx operands[])
emit_insn (gen_rtx_SET (dest, tmp));
}
#endif
-\f
+
/* Shifts.
We devote a fair bit of code to getting efficient shifts since we
@@ -4100,7 +4100,7 @@ output_a_shift (rtx operands[4], rtx_code code)
/* This case must be taken care of by one of the two splitters
that convert a variable shift into a loop. */
gcc_assert (GET_CODE (operands[2]) == CONST_INT);
-
+
n = INTVAL (operands[2]);
/* If the count is negative, make it 0. */
@@ -4113,7 +4113,7 @@ output_a_shift (rtx operands[4], rtx_code code)
n = GET_MODE_BITSIZE (mode);
get_shift_alg (shift_type, shift_mode, n, &info);
-
+
switch (info.alg)
{
case SHIFT_SPECIAL:
@@ -4134,7 +4134,7 @@ output_a_shift (rtx operands[4], rtx_code code)
for (; n > 0; n--)
output_asm_insn (info.shift1, operands);
return "";
-
+
case SHIFT_ROT_AND:
{
int m = GET_MODE_BITSIZE (mode) - n;
@@ -4146,18 +4146,18 @@ output_a_shift (rtx operands[4], rtx_code code)
/* Not all possibilities of rotate are supported. They shouldn't
be generated, but let's watch for 'em. */
gcc_assert (info.shift1);
-
+
/* Emit two bit rotates first. */
if (info.shift2 != NULL)
{
for (; m > 1; m -= 2)
output_asm_insn (info.shift2, operands);
}
-
+
/* Now single bit rotates for any residual. */
for (; m > 0; m--)
output_asm_insn (info.shift1, operands);
-
+
/* Now mask off the high bits. */
switch (mode)
{
@@ -4201,7 +4201,7 @@ output_a_shift (rtx operands[4], rtx_code code)
fprintf (asm_out_file, "\tbne .Llt%d\n", loopend_lab);
}
return "";
-
+
default:
gcc_unreachable ();
}
@@ -4376,7 +4376,7 @@ compute_a_shift_cc (rtx operands[3], rtx_code code)
enum shift_mode shift_mode;
struct shift_info info;
int n;
-
+
switch (mode)
{
case E_QImode:
@@ -4410,7 +4410,7 @@ compute_a_shift_cc (rtx operands[3], rtx_code code)
/* This case must be taken care of by one of the two splitters
that convert a variable shift into a loop. */
gcc_assert (GET_CODE (operands[2]) == CONST_INT);
-
+
n = INTVAL (operands[2]);
/* If the count is negative, make it 0. */
@@ -4421,9 +4421,9 @@ compute_a_shift_cc (rtx operands[3], rtx_code code)
do the intuitive thing. */
else if ((unsigned int) n > GET_MODE_BITSIZE (mode))
n = GET_MODE_BITSIZE (mode);
-
+
get_shift_alg (shift_type, shift_mode, n, &info);
-
+
switch (info.alg)
{
case SHIFT_SPECIAL:
@@ -4436,11 +4436,11 @@ compute_a_shift_cc (rtx operands[3], rtx_code code)
case SHIFT_INLINE:
return (info.cc_inline == OLD_CC_SET_ZN
|| info.cc_inline == OLD_CC_SET_ZNV);
-
+
case SHIFT_ROT_AND:
/* This case always ends with an and instruction. */
return true;
-
+
case SHIFT_LOOP:
/* A loop to shift by a "large" constant value.
If we have shift-by-2 insns, use them. */
@@ -4449,15 +4449,15 @@ compute_a_shift_cc (rtx operands[3], rtx_code code)
if (n % 2)
return (info.cc_inline == OLD_CC_SET_ZN
|| info.cc_inline == OLD_CC_SET_ZNV);
-
+
}
return false;
-
+
default:
gcc_unreachable ();
}
}
-\f
+
/* A rotation by a non-constant will cause a loop to be generated, in
which a rotation by one bit is used. A rotation by a constant,
including the one in the loop, will be taken care of by
@@ -4697,7 +4697,7 @@ compute_a_rotate_length (rtx *operands)
return length;
}
-\f
+
/* Fix the operands of a gen_xxx so that it could become a bit
operating insn. */
@@ -5395,7 +5395,7 @@ h8300_move_ok (rtx dest, rtx src)
else
return !reg_overlap_mentioned_p(other, addr);
}
-\f
+
/* Perform target dependent optabs initialization. */
static void
h8300_init_libfuncs (void)
@@ -5406,7 +5406,7 @@ h8300_init_libfuncs (void)
set_optab_libfunc (smod_optab, HImode, "__modhi3");
set_optab_libfunc (umod_optab, HImode, "__umodhi3");
}
-\f
+
/* Worker function for TARGET_FUNCTION_VALUE.
On the H8 the return value is in R0/R1. */
@@ -5447,7 +5447,7 @@ h8300_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
return (TYPE_MODE (type) == BLKmode
|| GET_MODE_SIZE (TYPE_MODE (type)) > 8);
}
-\f
+
/* We emit the entire trampoline here. Depending on the pointer size,
we use a different trampoline.
@@ -5557,7 +5557,7 @@ pre_incdec_with_reg (rtx op, unsigned int reg)
return REGNO (op) == reg;
}
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE h8300_attribute_table
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 45cc4fc7796..6c71fe9454f 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -123,7 +123,7 @@ extern const char * const *h8_reg_names;
functions; however, the register pressure this causes makes
CSEing of function addresses generally a lose. */
#define NO_FUNCTION_CSE 1
-\f
+
/* Target machine storage layout */
/* Define this if most significant bit is lowest numbered
@@ -180,7 +180,7 @@ extern const char * const *h8_reg_names;
/* On the H8/300, longs can be aligned on halfword boundaries, but not
byte boundaries. */
#define STRICT_ALIGNMENT 1
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -259,7 +259,7 @@ extern const char * const *h8_reg_names;
FRAMEADDR is already the frame pointer of the COUNT frame, assuming
a stack layout with the frame pointer as the first saved register. */
#define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME))
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -401,7 +401,7 @@ enum reg_class {
but prevents the compiler from extending the lifetime of these
registers. */
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -445,7 +445,7 @@ struct cum_arg
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12)
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT 1
@@ -467,7 +467,7 @@ struct cum_arg
#define REGNO_OK_FOR_BASE_P(regno) \
(((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \
|| reg_renumber[regno] >= 0)
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 1
@@ -517,7 +517,7 @@ struct cum_arg
#endif
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE Pmode
@@ -589,7 +589,7 @@ struct cum_arg
CC_NO_OVERFLOW defined for this purpose. Rename it to something more
understandable. */
#define CC_NO_CARRY CC_NO_OVERFLOW
-\f
+
/* Control the assembler format that we output. */
/* Output to assembler file text saying following lines
diff --git a/gcc/config/host-darwin.h b/gcc/config/host-darwin.h
index 76ce65494dd..8345d5aed64 100644
--- a/gcc/config/host-darwin.h
+++ b/gcc/config/host-darwin.h
@@ -18,7 +18,7 @@
<http://www.gnu.org/licenses/>. */
extern void * darwin_gt_pch_get_address (size_t sz, int fd);
-extern int darwin_gt_pch_use_address (void *&addr, size_t sz, int fd,
+extern int darwin_gt_pch_use_address (void *&addr, size_t sz, int fd,
size_t off);
#undef HOST_HOOKS_GT_PCH_GET_ADDRESS
diff --git a/gcc/config/host-hpux.cc b/gcc/config/host-hpux.cc
index 723be941945..545d3a9fec1 100644
--- a/gcc/config/host-hpux.cc
+++ b/gcc/config/host-hpux.cc
@@ -125,5 +125,5 @@ hpux_gt_pch_use_address (void *&base, size_t size, int fd, size_t offset)
return 1;
}
-\f
+
const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/gcc/config/host-linux.cc b/gcc/config/host-linux.cc
index a891651a7b6..6138432c19a 100644
--- a/gcc/config/host-linux.cc
+++ b/gcc/config/host-linux.cc
@@ -105,7 +105,7 @@
#endif
/* Determine a location where we might be able to reliably allocate SIZE
- bytes. FD is the PCH file, though we should return with the file
+ bytes. FD is the PCH file, though we should return with the file
unmapped. */
static void *
@@ -228,5 +228,5 @@ linux_gt_pch_use_address (void *&base, size_t size, int fd, size_t offset)
return 1;
}
-\f
+
const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/gcc/config/host-netbsd.cc b/gcc/config/host-netbsd.cc
index 2030ea2ebd8..3663ee4c199 100644
--- a/gcc/config/host-netbsd.cc
+++ b/gcc/config/host-netbsd.cc
@@ -62,7 +62,7 @@ netbsd_gt_pch_get_address (size_t size, int fd)
return addr;
}
-/* Map SIZE bytes of FD+OFFSET at BASE. Return 1 if we succeeded at
+/* Map SIZE bytes of FD+OFFSET at BASE. Return 1 if we succeeded at
mapping the data at BASE, -1 if we couldn't. */
static int
diff --git a/gcc/config/host-openbsd.cc b/gcc/config/host-openbsd.cc
index 712ea9c93fa..04ecdd63241 100644
--- a/gcc/config/host-openbsd.cc
+++ b/gcc/config/host-openbsd.cc
@@ -62,7 +62,7 @@ openbsd_gt_pch_get_address (size_t size, int fd)
return addr;
}
-/* Map SIZE bytes of FD+OFFSET at BASE. Return 1 if we succeeded at
+/* Map SIZE bytes of FD+OFFSET at BASE. Return 1 if we succeeded at
mapping the data at BASE, -1 if we couldn't. */
static int
@@ -81,5 +81,5 @@ openbsd_gt_pch_use_address (void *&base, size_t size, int fd, size_t offset)
return addr == base ? 1 : -1;
}
-\f
+
const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/gcc/config/host-solaris.cc b/gcc/config/host-solaris.cc
index 75c59464ea7..c2b6310ff3d 100644
--- a/gcc/config/host-solaris.cc
+++ b/gcc/config/host-solaris.cc
@@ -39,7 +39,7 @@ mmap_fixed (void *addr, size_t len, int prot, int flags, int fd, off_t off)
void *base;
base = mmap ((caddr_t) addr, len, prot, flags, fd, off);
-
+
if (base != addr)
{
size_t page_size = getpagesize();
@@ -101,7 +101,7 @@ sol_gt_pch_get_address (size_t size, int fd)
return addr;
}
-/* Map SIZE bytes of FD+OFFSET at BASE. Return 1 if we succeeded at
+/* Map SIZE bytes of FD+OFFSET at BASE. Return 1 if we succeeded at
mapping the data at BASE, -1 if we couldn't. */
static int
@@ -121,5 +121,5 @@ sol_gt_pch_use_address (void *&base, size_t size, int fd, size_t offset)
return addr == base ? 1 : -1;
}
-\f
+
const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/gcc/config/i386/att.h b/gcc/config/i386/att.h
index 2d9475d1c27..51f0edee394 100644
--- a/gcc/config/i386/att.h
+++ b/gcc/config/i386/att.h
@@ -22,7 +22,7 @@ a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-\f
+
/* Define the syntax of instructions and addresses. */
/* Prefix for internally generated assembler labels. */
@@ -69,7 +69,7 @@ do \
/* Can't use ASM_OUTPUT_SKIP in text section; it doesn't leave 0s. */
#define ASM_NO_SKIP_IN_TEXT 1
-\f
+
/* Define the syntax of labels and symbol definitions/declarations. */
/* The prefix to add for compiler private assembler symbols. */
diff --git a/gcc/config/i386/avx512dqintrin.h b/gcc/config/i386/avx512dqintrin.h
index e924250a4ad..01006a21edf 100644
--- a/gcc/config/i386/avx512dqintrin.h
+++ b/gcc/config/i386/avx512dqintrin.h
@@ -120,7 +120,7 @@ _cvtmask8_u32 (__mmask8 __A)
{
return (unsigned int) __builtin_ia32_kmovb ((__mmask8 ) __A);
}
-
+
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_cvtu32_mask8 (unsigned int __A)
diff --git a/gcc/config/i386/biarch64.h b/gcc/config/i386/biarch64.h
index 1a15d7f6f59..5235f48d4c6 100644
--- a/gcc/config/i386/biarch64.h
+++ b/gcc/config/i386/biarch64.h
@@ -1,6 +1,6 @@
/* Make configure files to produce biarch compiler defaulting to 64bit mode.
This file must be included very first, while the OS specific file later
- to overwrite otherwise wrong defaults.
+ to overwrite otherwise wrong defaults.
Copyright (C) 2001-2022 Free Software Foundation, Inc.
Contributed by Bo Thorsen <bo@suse.de>.
diff --git a/gcc/config/i386/bsd.h b/gcc/config/i386/bsd.h
index 817fb6edf91..2990014227c 100644
--- a/gcc/config/i386/bsd.h
+++ b/gcc/config/i386/bsd.h
@@ -20,7 +20,7 @@ along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Use the Sequent Symmetry assembler syntax. */
-\f
+
/* Define the syntax of pseudo-ops, labels and comments. */
/* Prefix for internally generated assembler labels. If we aren't using
@@ -39,7 +39,7 @@ along with GCC; see the file COPYING3. If not see
/* This was suggested, but it shouldn't be right for debugger output. -- RMS
#define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) */
-\f
+
/* Define the syntax of labels and symbol definitions/declarations. */
/* This is how to output an assembler line
@@ -47,7 +47,7 @@ along with GCC; see the file COPYING3. If not see
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "\t.space " HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
-\f
+
/* Define the syntax of labels and symbol definitions/declarations. */
/* This says how to output an assembler line
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index a33abf35cc0..d726d129385 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -5,16 +5,16 @@
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 3, or (at your option) any
* later version.
- *
+ *
* This file is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
- *
+ *
* Under Section 7 of GPL version 3, you are granted additional
* permissions described in the GCC Runtime Library Exception, version
* 3.1, as published by the Free Software Foundation.
- *
+ *
* You should have received a copy of the GNU General Public License and
* a copy of the GCC Runtime Library Exception along with this program;
* see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 4007fd96eac..3920b334b0d 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -184,13 +184,13 @@ along with GCC; see the file COPYING3. If not see
/* Windows64 continues to use a 32-bit long type. */
#undef LONG_TYPE_SIZE
#define LONG_TYPE_SIZE 32
-\f
+
#define drectve_section() \
(fprintf (asm_out_file, "\t.section .drectve\n"), \
in_section = NULL)
/* Older versions of gas don't handle 'r' as data.
- Explicitly set data flag with 'd'. */
+ Explicitly set data flag with 'd'. */
#define READONLY_DATA_SECTION_ASM_OP "\t.section .rdata,\"dr\""
/* Don't allow flag_pic to propagate since gas may produce invalid code
@@ -254,7 +254,7 @@ do { \
#undef TARGET_MANGLE_ASSEMBLER_NAME
#define TARGET_MANGLE_ASSEMBLER_NAME i386_pe_mangle_assembler_name
-\f
+
/* Emit code to check the stack when allocating more than 4000
bytes in one go. */
#define CHECK_STACK_LIMIT 4000
diff --git a/gcc/config/i386/cygwin.h b/gcc/config/i386/cygwin.h
index 0a604d65b32..b575f2b8caf 100644
--- a/gcc/config/i386/cygwin.h
+++ b/gcc/config/i386/cygwin.h
@@ -137,7 +137,7 @@ along with GCC; see the file COPYING3. If not see
do not use them unnecessarily in gthr-posix.h. */
#define GTHREAD_USE_WEAK 0
-/* Every program on cygwin links against cygwin1.dll which contains
+/* Every program on cygwin links against cygwin1.dll which contains
the pthread routines. There is no need to explicitly link them
and the -pthread flag is accepted only for compatibility. */
#undef GOMP_SELF_SPECS
diff --git a/gcc/config/i386/djgpp.h b/gcc/config/i386/djgpp.h
index ede50b515af..05b96971521 100644
--- a/gcc/config/i386/djgpp.h
+++ b/gcc/config/i386/djgpp.h
@@ -98,7 +98,7 @@ along with GCC; see the file COPYING3. If not see
while (0)
#endif
-/* This is how to tell assembler that a symbol is weak */
+/* This is how to tell assembler that a symbol is weak */
#undef ASM_WEAKEN_LABEL
#define ASM_WEAKEN_LABEL(FILE,NAME) \
do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
index 95c16c23c7f..28f76c151b4 100644
--- a/gcc/config/i386/driver-i386.cc
+++ b/gcc/config/i386/driver-i386.cc
@@ -251,7 +251,7 @@ decode_caches_intel (unsigned reg, bool xeon_mp,
/* Detect cache parameters using CPUID function 2. */
static void
-detect_caches_cpuid2 (bool xeon_mp,
+detect_caches_cpuid2 (bool xeon_mp,
struct cache_desc *level1, struct cache_desc *level2)
{
unsigned regs[4];
@@ -294,7 +294,7 @@ detect_caches_cpuid4 (struct cache_desc *level1, struct cache_desc *level2,
int count;
for (count = 0;; count++)
- {
+ {
__cpuid_count(4, count, eax, ebx, ecx, edx);
switch (eax & 0x1f)
{
@@ -641,7 +641,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
cpu = "haswell";
else
/* Assume Sandy Bridge. */
- cpu = "sandybridge";
+ cpu = "sandybridge";
}
else if (has_feature (FEATURE_SSE4_2))
{
diff --git a/gcc/config/i386/freebsd.h b/gcc/config/i386/freebsd.h
index 9ae89815c44..431ce3cfe9e 100644
--- a/gcc/config/i386/freebsd.h
+++ b/gcc/config/i386/freebsd.h
@@ -48,17 +48,17 @@ along with GCC; see the file COPYING3. If not see
#undef SIZE_TYPE
#define SIZE_TYPE (TARGET_64BIT ? "long unsigned int" : "unsigned int")
-
+
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_64BIT ? "long int" : "int")
-
+
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE (TARGET_64BIT ? 32 : BITS_PER_WORD)
#undef SUBTARGET_EXTRA_SPECS /* i386.h bogusly defines it. */
#define SUBTARGET_EXTRA_SPECS \
{ "fbsd_dynamic_linker", FBSD_DYNAMIC_LINKER }
-
+
/* Use the STARTFILE_SPEC from config/freebsd-spec.h. */
#undef STARTFILE_SPEC
diff --git a/gcc/config/i386/gas.h b/gcc/config/i386/gas.h
index 317bc868b0a..88a0e58c2a1 100644
--- a/gcc/config/i386/gas.h
+++ b/gcc/config/i386/gas.h
@@ -50,12 +50,12 @@ along with GCC; see the file COPYING3. If not see
doubt or guess work, and since this file is used for both a.out and other
file formats, we use one of them. */
-#ifdef HAVE_GAS_BALIGN_AND_P2ALIGN
+#ifdef HAVE_GAS_BALIGN_AND_P2ALIGN
#undef ASM_OUTPUT_ALIGN
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1 << (LOG))
#endif
-\f
+
/* A C statement or statements which output an assembler instruction
opcode to the stdio stream STREAM. The macro-operand PTR is a
variable of type `char *' which points to the opcode name in its
diff --git a/gcc/config/i386/gmm_malloc.h b/gcc/config/i386/gmm_malloc.h
index 09d26d6beeb..b993024453b 100644
--- a/gcc/config/i386/gmm_malloc.h
+++ b/gcc/config/i386/gmm_malloc.h
@@ -29,7 +29,7 @@
#include <errno.h>
#endif
-static __inline__ void *
+static __inline__ void *
_mm_malloc (size_t __size, size_t __align)
{
void * __malloc_ptr;
@@ -50,7 +50,7 @@ _mm_malloc (size_t __size, size_t __align)
/* Assume malloc'd pointer is aligned at least to sizeof (void*).
If necessary, add another sizeof (void*) to store the value
returned by malloc. Effectively this enforces a minimum alignment
- of sizeof double. */
+ of sizeof double. */
if (__align < 2 * sizeof (void *))
__align = 2 * sizeof (void *);
@@ -62,7 +62,7 @@ _mm_malloc (size_t __size, size_t __align)
__aligned_ptr = (void *) (((size_t) __malloc_ptr + __align)
& ~((size_t) (__align) - 1));
- /* Store the original pointer just before p. */
+ /* Store the original pointer just before p. */
((void **) __aligned_ptr)[-1] = __malloc_ptr;
return __aligned_ptr;
diff --git a/gcc/config/i386/gnu-user.h b/gcc/config/i386/gnu-user.h
index 0f8154746da..2ab153accb1 100644
--- a/gcc/config/i386/gnu-user.h
+++ b/gcc/config/i386/gnu-user.h
@@ -41,16 +41,16 @@ along with GCC; see the file COPYING3. If not see
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
-
+
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
-
+
#undef WCHAR_TYPE
#define WCHAR_TYPE "long int"
-
+
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-
+
/* Provide a LINK_SPEC appropriate for GNU userspace. Here we provide support
for the special GCC options -static and -shared, which allow us to
link things in one of these three modes by applying the appropriate
diff --git a/gcc/config/i386/host-cygwin.cc b/gcc/config/i386/host-cygwin.cc
index 05ad3a8a41f..af515bc88b6 100644
--- a/gcc/config/i386/host-cygwin.cc
+++ b/gcc/config/i386/host-cygwin.cc
@@ -59,7 +59,7 @@ cygwin_gt_pch_get_address (size_t sz, int fd)
/* Cygwin requires that the underlying file be at least
as large as the requested mapping. */
if ((size_t) p < sz)
- {
+ {
if (ftruncate (fd, sz) == -1)
fatal_error (input_location, "cannot extend PCH file: %m");
}
diff --git a/gcc/config/i386/host-mingw32.cc b/gcc/config/i386/host-mingw32.cc
index 3b0d83ffc60..f3363d3e88c 100644
--- a/gcc/config/i386/host-mingw32.cc
+++ b/gcc/config/i386/host-mingw32.cc
@@ -50,7 +50,7 @@ static const size_t pch_VA_max_size = 128 * 1024 * 1024;
/* Granularity for reserving address space. */
static size_t va_granularity = 0x10000;
-/* Print out the GetLastError() translation. */
+/* Print out the GetLastError() translation. */
static inline void
w32_error (const char* function, const char* file, int line,
const char* my_msg)
@@ -99,7 +99,7 @@ mingw32_gt_pch_get_address (size_t size, int)
for NT system dlls is in 0x70000000 to 0x78000000 range.
If we allocate at bottom we need to reserve the address as early
as possible and at the same point in each invocation. */
-
+
res = VirtualAlloc (NULL, pch_VA_max_size,
MEM_RESERVE | MEM_TOP_DOWN,
PAGE_NOACCESS);
@@ -109,11 +109,11 @@ mingw32_gt_pch_get_address (size_t size, int)
/* We do not need the address space for now, so free it. */
VirtualFree (res, 0, MEM_RELEASE);
- return res;
+ return res;
}
/* ADDR is an address returned by gt_pch_get_address. Attempt to allocate
- SIZE bytes at the same address and load it with the data from FD at
+ SIZE bytes at the same address and load it with the data from FD at
OFFSET. Return -1 if we couldn't allocate memory at ADDR, return 0
if the memory is allocated but the data not loaded, return 1 if done. */
@@ -123,10 +123,10 @@ mingw32_gt_pch_use_address (void *&addr, size_t size, int fd,
{
void * mmap_addr;
HANDLE mmap_handle;
-
+
/* Apparently, MS Vista puts unnamed file mapping objects into Global
namespace when running an application in a Terminal Server
- session. This causes failure since, by default, applications
+ session. This causes failure since, by default, applications
don't get SeCreateGlobalPrivilege. We don't need global
memory sharing so explicitly put object into Local namespace.
@@ -146,10 +146,10 @@ mingw32_gt_pch_use_address (void *&addr, size_t size, int fd,
version_info.dwOSVersionInfoSize = sizeof (version_info);
if (size == 0)
- return 0;
+ return 0;
/* Offset must be also be a multiple of allocation granularity for
- this to work. We can't change the offset. */
+ this to work. We can't change the offset. */
if ((offset & (va_granularity - 1)) != 0 || size > pch_VA_max_size)
return -1;
@@ -172,7 +172,7 @@ mingw32_gt_pch_use_address (void *&addr, size_t size, int fd,
if (mmap_handle == NULL)
{
w32_error (__FUNCTION__, __FILE__, __LINE__, "CreateFileMapping");
- return -1;
+ return -1;
}
/* Retry five times, as here might occure a race with multiple gcc's
@@ -186,7 +186,7 @@ mingw32_gt_pch_use_address (void *&addr, size_t size, int fd,
if (r != 4)
Sleep (500);
}
-
+
if (mmap_addr != addr)
{
w32_error (__FUNCTION__, __FILE__, __LINE__, "MapViewOfFileEx");
diff --git a/gcc/config/i386/i386-builtins.cc b/gcc/config/i386/i386-builtins.cc
index 37df854ba51..b8c36410313 100644
--- a/gcc/config/i386/i386-builtins.cc
+++ b/gcc/config/i386/i386-builtins.cc
@@ -414,7 +414,7 @@ ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
current_target_pragma = saved_current_target_pragma;
}
-\f
+
/* TM vector builtins. */
/* Reuse the existing x86-specific `struct builtin_description' cause
@@ -1844,7 +1844,7 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
target_node
= ix86_valid_target_attribute_tree (decl, attrs, &global_options,
&global_options_set, 0);
-
+
gcc_assert (target_node);
if (target_node == error_mark_node)
return 0;
@@ -1927,14 +1927,14 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
cl_target_option_restore (&global_options, &global_options_set,
&cur_target);
-
+
if (predicate_list && arg_str == NULL)
{
error_at (DECL_SOURCE_LOCATION (decl),
"no dispatcher found for the versioning attributes");
return 0;
}
-
+
if (predicate_list)
{
predicate_decl = ix86_builtins [(int) builtin_fn];
@@ -2002,7 +2002,7 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
*predicate_list = predicate_chain;
}
- return priority;
+ return priority;
}
/* This builds the processor_model struct type defined in
diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
index 44fab6e80ae..900c3a17b1b 100644
--- a/gcc/config/i386/i386-c.cc
+++ b/gcc/config/i386/i386-c.cc
@@ -682,7 +682,7 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
}
}
-\f
+
/* Hook to validate the current #pragma GCC target and set the state, and
update the macros based on what was changed. If ARGS is NULL, then
POP_TARGET is used to reset the options. */
@@ -781,7 +781,7 @@ ix86_pragma_target_parse (tree args, tree pop_target)
return true;
}
-\f
+
/* Function to tell the preprocessor about the defines for the current target. */
void
@@ -845,7 +845,7 @@ ix86_target_macros (void)
cpp_define_formatted (parse_in, "__CET__=%d", flag_cf_protection & ~CF_SET);
}
-\f
+
/* Register target pragmas. We need to add the hook for parsing #pragma GCC
option here rather than in i386.cc since it will pull in various preprocessor
functions, and those are not present in languages like fortran without a
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 3eddbc94360..c4c860f615d 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -946,7 +946,7 @@ ix86_expand_vector_move_misalign (machine_mode mode, rtx operands[])
t = gen_reg_rtx (V4SFmode);
else
t = op0;
-
+
if (TARGET_SSE_PARTIAL_REG_DEPENDENCY)
emit_move_insn (t, CONST0_RTX (V4SFmode));
else
@@ -1589,7 +1589,7 @@ ix86_emit_binop (enum rtx_code code, machine_mode mode,
op = gen_rtx_SET (dst, gen_rtx_fmt_ee (code, mode, dst, src));
clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
-
+
emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
}
@@ -5422,7 +5422,7 @@ ix86_expand_vec_perm (rtx operands[])
if (TARGET_XOP)
{
- /* The XOP VPPERM insn supports three inputs. By ignoring the
+ /* The XOP VPPERM insn supports three inputs. By ignoring the
one_operand_shuffle special case, we avoid creating another
set of constant vectors in memory. */
one_operand_shuffle = false;
@@ -7038,7 +7038,7 @@ ix86_expand_v1ti_ashiftrt (rtx operands[])
rtx tmp7 = force_reg (V1TImode, gen_lowpart (V1TImode, tmp3));
rtx tmp8 = gen_reg_rtx (V1TImode);
emit_insn (gen_sse2_ashlv1ti3 (tmp8, tmp7, GEN_INT (64)));
-
+
rtx tmp9 = force_reg (V2DImode, gen_lowpart (V2DImode, tmp3));
rtx tmp10 = gen_reg_rtx (V2DImode);
emit_insn (gen_ashlv2di3 (tmp10, tmp9, GEN_INT (128 - bits)));
@@ -7847,7 +7847,7 @@ expand_small_cpymem_or_setmem (rtx destmem, rtx srcmem,
DONE_LABEL is a label after the whole copying sequence. The label is created
on demand if *DONE_LABEL is NULL.
MIN_SIZE is minimal size of block copied. This value gets adjusted for new
- bounds after the initial copies.
+ bounds after the initial copies.
DESTMEM/SRCMEM are memory expressions pointing to the copies block,
DESTPTR/SRCPTR are pointers to the block. DYNAMIC_CHECK indicate whether
@@ -8156,7 +8156,7 @@ expand_set_or_cpymem_constant_prologue (rtx dst, rtx *srcp, rtx destreg,
return dst;
}
-/* Return true if ALG can be used in current context.
+/* Return true if ALG can be used in current context.
Assume we expand memset if MEMSET is true. */
static bool
alg_usable_p (enum stringop_alg alg, bool memset, bool have_as)
@@ -8513,7 +8513,7 @@ ix86_copy_addr_to_reg (rtx addr)
with specified algorithm.
4) Epilogue: code copying tail of the block that is too small to be
- handled by main body (or up to size guarded by prologue guard).
+ handled by main body (or up to size guarded by prologue guard).
Misaligned move sequence
@@ -8731,7 +8731,7 @@ ix86_expand_set_or_cpymem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
/* Do the cheap promotion to allow better CSE across the
main loop and epilogue (ie one load of the big constant in the
- front of all code.
+ front of all code.
For now the misaligned move sequences do not have fast path
without broadcasting. */
if (issetmem && ((CONST_INT_P (val_exp) || misaligned_prologue_used)))
@@ -12777,7 +12777,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
if (!REG_P (op2))
op2 = copy_to_mode_reg (SImode, op2);
- emit_insn (fcode == IX86_BUILTIN_MONITOR
+ emit_insn (fcode == IX86_BUILTIN_MONITOR
? gen_sse3_monitor (Pmode, op0, op1, op2)
: gen_monitorx (Pmode, op0, op1, op2));
return 0;
@@ -23587,7 +23587,7 @@ ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2)
/* Multiply lower parts and add all */
t5 = gen_reg_rtx (V2DImode);
- emit_insn (gen_vec_widen_umult_even_v4si (t5,
+ emit_insn (gen_vec_widen_umult_even_v4si (t5,
gen_lowpart (V4SImode, op1),
gen_lowpart (V4SImode, op2)));
force_expand_binop (mode, add_optab, t5, t4, op0, 1, OPTAB_DIRECT);
@@ -23782,7 +23782,7 @@ ix86_expand_pextr (rtx *operands)
return false;
dst = SUBREG_REG (dst);
}
-
+
if (SUBREG_P (src))
{
pos += SUBREG_BYTE (src) * BITS_PER_UNIT;
diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index f420f8339e8..8d6feae2988 100644
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -348,7 +348,7 @@ scalar_chain::mark_dual_mode_def (df_ref def)
return;
n_sse_to_integer++;
}
-
+
if (dump_file)
fprintf (dump_file,
" Mark r%d def in insn %d as requiring both modes in chain #%d\n",
@@ -2984,7 +2984,7 @@ ix86_compare_version_priority (tree decl1, tree decl2)
/* V1 and V2 point to function versions with different priorities
based on the target ISA. This function compares their priorities. */
-
+
static int
feature_compare (const void *v1, const void *v2)
{
@@ -3033,7 +3033,7 @@ add_condition_to_bb (tree function_decl, tree version_decl,
convert_expr = build1 (CONVERT_EXPR, ptr_type_node,
build_fold_addr_expr (version_decl));
result_var = create_tmp_var (ptr_type_node);
- convert_stmt = gimple_build_assign (result_var, convert_expr);
+ convert_stmt = gimple_build_assign (result_var, convert_expr);
return_stmt = gimple_build_return (result_var);
if (predicate_chain == NULL_TREE)
@@ -3060,7 +3060,7 @@ add_condition_to_bb (tree function_decl, tree version_decl,
gimple_seq_add_stmt (&gseq, call_cond_stmt);
predicate_chain = TREE_CHAIN (predicate_chain);
-
+
if (and_expr_var == NULL)
and_expr_var = cond_var;
else
@@ -3101,7 +3101,7 @@ add_condition_to_bb (tree function_decl, tree version_decl,
gimple_set_bb (return_stmt, bb2);
bb3 = e23->dest;
- make_edge (bb1, bb3, EDGE_FALSE_VALUE);
+ make_edge (bb1, bb3, EDGE_FALSE_VALUE);
remove_edge (e23);
make_edge (bb2, EXIT_BLOCK_PTR_FOR_FN (cfun), 0);
@@ -3262,7 +3262,7 @@ ix86_mangle_function_version_assembler_name (tree decl, tree id)
return ret;
}
-tree
+tree
ix86_mangle_decl_assembler_name (tree decl, tree id)
{
/* For function version, add the target suffix to the assembler name. */
@@ -3292,7 +3292,7 @@ ix86_get_function_versions_dispatcher (void *decl)
tree dispatch_decl = NULL;
struct cgraph_function_version_info *default_version_info = NULL;
-
+
gcc_assert (fn != NULL && DECL_FUNCTION_VERSIONED (fn));
node = cgraph_node::get (fn);
@@ -3300,7 +3300,7 @@ ix86_get_function_versions_dispatcher (void *decl)
node_v = node->function_version ();
gcc_assert (node_v != NULL);
-
+
if (node_v->dispatcher_resolver != NULL)
return node_v->dispatcher_resolver;
@@ -3456,7 +3456,7 @@ make_resolver_func (const tree default_decl,
provide the code to dispatch the right function at run-time. NODE points
to the dispatcher decl whose body will be created. */
-tree
+tree
ix86_generate_version_dispatcher_body (void *node_p)
{
tree resolver_decl;
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index f73af2eb477..1b0f6339a01 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -730,7 +730,7 @@ static unsigned HOST_WIDE_INT initial_ix86_arch_features[X86_ARCH_LAST] = {
~m_386,
};
-/* This table must be in sync with enum processor_type in i386.h. */
+/* This table must be in sync with enum processor_type in i386.h. */
static const struct processor_costs *processor_cost_table[] =
{
&generic_cost,
@@ -943,7 +943,7 @@ ix86_function_specific_print (FILE *file, int indent,
}
}
-\f
+
/* Inner function to process the attribute((target(...))), take an argument and
set the current options from the argument. If we have a list, recursively go
over the list. */
@@ -1484,9 +1484,9 @@ ix86_valid_target_attribute_p (tree fndecl,
tree old_optimize = build_optimization_node (&global_options,
&global_options_set);
- /* Get the optimization options of the current function. */
+ /* Get the optimization options of the current function. */
tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
-
+
if (!func_optimize)
func_optimize = old_optimize;
@@ -1690,7 +1690,7 @@ ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
}
}
-\f
+
/* parse -mtune-ctrl= option. When DUMP is true,
print the features that are explicitly set. */
@@ -2595,7 +2595,7 @@ ix86_option_override_internal (bool main_args_p,
/* For all chips supporting SSE2, -mfpmath=sse performs better than
fpmath=387. The second is however default at many targets since the
extra 80bit precision of temporaries is considered to be part of ABI.
- Overwrite the default at least for -ffast-math.
+ Overwrite the default at least for -ffast-math.
TODO: -mfpmath=both seems to produce same performing code with bit
smaller binaries. It is however not clear if register allocation is
ready for this setting.
diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h
index d3bfeed0af2..5aecbf5bd3b 100644
--- a/gcc/config/i386/i386-opts.h
+++ b/gcc/config/i386/i386-opts.h
@@ -29,7 +29,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
enum stringop_alg
{
#undef DEF_ALG
-#define DEF_ALG(alg, name) alg,
+#define DEF_ALG(alg, name) alg,
#include "stringop.def"
last_alg
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index de978d19063..5d1de3cd7d9 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -406,7 +406,7 @@ enum x86_64_reg_class
static REAL_VALUE_TYPE ext_80387_constants_table [5];
static bool ext_80387_constants_init;
-\f
+
static rtx ix86_function_value (const_tree, const_tree, bool);
static bool ix86_function_value_regno_p (const unsigned int);
static unsigned int ix86_function_arg_boundary (machine_mode,
@@ -421,11 +421,11 @@ static bool i386_asm_output_addr_const_extra (FILE *, rtx);
static bool ix86_can_inline_p (tree, tree);
static unsigned int ix86_minimum_incoming_stack_boundary (bool);
-\f
+
/* Whether -mtune= or -march= were specified */
int ix86_tune_defaulted;
int ix86_arch_specified;
-\f
+
/* Return true if a red-zone is in use. We can't use red-zone when
there are local indirect jumps, like "indirect_jump" or "tablejump",
which jumps to another place in the function, since "call" in the
@@ -444,7 +444,7 @@ ix86_using_red_zone (void)
&& (!cfun->machine->has_local_indirect_jump
|| cfun->machine->indirect_branch_type == indirect_branch_keep));
}
-\f
+
/* Return true, if profiling code should be emitted before
prologue. Otherwise it returns false.
Note: For x86 with "hotfix" it is sorried. */
@@ -483,7 +483,7 @@ ix86_conditional_register_usage (void)
/* See the definition of CALL_USED_REGISTERS in i386.h. */
c_mask = CALL_USED_REGISTERS_MASK (TARGET_64BIT_MS_ABI);
-
+
CLEAR_HARD_REG_SET (reg_class_contents[(int)CLOBBERED_REGS]);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
@@ -546,8 +546,8 @@ ix86_canonicalize_comparison (int *code, rtx *op0, rtx *op1,
}
}
}
-\f
-\f
+
+
/* Hook to determine if one function can safely inline another. */
static bool
@@ -630,7 +630,7 @@ ix86_can_inline_p (tree caller, tree callee)
return ret;
}
-\f
+
/* Return true if this goes in large data/bss. */
static bool
@@ -883,7 +883,7 @@ x86_output_aligned_bss (FILE *file, tree decl, const char *name,
#endif /* ASM_DECLARE_OBJECT_NAME */
ASM_OUTPUT_SKIP (file, size ? size : 1);
}
-\f
+
/* Decide whether we must probe the stack before any space allocation
on this target. It's essentially TARGET_STACK_PROBE except when
-fstack-check causes the stack to be already probed differently. */
@@ -897,7 +897,7 @@ ix86_target_stack_probe (void)
return TARGET_STACK_PROBE;
}
-\f
+
/* Decide whether we can make a sibling call to a function. DECL is the
declaration of the function being targeted by the call and EXP is the
CALL_EXPR representing the call. */
@@ -1111,7 +1111,7 @@ ix86_comp_type_attributes (const_tree type1, const_tree type2)
return 1;
}
-\f
+
/* Return the regparm value for a function with the indicated TYPE and DECL.
DECL may be NULL when calling function indirectly
or considering a libcall. */
@@ -1431,7 +1431,7 @@ ix86_legitimate_combined_insn (rtx_insn *insn)
return true;
}
-\f
+
/* Implement the TARGET_ASAN_SHADOW_OFFSET hook. */
static unsigned HOST_WIDE_INT
@@ -1439,7 +1439,7 @@ ix86_asan_shadow_offset (void)
{
return SUBTARGET_SHADOW_OFFSET;
}
-\f
+
/* Argument support functions. */
/* Return true when register may be used to pass function parameters. */
@@ -1875,7 +1875,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */
The midde-end can't deal with the vector types > 16 bytes. In this
case, we return the original mode and warn ABI change if CUM isn't
- NULL.
+ NULL.
If INT_RETURN is true, warn ABI change if the vector mode isn't
available for function return value. */
@@ -4175,7 +4175,7 @@ ix86_function_value_1 (const_tree valtype, const_tree fntype_or_decl,
if (fntype_or_decl && DECL_P (fntype_or_decl))
fn = fntype_or_decl;
fntype = fn ? TREE_TYPE (fn) : fntype_or_decl;
-
+
if (ix86_function_type_abi (fntype) == MS_ABI)
{
if (TARGET_64BIT)
@@ -4293,7 +4293,7 @@ ix86_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
/* Unless ABI prescibes otherwise,
MMX/3dNow values are returned in MM0 if available. */
-
+
if (size == 8)
return TARGET_VECT8_RETURNS || !TARGET_MMX;
@@ -4335,7 +4335,7 @@ ix86_push_argument (unsigned int npush)
&& !ACCUMULATE_OUTGOING_ARGS);
}
-\f
+
/* Create the va_list data type. */
static tree
@@ -4412,7 +4412,7 @@ ix86_build_builtin_va_list (void)
/* For SYSV_ABI we use an array of one record. */
sysv_va_list_type_node = ix86_build_builtin_va_list_64 ();
-
+
/* For MS_ABI we use plain pointer to argument area. */
tree char_ptr_type = build_pointer_type (char_type_node);
tree attr = tree_cons (get_identifier ("ms_abi va_list"), NULL_TREE,
@@ -5026,7 +5026,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
addr = build_va_arg_indirect_ref (addr);
return build_va_arg_indirect_ref (addr);
}
-\f
+
/* Return true if OPNUM's MEM should be matched
in movabs* patterns. */
@@ -5059,7 +5059,7 @@ ix86_check_no_addr_space (rtx insn)
}
return true;
}
-\f
+
/* Initialize the table of extra 80387 mathematical constants. */
static void
@@ -5321,7 +5321,7 @@ standard_sse_constant_opcode (rtx_insn *insn, rtx *operands)
&& float_vector_all_ones_operand (x, mode)))
{
enum attr_mode insn_mode = get_attr_mode (insn);
-
+
switch (insn_mode)
{
case MODE_XI:
@@ -5759,7 +5759,7 @@ ix86_can_use_return_insn_p (void)
return (frame.stack_pointer_offset == UNITS_PER_WORD
&& (frame.nregs + frame.nsseregs) == 0);
}
-\f
+
/* Return stack frame size. get_frame_size () returns used stack slots
during compilation, which may be optimized out later. If stack frame
is needed, stack_frame_required should be true. */
@@ -5802,7 +5802,7 @@ ix86_frame_pointer_required (void)
/* SSE saves require frame-pointer when stack is misaligned. */
if (TARGET_64BIT_MS_ABI && ix86_incoming_stack_boundary < 128)
return true;
-
+
/* In ix86_option_override_internal, TARGET_OMIT_LEAF_FRAME_POINTER
turns off the frame pointer by default. Turn it back on now if
we've not got a leaf function. */
@@ -5826,7 +5826,7 @@ ix86_setup_frame_addresses (void)
{
cfun->machine->accesses_prev_frame = 1;
}
-\f
+
#ifndef USE_HIDDEN_LINKONCE
# if defined(HAVE_GAS_HIDDEN) && (SUPPORTS_ONE_ONLY - 0)
# define USE_HIDDEN_LINKONCE 1
@@ -10230,7 +10230,7 @@ ix86_live_on_entry (bitmap regs)
bitmap_set_bit (regs, split_stack_prologue_scratch_regno ());
}
}
-\f
+
/* Extract the parts of an RTL expression that is a valid memory address
for an instruction. Return false if the structure of the address is
grossly off. */
@@ -10255,7 +10255,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
addr = XEXP (addr, 0);
if (CONST_INT_P (addr))
return false;
- }
+ }
else if (GET_CODE (addr) == AND
&& const_32bit_mask (XEXP (addr, 1), DImode))
{
@@ -10487,7 +10487,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
return true;
}
-\f
+
/* Return cost of the memory address x.
For i386, it is better to use a complex address than let gcc copy
the address into a reg and make a new pseudo. But not if the address
@@ -10552,7 +10552,7 @@ ix86_address_cost (rtx x, machine_mode, addr_space_t, bool)
return cost;
}
-\f
+
/* Allow {LABEL | SYMBOL}_REF - SYMBOL_REF-FOR-PICBASE for Mach-O as
this is used for to form addresses to local data when -fPIC is in
use. */
@@ -11207,7 +11207,7 @@ constant_address_p (rtx x)
{
return CONSTANT_P (x) && ix86_legitimate_address_p (Pmode, x, 1);
}
-\f
+
/* Return a unique alias set for the GOT. */
alias_set_type
@@ -11447,7 +11447,7 @@ legitimize_pic_address (rtx orig, rtx reg)
}
return new_rtx;
}
-\f
+
/* Load the thread pointer. If TO_REG is true, force it into a register. */
static rtx
@@ -11951,7 +11951,7 @@ get_dllimport_decl (tree decl, bool beimport)
#ifdef SUB_TARGET_RECORD_STUB
SUB_TARGET_RECORD_STUB (name);
#endif
- }
+ }
rtl = gen_const_mem (Pmode, rtl);
set_mem_alias_set (rtl, ix86_GOT_alias_set ());
@@ -11998,7 +11998,7 @@ legitimize_dllimport_symbol (rtx symbol, bool want_reg)
return x;
}
-/* Expand SYMBOL into its corresponding dllimport or refptr symbol. WANT_REG
+/* Expand SYMBOL into its corresponding dllimport or refptr symbol. WANT_REG
is true if we require the result be a register. */
rtx
@@ -12246,7 +12246,7 @@ ix86_legitimize_address (rtx x, rtx, machine_mode mode)
return x;
}
-\f
+
/* Print an integer constant expression in assembler syntax. Addition
and subtraction are the only arithmetic that may appear in these
expressions. FILE is the stdio stream to write to, X is the rtx, and
@@ -12718,7 +12718,7 @@ ix86_const_not_ok_for_debug_p (rtx x)
return false;
}
-\f
+
static void
put_condition_code (enum rtx_code code, machine_mode mode, bool reverse,
bool fp, FILE *file)
@@ -13161,7 +13161,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
case 2:
putc ('w', file);
break;
-
+
case 4:
putc ('l', file);
break;
@@ -13869,7 +13869,7 @@ ix86_print_operand_punct_valid_p (unsigned char code)
return (code == '*' || code == '+' || code == '&' || code == ';'
|| code == '~' || code == '^' || code == '!');
}
-\f
+
/* Print a memory operand whose address is ADDR. */
static void
@@ -14174,8 +14174,8 @@ i386_asm_output_addr_const_extra (FILE *file, rtx x)
return true;
}
-\f
-\f
+
+
/* Output code to perform a 387 binary operation in INSN, one of PLUS,
MINUS, MULT or DIV. OPERANDS are the insn operands, where operands[3]
is the expression of the binary operation. The output may either be
@@ -15004,7 +15004,7 @@ ix86_output_addr_diff_elt (FILE *file, int value, int rel)
asm_fprintf (file, ASM_LONG "%U%s+[.-%s%d]\n",
GOT_SYMBOL_NAME, LPREFIX, value);
}
-\f
+
#define LEA_MAX_STALL (3)
#define LEA_SEARCH_THRESHOLD (LEA_MAX_STALL << 1)
@@ -16593,7 +16593,7 @@ ix86_output_call_insn (rtx_insn *insn, rtx call_op)
seh_nop_p = true;
break;
}
-
+
/* If we get to another real insn, we don't need the nop. */
if (INSN_P (i))
break;
@@ -16659,7 +16659,7 @@ ix86_output_call_insn (rtx_insn *insn, rtx call_op)
return "";
}
-\f
+
/* Return a MEM corresponding to a stack slot with mode MODE.
Allocate a new slot if necessary.
@@ -16696,7 +16696,7 @@ ix86_instantiate_decls (void)
if (s->rtl != NULL_RTX)
instantiate_decl_rtl (s->rtl);
}
-\f
+
/* Check whether x86 address PARTS is a pc-relative address. */
bool
@@ -16993,7 +16993,7 @@ ix86_attr_length_vex_default (rtx_insn *insn, bool has_0f_opcode,
return has_mem ? 2 + 1 : reg_only;
}
-\f
+
static bool
ix86_class_likely_spilled_p (reg_class_t);
@@ -17168,7 +17168,7 @@ ix86_dependencies_evaluation_hook (rtx_insn *head, rtx_insn *tail)
using topological ordering in the region. */
if (rgn == CONTAINING_RGN (e->src->index)
&& BLOCK_TO_BB (bb->index) > BLOCK_TO_BB (e->src->index))
- add_dependee_for_func_arg (first_arg, e->src);
+ add_dependee_for_func_arg (first_arg, e->src);
}
}
insn = first_arg;
@@ -17245,7 +17245,7 @@ ix86_sched_init_global (FILE *, int, int)
}
}
-\f
+
/* Implement TARGET_STATIC_RTX_ALIGNMENT. */
static HOST_WIDE_INT
@@ -17542,7 +17542,7 @@ ix86_local_alignment (tree exp, machine_mode mode,
other unit cannot rely on the alignment.
Exclude va_list type. It is the common case of local array where
- we cannot benefit from the alignment.
+ we cannot benefit from the alignment.
TODO: Probably one should optimize for size only when var is not escaping. */
if (TARGET_64BIT && optimize_function_for_speed_p (cfun)
@@ -17633,7 +17633,7 @@ ix86_minimum_alignment (tree exp, machine_mode mode,
return align;
}
-\f
+
/* Find a location for the static chain incoming to a nested function.
This is a register, unless all free registers are used by arguments. */
@@ -17877,7 +17877,7 @@ ix86_warn_func_return (tree decl)
return sequence, so suppress warnings about this. */
return !ix86_function_naked (decl);
}
-\f
+
/* Return the shift count of a vector by scalar shift builtin second argument
ARG1. */
static tree
@@ -19153,7 +19153,7 @@ use_rsqrt_p (machine_mode mode)
&& !flag_trapping_math
&& flag_unsafe_math_optimizations);
}
-\f
+
/* Helper for avx_vpermilps256_operand et al. This is also used by
the expansion functions to turn the parallel back into a mask.
The return value is 0 for no match and the imm8+1 for a match. */
@@ -19306,7 +19306,7 @@ avx_vperm2f128_parallel (rtx par, machine_mode mode)
/* Make sure success has a non-zero value by adding one. */
return mask + 1;
}
-\f
+
/* Return a register priority for hard reg REGNO. */
static int
ix86_register_priority (int hard_regno)
@@ -22413,7 +22413,7 @@ x86_emit_floatuns (rtx operands[2])
emit_label (donelab);
}
-\f
+
/* Target hook for scalar_mode_supported_p. */
static bool
ix86_scalar_mode_supported_p (scalar_mode mode)
@@ -22855,7 +22855,7 @@ asm_preferred_eh_data_format (int code, int global)
return DW_EH_PE_absptr;
}
-\f
+
/* Implement targetm.vectorize.builtin_vectorization_cost. */
static int
ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
@@ -22971,7 +22971,7 @@ ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
}
}
-\f
+
/* This function returns the calling abi specific va_list type node.
It returns the FNDECL specific va_list type. */
@@ -23260,7 +23260,7 @@ ix86_get_mask_mode (machine_mode data_mode)
return mode_for_vector (elem_mode, nunits);
}
-\f
+
/* Return class of registers which could be used for pseudo of MODE
and of class RCLASS for spilling instead of memory. Return NO_REGS
@@ -24034,7 +24034,7 @@ extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset)
gcc_assert (MEM_P (mem));
addr = XEXP (mem, 0);
-
+
if (GET_CODE (addr) == CONST)
addr = XEXP (addr, 0);
@@ -25220,5 +25220,5 @@ static bool ix86_libc_has_fast_function (int fcode ATTRIBUTE_UNUSED)
#endif /* #if CHECKING_P */
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
#include "gt-i386.h"
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index e6a603ed31a..13bf7d6d6ed 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -521,7 +521,7 @@ extern GTY(()) tree x86_mfence;
#define TARGET_SUBTARGET64_ISA_DEFAULT \
(OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2)
-/* Replace MACH-O, ifdefs by in-line tests, where possible.
+/* Replace MACH-O, ifdefs by in-line tests, where possible.
(a) Macros defined in config/i386/darwin.h */
#define TARGET_MACHO 0
#define TARGET_MACHO_SYMBOL_STUBS 0
@@ -608,7 +608,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
%{mtune=native:%>mtune=native %:local_cpu_detect(tune " ARCH_ARG ")}"
#endif
#endif
-\f
+
/* Target CPU builtins. */
#define TARGET_CPU_CPP_BUILTINS() ix86_target_macros ()
@@ -636,7 +636,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define EXTRA_SPECS \
{ "cc1_cpu", CC1_CPU_SPEC }, \
SUBTARGET_EXTRA_SPECS
-\f
+
/* Whether to allow x87 floating-point arithmetic on MODE (one of
SFmode, DFmode and XFmode) in the current excess precision
@@ -876,7 +876,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
and give entire struct the alignment of an int. */
/* Required on the 386 since it doesn't have bit-field insns. */
#define PCC_BITFIELD_TYPE_MATTERS 1
-\f
+
/* Standard register usage. */
/* This processor has special stack-like registers. See reg-stack.cc
@@ -1225,7 +1225,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define MS_AGGREGATE_RETURN 0
#define KEEP_AGGREGATE_RETURN_POINTER 0
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -1468,7 +1468,7 @@ enum reg_class
#define INDEX_REG_CLASS INDEX_REGS
#define BASE_REG_CLASS GENERAL_REGS
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -1486,11 +1486,11 @@ enum reg_class
/* If defined, the maximum amount of space required for outgoing arguments
will be computed and placed into the variable `crtl->outgoing_args_size'.
No space will be pushed onto the stack for each call; instead, the
- function prologue should increase the stack frame size by this amount.
+ function prologue should increase the stack frame size by this amount.
In 32bit mode enabling argument accumulation results in about 5% code size
growth because move instructions are less compact than push. In 64bit
- mode the difference is less drastic but visible.
+ mode the difference is less drastic but visible.
FIXME: Unlike earlier implementations, the size of unwind info seems to
actually grow with accumulation. Is that because accumulated args
@@ -1635,7 +1635,7 @@ typedef struct ix86_args {
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 28 : 14)
-\f
+
/* Definitions for register eliminations.
This is an array of structures. Each structure initializes one pair
@@ -1660,7 +1660,7 @@ typedef struct ix86_args {
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO)))
-\f
+
/* Addressing modes, and classification of registers for them. */
/* Macros to check register numbers against specific register classes. */
@@ -1761,7 +1761,7 @@ typedef struct ix86_args {
(GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == LABEL_REF \
|| (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
-\f
+
/* Max number of args passed in registers. If this is more than 3, we will
have problems with ebx (register #4), since it is a caller save register and
is also used as the pic register in ELF. So for now, don't allow more than
@@ -1795,7 +1795,7 @@ typedef struct ix86_args {
#define X86_32_MMX_REGPARM_MAX (TARGET_MMX ? (TARGET_MACHO ? 0 : 3) : 0)
#define MMX_REGPARM_MAX (TARGET_64BIT ? 0 : X86_32_MMX_REGPARM_MAX)
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE \
@@ -1912,7 +1912,7 @@ do { \
is a byte address (for indexing purposes)
so give the MEM rtx a byte's mode. */
#define FUNCTION_MODE QImode
-\f
+
/* A C expression for the cost of a branch instruction. A value of 1
is the default; other values are interpreted relative to that. */
@@ -1947,7 +1947,7 @@ do { \
faster than one with a register address. */
#define NO_FUNCTION_CSE 1
-\f
+
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
return the mode to be used for the comparison.
@@ -1968,7 +1968,7 @@ do { \
comparison done in CC_MODE mode. */
#define REVERSE_CONDITION(CODE, MODE) ix86_reverse_condition ((CODE), (MODE))
-\f
+
/* Control the assembler format that we output, to the extent
this does not vary between assemblers. */
@@ -2206,9 +2206,9 @@ extern int const svr4_debugger_register_map[FIRST_PSEUDO_REGISTER];
/* Default threshold for putting data in large sections
with x86-64 medium memory model */
#define DEFAULT_LARGE_SECTION_THRESHOLD 65536
-\f
+
/* Which processor to tune code generation for. These must be in sync
- with processor_target_table in i386.cc. */
+ with processor_target_table in i386.cc. */
enum processor_type
{
@@ -2418,7 +2418,7 @@ enum ix86_fpcmp_strategy {
IX86_FPCMP_COMI,
IX86_FPCMP_ARITH
};
-\f
+
/* To properly truncate FP values into integers, we need to set i387 control
word. We can't emit proper mode switching code before reload, as spills
generated by reload may truncate values incorrectly, but we still can avoid
@@ -2489,7 +2489,7 @@ enum avx_u128_state
{ X86_DIRFLAG_ANY, AVX_U128_ANY, \
I387_CW_ANY, I387_CW_ANY, I387_CW_ANY, I387_CW_ANY }
-\f
+
/* Avoid renaming of stack registers, as doing so in combination with
scheduling just increases amount of live registers at time and in
the turn amount of fxch instructions needed.
@@ -2502,9 +2502,9 @@ enum avx_u128_state
(!STACK_REGNO_P (SRC) \
&& EXT_REX_SSE_REGNO_P (SRC) == EXT_REX_SSE_REGNO_P (TARGET))
-\f
+
#define FASTCALL_PREFIX '@'
-\f
+
#ifndef USED_FOR_TARGET
/* Structure describing stack frame layout.
Stack grows downward:
diff --git a/gcc/config/i386/openbsdelf.h b/gcc/config/i386/openbsdelf.h
index fc6597c8f75..35e2be757d3 100644
--- a/gcc/config/i386/openbsdelf.h
+++ b/gcc/config/i386/openbsdelf.h
@@ -1,5 +1,5 @@
/* Configuration for an OpenBSD i386 target.
-
+
Copyright (C) 2005-2022 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h
index 47fd9b8a2c6..dc1d0b3cb7a 100644
--- a/gcc/config/i386/smmintrin.h
+++ b/gcc/config/i386/smmintrin.h
@@ -385,7 +385,7 @@ _mm_extract_ps (__m128 __X, const int __N)
by index N. */
#define _MM_EXTRACT_FLOAT(D, S, N) \
{ (D) = __builtin_ia32_vec_ext_v4sf ((__v4sf)(S), (N)); }
-
+
/* Extract specified single precision float element into the lower
part of __m128. */
#define _MM_PICK_OUT_PS(X, N) \
diff --git a/gcc/config/i386/sol2.h b/gcc/config/i386/sol2.h
index cd754f3dd0a..3ccea5335c9 100644
--- a/gcc/config/i386/sol2.h
+++ b/gcc/config/i386/sol2.h
@@ -80,7 +80,7 @@ along with GCC; see the file COPYING3. If not see
#define ASM_CPU_SPEC "%(asm_cpu_default) " ASM_XBRACE_COMMENT_SPEC
/* Don't include ASM_PIC_SPEC. While the Solaris 10+ assembler accepts -K PIC,
- it gives many warnings:
+ it gives many warnings:
Absolute relocation is used for symbol "<symbol>"
GNU as doesn't recognize -K at all. */
#undef ASM_SPEC
diff --git a/gcc/config/i386/unix.h b/gcc/config/i386/unix.h
index 582d65b2039..dd82eafc714 100644
--- a/gcc/config/i386/unix.h
+++ b/gcc/config/i386/unix.h
@@ -31,7 +31,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
some don't. This macro controls what to do: by default, don't
print %cl. */
#define SHIFT_DOUBLE_OMITS_COUNT 1
-\f
+
/* Define the syntax of pseudo-ops, labels and comments. */
/* String containing the assembler's comment-starter.
diff --git a/gcc/config/i386/winnt-cxx.cc b/gcc/config/i386/winnt-cxx.cc
index 788c85c8097..63e477d776e 100644
--- a/gcc/config/i386/winnt-cxx.cc
+++ b/gcc/config/i386/winnt-cxx.cc
@@ -30,7 +30,7 @@ along with GCC; see the file COPYING3. If not see
bool
i386_pe_type_dllimport_p (tree decl)
{
- gcc_assert (TREE_CODE (decl) == VAR_DECL
+ gcc_assert (TREE_CODE (decl) == VAR_DECL
|| TREE_CODE (decl) == FUNCTION_DECL);
if (TARGET_NOP_FUN_DLLIMPORT && TREE_CODE (decl) == FUNCTION_DECL)
@@ -45,8 +45,8 @@ i386_pe_type_dllimport_p (tree decl)
|| DECL_TEMPLATE_INSTANTIATION (decl)
|| DECL_ARTIFICIAL (decl)))
return false;
-
- /* Overrides of the class dllimport decls by out-of-class definitions are
+
+ /* Overrides of the class dllimport decls by out-of-class definitions are
handled by tree.cc:merge_dllimport_decl_attributes. */
return true;
}
@@ -54,7 +54,7 @@ i386_pe_type_dllimport_p (tree decl)
bool
i386_pe_type_dllexport_p (tree decl)
{
- gcc_assert (TREE_CODE (decl) == VAR_DECL
+ gcc_assert (TREE_CODE (decl) == VAR_DECL
|| TREE_CODE (decl) == FUNCTION_DECL);
/* Avoid exporting compiler-generated default dtors and copy ctors.
@@ -73,16 +73,16 @@ i386_pe_type_dllexport_p (tree decl)
return true;
}
-static inline void maybe_add_dllimport (tree decl)
+static inline void maybe_add_dllimport (tree decl)
{
if (i386_pe_type_dllimport_p (decl))
DECL_DLLIMPORT_P (decl) = 1;
}
-static inline void maybe_add_dllexport (tree decl)
+static inline void maybe_add_dllexport (tree decl)
{
if (i386_pe_type_dllexport_p (decl))
- {
+ {
tree decl_attrs = DECL_ATTRIBUTES (decl);
if (lookup_attribute ("dllexport", decl_attrs) != NULL_TREE)
/* Already done. */
@@ -98,8 +98,8 @@ i386_pe_adjust_class_at_definition (tree t)
tree member;
gcc_assert (CLASS_TYPE_P (t));
-
-
+
+
if (lookup_attribute ("dllexport", TYPE_ATTRIBUTES (t)) != NULL_TREE)
{
tree tmv = TYPE_MAIN_VARIANT (t);
@@ -118,13 +118,13 @@ i386_pe_adjust_class_at_definition (tree t)
/* Check FUNCTION_DECL's and static VAR_DECL's. */
for (member = TYPE_FIELDS (t); member; member = DECL_CHAIN (member))
- if (TREE_CODE (member) == VAR_DECL)
+ if (TREE_CODE (member) == VAR_DECL)
maybe_add_dllexport (member);
else if (TREE_CODE (member) == FUNCTION_DECL)
{
tree thunk;
maybe_add_dllexport (member);
-
+
/* Also add the attribute to its thunks. */
for (thunk = DECL_THUNKS (member); thunk;
thunk = TREE_CHAIN (thunk))
@@ -134,7 +134,7 @@ i386_pe_adjust_class_at_definition (tree t)
/* Check vtables */
for (member = CLASSTYPE_VTABLES (t);
member; member = DECL_CHAIN (member))
- if (TREE_CODE (member) == VAR_DECL)
+ if (TREE_CODE (member) == VAR_DECL)
maybe_add_dllexport (member);
}
@@ -150,28 +150,28 @@ i386_pe_adjust_class_at_definition (tree t)
/* Check FUNCTION_DECL's and static VAR_DECL's. */
for (member = TYPE_FIELDS (t); member; member = DECL_CHAIN (member))
- if (TREE_CODE (member) == VAR_DECL)
+ if (TREE_CODE (member) == VAR_DECL)
maybe_add_dllimport (member);
else if (TREE_CODE (member) == FUNCTION_DECL)
{
tree thunk;
maybe_add_dllimport (member);
-
+
/* Also add the attribute to its thunks. */
for (thunk = DECL_THUNKS (member); thunk;
thunk = DECL_CHAIN (thunk))
maybe_add_dllimport (thunk);
}
-
+
/* Check vtables */
for (member = CLASSTYPE_VTABLES (t);
member; member = DECL_CHAIN (member))
- if (TREE_CODE (member) == VAR_DECL)
+ if (TREE_CODE (member) == VAR_DECL)
maybe_add_dllimport (member);
/* We leave typeinfo tables alone. We can't mark TI objects as
dllimport, since the address of a secondary VTT may be needed
for static initialization of a primary VTT. VTT's of
- dllimport'd classes should always be link-once COMDAT. */
+ dllimport'd classes should always be link-once COMDAT. */
}
}
diff --git a/gcc/config/i386/winnt.cc b/gcc/config/i386/winnt.cc
index cd71369c0f8..291dd4b3d2b 100644
--- a/gcc/config/i386/winnt.cc
+++ b/gcc/config/i386/winnt.cc
@@ -94,7 +94,7 @@ ix86_handle_selectany_attribute (tree *node, tree name, tree, int,
return NULL_TREE;
}
-\f
+
/* Return the type that we should use to determine if DECL is
imported or exported. */
@@ -120,7 +120,7 @@ i386_pe_determine_dllexport_p (tree decl)
if (TREE_CODE (decl) == FUNCTION_DECL
&& DECL_DECLARED_INLINE_P (decl)
&& !flag_keep_inline_dllexport)
- return false;
+ return false;
if (lookup_attribute ("dllexport", DECL_ATTRIBUTES (decl)))
return true;
@@ -185,11 +185,11 @@ gen_stdcall_or_fastcall_suffix (tree decl, tree id, bool fastcall)
tree arg;
function_args_iterator args_iter;
- gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
+ gcc_assert (TREE_CODE (decl) == FUNCTION_DECL);
if (prototype_p (type))
{
- /* This attribute is ignored for variadic functions. */
+ /* This attribute is ignored for variadic functions. */
if (stdarg_p (type))
return NULL_TREE;
@@ -233,7 +233,7 @@ i386_pe_maybe_mangle_decl_assembler_name (tree decl, tree id)
tree new_id = NULL_TREE;
if (TREE_CODE (decl) == FUNCTION_DECL)
- {
+ {
unsigned int ccvt = ix86_get_callcvt (TREE_TYPE (decl));
if ((ccvt & IX86_CALLCVT_STDCALL) != 0)
{
@@ -273,7 +273,7 @@ i386_pe_assemble_visibility (tree decl, int)
tree
i386_pe_mangle_decl_assembler_name (tree decl, tree id)
{
- tree new_id = i386_pe_maybe_mangle_decl_assembler_name (decl, id);
+ tree new_id = i386_pe_maybe_mangle_decl_assembler_name (decl, id);
return (new_id ? new_id : id);
}
@@ -327,7 +327,7 @@ i386_pe_encode_section_info (tree decl, rtx rtl, int first)
flags |= SYMBOL_FLAG_DLLEXPORT;
else if (i386_pe_determine_dllimport_p (decl))
flags |= SYMBOL_FLAG_DLLIMPORT;
-
+
SYMBOL_REF_FLAGS (symbol) = flags;
}
@@ -359,7 +359,7 @@ i386_pe_binds_local_p (const_tree exp)
&& DECL_DECLARED_INLINE_P (exp))
return false;
#endif
-
+
return default_binds_local_p_1 (exp, 0);
}
@@ -471,7 +471,7 @@ i386_pe_section_type_flags (tree decl, const char *, int reloc)
}
void
-i386_pe_asm_named_section (const char *name, unsigned int flags,
+i386_pe_asm_named_section (const char *name, unsigned int flags,
tree decl)
{
char flagchars[8], *f = flagchars;
@@ -487,7 +487,7 @@ i386_pe_asm_named_section (const char *name, unsigned int flags,
*f++ ='d'; /* This is necessary for older versions of gas. */
*f++ ='r';
}
- else
+ else
{
if (flags & SECTION_CODE)
*f++ = 'x';
@@ -519,7 +519,7 @@ i386_pe_asm_named_section (const char *name, unsigned int flags,
Instead, have the linker pick one, without warning.
If 'selectany' attribute has been specified, MS compiler
sets 'discard' characteristic, rather than telling linker
- to warn of size or content mismatch, so do the same. */
+ to warn of size or content mismatch, so do the same. */
bool discard = (flags & SECTION_CODE)
|| (TREE_CODE (decl) != IDENTIFIER_NODE
&& lookup_attribute ("selectany",
@@ -547,7 +547,7 @@ i386_pe_asm_output_aligned_decl_common (FILE *stream, tree decl,
rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
* (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
-
+
i386_pe_maybe_record_exported_symbol (decl, name, 1);
fprintf (stream, "\t.comm\t");
@@ -560,7 +560,7 @@ i386_pe_asm_output_aligned_decl_common (FILE *stream, tree decl,
fprintf (stream, ", " HOST_WIDE_INT_PRINT_DEC "\t" ASM_COMMENT_START
" " HOST_WIDE_INT_PRINT_DEC "\n", rounded, size);
}
-\f
+
/* The Microsoft linker requires that every function be marked as
DT_FCN. When using gas on cygwin, we must emit appropriate .type
directives. */
@@ -824,7 +824,7 @@ i386_pe_asm_lto_end (void)
debug_info_level = saved_debug_info_level;
}
-\f
+
/* x64 Structured Exception Handling unwind info. */
struct seh_frame_state
@@ -1350,7 +1350,7 @@ i386_pe_seh_init_sections (void)
exception_section = get_unnamed_section (0, output_section_asm_op,
"\t.seh_handlerdata");
}
-\f
+
void
i386_pe_start_function (FILE *f, const char *name, tree decl)
{
@@ -1367,7 +1367,7 @@ i386_pe_end_function (FILE *f, const char *, tree)
{
i386_pe_seh_fini (f, false);
}
-\f
+
void
i386_pe_end_cold_function (FILE *f, const char *, tree)
{
diff --git a/gcc/config/i386/wmmintrin.h b/gcc/config/i386/wmmintrin.h
index 9e987b3ec51..220fb97ef78 100644
--- a/gcc/config/i386/wmmintrin.h
+++ b/gcc/config/i386/wmmintrin.h
@@ -38,7 +38,7 @@
#define __DISABLE_AES__
#endif /* __AES__ */
-/* Performs 1 round of AES decryption of the first m128i using
+/* Performs 1 round of AES decryption of the first m128i using
the second m128i as a round key. */
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_aesdec_si128 (__m128i __X, __m128i __Y)
@@ -46,7 +46,7 @@ _mm_aesdec_si128 (__m128i __X, __m128i __Y)
return (__m128i) __builtin_ia32_aesdec128 ((__v2di)__X, (__v2di)__Y);
}
-/* Performs the last round of AES decryption of the first m128i
+/* Performs the last round of AES decryption of the first m128i
using the second m128i as a round key. */
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_aesdeclast_si128 (__m128i __X, __m128i __Y)
@@ -55,7 +55,7 @@ _mm_aesdeclast_si128 (__m128i __X, __m128i __Y)
(__v2di)__Y);
}
-/* Performs 1 round of AES encryption of the first m128i using
+/* Performs 1 round of AES encryption of the first m128i using
the second m128i as a round key. */
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_aesenc_si128 (__m128i __X, __m128i __Y)
@@ -71,7 +71,7 @@ _mm_aesenclast_si128 (__m128i __X, __m128i __Y)
return (__m128i) __builtin_ia32_aesenclast128 ((__v2di)__X, (__v2di)__Y);
}
-/* Performs the InverseMixColumn operation on the source m128i
+/* Performs the InverseMixColumn operation on the source m128i
and stores the result into m128i destination. */
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_aesimc_si128 (__m128i __X)
diff --git a/gcc/config/ia64/freebsd.h b/gcc/config/ia64/freebsd.h
index e3ab57e28ce..17c6c98850e 100644
--- a/gcc/config/ia64/freebsd.h
+++ b/gcc/config/ia64/freebsd.h
@@ -36,7 +36,7 @@ along with GCC; see the file COPYING3. If not see
/************************[ Target stuff ]***********************************/
-/* Define the actual types of some ANSI-mandated types.
+/* Define the actual types of some ANSI-mandated types.
Needs to agree with <machine/ansi.h>. GCC defaults come from c-decl.cc,
c-common.cc, and config/<arch>/<arch>.h. */
diff --git a/gcc/config/ia64/ia64.cc b/gcc/config/ia64/ia64.cc
index 6df1ce736bc..70605909b46 100644
--- a/gcc/config/ia64/ia64.cc
+++ b/gcc/config/ia64/ia64.cc
@@ -157,7 +157,7 @@ struct ia64_frame_info
static struct ia64_frame_info current_frame_info;
/* The actual registers that are emitted. */
static int emitted_frame_related_regs[number_of_ia64_frame_regs];
-\f
+
static int ia64_first_cycle_multipass_dfa_lookahead (void);
static void ia64_dependencies_evaluation_hook (rtx_insn *, rtx_insn *);
static void ia64_init_dfa_pre_cycle_insn (void);
@@ -350,12 +350,12 @@ struct expand_vec_perm_d
machine_mode vmode;
unsigned char nelt;
bool one_operand_p;
- bool testing_p;
+ bool testing_p;
};
static bool ia64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d);
-\f
+
/* Table of valid machine attributes. */
static const struct attribute_spec ia64_attribute_table[] =
{
@@ -676,7 +676,7 @@ static const struct attribute_spec ia64_attribute_table[] =
#define TARGET_CONSTANT_ALIGNMENT constant_alignment_word_strings
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Returns TRUE iff the target attribute indicated by ATTR_ID takes a plain
identifier as an argument, so the front end shouldn't look it up. */
@@ -804,7 +804,7 @@ ia64_vms_common_object_attribute (tree *node, tree name, tree args,
tree id;
gcc_assert (DECL_P (decl));
-
+
DECL_COMMON (decl) = 1;
id = TREE_VALUE (args);
if (TREE_CODE (id) != IDENTIFIER_NODE && TREE_CODE (id) != STRING_CST)
@@ -879,7 +879,7 @@ ia64_encode_section_info (tree decl, rtx rtl, int first)
&& (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
ia64_encode_addr_area (decl, XEXP (rtl, 0));
}
-\f
+
/* Return 1 if the operands of a move are ok. */
int
@@ -1031,7 +1031,7 @@ ia64_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
return true;
else if ((GET_CODE (x) == POST_INC || GET_CODE (x) == POST_DEC)
&& ia64_legitimate_address_reg (XEXP (x, 0), strict)
- && XEXP (x, 0) != arg_pointer_rtx)
+ && XEXP (x, 0) != arg_pointer_rtx)
return true;
else if (GET_CODE (x) == POST_MODIFY
&& ia64_legitimate_address_reg (XEXP (x, 0), strict)
@@ -1345,7 +1345,7 @@ ia64_expand_move (rtx op0, rtx op1)
else if (aligned_offset_symbol_operand (sym, mode))
{
HOST_WIDE_INT addend_lo, addend_hi;
-
+
addend_lo = ((addend & 0x3fff) ^ 0x2000) - 0x2000;
addend_hi = addend - addend_lo;
@@ -1430,7 +1430,7 @@ ia64_split_tmode (rtx out[2], rtx in, bool reversed, bool dead)
case CONST_DOUBLE:
/* Cannot occur reversed. */
gcc_assert (!reversed);
-
+
if (GET_MODE (in) != TFmode)
split_double (in, &out[0], &out[1]);
else
@@ -1485,7 +1485,7 @@ ia64_split_tmode (rtx out[2], rtx in, bool reversed, bool dead)
case POST_INC:
gcc_assert (!reversed && !dead);
-
+
/* Just do the increment in two steps. */
out[0] = adjust_automodify_address (in, DImode, 0, 0);
out[1] = adjust_automodify_address (in, DImode, 0, 8);
@@ -1493,7 +1493,7 @@ ia64_split_tmode (rtx out[2], rtx in, bool reversed, bool dead)
case POST_DEC:
gcc_assert (!reversed && !dead);
-
+
/* Add 8, subtract 24. */
base = XEXP (base, 0);
out[0] = adjust_automodify_address
@@ -1581,7 +1581,7 @@ ia64_split_tmode_move (rtx operands[])
the appropriate order so that the pointer is not destroyed too
early. Also we must not generate a postmodify for that second
load, or rws_access_regno will die. And we must not generate a
- postmodify for the second load if the destination register
+ postmodify for the second load if the destination register
overlaps with the base register. */
if (GET_CODE (operands[1]) == MEM
&& reg_overlap_mentioned_p (operands[0], operands[1]))
@@ -1827,7 +1827,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
int magic;
enum rtx_code ncode;
rtx ret;
-
+
gcc_assert (cmptf_libfunc && GET_MODE (*op1) == TFmode);
switch (code)
{
@@ -2502,7 +2502,7 @@ ia64_expand_atomic_op (enum rtx_code code, rtx mem, rtx val,
emit_cmp_and_jump_insns (cmp_reg, old_reg, NE, NULL, DImode, true, label);
}
-\f
+
/* Begin the assembly file. */
static void
@@ -2851,7 +2851,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size)
if (df_regs_ever_live_p (AR_PFS_REGNUM))
{
SET_HARD_REG_BIT (mask, AR_PFS_REGNUM);
- current_frame_info.r[reg_save_ar_pfs]
+ current_frame_info.r[reg_save_ar_pfs]
= find_gr_spill (reg_save_ar_pfs, 1);
if (current_frame_info.r[reg_save_ar_pfs] == 0)
{
@@ -2866,8 +2866,8 @@ ia64_compute_frame_size (HOST_WIDE_INT size)
it is absolutely critical that FP get the only hard register that's
guaranteed to be free, so we allocated it first. If all three did
happen to be allocated hard regs, and are consecutive, rearrange them
- into the preferred order now.
-
+ into the preferred order now.
+
If we have already emitted code for any of those registers,
then it's already too late to change. */
min_regno = MIN (current_frame_info.r[reg_fp],
@@ -2921,7 +2921,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size)
{
df_set_regs_ever_live (AR_UNAT_REGNUM, true);
SET_HARD_REG_BIT (mask, AR_UNAT_REGNUM);
- current_frame_info.r[reg_save_ar_unat]
+ current_frame_info.r[reg_save_ar_unat]
= find_gr_spill (reg_save_ar_unat, spill_size == 0);
if (current_frame_info.r[reg_save_ar_unat] == 0)
{
@@ -2933,7 +2933,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size)
if (df_regs_ever_live_p (AR_LC_REGNUM))
{
SET_HARD_REG_BIT (mask, AR_LC_REGNUM);
- current_frame_info.r[reg_save_ar_lc]
+ current_frame_info.r[reg_save_ar_lc]
= find_gr_spill (reg_save_ar_lc, spill_size == 0);
if (current_frame_info.r[reg_save_ar_lc] == 0)
{
@@ -3520,7 +3520,7 @@ ia64_expand_prologue (void)
ia64_emit_probe_stack_range (get_stack_check_protect (), size, bs_size);
}
- if (dump_file)
+ if (dump_file)
{
fprintf (dump_file, "ia64 frame related registers "
"recorded in current_frame_info.r[]:\n");
@@ -4134,7 +4134,7 @@ ia64_expand_epilogue (int sibcall_p)
names of r2 and HARD_FRAME_POINTER_REGNUM, so we have to make
sure we're using the string "r2" when emitting the register
name for the assembler. */
- if (current_frame_info.r[reg_fp]
+ if (current_frame_info.r[reg_fp]
&& current_frame_info.r[reg_fp] == GR_REG (2))
fp = HARD_FRAME_POINTER_REGNUM;
@@ -4261,7 +4261,7 @@ ia64_hard_regno_rename_ok (int from, int to)
unsigned int r;
for (r = reg_fp; r <= reg_save_ar_lc; r++)
- if (to == current_frame_info.r[r]
+ if (to == current_frame_info.r[r]
|| from == current_frame_info.r[r]
|| to == emitted_frame_related_regs[r]
|| from == emitted_frame_related_regs[r])
@@ -4582,7 +4582,7 @@ ia64_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
/* The fourth word is the static chain. */
emit_move_insn (m_tramp, static_chain);
}
-\f
+
/* Do any needed setup for a variadic function. CUM has not been updated
for the last named argument, which is given by ARG.
@@ -4870,7 +4870,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, const function_arg_info &arg,
}
return gen_rtx_PARALLEL (arg.mode, gen_rtvec_v (i, loc));
}
-
+
/* Integral and aggregates go in general registers. If we have run out of
FR registers, then FP values must also go in general registers. This can
happen when we have a SFmode HFA. */
@@ -5136,7 +5136,7 @@ ia64_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
TARGET_CONST_GP is set to true. */
return (decl && (*targetm.binds_local_p) (decl)) || TARGET_CONST_GP;
}
-\f
+
/* Implement va_arg. */
@@ -5167,7 +5167,7 @@ ia64_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
return std_gimplify_va_arg_expr (valist, type, pre_p, post_p);
}
-\f
+
/* Return 1 if function return value returned in memory. Return 0 if it is
in a register. */
@@ -5220,7 +5220,7 @@ ia64_function_value (const_tree valtype,
if (fn_decl_or_type
&& !DECL_P (fn_decl_or_type))
func = NULL;
-
+
mode = TYPE_MODE (valtype);
hfa_mode = hfa_element_mode (valtype, 0);
@@ -5669,7 +5669,7 @@ ia64_print_operand_punct_valid_p (unsigned char code)
{
return (code == '+' || code == ',');
}
-\f
+
/* Compute a (partial) cost for rtx X. Return true if the complete
cost has been computed, and false if subexpressions should be
scanned. In either case, *TOTAL contains the cost result. */
@@ -5866,7 +5866,7 @@ ia64_preferred_reload_class (rtx x, reg_class_t rclass)
of the f/f case when reloading (set (reg fX) (mem/v)). */
if (MEM_P (x) && MEM_VOLATILE_P (x))
return NO_REGS;
-
+
/* Force all unrecognized constants into the constant pool. */
if (CONSTANT_P (x))
return NO_REGS;
@@ -5978,7 +5978,7 @@ ia64_secondary_reload_class (enum reg_class rclass,
return NO_REGS;
}
-\f
+
/* Implement targetm.unspec_may_trap_p hook. */
static int
ia64_unspec_may_trap_p (const_rtx x, unsigned flags)
@@ -5998,7 +5998,7 @@ ia64_unspec_may_trap_p (const_rtx x, unsigned flags)
return default_unspec_may_trap_p (x, flags);
}
-\f
+
/* Parse the -mfixed-range= option string. */
static void
@@ -6153,7 +6153,7 @@ ia64_init_machine_status (void)
{
return ggc_cleared_alloc<machine_function> ();
}
-\f
+
static enum attr_itanium_class ia64_safe_itanium_class (rtx_insn *);
static enum attr_type ia64_safe_type (rtx_insn *);
@@ -6176,7 +6176,7 @@ ia64_safe_type (rtx_insn *insn)
else
return TYPE_UNKNOWN;
}
-\f
+
/* The following collection of routines emit instruction group stop bits as
necessary to avoid dependencies. */
@@ -6476,7 +6476,7 @@ update_set_flags (rtx x, struct reg_flags *pflags)
doloop_end_internal,
(3) The destination is an fp register, in which case this is
an fselect instruction.
- (4) The condition has (unspec [(reg)] UNSPEC_LDC), in which case
+ (4) The condition has (unspec [(reg)] UNSPEC_LDC), in which case
this is a check load.
In all cases, nothing we do in this function applies. */
return;
@@ -6528,12 +6528,12 @@ set_src_needs_barrier (rtx x, struct reg_flags flags, int pred)
}
if (ia64_spec_check_src_p (src))
- /* Avoid checking one register twice (in condition
+ /* Avoid checking one register twice (in condition
and in 'then' section) for ldc pattern. */
{
gcc_assert (REG_P (XEXP (src, 2)));
need_barrier = rtx_needs_barrier (XEXP (src, 2), flags, pred);
-
+
/* We process MEM below. */
src = XEXP (src, 1);
}
@@ -7154,7 +7154,7 @@ emit_all_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
}
}
-\f
+
/* Instruction scheduling support. */
@@ -7424,7 +7424,7 @@ static void
ia64_sched_init_global (FILE *dump ATTRIBUTE_UNUSED,
int sched_verbose ATTRIBUTE_UNUSED,
int max_ready ATTRIBUTE_UNUSED)
-{
+{
gcc_assert (pending_data_specs == 0);
}
@@ -7629,7 +7629,7 @@ ia64_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
if (reload_completed)
{
int needed = group_barrier_needed (insn);
-
+
gcc_assert (!needed);
if (CALL_P (insn))
init_insn_group_barriers ();
@@ -7763,14 +7763,14 @@ ia64_dfa_new_cycle (FILE *dump, int verbose, rtx_insn *insn, int last_clock,
static void
ia64_h_i_d_extended (void)
{
- if (stops_p != NULL)
+ if (stops_p != NULL)
{
int new_clocks_length = get_max_uid () * 3 / 2;
stops_p = (char *) xrecalloc (stops_p, new_clocks_length, clocks_length, 1);
clocks_length = new_clocks_length;
}
}
-\f
+
/* This structure describes the data used by the backend to guide scheduling.
When the current scheduling point is switched, this data should be saved
@@ -7850,7 +7850,7 @@ static void
ia64_clear_sched_context (void *_sc)
{
ia64_sched_context_t sc = (ia64_sched_context_t) _sc;
-
+
free (sc->prev_cycle_state);
sc->prev_cycle_state = NULL;
}
@@ -8029,13 +8029,13 @@ ia64_set_sched_flags (spec_info_t spec_info)
|| (mflag_sched_ar_in_data_spec && reload_completed)))
mask |= BE_IN_DATA;
}
-
+
if (mflag_sched_control_spec
&& (!sel_sched_p ()
|| reload_completed))
{
mask |= BEGIN_CONTROL;
-
+
if (!sel_sched_p () && mflag_sched_in_control_spec)
mask |= BE_IN_CONTROL;
}
@@ -8048,9 +8048,9 @@ ia64_set_sched_flags (spec_info_t spec_info)
if (mask & BE_IN_SPEC)
*flags |= NEW_BBS;
-
+
spec_info->flags = 0;
-
+
if ((mask & CONTROL_SPEC)
&& sel_sched_p () && mflag_sel_sched_dont_check_control_spec)
spec_info->flags |= SEL_SCHED_SPEC_DONT_CHECK_CONTROL;
@@ -8059,7 +8059,7 @@ ia64_set_sched_flags (spec_info_t spec_info)
spec_info->dump = sched_dump;
else
spec_info->dump = 0;
-
+
if (mflag_sched_count_spec_in_critical_path)
spec_info->flags |= COUNT_SPEC_IN_CRITICAL_PATH;
}
@@ -8306,10 +8306,10 @@ insn_can_be_in_speculative_p (rtx insn ATTRIBUTE_UNUSED,
return 0. */
static int
ia64_speculate_insn (rtx_insn *insn, ds_t ts, rtx *new_pat)
-{
+{
int mode_no;
int res;
-
+
gcc_assert (!(ts & ~SPECULATIVE));
if (ia64_spec_check_p (insn))
@@ -8496,12 +8496,12 @@ ia64_gen_spec_check (rtx_insn *insn, rtx_insn *label, ds_t ds)
gcc_assert (!ia64_needs_block_p (ds));
op1 = copy_rtx (recog_data.operand[1]);
}
-
+
gen_check = get_spec_check_gen_function (ds, mode_no, label == NULL_RTX,
true);
check_pat = gen_check (copy_rtx (recog_data.operand[0]), op1);
-
+
pat = PATTERN (insn);
if (GET_CODE (pat) == COND_EXEC)
check_pat = gen_rtx_COND_EXEC (VOIDmode, copy_rtx (COND_EXEC_TEST (pat)),
@@ -8533,14 +8533,14 @@ ia64_spec_check_src_p (rtx src)
t = XEXP (src, 0);
if (GET_CODE (t) == NE)
{
- t = XEXP (t, 0);
+ t = XEXP (t, 0);
if (GET_CODE (t) == UNSPEC)
{
int code;
-
+
code = XINT (t, 1);
-
+
if (code == UNSPEC_LDCCLR
|| code == UNSPEC_LDCNC
|| code == UNSPEC_CHKACLR
@@ -8555,7 +8555,7 @@ ia64_spec_check_src_p (rtx src)
}
return 0;
}
-\f
+
/* The following page contains abstract data `bundle states' which are
used for bundling insns (inserting nops and template generation). */
@@ -8758,7 +8758,7 @@ finish_bundle_state_table (void)
bundle_state_table = NULL;
}
-\f
+
/* The following variable is a insn `nop' used to check bundle states
with different number of inserted nops. */
@@ -9252,7 +9252,7 @@ bundling (FILE *dump, int verbose, rtx_insn *prev_head_insn, rtx_insn *tail)
INSN_UID (insn));
}
}
-
+
/* We should find a solution because the 2nd insn scheduling has
found one. */
gcc_assert (index_to_bundle_states [insn_num]);
@@ -9577,7 +9577,7 @@ final_emit_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
}
}
-\f
+
/* If the following function returns TRUE, we will use the DFA
insn scheduler. */
@@ -9632,7 +9632,7 @@ ia64_st_address_bypass_p (rtx_insn *producer, rtx_insn *consumer)
if (GET_CODE (reg) == SUBREG)
reg = SUBREG_REG (reg);
gcc_assert (GET_CODE (reg) == REG);
-
+
dest = ia64_single_set (consumer);
gcc_assert (dest);
mem = SET_DEST (dest);
@@ -9656,12 +9656,12 @@ ia64_ld_address_bypass_p (rtx_insn *producer, rtx_insn *consumer)
if (GET_CODE (reg) == SUBREG)
reg = SUBREG_REG (reg);
gcc_assert (GET_CODE (reg) == REG);
-
+
src = ia64_single_set (consumer);
gcc_assert (src);
mem = SET_SRC (src);
gcc_assert (mem);
-
+
if (GET_CODE (mem) == UNSPEC && XVECLEN (mem, 0) > 0)
mem = XVECEXP (mem, 0, 0);
else if (GET_CODE (mem) == IF_THEN_ELSE)
@@ -9670,7 +9670,7 @@ ia64_ld_address_bypass_p (rtx_insn *producer, rtx_insn *consumer)
gcc_assert (XINT (XEXP (XEXP (mem, 0), 0), 1) == UNSPEC_LDCCLR);
mem = XEXP (mem, 1);
}
-
+
while (GET_CODE (mem) == SUBREG || GET_CODE (mem) == ZERO_EXTEND)
mem = XEXP (mem, 0);
@@ -9699,7 +9699,7 @@ ia64_produce_address_p (rtx insn)
return insn->call;
}
-\f
+
/* Emit pseudo-ops for the assembler to describe predicate relations.
At present this assumes that we only consider predicate pairs to
be mutex, and that the assembler can deduce proper values from
@@ -9878,7 +9878,7 @@ ia64_reorg (void)
emit_all_insn_group_barriers (dump_file);
df_analyze ();
-
+
/* A call must not be the last instruction in a function, so that the
return address is still within the function, so that unwinding works
properly. Note that IA-64 differs from dwarf2 on this point. */
@@ -9921,7 +9921,7 @@ ia64_reorg (void)
}
df_finish_pass (false);
}
-\f
+
/* Return true if REGNO is used by the epilogue. */
int
@@ -9981,7 +9981,7 @@ ia64_eh_uses (int regno)
return 0;
}
-\f
+
/* Return true if this goes in small data/bss. */
/* ??? We could also support own long data here. Generating movl/add/ld8
@@ -10027,7 +10027,7 @@ ia64_in_small_data_p (const_tree exp)
return false;
}
-\f
+
/* Output assembly directives for prologue regions. */
/* The current basic block number. */
@@ -10078,9 +10078,9 @@ process_cfa_adjust_cfa (FILE *out_file, rtx pat, rtx insn,
{
rtx op0 = XEXP (src, 0);
rtx op1 = XEXP (src, 1);
-
+
gcc_assert (op0 == dest && GET_CODE (op1) == CONST_INT);
-
+
if (INTVAL (op1) < 0)
{
gcc_assert (!frame_pointer_needed);
@@ -10418,7 +10418,7 @@ ia64_debug_unwind_info (void)
{
return UI_TARGET;
}
-\f
+
enum ia64_builtins
{
IA64_BUILTIN_BSP,
@@ -10838,7 +10838,7 @@ ia64_vms_valid_pointer_mode (scalar_int_mode mode)
{
return (mode == SImode || mode == DImode);
}
-\f
+
/* For HPUX, it is illegal to have relocations in shared segments. */
static int
@@ -10908,7 +10908,7 @@ ia64_struct_retval_addr_is_first_parm_p (tree fntype)
these return values. */
return (abi_version_at_least (2)
&& ret_type
- && TYPE_MODE (ret_type) == BLKmode
+ && TYPE_MODE (ret_type) == BLKmode
&& TREE_ADDRESSABLE (ret_type)
&& lang_GNU_CXX ());
}
@@ -11374,7 +11374,7 @@ ia64_hpux_function_section (tree decl ATTRIBUTE_UNUSED,
{
return NULL;
}
-\f
+
/* Construct (set target (vec_select op0 (parallel perm))) and
return true if that's a valid instruction in the active ISA. */
@@ -11486,7 +11486,7 @@ expand_vec_perm_shrp (struct expand_vec_perm_d *d)
static bool
expand_vec_perm_1 (struct expand_vec_perm_d *d)
-{
+{
unsigned i, nelt = d->nelt;
unsigned char perm2[MAX_VECT_LEN];
@@ -11523,8 +11523,8 @@ expand_vec_perm_1 (struct expand_vec_perm_d *d)
if (expand_vec_perm_shrp (d))
return true;
- /* ??? Look for deposit-like permutations where most of the result
- comes from one vector unchanged and the rest comes from a
+ /* ??? Look for deposit-like permutations where most of the result
+ comes from one vector unchanged and the rest comes from a
sequential hunk of the other vector. */
return false;
@@ -11611,7 +11611,7 @@ expand_vec_perm_interleave_2 (struct expand_vec_perm_d *d)
h1 = h0 << nelt2;
h2 = h0 << nelt;
h3 = h0 << (nelt + nelt2);
-
+
if ((contents & (h0 | h2)) == contents) /* punpck even halves */
{
for (i = 0; i < nelt; ++i)
@@ -11876,7 +11876,7 @@ ia64_expand_vec_setv2sf (rtx operands[3])
struct expand_vec_perm_d d;
unsigned int which;
bool ok;
-
+
d.target = operands[0];
d.op0 = operands[0];
d.op1 = gen_reg_rtx (V2SFmode);
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index b7415c53596..91041f00d64 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -25,7 +25,7 @@ along with GCC; see the file COPYING3. If not see
/* ??? Functions containing a non-local goto target save many registers. Why?
See for instance execute/920428-2.c. */
-\f
+
/* Run-time target specifications */
/* Target CPU builtins. */
@@ -104,7 +104,7 @@ enum ia64_inline_type
#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT 0
#endif
-\f
+
/* Driver configuration */
/* A C string constant that tells the GCC driver program options to pass to
@@ -119,7 +119,7 @@ enum ia64_inline_type
into options for GCC to pass to the `cc1plus'. */
/* #define CC1PLUS_SPEC "" */
-\f
+
/* Storage Layout */
/* Define this macro to have the value 1 if the most significant bit in a byte
@@ -225,7 +225,7 @@ while (0)
/* Due to the above, we need extra padding for the data entries below 0
to retain the alignment of the descriptors. */
#define TARGET_VTABLE_DATA_ENTRY_DISTANCE (TARGET_ILP32 ? 2 : 1)
-\f
+
/* Layout of Source Language Data Types */
#define INT_TYPE_SIZE 32
@@ -272,7 +272,7 @@ while (0)
This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
/* #define WCHAR_TYPE_SIZE */
-\f
+
/* Register Basics */
/* Number of hardware registers known to the compiler.
@@ -436,7 +436,7 @@ while (0)
/* We define CCImode in ia64-modes.def so we need a selector. */
#define SELECT_CC_MODE(OP,X,Y) CCmode
-\f
+
/* Order of allocation of registers */
/* If defined, an initializer for a vector of integers, containing the numbers
@@ -554,7 +554,7 @@ while (0)
AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
AR_EC_REGNUM \
}
-\f
+
/* How Values Fit in Registers */
/* Specify the modes required to caller save a given hard regno.
@@ -563,7 +563,7 @@ while (0)
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
((FR_REGNO_P (REGNO) && (NREGS) == 1) ? RFmode \
: choose_hard_reg_mode ((REGNO), (NREGS), NULL))
-\f
+
/* Handling Leaf Functions */
/* A C initializer for a vector, indexed by hard register number, which
@@ -577,7 +577,7 @@ while (0)
/* ??? This might be useful. */
/* #define LEAF_REG_REMAP(REGNO) */
-\f
+
/* Register Classes */
/* An enumeral type that must be defined with all the register class names as
@@ -736,7 +736,7 @@ enum reg_class
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == RFmode) ? 1 \
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XCmode) ? 2 \
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-\f
+
/* Basic Stack Layout */
/* Define this macro if pushing a word onto the stack moves the stack pointer
@@ -787,7 +787,7 @@ enum reg_class
/* We shorten debug info by using CFA-16 as DW_AT_frame_base. */
#define CFA_FRAME_BASE_OFFSET(FUNDECL) (-INCOMING_FRAME_SP_OFFSET)
-\f
+
/* Register That Address the Stack Frame. */
/* The register number of the stack pointer register, which must also be a
@@ -824,7 +824,7 @@ enum reg_class
/* Register numbers used for passing a function's static chain pointer. */
/* ??? The ABI sez the static chain should be passed as a normal parameter. */
#define STATIC_CHAIN_REGNUM 15
-\f
+
/* Eliminating the Frame Pointer and the Arg Pointer */
/* If defined, this macro specifies a table of register pairs used to eliminate
@@ -842,7 +842,7 @@ enum reg_class
of registers. */
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
-\f
+
/* Passing Function Arguments on the Stack */
/* If defined, the maximum amount of space required for outgoing arguments will
@@ -851,7 +851,7 @@ enum reg_class
#define ACCUMULATE_OUTGOING_ARGS 1
-\f
+
/* Function Arguments in Registers */
#define MAX_ARGUMENT_SLOTS 8
@@ -920,12 +920,12 @@ do { \
(((REGNO) >= AR_ARG_FIRST && (REGNO) < (AR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
|| ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
-\f
+
/* How Large Values are Returned */
#define DEFAULT_PCC_STRUCT_RETURN 0
-\f
+
/* Caller-Saves Register Allocation */
/* A C expression to determine whether it is worthwhile to consider placing a
@@ -938,7 +938,7 @@ do { \
/* ??? Investigate. */
/* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
-\f
+
/* Function Entry and Exit */
/* Define this macro as a C expression that is nonzero if the return
@@ -975,7 +975,7 @@ do { \
fputs ("\tdata8.ua 0\n", FILE); \
} \
} while (0)
-\f
+
/* Generating Code for Profiling. */
/* A C statement or compound statement to output to FILE some assembler code to
@@ -987,7 +987,7 @@ do { \
/* Neither hpux nor linux use profile counters. */
#define NO_PROFILE_COUNTERS 1
-\f
+
/* Trampolines for Nested Functions. */
/* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
@@ -1003,7 +1003,7 @@ do { \
/* Alignment required for trampolines, in bits. */
#define TRAMPOLINE_ALIGNMENT 64
-\f
+
/* Addressing Modes */
/* Define this macro if the machine supports post-increment addressing. */
@@ -1022,7 +1022,7 @@ do { \
#define MAX_REGS_PER_ADDRESS 2
-\f
+
/* Condition Code Status */
/* One some machines not all possible comparisons are defined, but you can
@@ -1030,7 +1030,7 @@ do { \
/* ??? Investigate. See the alpha definition. */
/* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
-\f
+
/* Describing Relative Costs of Operations */
/* A C expression for the cost of a branch instruction. A value of 1 is the
@@ -1056,7 +1056,7 @@ do { \
#define NO_FUNCTION_CSE 1
-\f
+
/* Dividing the output into sections. */
/* A C expression whose value is a string containing the assembler operation
@@ -1075,7 +1075,7 @@ do { \
#define BSS_SECTION_ASM_OP "\t.bss"
#define IA64_DEFAULT_GVALUE 8
-\f
+
/* Position Independent Code. */
/* The register number of the register used to address a table of static data
@@ -1094,7 +1094,7 @@ do { \
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
-\f
+
/* The Overall Framework of an Assembler File. */
/* A C string constant describing how to begin a comment in the target
@@ -1112,7 +1112,7 @@ do { \
group of consecutive ones. */
#define ASM_APP_OFF (TARGET_GNU_AS ? "#NO_APP\n" : "//NO_APP\n")
-\f
+
/* Output and Generation of Labels. */
/* A C statement (sans semicolon) to output to the stdio stream STREAM the
@@ -1166,12 +1166,12 @@ do { \
ia64_asm_output_label = 0; \
} while (0)
-\f
+
/* Macros Controlling Initialization Routines. */
/* This is handled by sysv4.h. */
-\f
+
/* Output of Assembler Instructions. */
/* A C initializer containing the assembler's names for the machine registers,
@@ -1342,7 +1342,7 @@ do { \
#define USER_LABEL_PREFIX ""
#define IMMEDIATE_PREFIX ""
-\f
+
/* Output of dispatch tables. */
/* This macro should be provided on machines where the addresses in a dispatch
@@ -1362,7 +1362,7 @@ do { \
#define ADDR_VEC_ALIGN(ADDR_VEC) (CASE_VECTOR_MODE == SImode ? 2 : 3)
-\f
+
/* Assembler Commands for Exception Regions. */
/* Select a format to encode pointers in exception handling data. CODE
@@ -1392,7 +1392,7 @@ do { \
} \
} while (0)
-\f
+
/* Assembler Commands for Alignment. */
/* ??? Investigate. */
@@ -1418,11 +1418,11 @@ do { \
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
-\f
+
/* Macros Affecting all Debug Formats. */
/* This is handled in sysv4.h. */
-\f
+
/* Macros for Dwarf Output. */
/* Define this macro if GCC should produce dwarf version 2 format debugging
@@ -1462,7 +1462,7 @@ do { \
assemble_name (FILE, LABEL); \
fputc (')', FILE); \
} while (0)
-\f
+
/* Register Renaming Parameters. */
/* A C expression that is nonzero if hard register number REGNO2 can be
@@ -1471,7 +1471,7 @@ do { \
#define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
-\f
+
/* Miscellaneous Parameters. */
/* Flag to mark data that is in the small address area (addressable
@@ -1566,7 +1566,7 @@ struct GTY(()) machine_function
/* Initialize library function table. */
#undef TARGET_INIT_LIBFUNCS
#define TARGET_INIT_LIBFUNCS ia64_init_libfuncs
-\f
+
/* Switch on code for querying unit reservations. */
#define CPU_UNITS_QUERY 1
diff --git a/gcc/config/iq2000/iq2000.cc b/gcc/config/iq2000/iq2000.cc
index 062734102ba..741a8fb9428 100644
--- a/gcc/config/iq2000/iq2000.cc
+++ b/gcc/config/iq2000/iq2000.cc
@@ -70,7 +70,7 @@ enum internal_test
struct constant;
-\f
+
/* Structure to be filled in by compute_frame_size with register
save masks, and offsets for the current function. */
@@ -142,7 +142,7 @@ static rtx iq2000_load_reg4;
/* Mode used for saving/restoring general purpose registers. */
static machine_mode gpr_mode;
-\f
+
/* Initialize the GCC target structure. */
static struct machine_function* iq2000_init_machine_status (void);
static void iq2000_option_override (void);
@@ -270,7 +270,7 @@ static HOST_WIDE_INT iq2000_starting_frame_offset (void);
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Return nonzero if we split the address into high and low parts. */
int
@@ -373,7 +373,7 @@ iq2000_legitimate_address_p (machine_mode mode, rtx xinsn, bool strict)
/* The address was not legitimate. */
return 0;
}
-\f
+
/* Returns an operand string for the given instruction's delay slot,
after updating filled delay slot statistics.
@@ -440,7 +440,7 @@ iq2000_fill_delay_slot (const char *ret, enum delay_type type, rtx operands[],
return ret;
}
-\f
+
/* Determine whether a memory reference takes one (based off of the GP
pointer), two (normal), or three (label + reg) instructions, and bump the
appropriate counter for -mstats. */
@@ -554,7 +554,7 @@ iq2000_count_memory_refs (rtx op, int num)
num_refs[n_words-1] += num;
}
-\f
+
/* Abort after printing out a specific insn. */
static void
@@ -564,7 +564,7 @@ abort_with_insn (rtx insn, const char * reason)
debug_rtx (insn);
fancy_abort (__FILE__, __LINE__, __FUNCTION__);
}
-\f
+
/* Return the appropriate instructions to move one operand to another. */
const char *
@@ -794,7 +794,7 @@ iq2000_move_1word (rtx operands[], rtx_insn *insn, int unsignedp)
return ret;
}
-\f
+
/* Provide the costs of an addressing mode that contains ADDR. */
static int
@@ -863,7 +863,7 @@ iq2000_address_cost (rtx addr, machine_mode mode, addr_space_t as,
return 4;
}
-\f
+
/* Make normal rtx_code into something we can index from an array. */
static enum internal_test
@@ -888,7 +888,7 @@ map_test_to_internal_test (enum rtx_code test_code)
return test;
}
-\f
+
/* Generate the code to do a TEST_CODE comparison on two integer values CMP0
and CMP1. P_INVERT is NULL or ptr if branch needs to reverse its test.
The return value RESULT is:
@@ -1054,7 +1054,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1,
return result;
}
-\f
+
/* Emit the common code for doing conditional branches.
operand[0] is the label to jump to.
The comparison operands are saved away by cmp{si,di,sf,df}. */
@@ -1100,7 +1100,7 @@ gen_conditional_branch (rtx operands[], machine_mode mode)
cmp0, cmp1),
label1, label2)));
}
-\f
+
/* Initialize CUM for a function FNTYPE. */
void
@@ -1427,7 +1427,7 @@ iq2000_arg_partial_bytes (cumulative_args_t cum_v,
return 0;
}
-\f
+
/* Implement va_start. */
static void
@@ -1450,7 +1450,7 @@ iq2000_va_start (tree valist, rtx nextarg)
nextarg = plus_constant (Pmode, nextarg, - gpr_save_area_size);
std_expand_builtin_va_start (valist, nextarg);
}
-\f
+
/* Allocate a chunk of memory for per-function machine-dependent data. */
static struct machine_function *
@@ -1497,7 +1497,7 @@ iq2000_option_override (void)
/* Function to allocate machine-dependent function status. */
init_machine_status = iq2000_init_machine_status;
}
-\f
+
/* The arg pointer (which is eliminated) points to the virtual frame pointer,
while the frame pointer (which may be eliminated) points to the stack
pointer after the initial adjustments. */
@@ -1523,7 +1523,7 @@ iq2000_debugger_offset (rtx addr, HOST_WIDE_INT offset)
return offset;
}
-\f
+
/* If defined, a C statement to be executed just prior to the output of
assembler code for INSN, to modify the extracted operands so they will be
output differently.
@@ -1575,12 +1575,12 @@ final_prescan_insn (rtx_insn *insn, rtx opvec[] ATTRIBUTE_UNUSED,
rtx_insn *nop_insn = emit_insn_after (gen_nop (), insn);
INSN_ADDRESSES_NEW (nop_insn, -1);
}
-
+
if (TARGET_STATS
&& (JUMP_P (insn) || CALL_P (insn)))
dslots_jump_total ++;
}
-\f
+
/* Return the bytes needed to compute the frame pointer from the current
stack pointer where SIZE is the # of var. bytes allocated.
@@ -1687,7 +1687,7 @@ compute_frame_size (HOST_WIDE_INT size)
gp_reg_rounded = IQ2000_STACK_ALIGN (gp_reg_size);
total_size += gp_reg_rounded + IQ2000_STACK_ALIGN (fp_reg_size);
- /* The gp reg is caller saved, so there is no need for leaf routines
+ /* The gp reg is caller saved, so there is no need for leaf routines
(total_size == extra_size) to save the gp reg. */
if (total_size == extra_size
&& ! profile_flag)
@@ -1728,7 +1728,7 @@ compute_frame_size (HOST_WIDE_INT size)
/* Ok, we're done. */
return total_size;
}
-\f
+
/* We can always eliminate to the frame pointer. We can eliminate to the
stack pointer unless a frame pointer is needed. */
@@ -1754,27 +1754,27 @@ iq2000_initial_elimination_offset (int from, int to ATTRIBUTE_UNUSED)
{
int offset;
- compute_frame_size (get_frame_size ());
- if ((from) == FRAME_POINTER_REGNUM)
- (offset) = 0;
- else if ((from) == ARG_POINTER_REGNUM)
- (offset) = (cfun->machine->total_size);
- else if ((from) == RETURN_ADDRESS_POINTER_REGNUM)
+ compute_frame_size (get_frame_size ());
+ if ((from) == FRAME_POINTER_REGNUM)
+ (offset) = 0;
+ else if ((from) == ARG_POINTER_REGNUM)
+ (offset) = (cfun->machine->total_size);
+ else if ((from) == RETURN_ADDRESS_POINTER_REGNUM)
{
- if (leaf_function_p ())
- (offset) = 0;
- else (offset) = cfun->machine->gp_sp_offset
- + ((UNITS_PER_WORD - (POINTER_SIZE / BITS_PER_UNIT))
- * (BYTES_BIG_ENDIAN != 0));
+ if (leaf_function_p ())
+ (offset) = 0;
+ else (offset) = cfun->machine->gp_sp_offset
+ + ((UNITS_PER_WORD - (POINTER_SIZE / BITS_PER_UNIT))
+ * (BYTES_BIG_ENDIAN != 0));
}
else
gcc_unreachable ();
return offset;
}
-\f
+
/* Common code to emit the insns (or to write the instructions to a file)
- to save/restore registers.
+ to save/restore registers.
Other parts of the code assume that IQ2000_TEMP1_REGNUM (aka large_reg)
is not modified within save_restore_insns. */
@@ -1894,7 +1894,7 @@ save_restore_insns (int store_p)
if (store_p)
iq2000_emit_frame_related_store (mem_rtx, reg_rtx, gp_offset);
- else
+ else
{
emit_move_insn (reg_rtx, mem_rtx);
}
@@ -1902,7 +1902,7 @@ save_restore_insns (int store_p)
}
}
}
-\f
+
/* Expand the prologue into a bunch of separate insns. */
void
@@ -2089,7 +2089,7 @@ iq2000_expand_prologue (void)
emit_insn (gen_blockage ());
}
-\f
+
/* Expand the epilogue into a bunch of separate insns. */
void
@@ -2161,7 +2161,7 @@ iq2000_expand_eh_return (rtx address)
scratch = plus_constant (Pmode, stack_pointer_rtx, gp_offset);
emit_move_insn (gen_rtx_MEM (GET_MODE (address), scratch), address);
}
-\f
+
/* Return nonzero if this function is known to have a null epilogue.
This allows the optimizer to omit jumps to jumps if no stack
was created. */
@@ -2180,7 +2180,7 @@ iq2000_can_use_return_insn (void)
return compute_frame_size (get_frame_size ()) == 0;
}
-\f
+
/* Choose the section to use for the constant rtx expression X that has
mode MODE. */
@@ -2237,7 +2237,7 @@ iq2000_function_value_regno_p (const unsigned int regno)
return (regno == GP_RETURN);
}
-\f
+
/* Return true when an argument must be passed by reference. */
static bool
@@ -2635,7 +2635,7 @@ expand_one_builtin (enum insn_code icode, rtx target, tree exp,
default:
gcc_unreachable ();
}
-
+
if (! pat)
return 0;
emit_insn (pat);
@@ -2666,7 +2666,7 @@ iq2000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
{
default:
break;
-
+
case IQ2000_BUILTIN_ADO16:
return expand_one_builtin (CODE_FOR_ado16, target, exp, code, 2);
@@ -2675,10 +2675,10 @@ iq2000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
code[2] = CONST_INT;
code[3] = CONST_INT;
return expand_one_builtin (CODE_FOR_ram, target, exp, code, 4);
-
+
case IQ2000_BUILTIN_CHKHDR:
return expand_one_builtin (CODE_FOR_chkhdr, target, exp, code, 2);
-
+
case IQ2000_BUILTIN_PKRL:
return expand_one_builtin (CODE_FOR_pkrl, target, exp, code, 2);
@@ -2825,10 +2825,10 @@ iq2000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
case IQ2000_BUILTIN_SYSCALL:
return expand_one_builtin (CODE_FOR_syscall, target, exp, code, 0);
}
-
+
return NULL_RTX;
}
-\f
+
/* Worker function for TARGET_RETURN_IN_MEMORY. */
static bool
@@ -2846,42 +2846,42 @@ iq2000_setup_incoming_varargs (cumulative_args_t cum_v,
int *pretend_size, int no_rtl)
{
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
- unsigned int iq2000_off = ! cum->last_arg_fp;
- unsigned int iq2000_fp_off = cum->last_arg_fp;
+ unsigned int iq2000_off = ! cum->last_arg_fp;
+ unsigned int iq2000_fp_off = cum->last_arg_fp;
if ((cum->arg_words < MAX_ARGS_IN_REGISTERS - iq2000_off))
{
- int iq2000_save_gp_regs
- = MAX_ARGS_IN_REGISTERS - cum->arg_words - iq2000_off;
- int iq2000_save_fp_regs
- = (MAX_ARGS_IN_REGISTERS - cum->fp_arg_words - iq2000_fp_off);
+ int iq2000_save_gp_regs
+ = MAX_ARGS_IN_REGISTERS - cum->arg_words - iq2000_off;
+ int iq2000_save_fp_regs
+ = (MAX_ARGS_IN_REGISTERS - cum->fp_arg_words - iq2000_fp_off);
- if (iq2000_save_gp_regs < 0)
- iq2000_save_gp_regs = 0;
- if (iq2000_save_fp_regs < 0)
- iq2000_save_fp_regs = 0;
+ if (iq2000_save_gp_regs < 0)
+ iq2000_save_gp_regs = 0;
+ if (iq2000_save_fp_regs < 0)
+ iq2000_save_fp_regs = 0;
- *pretend_size = ((iq2000_save_gp_regs * UNITS_PER_WORD)
- + (iq2000_save_fp_regs * UNITS_PER_FPREG));
+ *pretend_size = ((iq2000_save_gp_regs * UNITS_PER_WORD)
+ + (iq2000_save_fp_regs * UNITS_PER_FPREG));
- if (! (no_rtl))
+ if (! (no_rtl))
{
- if (cum->arg_words < MAX_ARGS_IN_REGISTERS - iq2000_off)
+ if (cum->arg_words < MAX_ARGS_IN_REGISTERS - iq2000_off)
{
- rtx ptr, mem;
+ rtx ptr, mem;
ptr = plus_constant (Pmode, virtual_incoming_args_rtx,
- (iq2000_save_gp_regs
* UNITS_PER_WORD));
- mem = gen_rtx_MEM (BLKmode, ptr);
- move_block_from_reg
- (cum->arg_words + GP_ARG_FIRST + iq2000_off,
- mem,
+ mem = gen_rtx_MEM (BLKmode, ptr);
+ move_block_from_reg
+ (cum->arg_words + GP_ARG_FIRST + iq2000_off,
+ mem,
iq2000_save_gp_regs);
- }
- }
+ }
+ }
}
}
-\f
+
/* A C compound statement to output to stdio stream STREAM the
assembler syntax for an instruction operand that is a memory
reference whose address is ADDR. ADDR is an RTL expression. */
@@ -2967,7 +2967,7 @@ iq2000_print_operand_address (FILE * file, machine_mode mode, rtx addr)
break;
}
}
-\f
+
/* A C compound statement to output to stdio stream FILE the
assembler syntax for an instruction operand OP.
@@ -3300,7 +3300,7 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
* total = COSTS_N_INSNS (2 * num_words);
break;
}
-
+
case FFS:
* total = COSTS_N_INSNS (6);
break;
@@ -3319,7 +3319,7 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
* total = COSTS_N_INSNS ((GET_CODE (XEXP (x, 1)) == CONST_INT) ? 4 : 12);
else
* total = COSTS_N_INSNS (1);
- break;
+ break;
case ABS:
if (mode == SFmode || mode == DFmode)
@@ -3327,7 +3327,7 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
else
* total = COSTS_N_INSNS (4);
break;
-
+
case PLUS:
case MINUS:
if (mode == SFmode || mode == DFmode)
@@ -3337,7 +3337,7 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
else
* total = COSTS_N_INSNS (1);
break;
-
+
case NEG:
* total = (mode == DImode) ? 4 : 1;
break;
@@ -3360,16 +3360,16 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
else
* total = COSTS_N_INSNS (69);
break;
-
+
case UDIV:
case UMOD:
* total = COSTS_N_INSNS (69);
break;
-
+
case SIGN_EXTEND:
* total = COSTS_N_INSNS (2);
break;
-
+
case ZERO_EXTEND:
* total = COSTS_N_INSNS (1);
break;
@@ -3377,7 +3377,7 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
case CONST_INT:
* total = 0;
break;
-
+
case LABEL_REF:
* total = COSTS_N_INSNS (2);
break;
@@ -3402,19 +3402,19 @@ iq2000_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
case SYMBOL_REF:
* total = COSTS_N_INSNS (SYMBOL_REF_FLAG (x) ? 1 : 2);
break;
-
+
case CONST_DOUBLE:
{
rtx high, low;
-
+
split_double (x, & high, & low);
-
+
* total = COSTS_N_INSNS ( (high == CONST0_RTX (GET_MODE (high))
|| low == CONST0_RTX (GET_MODE (low)))
? 2 : 4);
break;
}
-
+
default:
return false;
}
diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h
index 3327f14b831..7c5ed01e857 100644
--- a/gcc/config/iq2000/iq2000.h
+++ b/gcc/config/iq2000/iq2000.h
@@ -1,4 +1,4 @@
-/* Definitions of target machine for GNU compiler.
+/* Definitions of target machine for GNU compiler.
Vitesse IQ2000 processors
Copyright (C) 2003-2022 Free Software Foundation, Inc.
@@ -31,7 +31,7 @@
#define LINK_SPEC "%{h*} %{v:-V} \
%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
-\f
+
/* Run-time target specifications. */
#define TARGET_CPU_CPP_BUILTINS() \
@@ -56,11 +56,11 @@
#ifndef IQ2000_ISA_DEFAULT
#define IQ2000_ISA_DEFAULT 1
#endif
-\f
+
/* Storage Layout. */
#define BITS_BIG_ENDIAN 0
-#define BYTES_BIG_ENDIAN 1
+#define BYTES_BIG_ENDIAN 1
#define WORDS_BIG_ENDIAN 1
#define BITS_PER_WORD 32
#define MAX_BITS_PER_WORD 64
@@ -104,7 +104,7 @@
#define PCC_BITFIELD_TYPE_MATTERS 1
-\f
+
/* Layout of Source Language Data Types. */
#define INT_TYPE_SIZE 32
@@ -129,7 +129,7 @@
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-\f
+
/* Register Basics. */
/* On the IQ2000, we have 32 integer registers. */
@@ -147,7 +147,7 @@
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1 \
}
-\f
+
/* Order of allocation of registers. */
#define REG_ALLOC_ORDER \
@@ -155,11 +155,11 @@
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 \
}
-\f
+
#define AVOID_CCMODE_COPIES
-\f
+
/* Register Classes. */
enum reg_class
@@ -208,7 +208,7 @@ enum reg_class
? (GR_REGS) \
: (CLASS))))
-\f
+
/* Basic Stack Layout. */
#define STACK_GROWS_DOWNWARD 1
@@ -238,7 +238,7 @@ enum reg_class
/* Before the prologue, RA lives in r31. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, GP_REG_FIRST + 31)
-\f
+
/* Register That Address the Stack Frame. */
#define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
@@ -248,7 +248,7 @@ enum reg_class
#define RETURN_ADDRESS_POINTER_REGNUM RAP_REG_NUM
#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
-\f
+
/* Eliminating the Frame Pointer and the Arg Pointer. */
#define ELIMINABLE_REGS \
@@ -262,7 +262,7 @@ enum reg_class
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = iq2000_initial_elimination_offset ((FROM), (TO))
-\f
+
/* Passing Function Arguments on the Stack. */
/* #define PUSH_ROUNDING(BYTES) 0 */
@@ -273,7 +273,7 @@ enum reg_class
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
-\f
+
/* Function Arguments in Registers. */
#define MAX_ARGS_IN_REGISTERS 8
@@ -298,23 +298,23 @@ typedef struct iq2000_args
init_cumulative_args (& CUM, FNTYPE, LIBNAME) \
#define FUNCTION_ARG_REGNO_P(N) \
- (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
+ (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
+
-\f
/* On the IQ2000, R2 and R3 are the only register thus used. */
#define FUNCTION_VALUE_REGNO_P(N) iq2000_function_value_regno_p (N)
-\f
+
/* How Large Values are Returned. */
#define DEFAULT_PCC_STRUCT_RETURN 0
-\f
+
/* Function Entry and Exit. */
#define EXIT_IGNORE_STACK 1
-\f
+
/* Generating Code for Profiling. */
#define FUNCTION_PROFILER(FILE, LABELNO) \
@@ -334,14 +334,14 @@ typedef struct iq2000_args
fprintf (FILE, "\t.set\tat\n"); \
}
-\f
+
/* Trampolines for Nested Functions. */
#define TRAMPOLINE_CODE_SIZE (8*4)
#define TRAMPOLINE_SIZE (TRAMPOLINE_CODE_SIZE + 2*GET_MODE_SIZE (Pmode))
#define TRAMPOLINE_ALIGNMENT GET_MODE_ALIGNMENT (Pmode)
-\f
+
/* Addressing Modes. */
#define CONSTANT_ADDRESS_P(X) \
@@ -353,7 +353,7 @@ typedef struct iq2000_args
#define REG_OK_FOR_INDEX_P(X) 0
-\f
+
/* Describing Relative Costs of Operations. */
#define REGISTER_MOVE_COST(MODE, FROM, TO) 2
@@ -371,14 +371,14 @@ typedef struct iq2000_args
if (REG_NOTE_KIND (LINK) != 0) \
(COST) = 0; /* Anti or output dependence. */
-\f
+
/* Dividing the output into sections. */
#define TEXT_SECTION_ASM_OP "\t.text" /* Instructions. */
#define DATA_SECTION_ASM_OP "\t.data" /* Large data. */
-\f
+
/* The Overall Framework of an Assembler File. */
#define ASM_COMMENT_START " #"
@@ -387,7 +387,7 @@ typedef struct iq2000_args
#define ASM_APP_OFF "#NO_APP\n"
-\f
+
/* Output and Generation of Labels. */
#undef ASM_GENERATE_INTERNAL_LABEL
@@ -396,7 +396,7 @@ typedef struct iq2000_args
#define GLOBAL_ASM_OP "\t.globl\t"
-\f
+
/* Output of Assembler Instructions. */
#define REGISTER_NAMES \
@@ -461,7 +461,7 @@ while (0)
#define USER_LABEL_PREFIX ""
-\f
+
/* Output of dispatch tables. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
@@ -479,7 +479,7 @@ while (0)
LOCAL_LABEL_PREFIX, \
VALUE)
-\f
+
/* Assembler Commands for Alignment. */
#undef ASM_OUTPUT_SKIP
@@ -491,7 +491,7 @@ while (0)
if ((LOG) != 0) \
fprintf (STREAM, "\t.balign %d\n", 1 << (LOG))
-\f
+
/* Macros Affecting all Debug Formats. */
#define DEBUGGER_AUTO_OFFSET(X) \
@@ -504,7 +504,7 @@ while (0)
#define DWARF2_DEBUGGING_INFO 1
-\f
+
/* Miscellaneous Parameters. */
#define CASE_VECTOR_MODE SImode
@@ -551,7 +551,7 @@ enum delay_type
#define BITMASK_UPPER16 ((unsigned long) 0xffff << 16) /* 0xffff0000 */
#define BITMASK_LOWER16 ((unsigned long) 0xffff) /* 0x0000ffff */
-\f
+
#define GENERATE_BRANCHLIKELY (ISA_HAS_BRANCHLIKELY)
/* Macros to decide whether certain features are available or not,
@@ -562,10 +562,10 @@ enum delay_type
/* ISA has branch likely instructions. */
#define ISA_HAS_BRANCHLIKELY (iq2000_isa == 1)
-\f
+
#undef ASM_SPEC
-\f
+
/* The mapping from gcc register number to DWARF 2 CFA column number. */
#define DWARF_FRAME_REGNUM(REG) (REG)
@@ -670,7 +670,7 @@ enum delay_type
}
#endif
-\f
+
/* Symbolic macros for the registers used to return integer and floating
point values. */
@@ -683,7 +683,7 @@ enum delay_type
#define MAX_ARGS_IN_REGISTERS 8
-\f
+
/* Tell prologue and epilogue if register REGNO should be saved / restored. */
#define MUST_SAVE_REGISTER(regno) \
@@ -696,7 +696,7 @@ enum delay_type
#define IQ2000_STACK_ALIGN(LOC) (((LOC) + 7) & ~7)
#endif
-\f
+
/* These assume that REGNO is a hard or pseudo reg number.
They give nonzero only if REGNO is a hard reg of the suitable class
or a pseudo reg currently allocated to a suitable hard reg.
@@ -752,7 +752,7 @@ enum delay_type
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
((LENGTH) = iq2000_adjust_insn_length ((INSN), (LENGTH)))
-\f
+
/* How to tell the debugger about changes of source files. */
@@ -768,7 +768,7 @@ enum delay_type
#define LABEL_AFTER_LOC(STREAM)
#endif
-\f
+
/* Default to -G 8 */
#ifndef IQ2000_DEFAULT_GVALUE
#define IQ2000_DEFAULT_GVALUE 8
@@ -776,7 +776,7 @@ enum delay_type
#define SDATA_SECTION_ASM_OP "\t.sdata" /* Small data. */
-\f
+
/* Which instruction set architecture to use. */
extern int iq2000_isa;
diff --git a/gcc/config/kopensolaris-gnu.h b/gcc/config/kopensolaris-gnu.h
index d2eda10d4c4..f35383c4c49 100644
--- a/gcc/config/kopensolaris-gnu.h
+++ b/gcc/config/kopensolaris-gnu.h
@@ -18,7 +18,7 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-#undef GNU_USER_TARGET_OS_CPP_BUILTINS
+#undef GNU_USER_TARGET_OS_CPP_BUILTINS
#define GNU_USER_TARGET_OS_CPP_BUILTINS() \
do \
{ \
diff --git a/gcc/config/lm32/lm32-protos.h b/gcc/config/lm32/lm32-protos.h
index 6da716fdf52..767b5298f1c 100644
--- a/gcc/config/lm32/lm32-protos.h
+++ b/gcc/config/lm32/lm32-protos.h
@@ -20,13 +20,13 @@
<http://www.gnu.org/licenses/>. */
extern int lm32_return_in_memory (tree type);
-extern void lm32_declare_object (FILE *stream, char *name, char *init_string,
+extern void lm32_declare_object (FILE *stream, char *name, char *init_string,
char *final_string, int size);
extern void lm32_expand_prologue (void);
extern void lm32_expand_epilogue (void);
extern void lm32_print_operand (FILE *file, rtx op, int letter);
extern void lm32_print_operand_address (FILE *file, rtx addr);
-extern HOST_WIDE_INT lm32_compute_initial_elimination_offset (int from,
+extern HOST_WIDE_INT lm32_compute_initial_elimination_offset (int from,
int to);
extern int lm32_can_use_return (void);
extern rtx lm32_return_addr_rtx (int count, rtx frame);
diff --git a/gcc/config/lm32/lm32.cc b/gcc/config/lm32/lm32.cc
index 25da6203f2a..a224129e31b 100644
--- a/gcc/config/lm32/lm32.cc
+++ b/gcc/config/lm32/lm32.cc
@@ -158,20 +158,20 @@ emit_add (rtx dest, rtx src0, rtx src1)
}
/* Generate the code to compare (and possibly branch) two integer values
- TEST_CODE is the comparison code we are trying to emulate
+ TEST_CODE is the comparison code we are trying to emulate
(or implement directly)
- RESULT is where to store the result of the comparison,
+ RESULT is where to store the result of the comparison,
or null to emit a branch
CMP0 CMP1 are the two comparison operands
DESTINATION is the destination of the branch, or null to only compare
*/
static void
-gen_int_relational (enum rtx_code code,
- rtx result,
- rtx cmp0,
- rtx cmp1,
- rtx destination)
+gen_int_relational (enum rtx_code code,
+ rtx result,
+ rtx cmp0,
+ rtx cmp1,
+ rtx destination)
{
machine_mode mode;
int branch_p;
@@ -183,7 +183,7 @@ gen_int_relational (enum rtx_code code,
/* Is this a branch or compare. */
branch_p = (destination != 0);
- /* Instruction set doesn't support LE or LT, so swap operands and use
+ /* Instruction set doesn't support LE or LT, so swap operands and use
GE, GT. */
switch (code)
{
@@ -270,7 +270,7 @@ lm32_expand_scc (rtx operands[])
rtx op0 = operands[2];
rtx op1 = operands[3];
- gen_int_relational (code, target, op0, op1, NULL_RTX);
+ gen_int_relational (code, target, op0, op1, NULL_RTX);
}
/* Compare OPERANDS[1] with OPERANDS[2] using comparison code
@@ -284,7 +284,7 @@ lm32_expand_conditional_branch (rtx operands[])
rtx op1 = operands[2];
rtx destination = operands[3];
- gen_int_relational (code, NULL_RTX, op0, op1, destination);
+ gen_int_relational (code, NULL_RTX, op0, op1, destination);
}
/* Generate and emit RTL to save or restore callee save registers. */
@@ -304,10 +304,10 @@ expand_save_restore (struct lm32_frame_info *info, int op)
{
rtx offset_rtx;
rtx mem;
-
+
offset_rtx = GEN_INT (offset);
if (satisfies_constraint_K (offset_rtx))
- {
+ {
mem = gen_rtx_MEM (word_mode,
gen_rtx_PLUS (Pmode,
stack_pointer_rtx,
@@ -316,23 +316,23 @@ expand_save_restore (struct lm32_frame_info *info, int op)
else
{
/* r10 is caller saved so it can be used as a temp reg. */
- rtx r10;
-
+ rtx r10;
+
r10 = gen_rtx_REG (word_mode, 10);
insn = emit_move_insn (r10, offset_rtx);
if (op == 0)
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_add (r10, r10, stack_pointer_rtx);
if (op == 0)
- RTX_FRAME_RELATED_P (insn) = 1;
+ RTX_FRAME_RELATED_P (insn) = 1;
mem = gen_rtx_MEM (word_mode, r10);
- }
-
+ }
+
if (op == 0)
insn = emit_move_insn (mem, gen_rtx_REG (word_mode, regno));
else
insn = emit_move_insn (gen_rtx_REG (word_mode, regno), mem);
-
+
/* only prologue instructions which set the sp fp or save a
register should be marked as frame related. */
if (op == 0)
@@ -391,11 +391,11 @@ lm32_expand_prologue (void)
{
/* Move sp to fp. */
insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
- RTX_FRAME_RELATED_P (insn) = 1;
+ RTX_FRAME_RELATED_P (insn) = 1;
- /* Add offset - Don't use total_size, as that includes pretend_size,
+ /* Add offset - Don't use total_size, as that includes pretend_size,
which isn't part of this frame? */
- insn = emit_add (frame_pointer_rtx,
+ insn = emit_add (frame_pointer_rtx,
frame_pointer_rtx,
GEN_INT (current_frame_info.args_size +
current_frame_info.callee_size +
@@ -513,7 +513,7 @@ lm32_print_operand (FILE * file, rtx op, int letter)
fprintf (file, "%s", reg_names[regnum]);
}
else if (code == HIGH)
- output_addr_const (file, XEXP (op, 0));
+ output_addr_const (file, XEXP (op, 0));
else if (code == MEM)
output_address (GET_MODE (op), XEXP (op, 0));
else if (letter == 'z' && GET_CODE (op) == CONST_INT && INTVAL (op) == 0)
@@ -1129,7 +1129,7 @@ lm32_rtx_costs (rtx x, machine_mode mode, int outer_code,
*total = COSTS_N_INSNS (2);
return true;
}
- /* Fall through. */
+ /* Fall through. */
default:
if (satisfies_constraint_K (x))
@@ -1193,32 +1193,32 @@ lm32_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
static bool
lm32_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
-{
- /* (rM) */
+{
+ /* (rM) */
if (strict && REG_P (x) && STRICT_REG_OK_FOR_BASE_P (x))
return true;
if (!strict && REG_P (x) && NONSTRICT_REG_OK_FOR_BASE_P (x))
return true;
-
- /* (rM)+literal) */
- if (GET_CODE (x) == PLUS
- && REG_P (XEXP (x, 0))
+
+ /* (rM)+literal) */
+ if (GET_CODE (x) == PLUS
+ && REG_P (XEXP (x, 0))
&& ((strict && STRICT_REG_OK_FOR_BASE_P (XEXP (x, 0)))
- || (!strict && NONSTRICT_REG_OK_FOR_BASE_P (XEXP (x, 0))))
- && GET_CODE (XEXP (x, 1)) == CONST_INT
+ || (!strict && NONSTRICT_REG_OK_FOR_BASE_P (XEXP (x, 0))))
+ && GET_CODE (XEXP (x, 1)) == CONST_INT
&& satisfies_constraint_K (XEXP ((x), 1)))
return true;
-
- /* gp(sym) */
- if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_SMALL_P (x))
+
+ /* gp(sym) */
+ if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_SMALL_P (x))
return true;
-
- return false;
+
+ return false;
}
-/* Check a move is not memory to memory. */
+/* Check a move is not memory to memory. */
-bool
+bool
lm32_move_ok (machine_mode mode, rtx operands[2]) {
if (memory_operand (operands[0], mode))
return register_or_zero_operand (operands[1], mode);
diff --git a/gcc/config/lm32/lm32.h b/gcc/config/lm32/lm32.h
index 3090185288b..b709b8d1a62 100644
--- a/gcc/config/lm32/lm32.h
+++ b/gcc/config/lm32/lm32.h
@@ -52,7 +52,7 @@
%{muser-enabled} \
"
-/* Let link script define all link options.
+/* Let link script define all link options.
Default to using simulator link script. */
#undef STARTFILE_SPEC
@@ -166,7 +166,7 @@ do { \
enum reg_class
{
- NO_REGS,
+ NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES
diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h
index 77b2217247d..bf6e03760c7 100644
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -62,7 +62,7 @@ extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
extern void loongarch_expand_prologue (void);
extern void loongarch_expand_epilogue (bool);
extern bool loongarch_can_use_return_insn (void);
-\f
+
extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
extern int loongarch_regno_mode_ok_for_base_p (int, machine_mode, bool);
extern int loongarch_address_insns (rtx, machine_mode, bool);
diff --git a/gcc/config/m32c/m32c.cc b/gcc/config/m32c/m32c.cc
index 26601ab0e13..466113bcdd7 100644
--- a/gcc/config/m32c/m32c.cc
+++ b/gcc/config/m32c/m32c.cc
@@ -870,7 +870,7 @@ m32c_matches_constraint_p (rtx value, int constraint)
&& A0_OR_PSEUDO (patternr[5])
&& GET_MODE (patternr[5]) == HImode)
|| RTX_IS ("ms")));
- case CONSTRAINT_Sd:
+ case CONSTRAINT_Sd:
{
/* This is the common "src/dest" address */
rtx r;
@@ -2787,7 +2787,7 @@ m32c_print_operand (FILE * file, rtx x, int code)
#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
#define TARGET_PRINT_OPERAND_PUNCT_VALID_P m32c_print_operand_punct_valid_p
-static bool
+static bool
m32c_print_operand_punct_valid_p (unsigned char c)
{
if (c == '&' || c == '!')
@@ -3034,7 +3034,7 @@ m32c_insert_attributes (tree node ATTRIBUTE_UNUSED,
{
TREE_THIS_VOLATILE (node) = true;
}
- }
+ }
}
/* Hash table of pragma info. */
@@ -3225,7 +3225,7 @@ m32c_immd_dbl_mov (rtx * operands ATTRIBUTE_UNUSED,
/* ??? This relied on the now-defunct MEM_SCALAR and MEM_IN_STRUCT_P
flags. */
return false;
-}
+}
/* Expanders */
@@ -4097,7 +4097,7 @@ m32c_emit_prologue (void)
if (flag_stack_usage_info)
current_function_static_stack_size = frame_size;
-
+
if (frame_size > 254)
{
extra_frame_size = frame_size - 254;
diff --git a/gcc/config/m32r/m32r.cc b/gcc/config/m32r/m32r.cc
index 5a788e29515..12d52ccc9b4 100644
--- a/gcc/config/m32r/m32r.cc
+++ b/gcc/config/m32r/m32r.cc
@@ -108,7 +108,7 @@ static bool m32r_attribute_identifier (const_tree);
static bool m32r_hard_regno_mode_ok (unsigned int, machine_mode);
static bool m32r_modes_tieable_p (machine_mode, machine_mode);
static HOST_WIDE_INT m32r_starting_frame_offset (void);
-\f
+
/* M32R specific attributes. */
static const struct attribute_spec m32r_attribute_table[] =
@@ -120,7 +120,7 @@ static const struct attribute_spec m32r_attribute_table[] =
NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE m32r_attribute_table
@@ -231,7 +231,7 @@ static const struct attribute_spec m32r_attribute_table[] =
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Called by m32r_option_override to initialize various things. */
void
@@ -310,7 +310,7 @@ init_reg_tables (void)
for (i = 0; i < NUM_MACHINE_MODES; i++)
{
machine_mode m = (machine_mode) i;
-
+
switch (GET_MODE_CLASS (m))
{
case MODE_INT:
@@ -359,7 +359,7 @@ init_reg_tables (void)
m32r_regno_reg_class[i] = NO_REGS;
}
}
-\f
+
/* M32R specific attribute support.
interrupt - for interrupt functions
@@ -426,7 +426,7 @@ m32r_attribute_identifier (const_tree name)
return strcmp (IDENTIFIER_POINTER (name), "model") == 0
|| strcmp (IDENTIFIER_POINTER (name), "__model__") == 0;
}
-\f
+
/* Encode section information of DECL, which is either a VAR_DECL,
FUNCTION_DECL, STRING_CST, CONSTRUCTOR, or ???.
@@ -532,7 +532,7 @@ m32r_init_expanders (void)
/* ??? At one point there was code here. The function is left in
to make it easy to experiment. */
}
-\f
+
bool
call_operand (rtx op, machine_mode mode)
{
@@ -689,7 +689,7 @@ m32r_pass_by_reference (cumulative_args_t, const function_arg_info &arg)
int size = arg.type_size_in_bytes ();
return (size < 0 || size > 8);
}
-\f
+
/* Comparisons. */
/* X and Y are two things to compare using CODE. Emit the compare insn and
@@ -1043,7 +1043,7 @@ gen_cond_store (enum rtx_code code, rtx op0, rtx op1, rtx op2)
}
}
-\f
+
/* Split a 2 word move (DI or DF) into component parts. */
rtx
@@ -1155,7 +1155,7 @@ gen_split_move_double (rtx operands[])
return val;
}
-\f
+
static int
m32r_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
{
@@ -1315,7 +1315,7 @@ m32r_setup_incoming_varargs (cumulative_args_t cum,
}
}
-\f
+
/* Return true if INSN is real instruction bearing insn. */
static int
@@ -1339,7 +1339,7 @@ m32r_adjust_priority (rtx_insn *insn, int priority)
return priority;
}
-\f
+
/* Indicate how many instructions can be issued at the same time.
This is sort of a lie. The m32r can issue only 1 long insn at
once, but it can issue 2 short insns. The default therefore is
@@ -1351,7 +1351,7 @@ m32r_issue_rate (void)
{
return ((TARGET_LOW_ISSUE_RATE) ? 1 : 2);
}
-\f
+
/* Cost functions. */
/* Memory is 3 times as expensive as registers.
??? Is that the right way to look at it? */
@@ -1419,7 +1419,7 @@ m32r_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED,
return false;
}
}
-\f
+
/* Type of function DECL.
The result is cached. To reset the cache at the end of a function,
@@ -1617,7 +1617,7 @@ m32r_can_eliminate (const int from, const int to)
: true);
}
-\f
+
/* The table we use to reference PIC data. */
static rtx global_offset_table;
@@ -1745,7 +1745,7 @@ m32r_expand_prologue (void)
emit_insn (gen_blockage ());
}
-\f
+
/* Set up the stack and frame pointer (if desired) for the function.
Note, if this is changed, you need to mirror the changes in
m32r_compute_frame_size which calculates the prolog size. */
@@ -1771,7 +1771,7 @@ m32r_output_function_prologue (FILE * file)
current_frame_info.args_size,
current_frame_info.extra_size);
}
-\f
+
/* Output RTL to pop register REGNO from the stack. */
static void
@@ -1893,7 +1893,7 @@ m32r_output_function_epilogue (FILE *)
current_frame_info = zero_frame_info;
m32r_compute_function_type (NULL_TREE);
}
-\f
+
/* Return nonzero if this function is known to have a null or 1 instruction
epilogue. */
@@ -1912,7 +1912,7 @@ direct_return (void)
return current_frame_info.total_size == 0;
}
-\f
+
/* PIC. */
int
@@ -2035,7 +2035,7 @@ m32r_mode_dependent_address_p (const_rtx addr, addr_space_t as ATTRIBUTE_UNUSED)
return false;
}
-\f
+
/* Nested function support. */
/* Emit RTL insns to initialize the variable parts of a trampoline.
@@ -2048,7 +2048,7 @@ m32r_initialize_trampoline (rtx tramp ATTRIBUTE_UNUSED,
rtx cxt ATTRIBUTE_UNUSED)
{
}
-\f
+
static void
m32r_file_start (void)
{
@@ -2062,7 +2062,7 @@ m32r_file_start (void)
if (TARGET_LITTLE_ENDIAN)
fprintf (asm_out_file, "\t.little\n");
}
-\f
+
/* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
For `%' followed by punctuation, CODE is the punctuation and X is null. */
@@ -2464,7 +2464,7 @@ m32r_not_same_reg (rtx a, rtx b)
return reg_a != reg_b;
}
-\f
+
rtx
m32r_function_symbol (const char *name)
{
@@ -2605,7 +2605,7 @@ m32r_expand_block_move (rtx operands[])
return 1;
}
-\f
+
/* Emit load/stores for a small constant word aligned block_move.
operands[0] is the memory address of the destination.
diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index 0407c5737d5..6dc8f27c0e4 100644
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -33,7 +33,7 @@
#undef ASM_APP_ON
#undef ASM_APP_OFF
-\f
+
/* M32R/X overrides. */
@@ -170,7 +170,7 @@
#define ENDFILE_SPEC "%(endfile_cpu)"
#undef LIB_SPEC
-\f
+
/* Run-time compilation parameters selecting different hardware subsets. */
#define TARGET_M32R (! TARGET_M32RX && ! TARGET_M32R2)
@@ -204,7 +204,7 @@
#ifndef SUBTARGET_OVERRIDE_OPTIONS
#define SUBTARGET_OVERRIDE_OPTIONS
#endif
-\f
+
/* Target machine storage layout. */
/* Define this if most significant bit is lowest numbered
@@ -222,7 +222,7 @@
#define UNITS_PER_WORD 4
/* Define this macro if it is advisable to hold scalars in registers
- in a wider mode than that declared by the program. In such cases,
+ in a wider mode than that declared by the program. In such cases,
the value is constrained to be within the bounds of the declared
type, but kept valid in the wider mode. The signedness of the
extension may differ from that of the type. */
@@ -272,7 +272,7 @@
/* Define LAVEL_ALIGN to calculate code length of PNOP at labels. */
#define LABEL_ALIGN(insn) 2
-\f
+
/* Layout of source language data types. */
#define SHORT_TYPE_SIZE 16
@@ -290,7 +290,7 @@
#define PTRDIFF_TYPE "long int"
#define WCHAR_TYPE "short unsigned int"
#define WCHAR_TYPE_SIZE 16
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -306,7 +306,7 @@
#endif
#define FIRST_PSEUDO_REGISTER (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS)
-
+
/* 1 for registers that have pervasive standard uses
and are not available for the register allocator.
@@ -383,7 +383,7 @@
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
m32r_hard_regno_rename_ok (OLD_REG, NEW_REG)
-\f
+
/* Register classes and constants. */
/* Define the classes of registers for register constraints in the
@@ -483,7 +483,7 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define CMP_INT16_P(X) ((X) >= - 0x7fff && (X) <= 0x8000)
#define UINT16_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0x0000ffff)
#define UINT24_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0x00ffffff)
-\f
+
/* Stack layout and stack pointer usage. */
/* Define this macro if pushing a word onto the stack moves the stack
@@ -533,7 +533,7 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define GPR_P(REGNO) (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO))
#define ACCUM_P(REGNO) ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO))
#define CARRY_P(REGNO) ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO))
-\f
+
/* Eliminating the frame and arg pointers. */
/* If defined, this macro specifies a table of register pairs used to
@@ -568,7 +568,7 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
gcc_unreachable (); \
} \
while (0)
-\f
+
/* Function argument passing. */
/* If defined, the maximum amount of space required for outgoing
@@ -598,12 +598,12 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define FUNCTION_ARG_REGNO_P(N) \
((unsigned) (N) < M32R_MAX_PARM_REGS)
-\f
+
/* Function results. */
/* Tell GCC to use TARGET_RETURN_IN_MEMORY. */
#define DEFAULT_PCC_STRUCT_RETURN 0
-\f
+
/* Function entry and exit. */
/* Initialize data used by insn expanders. This is called from
@@ -643,7 +643,7 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
fprintf (FILE, "\taddi sp,#4\n"); \
} \
while (0)
-\f
+
/* Trampolines. */
/* On the M32R, the trampoline is:
@@ -665,7 +665,7 @@ L2: .word STATIC
/* Length in bytes of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 24
-\f
+
#define RETURN_ADDR_RTX(COUNT, FRAME) m32r_return_addr (COUNT)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM)
@@ -688,13 +688,13 @@ L2: .word STATIC
|| CONST_INT_P (X) \
|| (GET_CODE (X) == CONST \
&& ! (flag_pic && ! m32r_legitimate_pic_operand_p (X))))
-\f
+
/* Condition code usage. */
/* Return nonzero if SELECT_CC_MODE will never return MODE for a
floating point inequality comparison. */
#define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
-\f
+
/* Costs. */
/* The cost of a branch insn. */
@@ -712,7 +712,7 @@ L2: .word STATIC
/* Define this macro if it is as good or better to call a constant
function address than to call an address kept in a register. */
#define NO_FUNCTION_CSE 1
-\f
+
/* Section selection. */
#define TEXT_SECTION_ASM_OP "\t.section .text"
@@ -724,7 +724,7 @@ L2: .word STATIC
Otherwise, the readonly data section is used.
This macro is irrelevant if there is no separate readonly data section. */
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
-\f
+
/* Position Independent Code. */
/* The register number of the register used to address a table of static
@@ -750,7 +750,7 @@ L2: .word STATIC
(including SYMBOL_REF) can be immediate operands when generating
position independent code. */
#define LEGITIMATE_PIC_OPERAND_P(X) m32r_legitimate_pic_operand_p (X)
-\f
+
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
@@ -904,7 +904,7 @@ L2: .word STATIC
ASM_OUTPUT_SKIP (FILE, SIZE ? SIZE : 1); \
} \
while (0)
-\f
+
/* Debugging information. */
/* Generate DWARF debugging information. */
@@ -914,7 +914,7 @@ L2: .word STATIC
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
-\f
+
/* Miscellaneous. */
/* Specify the machine mode that this machine uses
@@ -949,7 +949,7 @@ L2: .word STATIC
/* A function address in a call instruction. */
#define FUNCTION_MODE SImode
-\f
+
/* M32R function types. */
enum m32r_function_type
{
diff --git a/gcc/config/m68k/linux.h b/gcc/config/m68k/linux.h
index 2e1cb5498b8..f8ed21ac14f 100644
--- a/gcc/config/m68k/linux.h
+++ b/gcc/config/m68k/linux.h
@@ -90,7 +90,7 @@ along with GCC; see the file COPYING3. If not see
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
keep switch tables in the text section. */
-
+
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* Use the default action for outputting the case label. */
diff --git a/gcc/config/m68k/m68k.cc b/gcc/config/m68k/m68k.cc
index 0bff89bc39d..e21415ef5f9 100644
--- a/gcc/config/m68k/m68k.cc
+++ b/gcc/config/m68k/m68k.cc
@@ -196,7 +196,7 @@ static bool m68k_modes_tieable_p (machine_mode, machine_mode);
static machine_mode m68k_promote_function_mode (const_tree, machine_mode,
int *, const_tree, int);
static void m68k_asm_final_postscan_insn (FILE *, rtx_insn *insn, rtx [], int);
-\f
+
/* Initialize the GCC target structure. */
#if INT_OP_GROUP == INT_OP_DOT_WORD
@@ -374,7 +374,7 @@ static const struct attribute_spec m68k_attribute_table[] =
};
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Base flags for 68k ISAs. */
#define FL_FOR_isa_00 FL_ISA_68000
#define FL_FOR_isa_10 (FL_FOR_isa_00 | FL_ISA_68010)
@@ -460,7 +460,7 @@ static const struct m68k_target_selection all_microarchs[] =
#undef M68K_MICROARCH
{ NULL, unk_device, NULL, unk_arch, isa_max, 0 }
};
-\f
+
/* The entries associated with the -mcpu, -march and -mtune settings,
or null for options that have not been used. */
const struct m68k_target_selection *m68k_cpu_entry;
@@ -491,7 +491,7 @@ const char *m68k_symbolic_jump;
/* Enum variable that corresponds to m68k_symbolic_call values. */
enum M68K_SYMBOLIC_CALL m68k_symbolic_call_var;
-\f
+
/* Implement TARGET_OPTION_OVERRIDE. */
static void
@@ -751,7 +751,7 @@ m68k_cpp_cpu_family (const char *prefix)
return NULL;
return concat ("__m", prefix, "_family_", m68k_cpu_entry->family, NULL);
}
-\f
+
/* Return m68k_fk_interrupt_handler if FUNC has an "interrupt" or
"interrupt_handler" attribute and interrupt_thread if FUNC has an
"interrupt_thread" attribute. Otherwise, return
@@ -763,7 +763,7 @@ m68k_get_function_kind (tree func)
tree a;
gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
-
+
a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));
if (a != NULL_TREE)
return m68k_fk_interrupt_handler;
@@ -1175,7 +1175,7 @@ m68k_expand_prologue (void)
&& crtl->uses_pic_offset_table)
emit_insn (gen_load_got (pic_offset_table_rtx));
}
-\f
+
/* Return true if a simple (return) instruction is sufficient for this
instruction (i.e. if no epilogue is needed). */
@@ -1360,7 +1360,7 @@ m68k_expand_epilogue (bool sibcall_p)
if (!sibcall_p)
emit_jump_insn (ret_rtx);
}
-\f
+
/* Return true if PARALLEL contains register REGNO. */
static bool
m68k_reg_present_p (const_rtx parallel, unsigned int regno)
@@ -1391,7 +1391,7 @@ static bool
m68k_ok_for_sibcall_p (tree decl, tree exp)
{
enum m68k_function_kind kind;
-
+
/* We cannot use sibcalls for nested functions because we use the
static chain register for indirect calls. */
if (CALL_EXPR_STATIC_CHAIN (exp))
@@ -1427,7 +1427,7 @@ m68k_ok_for_sibcall_p (tree decl, tree exp)
the same. */
if (decl && m68k_get_function_kind (decl) == kind)
return true;
-
+
return false;
}
@@ -1551,7 +1551,7 @@ m68k_legitimize_address (rtx x, rtx oldx, machine_mode mode)
return x;
}
-\f
+
/* For eliding comparisons, we remember how the flags were set.
FLAGS_COMPARE_OP0 and FLAGS_COMPARE_OP1 are remembered for a direct
comparison, they take priority. FLAGS_OPERAND1 and FLAGS_OPERAND2
@@ -1722,7 +1722,7 @@ m68k_asm_final_postscan_insn (FILE *, rtx_insn *insn, rtx [], int)
return;
}
-/* Output a dbCC; jCC sequence. Note we do not handle the
+/* Output a dbCC; jCC sequence. Note we do not handle the
floating point version of this sequence (Fdbcc).
OPERANDS are as in the two peepholes. CODE is the code
returned by m68k_output_branch_<mode>. */
@@ -2017,7 +2017,7 @@ m68k_output_bftst (rtx zxop0, rtx zxop1, rtx zxop2, rtx_code code)
output_asm_insn ("bftst %0{%b2:%b1}", ops);
return code;
}
-\f
+
/* Return true if X is a legitimate base register. STRICT_P says
whether we need strict checking. */
@@ -2589,19 +2589,19 @@ m68k_wrap_symbol_into_got_ref (rtx x, enum m68k_reloc reloc, rtx temp_reg)
/* Legitimize PIC addresses. If the address is already
position-independent, we return ORIG. Newly generated
position-independent addresses go to REG. If we need more
- than one register, we lose.
+ than one register, we lose.
An address is legitimized by making an indirect reference
through the Global Offset Table with the name of the symbol
- used as an offset.
+ used as an offset.
- The assembler and linker are responsible for placing the
+ The assembler and linker are responsible for placing the
address of the symbol in the GOT. The function prologue
is responsible for initializing a5 to the starting address
of the GOT.
The assembler is also responsible for translating a symbol name
- into a constant displacement from the start of the GOT.
+ into a constant displacement from the start of the GOT.
A quick example may make things a little clearer:
@@ -2621,9 +2621,9 @@ m68k_wrap_symbol_into_got_ref (rtx x, enum m68k_reloc reloc, rtx temp_reg)
movel a5@(_foo:w), a0
movel #12345, a0@
-
- That (in a nutshell) is how *all* symbol and label references are
+
+ That (in a nutshell) is how *all* symbol and label references are
handled. */
rtx
@@ -2652,7 +2652,7 @@ legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED,
/* legitimize both operands of the PLUS */
gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
-
+
base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
base == reg ? 0 : reg);
@@ -2714,13 +2714,13 @@ m68k_call_tls_get_addr (rtx x, rtx eqv, enum m68k_reloc reloc)
is the simpliest way of generating a call. The difference between
__tls_get_addr() and libcall is that the result is returned in D0
instead of A0. To workaround this, we use m68k_libcall_value_in_a0_p
- which temporarily switches returning the result to A0. */
+ which temporarily switches returning the result to A0. */
m68k_libcall_value_in_a0_p = true;
a0 = emit_library_call_value (m68k_get_tls_get_addr (), NULL_RTX, LCT_PURE,
Pmode, x, Pmode);
m68k_libcall_value_in_a0_p = false;
-
+
insns = get_insns ();
end_sequence ();
@@ -2748,7 +2748,7 @@ m68k_get_m68k_read_tp (void)
/* Emit instruction sequence that calls __m68k_read_tp.
A pseudo register with result of __m68k_read_tp call is returned. */
-static rtx
+static rtx
m68k_call_m68k_read_tp (void)
{
rtx a0;
@@ -2762,7 +2762,7 @@ m68k_call_m68k_read_tp (void)
is the simpliest way of generating a call. The difference between
__m68k_read_tp() and libcall is that the result is returned in D0
instead of A0. To workaround this, we use m68k_libcall_value_in_a0_p
- which temporarily switches returning the result to A0. */
+ which temporarily switches returning the result to A0. */
/* Emit the call sequence. */
m68k_libcall_value_in_a0_p = true;
@@ -2801,7 +2801,7 @@ m68k_legitimize_tls_address (rtx orig)
rtx eqv;
rtx a0;
rtx x;
-
+
/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
share the LDM result with other LD model accesses. */
eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
@@ -2908,7 +2908,7 @@ m68k_tls_reference_p (rtx x, bool legitimate_p)
}
}
-\f
+
#define USE_MOVQ(i) ((unsigned) ((i) + 128) <= 255)
@@ -4758,7 +4758,7 @@ m68k_output_scc_float (rtx_code code)
gcc_unreachable ();
}
}
-\f
+
const char *
output_move_const_double (rtx *operands)
{
@@ -4795,7 +4795,7 @@ output_move_const_single (rtx *operands)
to get the desired constant. */
/* This code has been fixed for cross-compilation. */
-
+
static int inited_68881_table = 0;
static const char *const strings_68881[7] = {
@@ -4863,7 +4863,7 @@ standard_68881_constant_p (rtx x)
if (real_identical (r, &values_68881[i]))
return (codes_68881[i]);
}
-
+
if (GET_MODE (x) == SFmode)
return 0;
@@ -4897,7 +4897,7 @@ floating_exact_log2 (rtx x)
return 0;
}
-\f
+
/* A C compound statement to output to stdio stream STREAM the
assembler syntax for an instruction operand X. X is an RTL
expression.
@@ -5152,7 +5152,7 @@ m68k_delegitimize_address (rtx orig_x)
unspec = XEXP (addr.offset, 0);
if (GET_CODE (unspec) == PLUS && CONST_INT_P (XEXP (unspec, 1)))
unspec = XEXP (unspec, 0);
- if (GET_CODE (unspec) != UNSPEC
+ if (GET_CODE (unspec) != UNSPEC
|| (XINT (unspec, 1) != UNSPEC_RELOC16
&& XINT (unspec, 1) != UNSPEC_RELOC32))
return orig_x;
@@ -5173,8 +5173,8 @@ m68k_delegitimize_address (rtx orig_x)
x = replace_equiv_address_nv (orig_x, x);
return x;
}
-
-\f
+
+
/* A C compound statement to output to stdio stream STREAM the
assembler syntax for an instruction operand that is a memory
reference whose address is ADDR. ADDR is an RTL expression.
@@ -5187,7 +5187,7 @@ m68k_delegitimize_address (rtx orig_x)
It is possible for PIC to generate a (plus (label_ref...) (reg...))
and we handle that just like we would a (plus (symbol_ref...) (reg...)).
- This routine is responsible for distinguishing between -fpic and -fPIC
+ This routine is responsible for distinguishing between -fpic and -fPIC
style relocations in an address. When generating -fpic code the
offset is output in word mode (e.g. movel a5@(_foo:w), a0). When generating
-fPIC code the offset is output in long mode (e.g. movel a5@(_foo:l), a0) */
@@ -5313,7 +5313,7 @@ print_operand_address (FILE *file, rtx addr)
}
}
}
-\f
+
/* Check for cases where a clr insns can be omitted from code using
strict_low_part sets. For example, the second clrl here is not needed:
clrl d0; movw a0@+,d0; use d0; clrl d0; movw a0@+; use d0; ...
@@ -6608,7 +6608,7 @@ m68k_sched_variable_issue (FILE *sched_dump ATTRIBUTE_UNUSED,
case CPU_CFV3:
insn_size = sched_get_attr_size_int (insn);
-
+
/* ColdFire V3 and V4 cores have instruction buffers that can
accumulate up to 8 instructions regardless of instructions'
sizes. So we should take care not to "prefetch" 24 one-word
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index 6f0bdd8dffa..cc35c9fdc65 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -272,7 +272,7 @@ along with GCC; see the file COPYING3. If not see
/* These are meant to be redefined in the host dependent files */
#define SUBTARGET_OVERRIDE_OPTIONS
-\f
+
/* target machine storage layout */
/* "long double" is the same as "double" on ColdFire and fido
@@ -315,7 +315,7 @@ along with GCC; see the file COPYING3. If not see
/* Maximum number of library IDs we permit with -mid-shared-library. */
#define MAX_LIBRARY_ID 255
-\f
+
/* Standard register usage. */
/* For the m68k, we give the data registers numbers 0-7,
@@ -413,7 +413,7 @@ along with GCC; see the file COPYING3. If not see
is passed to a function. */
#define M68K_STRUCT_VALUE_REGNUM A1_REG
-\f
+
/* The m68k has three kinds of registers, so eight classes would be
a complete set. One of them is not needed. */
@@ -462,7 +462,7 @@ extern enum reg_class regno_reg_class[];
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
((((CLASS1) == FP_REGS) != ((CLASS2) == FP_REGS)) ? 4 : 2)
-\f
+
/* Stack layout; function entry, exit and calling. */
#define STACK_GROWS_DOWNWARD 1
@@ -489,7 +489,7 @@ extern enum reg_class regno_reg_class[];
/* On the m68k, all arguments are usually pushed on the stack. */
#define FUNCTION_ARG_REGNO_P(N) 0
-\f
+
/* On the m68k, this is a single integer, which is a number of bytes
of arguments scanned so far. */
#define CUMULATIVE_ARGS int
@@ -554,7 +554,7 @@ __transfer_from_trampoline () \
asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
asm ("rts":); \
}
-\f
+
/* There are two registers that can always be eliminated on the m68k.
The frame pointer and the arg pointer can be replaced by either the
hard frame pointer or to the stack pointer, depending upon the
@@ -567,7 +567,7 @@ __transfer_from_trampoline () \
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = m68k_initial_elimination_offset(FROM, TO)
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT 1
@@ -620,7 +620,7 @@ __transfer_from_trampoline () \
/* 1 if X is an address register */
#define ADDRESS_REG_P(X) (REG_P (X) && ADDRESS_REGNO_P (REGNO (X)))
-\f
+
/* True if SYMBOL + OFFSET constants must refer to something within
SYMBOL's section. */
#ifndef M68K_OFFSETS_MUST_BE_WITHIN_SECTIONS_P
@@ -652,7 +652,7 @@ __transfer_from_trampoline () \
#define REG_OK_FOR_INDEX_P(X) \
m68k_legitimate_index_reg_p (X, REG_STRICT_P)
-\f
+
/* This address is OK as it stands. */
#define PIC_CASE_VECTOR_ADDRESS(index) index
#define CASE_VECTOR_MODE (TARGET_LONG_JUMP_TABLE_OFFSETS ? SImode : HImode)
@@ -670,7 +670,7 @@ __transfer_from_trampoline () \
#define Pmode SImode
#define FUNCTION_MODE QImode
-\f
+
/* Control the assembler format that we output. */
#define ASM_APP_ON "#APP\n"
diff --git a/gcc/config/m68k/m68kelf.h b/gcc/config/m68k/m68kelf.h
index 01ee724ef2b..bd6d7d81bb6 100644
--- a/gcc/config/m68k/m68kelf.h
+++ b/gcc/config/m68k/m68kelf.h
@@ -104,7 +104,7 @@ do { \
#define DEBUGGER_REGNO(REGNO) (REGNO)
#if 0
-/* SVR4 m68k assembler is bitching on the `comm i,1,1' which askes for
+/* SVR4 m68k assembler is bitching on the `comm i,1,1' which askes for
1 byte alignment. Don't generate alignment for COMMON seems to be
safer until we the assembler is fixed. */
#undef ASM_OUTPUT_ALIGNED_COMMON
@@ -126,7 +126,7 @@ do { \
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
keep switch tables in the text section. */
-
+
#define JUMP_TABLES_IN_TEXT_SECTION 1
/* In m68k svr4, using swbeg is the standard way to do switch
diff --git a/gcc/config/m68k/netbsd-elf.h b/gcc/config/m68k/netbsd-elf.h
index 4d4a6d71cc4..114426f5a9c 100644
--- a/gcc/config/m68k/netbsd-elf.h
+++ b/gcc/config/m68k/netbsd-elf.h
@@ -35,7 +35,7 @@ along with GCC; see the file COPYING3. If not see
} \
while (0)
-/* Don't try using XFmode on the 68010. */
+/* Don't try using XFmode on the 68010. */
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE (TARGET_68020 ? 80 : 64)
diff --git a/gcc/config/mcore/mcore-elf.h b/gcc/config/mcore/mcore-elf.h
index bf1b093d327..d007d693303 100644
--- a/gcc/config/mcore/mcore-elf.h
+++ b/gcc/config/mcore/mcore-elf.h
@@ -1,4 +1,4 @@
-/* Definitions of MCore target.
+/* Definitions of MCore target.
Copyright (C) 1998-2023 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
@@ -78,7 +78,7 @@ along with GCC; see the file COPYING3. If not see
ASM_OUTPUT_LABEL(FILE, NAME); \
} \
while (0)
-
+
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
@@ -121,5 +121,5 @@ along with GCC; see the file COPYING3. If not see
#define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"aw\""
#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"aw\""
-
+
#endif /* __MCORE_ELF_H__ */
diff --git a/gcc/config/mcore/mcore.cc b/gcc/config/mcore/mcore.cc
index e800af78e14..9ce982ac80f 100644
--- a/gcc/config/mcore/mcore.cc
+++ b/gcc/config/mcore/mcore.cc
@@ -147,7 +147,7 @@ static bool mcore_legitimate_address_p (machine_mode, rtx, bool,
addr_space_t);
static bool mcore_hard_regno_mode_ok (unsigned int, machine_mode);
static bool mcore_modes_tieable_p (machine_mode, machine_mode);
-\f
+
/* MCore specific attributes. */
static const struct attribute_spec mcore_attribute_table[] =
@@ -160,7 +160,7 @@ static const struct attribute_spec mcore_attribute_table[] =
mcore_handle_naked_attribute, NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_EXTERNAL_LIBCALL
#define TARGET_ASM_EXTERNAL_LIBCALL mcore_external_libcall
@@ -256,7 +256,7 @@ static const struct attribute_spec mcore_attribute_table[] =
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Adjust the stack and return the number of bytes taken to do it. */
static void
output_stack_adjust (int direction, int size)
@@ -293,12 +293,12 @@ output_stack_adjust (int direction, int size)
emit_insn (gen_movsi (nval, val));
val = nval;
}
-
+
if (direction > 0)
insn = gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, val);
else
insn = gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, val);
-
+
emit_insn (insn);
}
}
@@ -311,7 +311,7 @@ calc_live_regs (int * count)
{
int reg;
int live_regs_mask = 0;
-
+
* count = 0;
for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++)
@@ -336,7 +336,7 @@ mcore_print_operand_address (FILE * stream, machine_mode /*mode*/, rtx x)
case REG:
fprintf (stream, "(%s)", reg_names[REGNO (x)]);
break;
-
+
case PLUS:
{
rtx base = XEXP (x, 0);
@@ -463,25 +463,25 @@ mcore_const_costs (rtx exp, enum rtx_code code)
HOST_WIDE_INT val = INTVAL (exp);
/* Easy constants. */
- if ( CONST_OK_FOR_I (val)
- || CONST_OK_FOR_M (val)
- || CONST_OK_FOR_N (val)
+ if ( CONST_OK_FOR_I (val)
+ || CONST_OK_FOR_M (val)
+ || CONST_OK_FOR_N (val)
|| (code == PLUS && CONST_OK_FOR_L (val)))
- return 1;
+ return 1;
else if (code == AND
&& ( CONST_OK_FOR_M (~val)
|| CONST_OK_FOR_N (~val)))
return 2;
- else if (code == PLUS
- && ( CONST_OK_FOR_I (-val)
- || CONST_OK_FOR_M (-val)
- || CONST_OK_FOR_N (-val)))
- return 2;
+ else if (code == PLUS
+ && ( CONST_OK_FOR_I (-val)
+ || CONST_OK_FOR_M (-val)
+ || CONST_OK_FOR_N (-val)))
+ return 2;
- return 5;
+ return 5;
}
-/* What does an and instruction cost - we do this b/c immediates may
+/* What does an and instruction cost - we do this b/c immediates may
have been relaxed. We want to ensure that cse will cse relaxed immeds
out. Otherwise we'll get bad code (multiple reloads of the same const). */
@@ -494,7 +494,7 @@ mcore_and_cost (rtx x)
return 2;
val = INTVAL (XEXP (x, 1));
-
+
/* Do it directly. */
if (CONST_OK_FOR_K (val) || CONST_OK_FOR_M (~val))
return 2;
@@ -530,7 +530,7 @@ mcore_ior_cost (rtx x)
/* Takes two instructions to load. */
else if (TARGET_HARDLIT && mcore_const_ok_for_inline (val))
return 4;
-
+
/* Takes a lrw to load. */
return 5;
}
@@ -572,7 +572,7 @@ mcore_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
case FIX:
*total = COSTS_N_INSNS (100);
return true;
-
+
default:
return false;
}
@@ -590,7 +590,7 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
if (GET_CODE (op1) == CONST_INT)
{
HOST_WIDE_INT val = INTVAL (op1);
-
+
switch (code)
{
case GTU:
@@ -610,12 +610,12 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
code = code == LE ? LT : GE;
}
break;
-
+
default:
break;
}
}
-
+
if (CONSTANT_P (op1) && GET_CODE (op1) != CONST_INT)
op1 = force_reg (SImode, op1);
@@ -628,7 +628,7 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
code = NE;
invert = true;
/* FALLTHRU */
-
+
case NE: /* Use normal condition, cmpne. */
if (GET_CODE (op1) == CONST_INT && ! CONST_OK_FOR_K (INTVAL (op1)))
op1 = force_reg (SImode, op1);
@@ -638,7 +638,7 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
code = GT;
invert = true;
/* FALLTHRU */
-
+
case GT: /* Use normal condition, reversed cmplt. */
if (GET_CODE (op1) == CONST_INT)
op1 = force_reg (SImode, op1);
@@ -648,9 +648,9 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
code = LT;
invert = true;
/* FALLTHRU */
-
+
case LT: /* Use normal condition, cmplt. */
- if (GET_CODE (op1) == CONST_INT &&
+ if (GET_CODE (op1) == CONST_INT &&
/* covered by btsti x,31. */
INTVAL (op1) != 0 &&
! CONST_OK_FOR_J (INTVAL (op1)))
@@ -663,7 +663,7 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
code = LEU;
invert = true;
/* FALLTHRU */
-
+
case LEU: /* Use normal condition, reversed cmphs. */
if (GET_CODE (op1) == CONST_INT && INTVAL (op1) != 0)
op1 = force_reg (SImode, op1);
@@ -673,7 +673,7 @@ mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
code = GEU;
invert = true;
/* FALLTHRU */
-
+
case GEU: /* Use normal condition, cmphs. */
if (GET_CODE (op1) == CONST_INT && INTVAL (op1) != 0)
op1 = force_reg (SImode, op1);
@@ -712,13 +712,13 @@ mcore_output_call (rtx operands[], int index)
{
static char buffer[20];
rtx addr = operands [index];
-
+
if (REG_P (addr))
{
if (TARGET_CG_DATA)
{
gcc_assert (mcore_current_function_name);
-
+
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name,
"unknown", 1);
}
@@ -731,11 +731,11 @@ mcore_output_call (rtx operands[], int index)
{
gcc_assert (mcore_current_function_name);
gcc_assert (GET_CODE (addr) == SYMBOL_REF);
-
+
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name,
XSTR (addr, 0), 0);
}
-
+
sprintf (buffer, "jbsr\t%%%d", index);
}
@@ -749,15 +749,15 @@ const_ok_for_mcore (HOST_WIDE_INT value)
{
if (value >= 0 && value <= 127)
return 1;
-
+
/* Try exact power of two. */
if (CONST_OK_FOR_M (value))
return 1;
-
+
/* Try exact power of two - 1. */
if (CONST_OK_FOR_N (value) && value != -1)
return 1;
-
+
return 0;
}
@@ -767,7 +767,7 @@ int
mcore_const_ok_for_inline (HOST_WIDE_INT value)
{
HOST_WIDE_INT x, y;
-
+
return try_constant_tricks (value, & x, & y) > 0;
}
@@ -778,12 +778,12 @@ mcore_const_trick_uses_not (HOST_WIDE_INT value)
{
HOST_WIDE_INT x, y;
- return try_constant_tricks (value, & x, & y) == 2;
-}
+ return try_constant_tricks (value, & x, & y) == 2;
+}
/* Try tricks to load a constant inline and return the trick number if
success (0 is non-inlinable).
-
+
0: not inlinable
1: single instruction (do the usual thing)
2: single insn followed by a 'not'
@@ -805,8 +805,8 @@ try_constant_tricks (HOST_WIDE_INT value, HOST_WIDE_INT * x, HOST_WIDE_INT * y)
if (const_ok_for_mcore (value))
return 1; /* Do the usual thing. */
-
- if (! TARGET_HARDLIT)
+
+ if (! TARGET_HARDLIT)
return 0;
if (const_ok_for_mcore (~value))
@@ -912,13 +912,13 @@ try_constant_tricks (HOST_WIDE_INT value, HOST_WIDE_INT * x, HOST_WIDE_INT * y)
return 11;
}
-
+
return 0;
}
/* Check whether reg is dead at first. This is done by searching ahead
for either the next use (i.e., reg is live), a death note, or a set of
- reg. Don't just use dead_or_set_p() since reload does not always mark
+ reg. Don't just use dead_or_set_p() since reload does not always mark
deaths (especially if PRESERVE_DEATH_NOTES_REGNO_P is not defined). We
can ignore subregs by extracting the actual register. BRC */
@@ -1032,11 +1032,11 @@ mcore_output_bseti (rtx dst, int mask)
if ((mask & 0x1) == 0x1)
{
out_operands[1] = GEN_INT (bit);
-
+
output_asm_insn ("bseti\t%0,%1", out_operands);
}
mask >>= 1;
- }
+ }
return "";
}
@@ -1056,12 +1056,12 @@ mcore_output_bclri (rtx dst, int mask)
if ((mask & 0x1) == 0x0)
{
out_operands[1] = GEN_INT (bit);
-
+
output_asm_insn ("bclri\t%0,%1", out_operands);
}
-
+
mask >>= 1;
- }
+ }
return "";
}
@@ -1098,7 +1098,7 @@ mcore_output_cmov (rtx operands[], int cmp_t, const char * test)
/* First output the test if folded into the pattern. */
- if (test)
+ if (test)
output_asm_insn (test, operands);
/* Load the constant - for now, only support constants that can be
@@ -1111,7 +1111,7 @@ mcore_output_cmov (rtx operands[], int cmp_t, const char * test)
output_asm_insn ("bgeni\t%0,%P1", out_operands);
else if (CONST_OK_FOR_N (load_value))
output_asm_insn ("bmaski\t%0,%N1", out_operands);
-
+
/* Output the constant adjustment. */
if (load_value > adjust_value)
{
@@ -1131,7 +1131,7 @@ mcore_output_cmov (rtx operands[], int cmp_t, const char * test)
return "";
}
-/* Outputs the peephole for moving a constant that gets not'ed followed
+/* Outputs the peephole for moving a constant that gets not'ed followed
by an and (i.e. combine the not and the and into andn). BRC */
const char *
@@ -1152,15 +1152,15 @@ mcore_output_andn (rtx insn ATTRIBUTE_UNUSED, rtx operands[])
if (x >= 0 && x <= 127)
load_op = "movi\t%0,%1";
-
+
/* Try exact power of two. */
else if (CONST_OK_FOR_M (x))
load_op = "bgeni\t%0,%P1";
-
+
/* Try exact power of two - 1. */
else if (CONST_OK_FOR_N (x))
load_op = "bmaski\t%0,%N1";
-
+
else
{
load_op = "BADMOVI-andn\t%0, %1";
@@ -1193,14 +1193,14 @@ output_inline_const (machine_mode mode, rtx operands[])
turned into lrw's. Our caller uses try_constant_tricks to back
off to an lrw rather than calling this routine. */
gcc_assert (trick_no != 0);
-
+
if (trick_no == 1)
x = value;
/* operands: 0 = dst, 1 = load immed., 2 = immed. adjustment. */
out_operands[0] = operands[0];
out_operands[1] = GEN_INT (x);
-
+
if (trick_no > 2)
out_operands[2] = GEN_INT (y);
@@ -1212,20 +1212,20 @@ output_inline_const (machine_mode mode, rtx operands[])
if (x >= 0 && x <= 127)
sprintf (load_op, "movi\t%s,%%1", dst_fmt);
-
+
/* Try exact power of two. */
else if (CONST_OK_FOR_M (x))
sprintf (load_op, "bgeni\t%s,%%P1", dst_fmt);
-
+
/* Try exact power of two - 1. */
else if (CONST_OK_FOR_N (x))
sprintf (load_op, "bmaski\t%s,%%N1", dst_fmt);
-
+
else
{
sprintf (load_op, "BADMOVI-inline_const %s, %%1", dst_fmt);
gcc_unreachable ();
- }
+ }
switch (trick_no)
{
@@ -1266,7 +1266,7 @@ output_inline_const (machine_mode mode, rtx operands[])
default:
return "";
}
-
+
output_asm_insn (buf, out_operands);
return "";
@@ -1284,15 +1284,15 @@ mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
if (GET_CODE (dst) == REG)
{
if (GET_CODE (src) == REG)
- {
+ {
if (REGNO (src) == CC_REG) /* r-c */
- return "mvc\t%0";
- else
+ return "mvc\t%0";
+ else
return "mov\t%0,%1"; /* r-r*/
}
else if (GET_CODE (src) == MEM)
{
- if (GET_CODE (XEXP (src, 0)) == LABEL_REF)
+ if (GET_CODE (XEXP (src, 0)) == LABEL_REF)
return "lrw\t%0,[%1]"; /* a-R */
else
switch (GET_MODE (src)) /* r-m */
@@ -1310,7 +1310,7 @@ mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
else if (GET_CODE (src) == CONST_INT)
{
HOST_WIDE_INT x, y;
-
+
if (CONST_OK_FOR_I (INTVAL (src))) /* r-I */
return "movi\t%0,%1";
else if (CONST_OK_FOR_M (INTVAL (src))) /* r-M */
@@ -1319,7 +1319,7 @@ mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
return "bmaski\t%0,%N1\t// %1 %x1";
else if (try_constant_tricks (INTVAL (src), &x, &y)) /* R-P */
return output_inline_const (SImode, operands); /* 1-2 insns */
- else
+ else
return "lrw\t%0,%x1\t// %1"; /* Get it from literal pool. */
}
else
@@ -1357,7 +1357,7 @@ mcore_output_movedouble (rtx operands[], machine_mode mode ATTRIBUTE_UNUSED)
{
int dstreg = REGNO (dst);
int srcreg = REGNO (src);
-
+
/* Ensure the second source not overwritten. */
if (srcreg + 1 == dstreg)
return "mov %R0,%R1\n\tmov %0,%1";
@@ -1369,10 +1369,10 @@ mcore_output_movedouble (rtx operands[], machine_mode mode ATTRIBUTE_UNUSED)
rtx memexp = XEXP (src, 0);
int dstreg = REGNO (dst);
int basereg = -1;
-
+
if (GET_CODE (memexp) == LABEL_REF)
return "lrw\t%0,[%1]\n\tlrw\t%R0,[%R1]";
- else if (GET_CODE (memexp) == REG)
+ else if (GET_CODE (memexp) == REG)
basereg = REGNO (memexp);
else if (GET_CODE (memexp) == PLUS)
{
@@ -1391,7 +1391,7 @@ mcore_output_movedouble (rtx operands[], machine_mode mode ATTRIBUTE_UNUSED)
{
/* Just load them in reverse order. */
return "ldw\t%R0,%R1\n\tldw\t%0,%1";
-
+
/* XXX: alternative: move basereg to basereg+1
and then fall through. */
}
@@ -1449,7 +1449,7 @@ mcore_arith_S_operand (rtx op)
{
if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_M (~INTVAL (op)))
return 1;
-
+
return 0;
}
@@ -1484,7 +1484,7 @@ mcore_expand_insv (rtx operands[])
gen_rtx_IOR (SImode, operands[0],
GEN_INT (mask))));
}
-
+
return 1;
}
@@ -1496,7 +1496,7 @@ mcore_expand_insv (rtx operands[])
if (width == 8 && posn % 8 == 0)
/* Byte sized and aligned; let caller break it up. */
return 0;
-
+
if (width == 16 && posn % 16 == 0)
/* Short sized and aligned; let caller break it up. */
return 0;
@@ -1539,7 +1539,7 @@ mcore_expand_insv (rtx operands[])
bits. */
if (width + posn != (int) GET_MODE_SIZE (SImode))
{
- ereg = force_reg (SImode, GEN_INT ((1 << width) - 1));
+ ereg = force_reg (SImode, GEN_INT ((1 << width) - 1));
emit_insn (gen_rtx_SET (sreg, gen_rtx_AND (SImode, sreg, ereg)));
}
@@ -1547,13 +1547,13 @@ mcore_expand_insv (rtx operands[])
if (posn != 0)
emit_insn (gen_rtx_SET (sreg, gen_rtx_ASHIFT (SImode, sreg,
GEN_INT (posn))));
-
+
emit_insn (gen_rtx_SET (operands[0],
gen_rtx_IOR (SImode, operands[0], sreg)));
return 1;
}
-\f
+
/* ??? Block move stuff stolen from m88k. This code has not been
verified for correctness. */
@@ -1630,7 +1630,7 @@ block_move_sequence (rtx dst_mem, rtx src_mem, int size, int align)
if (active[phase])
{
active[phase] = false;
-
+
x = adjust_address (dst_mem, mode[phase], offset_st);
emit_insn (gen_rtx_SET (x, temp[phase]));
@@ -1684,7 +1684,7 @@ mcore_expand_block_move (rtx *operands)
return false;
}
-\f
+
/* Code to generate prologue and epilogue sequences. */
static int number_of_regs_before_varargs;
@@ -1712,11 +1712,11 @@ layout_mcore_frame (struct mcore_frame * infp)
/* Might have to spill bytes to re-assemble a big argument that
was passed partially in registers and partially on the stack. */
nbytes = crtl->args.pretend_args_size;
-
+
/* Determine how much space for spilled anonymous args (e.g., stdarg). */
if (current_function_anonymous_args)
nbytes += (NPARM_REGS - number_of_regs_before_varargs) * UNITS_PER_WORD;
-
+
infp->arg_size = nbytes;
/* How much space to save non-volatile registers we stomp. */
@@ -1730,7 +1730,7 @@ layout_mcore_frame (struct mcore_frame * infp)
/* Make sure we have a whole number of words for the locals. */
if (infp->local_size % STACK_BYTES)
infp->local_size = (infp->local_size + STACK_BYTES - 1) & ~ (STACK_BYTES -1);
-
+
/* Only thing we know we have to pad is the outbound space, since
we've aligned our locals assuming that base of locals is aligned. */
infp->pad_local = 0;
@@ -1765,23 +1765,23 @@ layout_mcore_frame (struct mcore_frame * infp)
step = localregarg + infp->pad_reg;
infp->reg_offset = infp->local_size;
-
+
if (outbounds + step <= ADDI_REACH && !frame_pointer_needed)
{
step += outbounds;
infp->reg_offset += outbounds;
outbounds = 0;
}
-
+
infp->arg_offset = step - 4;
infp->growth[growths++] = step;
infp->reg_growth = growths;
infp->local_growth = growths;
-
+
/* If we haven't already folded it in. */
if (outbounds)
infp->growth[growths++] = outbounds;
-
+
goto finish;
}
@@ -1803,7 +1803,7 @@ layout_mcore_frame (struct mcore_frame * infp)
step = ADDI_REACH; /* As much up front as we can. */
if (step > all)
step = all;
-
+
/* XXX: Consider whether step will still be aligned; we believe so. */
infp->arg_offset = step - 4;
infp->growth[growths++] = step;
@@ -1829,7 +1829,7 @@ layout_mcore_frame (struct mcore_frame * infp)
/* Finish off if we need to do so. */
if (outbounds)
infp->growth[growths++] = outbounds;
-
+
goto finish;
}
@@ -1845,28 +1845,28 @@ layout_mcore_frame (struct mcore_frame * infp)
if (infp->local_size % STACK_BYTES)
infp->pad_local = STACK_BYTES - (infp->local_size % STACK_BYTES);
-
+
step = infp->local_size + infp->pad_local;
-
+
if (!frame_pointer_needed)
{
step += outbounds;
outbounds = 0;
}
-
+
infp->growth[growths++] = step;
infp->local_growth = growths;
/* If there's any left to be done. */
if (outbounds)
infp->growth[growths++] = outbounds;
-
+
goto finish;
}
/* XXX: optimizations that we'll want to play with....
-- regarg is not aligned, but it's a small number of registers;
- use some of localsize so that regarg is aligned and then
+ use some of localsize so that regarg is aligned and then
save the registers. */
/* Simple encoding; plods down the stack buying the pieces as it goes.
@@ -1875,27 +1875,27 @@ layout_mcore_frame (struct mcore_frame * infp)
-- but it is safe for all alignments. */
if (regarg % STACK_BYTES != 0)
infp->pad_reg = STACK_BYTES - (regarg % STACK_BYTES);
-
+
infp->growth[growths++] = infp->arg_size + infp->reg_size + infp->pad_reg;
infp->reg_growth = growths;
infp->arg_offset = infp->growth[0] - 4;
infp->reg_offset = 0;
-
+
if (frame_pointer_needed)
{
if (infp->local_size % STACK_BYTES != 0)
infp->pad_local = STACK_BYTES - (infp->local_size % STACK_BYTES);
-
+
infp->growth[growths++] = infp->local_size + infp->pad_local;
infp->local_growth = growths;
-
+
infp->growth[growths++] = outbounds;
}
else
{
if ((infp->local_size + outbounds) % STACK_BYTES != 0)
infp->pad_local = STACK_BYTES - ((infp->local_size + outbounds) % STACK_BYTES);
-
+
infp->growth[growths++] = infp->local_size + infp->pad_local + outbounds;
infp->local_growth = growths;
}
@@ -1904,7 +1904,7 @@ layout_mcore_frame (struct mcore_frame * infp)
finish:
gcc_assert (infp->reg_offset >= 0);
gcc_assert (growths <= MAX_STACK_GROWS);
-
+
for (i = 0; i < growths; i++)
gcc_assert (!(infp->growth[i] % STACK_BYTES));
}
@@ -1956,12 +1956,12 @@ mcore_setup_incoming_varargs (cumulative_args_t args_so_far_v,
number_of_regs_before_varargs = *args_so_far;
if (!TYPE_NO_NAMED_ARGS_STDARG_P (TREE_TYPE (current_function_decl)))
number_of_regs_before_varargs += mcore_num_arg_regs (arg.mode, arg.type);
-
+
/* There is a bug somewhere in the arg handling code.
Until I can find it this workaround always pushes the
last named argument onto the stack. */
number_of_regs_before_varargs = *args_so_far;
-
+
/* The last named argument may be split between argument registers
and the stack. Allow for this here. */
if (number_of_regs_before_varargs > NPARM_REGS)
@@ -1977,7 +1977,7 @@ mcore_expand_prolog (void)
/* Find out what we're doing. */
layout_mcore_frame (&fi);
-
+
space_allocated = fi.arg_size + fi.reg_size + fi.local_size +
fi.outbound_size + fi.pad_outbound + fi.pad_local + fi.pad_reg;
@@ -1987,17 +1987,17 @@ mcore_expand_prolog (void)
rtx x;
x = DECL_RTL (current_function_decl);
-
+
gcc_assert (GET_CODE (x) == MEM);
-
+
x = XEXP (x, 0);
-
+
gcc_assert (GET_CODE (x) == SYMBOL_REF);
-
+
free (mcore_current_function_name);
-
+
mcore_current_function_name = xstrdup (XSTR (x, 0));
-
+
ASM_OUTPUT_CG_NODE (asm_out_file, mcore_current_function_name, space_allocated);
if (cfun->calls_alloca)
@@ -2017,7 +2017,7 @@ mcore_expand_prolog (void)
if (mcore_naked_function_p ())
return;
-
+
/* Handle stdarg+regsaves in one shot: can't be more than 64 bytes. */
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
@@ -2048,7 +2048,7 @@ mcore_expand_prolog (void)
{
int i;
int offs = fi.reg_offset;
-
+
for (i = 15; i >= 0; i--)
{
if (offs == 0 && i == 15 && ((fi.reg_mask & 0xc000) == 0xc000))
@@ -2084,7 +2084,7 @@ mcore_expand_prolog (void)
/* If we haven't already purchased to 'fp'. */
if (growth < fi.local_growth)
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
-
+
emit_insn (gen_movsi (frame_pointer_rtx, stack_pointer_rtx));
/* ... and then go any remaining distance for outbounds, etc. */
@@ -2108,7 +2108,7 @@ mcore_expand_epilog (void)
int offs;
int growth = MAX_STACK_GROWS - 1 ;
-
+
/* Find out what we're doing. */
layout_mcore_frame(&fi);
@@ -2137,9 +2137,9 @@ mcore_expand_epilog (void)
register save information back off the stack. */
while (growth >= fi.reg_growth)
output_stack_adjust ( 1, fi.growth[growth--]);
-
+
offs = fi.reg_offset;
-
+
for (i = 15; i >= 0; i--)
{
if (offs == 0 && i == 15 && ((fi.reg_mask & 0xc000) == 0xc000))
@@ -2148,10 +2148,10 @@ mcore_expand_epilog (void)
/* Find the starting register. */
first_reg = 15;
-
+
while (fi.reg_mask & (1 << first_reg))
first_reg--;
-
+
first_reg++;
emit_insn (gen_load_multiple (gen_rtx_REG (SImode, first_reg),
@@ -2177,7 +2177,7 @@ mcore_expand_epilog (void)
while (growth >= 0)
output_stack_adjust ( 1, fi.growth[growth--]);
}
-\f
+
/* This code is borrowed from the SH port. */
/* The MCORE cannot load a large constant into a register, constants have to
@@ -2257,16 +2257,16 @@ mcore_output_jump_label_table (void)
if (pool_size)
{
fprintf (asm_out_file, "\t.align 2\n");
-
+
for (i = 0; i < pool_size; i++)
{
pool_node * p = pool_vector + i;
(*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (p->label));
-
+
output_asm_insn (".long %0", &p->value);
}
-
+
pool_size = 0;
}
@@ -2279,7 +2279,7 @@ static cond_type
is_cond_candidate (rtx insn)
{
/* The only things we conditionalize are those that can be directly
- changed into a conditional. Only bother with SImode items. If
+ changed into a conditional. Only bother with SImode items. If
we wanted to be a little more aggressive, we could also do other
modes such as DImode with reg-reg move or load 0. */
if (NONJUMP_INSN_P (insn))
@@ -2296,7 +2296,7 @@ is_cond_candidate (rtx insn)
GET_CODE (dst) != SUBREG) ||
GET_MODE (dst) != SImode)
return COND_NO;
-
+
src = XEXP (pat, 1);
if ((GET_CODE (src) == REG ||
@@ -2304,7 +2304,7 @@ is_cond_candidate (rtx insn)
GET_CODE (SUBREG_REG (src)) == REG)) &&
GET_MODE (src) == SImode)
return COND_MOV_INSN;
- else if (GET_CODE (src) == CONST_INT &&
+ else if (GET_CODE (src) == CONST_INT &&
INTVAL (src) == 0)
return COND_CLR_INSN;
else if (GET_CODE (src) == PLUS &&
@@ -2330,7 +2330,7 @@ is_cond_candidate (rtx insn)
/* Some insns that we don't bother with:
(set (rx:DI) (ry:DI))
(set (rx:DI) (const_int 0))
- */
+ */
}
else if (JUMP_P (insn)
@@ -2369,7 +2369,7 @@ emit_new_cond_insn (rtx_insn *insn, int cond)
switch (num)
{
- case COND_MOV_INSN:
+ case COND_MOV_INSN:
case COND_CLR_INSN:
if (cond)
c_insn = gen_movt0 (dst, src, dst);
@@ -2383,7 +2383,7 @@ emit_new_cond_insn (rtx_insn *insn, int cond)
else
c_insn = gen_incscc_false (dst, dst);
break;
-
+
case COND_DEC_INSN:
if (cond)
c_insn = gen_decscc (dst, dst);
@@ -2411,7 +2411,7 @@ emit_new_cond_insn (rtx_insn *insn, int cond)
used any more beyond this point for the mcore). */
REG_NOTES (c_insn) = REG_NOTES (insn);
}
-
+
if (num == COND_BRANCH_INSN)
{
/* For jumps, we need to be a little bit careful and emit the new jump
@@ -2419,32 +2419,32 @@ emit_new_cond_insn (rtx_insn *insn, int cond)
This way, the barrier following the old (uncond) jump will get
deleted, but the label won't. */
c_insn = emit_jump_insn_before (c_insn, insn);
-
+
++ LABEL_NUSES (dst);
-
+
JUMP_LABEL (c_insn) = dst;
}
else
c_insn = emit_insn_after (c_insn, insn);
delete_insn (insn);
-
+
return as_a <rtx_insn *> (c_insn);
}
/* Attempt to change a basic block into a series of conditional insns. This
- works by taking the branch at the end of the 1st block and scanning for the
+ works by taking the branch at the end of the 1st block and scanning for the
end of the 2nd block. If all instructions in the 2nd block have cond.
versions and the label at the start of block 3 is the same as the target
from the branch at block 1, then conditionalize all insn in block 2 using
the inverse condition of the branch at block 1. (Note I'm bending the
definition of basic block here.)
- e.g., change:
+ e.g., change:
bt L2 <-- end of block 1 (delete)
- mov r7,r8
- addu r7,1
+ mov r7,r8
+ addu r7,1
br L3 <-- end of block 2
L2: ... <-- start of block 3 (NUSES==1)
@@ -2473,7 +2473,7 @@ conditionalize_block (rtx_insn *first)
int br_lab_num;
int blk_size = 0;
-
+
/* Check that the first insn is a candidate conditional jump. This is
the one that we'll eliminate. If not, advance to the next insn to
try. */
@@ -2506,12 +2506,12 @@ conditionalize_block (rtx_insn *first)
/* Scan forward for the start of block 2: it must start with a
label and that label must be the same as the branch target
label from block 1. We don't care about whether block 2 actually
- ends with a branch or a label (an uncond. branch is
+ ends with a branch or a label (an uncond. branch is
conditionalizable). */
for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
{
enum rtx_code code;
-
+
code = GET_CODE (insn);
/* Look for the label at the start of block 3. */
@@ -2523,7 +2523,7 @@ conditionalize_block (rtx_insn *first)
just return the next insn so we can start over from that point. */
if (code != BARRIER && code != NOTE && !is_cond_candidate (insn))
return NEXT_INSN (insn);
-
+
/* Remember the last real insn before the label (i.e. end of block 2). */
if (code == JUMP_INSN || code == INSN)
{
@@ -2534,16 +2534,16 @@ conditionalize_block (rtx_insn *first)
if (!insn)
return insn;
-
- /* It is possible for this optimization to slow performance if the blocks
- are long. This really depends upon whether the branch is likely taken
+
+ /* It is possible for this optimization to slow performance if the blocks
+ are long. This really depends upon whether the branch is likely taken
or not. If the branch is taken, we slow performance in many cases. But,
- if the branch is not taken, we always help performance (for a single
- block, but for a double block (i.e. when the optimization is re-applied)
+ if the branch is not taken, we always help performance (for a single
+ block, but for a double block (i.e. when the optimization is re-applied)
this is not true since the 'right thing' depends on the overall length of
- the collapsed block). As a compromise, don't apply this optimization on
+ the collapsed block). As a compromise, don't apply this optimization on
blocks larger than size 2 (unlikely for the mcore) when speed is important.
- the best threshold depends on the latencies of the instructions (i.e.,
+ the best threshold depends on the latencies of the instructions (i.e.,
the branch penalty). */
if (optimize > 1 && blk_size > 2)
return insn;
@@ -2552,16 +2552,16 @@ conditionalize_block (rtx_insn *first)
it is the destination of the branch from block 1. Also, all
instructions in the block 2 are conditionalizable. So, apply the
conditionalization and delete the branch. */
- start_blk_3_lab = insn;
-
- for (insn = NEXT_INSN (end_blk_1_br); insn != start_blk_3_lab;
+ start_blk_3_lab = insn;
+
+ for (insn = NEXT_INSN (end_blk_1_br); insn != start_blk_3_lab;
insn = NEXT_INSN (insn))
{
rtx_insn *newinsn;
if (insn->deleted ())
continue;
-
+
/* Try to form a conditional variant of the instruction and emit it. */
if ((newinsn = emit_new_cond_insn (insn, cond)))
{
@@ -2573,7 +2573,7 @@ conditionalize_block (rtx_insn *first)
}
/* Note whether we will delete the label starting blk 3 when the jump
- gets deleted. If so, we want to re-apply this optimization at the
+ gets deleted. If so, we want to re-apply this optimization at the
last real instruction right before the label. */
if (LABEL_NUSES (start_blk_3_lab) == 1)
{
@@ -2588,7 +2588,7 @@ conditionalize_block (rtx_insn *first)
if (! start_blk_3_lab)
return end_blk_2_insn;
-
+
/* Return the insn right after the label at the start of block 3. */
return NEXT_INSN (start_blk_3_lab);
}
@@ -2597,8 +2597,8 @@ conditionalize_block (rtx_insn *first)
outer loop that traverses through the insns scanning for a branch
that signifies an opportunity to apply the optimization. Note that
this optimization is applied late. If we could apply it earlier,
- say before cse 2, it may expose more optimization opportunities.
- but, the pay back probably isn't really worth the effort (we'd have
+ say before cse 2, it may expose more optimization opportunities.
+ but, the pay back probably isn't really worth the effort (we'd have
to update all reg/flow/notes/links/etc to make it work - and stick it
in before cse 2). */
@@ -2618,17 +2618,17 @@ mcore_reorg (void)
{
/* Reset this variable. */
current_function_anonymous_args = 0;
-
+
if (optimize == 0)
return;
-
+
/* Conditionalize blocks where we can. */
conditionalize_optimization ();
/* Literal pool generation is now pushed off until the assembler. */
}
-\f
+
/* Return true if X is something that can be moved directly into r15. */
bool
@@ -2687,7 +2687,7 @@ mcore_is_same_reg (rtx x, rtx y)
/* Strip any and all of the subreg wrappers. */
while (GET_CODE (x) == SUBREG)
x = SUBREG_REG (x);
-
+
while (GET_CODE (y) == SUBREG)
y = SUBREG_REG (y);
@@ -2705,8 +2705,8 @@ mcore_option_override (void)
target_flags |= MASK_M340;
}
-\f
-/* Compute the number of word sized registers needed to
+
+/* Compute the number of word sized registers needed to
hold a function argument of mode MODE and type TYPE. */
int
@@ -2745,11 +2745,11 @@ handle_structs_in_regs (machine_mode mode, const_tree type, int reg)
&& (size % UNITS_PER_WORD != 0)
&& (reg + mcore_num_arg_regs (mode, type) <= (FIRST_PARM_REG + NPARM_REGS)))
{
- rtx arg_regs [NPARM_REGS];
+ rtx arg_regs [NPARM_REGS];
int nregs;
rtx result;
rtvec rtvec;
-
+
for (nregs = 0; size > 0; size -= UNITS_PER_WORD)
{
arg_regs [nregs] =
@@ -2762,11 +2762,11 @@ handle_structs_in_regs (machine_mode mode, const_tree type, int reg)
gcc_assert (ARRAY_SIZE (arg_regs) == 6);
rtvec = gen_rtvec (nregs, arg_regs[0], arg_regs[1], arg_regs[2],
arg_regs[3], arg_regs[4], arg_regs[5]);
-
+
result = gen_rtx_PARALLEL (mode, rtvec);
return result;
}
-
+
return gen_rtx_REG (mode, reg);
}
@@ -2775,12 +2775,12 @@ mcore_function_value (const_tree valtype, const_tree func)
{
machine_mode mode;
int unsigned_p;
-
+
mode = TYPE_MODE (valtype);
/* Since we promote return types, we must promote the mode here too. */
mode = promote_function_mode (valtype, mode, &unsigned_p, func, 1);
-
+
return handle_structs_in_regs (mode, valtype, FIRST_RET_REG);
}
@@ -2801,7 +2801,7 @@ static rtx
mcore_function_arg (cumulative_args_t cum, const function_arg_info &arg)
{
int arg_reg;
-
+
if (!arg.named || arg.end_marker_p ())
return 0;
@@ -2809,7 +2809,7 @@ mcore_function_arg (cumulative_args_t cum, const function_arg_info &arg)
return 0;
arg_reg = ROUND_REG (*get_cumulative_args (cum), arg.mode);
-
+
if (arg_reg < NPARM_REGS)
return handle_structs_in_regs (arg.mode, arg.type,
FIRST_PARM_REG + arg_reg);
@@ -2852,7 +2852,7 @@ mcore_arg_partial_bytes (cumulative_args_t cum, const function_arg_info &arg)
if (targetm.calls.must_pass_in_stack (arg))
return 0;
-
+
/* REG is not the *hardware* register number of the register that holds
the argument, it is the *argument* register number. So for example,
the first argument to a function goes in argument register 0, which
@@ -2876,7 +2876,7 @@ mcore_arg_partial_bytes (cumulative_args_t cum, const function_arg_info &arg)
/* Return partially in registers and partially on the stack. */
return reg * UNITS_PER_WORD;
}
-\f
+
/* Return nonzero if SYMBOL is marked as being dllexport'd. */
int
@@ -2904,12 +2904,12 @@ mcore_mark_dllexport (tree decl)
tree idp;
rtlname = XEXP (DECL_RTL (decl), 0);
-
+
if (GET_CODE (rtlname) == MEM)
rtlname = XEXP (rtlname, 0);
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
oldname = XSTR (rtlname, 0);
-
+
if (mcore_dllexport_name_p (oldname))
return; /* Already done. */
@@ -2939,12 +2939,12 @@ mcore_mark_dllimport (tree decl)
rtx newrtl;
rtlname = XEXP (DECL_RTL (decl), 0);
-
+
if (GET_CODE (rtlname) == MEM)
rtlname = XEXP (rtlname, 0);
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
oldname = XSTR (rtlname, 0);
-
+
gcc_assert (!mcore_dllexport_name_p (oldname));
if (mcore_dllimport_name_p (oldname))
return; /* Already done. */
@@ -2960,7 +2960,7 @@ mcore_mark_dllimport (tree decl)
error ("initialized variable %q+D is marked dllimport", decl);
return;
}
-
+
/* `extern' needn't be specified with dllimport.
Specify `extern' now and hope for the best. Sigh. */
if (TREE_CODE (decl) == VAR_DECL
@@ -3019,7 +3019,7 @@ mcore_encode_section_info (tree decl, rtx rtl ATTRIBUTE_UNUSED, int first ATTRIB
mcore_mark_dllexport (decl);
else if (mcore_dllimport_p (decl))
mcore_mark_dllimport (decl);
-
+
/* It might be that DECL has already been marked as dllimport, but
a subsequent definition nullified that. The attribute is gone
but DECL_RTL still has @i.__imp_foo. We need to remove that. */
@@ -3084,7 +3084,7 @@ mcore_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
const char * prefix;
name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl));
-
+
/* Strip off any encoding in name. */
name = (* targetm.strip_name_encoding) (name);
@@ -3099,10 +3099,10 @@ mcore_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
prefix = ".rdata$";
else
prefix = ".data$";
-
+
len = strlen (name) + strlen (prefix);
string = XALLOCAVEC (char, len + 1);
-
+
sprintf (string, "%s%s", prefix, name);
set_decl_section_name (decl, string);
@@ -3124,7 +3124,7 @@ mcore_warn_func_return (tree decl)
#ifdef OBJECT_FORMAT_ELF
static void
-mcore_asm_named_section (const char *name,
+mcore_asm_named_section (const char *name,
unsigned int flags ATTRIBUTE_UNUSED,
tree decl ATTRIBUTE_UNUSED)
{
@@ -3214,13 +3214,13 @@ mcore_reg_ok_for_base_p (const_rtx reg, bool strict_p)
static bool
mcore_base_register_rtx_p (const_rtx x, bool strict_p)
{
- return REG_P(x) && mcore_reg_ok_for_base_p (x, strict_p);
+ return REG_P(x) && mcore_reg_ok_for_base_p (x, strict_p);
}
/* A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60,
and for DI is 0..56 because we use two SI loads, etc. */
-static bool
+static bool
mcore_legitimate_index_p (machine_mode mode, const_rtx op)
{
if (CONST_INT_P (op))
@@ -3237,11 +3237,11 @@ mcore_legitimate_index_p (machine_mode mode, const_rtx op)
if (GET_MODE_SIZE (mode) == 1
&& ((unsigned HOST_WIDE_INT) INTVAL (op)) <= 15)
return true;
- }
+ }
return false;
}
-
+
/* Worker function for TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P.
Allow REG
diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h
index 3de4f0b336a..c22dc7aa117 100644
--- a/gcc/config/mcore/mcore.h
+++ b/gcc/config/mcore/mcore.h
@@ -22,7 +22,7 @@
#define GCC_MCORE_H
/* RBE: need to move these elsewhere. */
-#undef LIKE_PPC_ABI
+#undef LIKE_PPC_ABI
#define MCORE_STRUCT_ARGS
/* RBE: end of "move elsewhere". */
@@ -80,7 +80,7 @@
#define TARGET_8ALIGN 1
extern char * mcore_current_function_name;
-
+
/* The MCore ABI says that bitfields are unsigned by default. */
#define CC1_SPEC "-funsigned-bitfields"
@@ -139,7 +139,7 @@ extern char * mcore_current_function_name;
/* Every structures size must be a multiple of 8 bits. */
#define STRUCTURE_SIZE_BOUNDARY 8
-/* Look at the fundamental type that is used for a bit-field and use
+/* Look at the fundamental type that is used for a bit-field and use
that to impose alignment on the enclosing structure.
struct s {int a:8}; should have same alignment as "int", not "char". */
#define PCC_BITFIELD_TYPE_MATTERS 1
@@ -153,14 +153,14 @@ extern char * mcore_current_function_name;
(TREE_CODE (TYPE) == ARRAY_TYPE \
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
-
+
/* Set this nonzero if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 1
/* Standard register usage. */
-/* Register allocation for our first guess
+/* Register allocation for our first guess
r0 stack pointer
r1 scratch, target reg for xtrb?
@@ -336,7 +336,7 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
but prevents the compiler from extending the lifetime of these
registers. */
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
-
+
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS NO_REGS
#define BASE_REG_CLASS GENERAL_REGS
@@ -372,7 +372,7 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
mcore_secondary_reload_class (CLASS, MODE, X)
/* Return the maximum number of consecutive registers
- needed to represent mode MODE in a register of class CLASS.
+ needed to represent mode MODE in a register of class CLASS.
On MCore this is the size of MODE in words. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
@@ -437,9 +437,9 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
#define ROUND_ADVANCE(SIZE) \
((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-/* Round a register number up to a proper boundary for an arg of mode
- MODE.
-
+/* Round a register number up to a proper boundary for an arg of mode
+ MODE.
+
We round to an even reg for things larger than a word. */
#define ROUND_REG(X, MODE) \
((TARGET_8ALIGN \
@@ -489,7 +489,7 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_OK_FOR_INDEX_P(REGNO) 0
-/* Maximum number of registers that can appear in a valid memory
+/* Maximum number of registers that can appear in a valid memory
address. */
#define MAX_REGS_PER_ADDRESS 1
@@ -590,7 +590,7 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
reg_names[STACK_POINTER_REGNUM], \
(STACK_BOUNDARY / BITS_PER_UNIT))
-
+
/* Output a reference to a label. */
#undef ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
@@ -617,8 +617,8 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
0 a call from src to dst
1 the call is special (e.g. dst is "unknown" or "alloca")
2 the call is special (e.g., the src is a table instead of routine)
-
- Frame sizes are augmented with timestamps to help later tools
+
+ Frame sizes are augmented with timestamps to help later tools
differentiate between static entities with same names in different
files. */
extern long mcore_current_compilation_timestamp;
@@ -676,7 +676,7 @@ extern long mcore_current_compilation_timestamp;
/* This says how to output an assembler line
to define a global common symbol, with alignment information. */
-/* XXX - for now we ignore the alignment. */
+/* XXX - for now we ignore the alignment. */
#undef ASM_OUTPUT_ALIGNED_COMMON
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
do \
diff --git a/gcc/config/microblaze/microblaze-c.cc b/gcc/config/microblaze/microblaze-c.cc
index 065351ad218..143b03ff43d 100644
--- a/gcc/config/microblaze/microblaze-c.cc
+++ b/gcc/config/microblaze/microblaze-c.cc
@@ -30,10 +30,10 @@
#define builtin_define(TXT) cpp_define (pfile, TXT)
#define builtin_assert(TXT) cpp_assert (pfile, TXT)
-/* Define preprocessor symbols for MicroBlaze.
+/* Define preprocessor symbols for MicroBlaze.
Symbols which do not start with __ are deprecated. */
-void
+void
microblaze_cpp_define (cpp_reader *pfile)
{
builtin_assert ("cpu=microblaze");
@@ -52,7 +52,7 @@ microblaze_cpp_define (cpp_reader *pfile)
builtin_define ("__BIG_ENDIAN__");
builtin_define ("__MICROBLAZEEB__");
}
- if (!TARGET_SOFT_MUL)
+ if (!TARGET_SOFT_MUL)
{
if (!flag_iso)
builtin_define ("HAVE_HW_MUL");
@@ -100,4 +100,4 @@ microblaze_cpp_define (cpp_reader *pfile)
builtin_define ("HAVE_HW_FPU_SQRT");
builtin_define ("__HAVE_HW_FPU_SQRT__");
}
-}
+}
diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
index 31a6515176b..663451cd7e8 100644
--- a/gcc/config/microblaze/microblaze-protos.h
+++ b/gcc/config/microblaze/microblaze-protos.h
@@ -35,7 +35,7 @@ extern bool microblaze_expand_block_move (rtx, rtx, rtx, rtx);
extern void microblaze_expand_divide (rtx *);
extern void microblaze_expand_conditional_branch (machine_mode, rtx *);
extern void microblaze_expand_conditional_branch_reg (machine_mode, rtx *);
-extern void microblaze_expand_conditional_branch_sf (rtx *);
+extern void microblaze_expand_conditional_branch_sf (rtx *);
extern int microblaze_can_use_return_insn (void);
extern void print_operand (FILE *, rtx, int);
extern void print_operand_address (FILE *, rtx);
@@ -62,6 +62,6 @@ extern void microblaze_eh_return (rtx op0);
#endif /* RTX_CODE */
/* Declare functions in microblaze-c.cc. */
-extern void microblaze_cpp_define (struct cpp_reader *);
+extern void microblaze_cpp_define (struct cpp_reader *);
#endif /* GCC_MICROBLAZE_PROTOS_H */
diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc
index 6df2c712cab..c0da236ad12 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -65,8 +65,8 @@ An invalid address.
ADDRESS_REG
-A natural register or a register + const_int offset address.
-The register satisfies microblaze_valid_base_register_p and the
+A natural register or a register + const_int offset address.
+The register satisfies microblaze_valid_base_register_p and the
offset is a const_arith_operand.
ADDRESS_REG_INDEX
@@ -99,7 +99,7 @@ enum microblaze_address_type
/* Classifies symbols
SYMBOL_TYPE_GENERAL
-
+
A general symbol. */
enum microblaze_symbol_type
{
@@ -120,7 +120,7 @@ enum tls_reloc {
struct microblaze_address_info
{
enum microblaze_address_type type;
- rtx regA; /* Contains valid values on ADDRESS_REG, ADDRESS_REG_INDEX,
+ rtx regA; /* Contains valid values on ADDRESS_REG, ADDRESS_REG_INDEX,
ADDRESS_SYMBOLIC. */
rtx regB; /* Contains valid values on ADDRESS_REG_INDEX. */
rtx offset; /* Contains valid values on ADDRESS_CONST_INT and ADDRESS_REG. */
@@ -143,7 +143,7 @@ struct GTY(()) microblaze_frame_info {
int initialized; /* != 0 if frame size already calculated. */
int num_gp; /* number of gp registers saved. */
long insns_len; /* length of insns. */
- int alloc_stack; /* Flag to indicate if the current function
+ int alloc_stack; /* Flag to indicate if the current function
must not create stack space. (As an optimization). */
};
@@ -158,18 +158,18 @@ static GTY(()) int microblaze_sched_use_dfa = 0;
data area takes 2 instructions). */
int microblaze_section_threshold = -1;
-/* Prevent scheduling potentially exception causing instructions in
+/* Prevent scheduling potentially exception causing instructions in
delay slots. -mcpu=v3.00.a or v4.00.a turns this on. */
int microblaze_no_unsafe_delay;
/* Set to one if the targeted core has the CLZ insn. */
int microblaze_has_clz = 0;
-/* Which CPU pipeline do we use. We haven't really standardized on a CPU
- version having only a particular type of pipeline. There can still be
- options on the CPU to scale pipeline features up or down. :(
- Bad Presentation (??), so we let the MD file rely on the value of
- this variable instead Making PIPE_5 the default. It should be backward
+/* Which CPU pipeline do we use. We haven't really standardized on a CPU
+ version having only a particular type of pipeline. There can still be
+ options on the CPU to scale pipeline features up or down. :(
+ Bad Presentation (??), so we let the MD file rely on the value of
+ this variable instead Making PIPE_5 the default. It should be backward
optimal with PIPE_3 MicroBlazes. */
enum pipeline_type microblaze_pipe = MICROBLAZE_PIPE_5;
@@ -210,7 +210,7 @@ enum reg_class microblaze_regno_to_class[] =
};
/* MicroBlaze specific machine attributes.
- interrupt_handler - Interrupt handler attribute to add interrupt prologue
+ interrupt_handler - Interrupt handler attribute to add interrupt prologue
and epilogue and use appropriate interrupt return.
save_volatiles - Similar to interrupt handler, but use normal return. */
int interrupt_handler;
@@ -720,8 +720,8 @@ get_base_reg (rtx x)
const_int
ADDRESS_REG_INDEX %0 %1 NULL NULL
- ADDRESS_SYMBOLIC r0 / NULL NULL symbol
- sda_base_reg
+ ADDRESS_SYMBOLIC r0 / NULL NULL symbol
+ sda_base_reg
ADDRESS_CONST_INT r0 NULL const NULL
@@ -1005,7 +1005,7 @@ microblaze_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
result = gen_rtx_PLUS (Pmode, ptr_reg, constant);
if (SMALL_INT (constant))
return result;
- /* Otherwise we fall through so the code below will fix the
+ /* Otherwise we fall through so the code below will fix the
constant. */
xinsn = result;
}
@@ -1363,7 +1363,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
*total -= 2;
}
else
- /* Double the worst cost of shifts when there is no barrel shifter and
+ /* Double the worst cost of shifts when there is no barrel shifter and
the shift amount is in a reg. */
*total = COSTS_N_INSNS (32 * 4);
return true;
@@ -1498,7 +1498,7 @@ microblaze_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED,
return COSTS_N_INSNS (microblaze_address_insns (addr, GET_MODE (addr)));
}
-/* Return nonzero if X is an address which needs a temporary register when
+/* Return nonzero if X is an address which needs a temporary register when
reloaded while generating PIC code. */
int
@@ -1680,7 +1680,7 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
return 0;
}
-/* Convert a version number of the form "vX.YY.Z" to an integer encoding
+/* Convert a version number of the form "vX.YY.Z" to an integer encoding
for easier range comparison. */
static int
microblaze_version_to_int (const char *version)
@@ -1794,7 +1794,7 @@ microblaze_option_override (void)
}
else
{
- /* We agree to use 5 pipe-stage model even on area optimized 3
+ /* We agree to use 5 pipe-stage model even on area optimized 3
pipe-stage variants. */
#if 0
microblaze_select_flags &= ~(MICROBLAZE_MASK_NO_UNSAFE_DELAY);
@@ -1807,7 +1807,7 @@ microblaze_option_override (void)
|| MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu,
"v5.00.c") == 0)
{
- /* Pattern compares are to be turned on by default only when
+ /* Pattern compares are to be turned on by default only when
compiling for MB v5.00.'z'. */
target_flags |= MASK_PATTERN_COMPARE;
}
@@ -2039,7 +2039,7 @@ microblaze_must_save_register (int regno)
if (microblaze_is_interrupt_variant ())
{
- if (df_regs_ever_live_p (regno)
+ if (df_regs_ever_live_p (regno)
|| regno == MB_ABI_MSR_SAVE_REG
|| ((interrupt_handler || fast_interrupt)
&& (regno == MB_ABI_ASM_TEMP_REGNUM
@@ -2109,7 +2109,7 @@ microblaze_must_save_register (int regno)
*/
static HOST_WIDE_INT
-compute_frame_size (HOST_WIDE_INT size)
+compute_frame_size (HOST_WIDE_INT size)
{
int regno;
HOST_WIDE_INT total_size; /* # bytes that the entire frame takes up. */
@@ -2207,7 +2207,7 @@ microblaze_can_eliminate (const int from, const int to)
}
/* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame
- pointer or argument pointer or the return address pointer. TO is either
+ pointer or argument pointer or the return address pointer. TO is either
the stack pointer or hard frame pointer. */
HOST_WIDE_INT
@@ -2240,7 +2240,7 @@ microblaze_initial_elimination_offset (int from, int to)
}
/* Print operands using format code.
-
+
The MicroBlaze specific codes are:
'X' X is CONST_INT, prints 32 bits in hexadecimal format = "0x%08x",
@@ -2267,7 +2267,7 @@ microblaze_initial_elimination_offset (int from, int to)
'j' Print low word of const_double (int or float) value as hex
's' Print -1 if operand is negative, 0 if positive (sign extend)
'@' Print the name of the temporary register (rMB_ABI_ASM_TEMP_REGNUM).
- '#' Print nop if the delay slot of a branch is not filled.
+ '#' Print nop if the delay slot of a branch is not filled.
*/
void
@@ -2463,7 +2463,7 @@ print_operand (FILE * file, rtx op, int letter)
val[1] = INTVAL (op) & 0x00000000ffffffffLL;
if (val[0] == 0 && val[1] < 0)
val[0] = -1;
-
+
}
fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]);
}
@@ -2543,19 +2543,19 @@ print_operand (FILE * file, rtx op, int letter)
reference whose address is ADDR. ADDR is an RTL expression.
Possible address classifications and output formats are,
-
+
ADDRESS_REG "%0, r0"
ADDRESS_REG with non-zero "%0, <addr_const>"
- offset
+ offset
- ADDRESS_REG_INDEX "rA, RB"
+ ADDRESS_REG_INDEX "rA, RB"
(if rA is r0, rA and rB are swapped)
ADDRESS_CONST_INT "r0, <addr_const>"
- ADDRESS_SYMBOLIC "rBase, <addr_const>"
- (rBase is a base register suitable for the
+ ADDRESS_SYMBOLIC "rBase, <addr_const>"
+ (rBase is a base register suitable for the
symbol's type)
*/
@@ -2576,7 +2576,7 @@ print_operand_address (FILE * file, rtx addr)
break;
case ADDRESS_REG_INDEX:
if (REGNO (info.regA) == 0)
- /* Make rB == r0 instead of rA == r0. This helps reduce read port
+ /* Make rB == r0 instead of rA == r0. This helps reduce read port
congestion. */
fprintf (file, "%s,%s", reg_names[REGNO (info.regB)],
reg_names[REGNO (info.regA)]);
@@ -2641,7 +2641,7 @@ print_operand_address (FILE * file, rtx addr)
}
/* Emit either a label, .comm, or .lcomm directive, and mark that the symbol
- is used, so that we don't emit an .extern for it in
+ is used, so that we don't emit an .extern for it in
microblaze_asm_file_end. */
void
@@ -2649,7 +2649,7 @@ microblaze_declare_object (FILE * stream, const char *name,
const char *section, const char *fmt, int size)
{
- fputs (section, stream);
+ fputs (section, stream);
assemble_name (stream, name);
fprintf (stream, fmt, size);
}
@@ -2662,7 +2662,7 @@ microblaze_declare_object (FILE * stream, const char *name,
#define BITSET_P(VALUE,BIT) (((VALUE) & (1L << (BIT))) != 0)
-/* Save or restore instructions based on whether this is the prologue or
+/* Save or restore instructions based on whether this is the prologue or
epilogue. prologue is 1 for the prologue. */
static void
save_restore_insns (int prologue)
@@ -2893,7 +2893,7 @@ microblaze_expand_prologue (void)
&& !cfun->returns_pcc_struct)
{
tree type = build_pointer_type (fntype);
- tree function_result_decl = build_decl (BUILTINS_LOCATION, PARM_DECL,
+ tree function_result_decl = build_decl (BUILTINS_LOCATION, PARM_DECL,
NULL_TREE, type);
DECL_ARG_TYPE (function_result_decl) = type;
@@ -3109,7 +3109,7 @@ microblaze_expand_epilogue (void)
rtx reg_rtx;
rtx mem_rtx;
- /* In case of interrupt handlers use addki instead of addi for changing the
+ /* In case of interrupt handlers use addki instead of addi for changing the
stack pointer value. */
if (microblaze_can_use_return_insn ())
@@ -3122,9 +3122,9 @@ microblaze_expand_epilogue (void)
if (fsiz > 0)
{
- /* Restore SUB_RETURN_ADDR_REGNUM at first. This is to prevent the
- sequence of load-followed by a use (in rtsd) in every prologue. Saves
- a load-use stall cycle :) This is also important to handle alloca.
+ /* Restore SUB_RETURN_ADDR_REGNUM at first. This is to prevent the
+ sequence of load-followed by a use (in rtsd) in every prologue. Saves
+ a load-use stall cycle :) This is also important to handle alloca.
(See comments for if (frame_pointer_needed) below. */
if (!crtl->is_leaf || interrupt_handler)
@@ -3139,11 +3139,11 @@ microblaze_expand_epilogue (void)
emit_move_insn (reg_rtx, mem_rtx);
}
- /* It is important that this is done after we restore the return address
- register (above). When alloca is used, we want to restore the
- sub-routine return address only from the current stack top and not
- from the frame pointer (which we restore below). (frame_pointer + 0)
- might have been over-written since alloca allocates memory on the
+ /* It is important that this is done after we restore the return address
+ register (above). When alloca is used, we want to restore the
+ sub-routine return address only from the current stack top and not
+ from the frame pointer (which we restore below). (frame_pointer + 0)
+ might have been over-written since alloca allocates memory on the
current stack. */
if (frame_pointer_needed)
emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx));
@@ -3187,8 +3187,8 @@ microblaze_can_use_return_insn (void)
/* Implement TARGET_SECONDARY_RELOAD. */
static reg_class_t
-microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
- reg_class_t rclass, machine_mode mode ATTRIBUTE_UNUSED,
+microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
+ reg_class_t rclass, machine_mode mode ATTRIBUTE_UNUSED,
secondary_reload_info *sri ATTRIBUTE_UNUSED)
{
if (rclass == ST_REGS)
@@ -3264,7 +3264,7 @@ microblaze_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
case SECCAT_RODATA_MERGE_STR:
case SECCAT_RODATA_MERGE_STR_INIT:
/* MB binutils have various issues with mergeable string sections and
- relaxation/relocation. Currently, turning mergeable sections
+ relaxation/relocation. Currently, turning mergeable sections
into regular readonly sections. */
return readonly_data_section;
@@ -3275,7 +3275,7 @@ microblaze_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
/*
Encode info about sections into the RTL based on a symbol's declaration.
- The default definition of this hook, default_encode_section_info in
+ The default definition of this hook, default_encode_section_info in
`varasm.cc', sets a number of commonly-useful bits in SYMBOL_REF_FLAGS. */
static void
@@ -3522,7 +3522,7 @@ microblaze_eh_return (rtx op0)
If the string size is below the threshold, put it into .sdata2.
If the front-end is done, we must be being called from toplev.cc.
In that case, do nothing. */
-void
+void
microblaze_asm_output_ident (const char *string)
{
const char *section_asm_op;
@@ -3581,7 +3581,7 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
mem = adjust_address (m_tramp, SImode, 20);
emit_move_insn (mem, fnaddr);
}
-\f
+
/* Generate conditional branch -- first, generate test condition,
second, generate correct branch instruction. */
@@ -3696,7 +3696,7 @@ microblaze_expand_divide (rtx operands[])
{
/* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */
- rtx regt1 = gen_reg_rtx (SImode);
+ rtx regt1 = gen_reg_rtx (SImode);
rtx reg18 = gen_rtx_REG (SImode, R_TMP);
rtx regqi = gen_reg_rtx (QImode);
rtx_code_label *div_label = gen_label_rtx ();
@@ -3708,9 +3708,9 @@ microblaze_expand_divide (rtx operands[])
insn = emit_insn (gen_iorsi3 (regt1, operands[1], operands[2]));
cjump = emit_jump_insn_after (gen_cbranchsi4 (
- gen_rtx_GTU (SImode, regt1, GEN_INT (15)),
+ gen_rtx_GTU (SImode, regt1, GEN_INT (15)),
regt1, GEN_INT (15), div_label), insn);
- LABEL_NUSES (div_label) = 1;
+ LABEL_NUSES (div_label) = 1;
JUMP_LABEL (cjump) = div_label;
emit_insn (gen_rtx_CLOBBER (SImode, reg18));
@@ -3719,21 +3719,21 @@ microblaze_expand_divide (rtx operands[])
mem_rtx = gen_rtx_MEM (QImode,
gen_rtx_PLUS (Pmode, regt1, div_table_rtx));
- insn = emit_insn (gen_movqi (regqi, mem_rtx));
+ insn = emit_insn (gen_movqi (regqi, mem_rtx));
insn = emit_insn (gen_movsi (operands[0], gen_rtx_SUBREG (SImode, regqi, 0)));
- jump = emit_jump_insn_after (gen_jump (div_end_label), insn);
+ jump = emit_jump_insn_after (gen_jump (div_end_label), insn);
JUMP_LABEL (jump) = div_end_label;
- LABEL_NUSES (div_end_label) = 1;
+ LABEL_NUSES (div_end_label) = 1;
emit_barrier ();
emit_label (div_label);
- ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, "__divsi3"),
+ ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, "__divsi3"),
operands[0], LCT_NORMAL,
GET_MODE (operands[0]),
operands[1], GET_MODE (operands[1]),
operands[2], GET_MODE (operands[2]));
if (ret != operands[0])
- emit_move_insn (operands[0], ret);
+ emit_move_insn (operands[0], ret);
emit_label (div_end_label);
emit_insn (gen_blockage ());
@@ -3961,7 +3961,7 @@ microblaze_starting_frame_offset (void)
{
return (crtl->outgoing_args_size + FIRST_PARM_OFFSET(FNDECL));
}
-\f
+
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO microblaze_encode_section_info
@@ -4015,7 +4015,7 @@ microblaze_starting_frame_offset (void)
#define TARGET_LEGITIMIZE_ADDRESS microblaze_legitimize_address
#undef TARGET_LEGITIMATE_ADDRESS_P
-#define TARGET_LEGITIMATE_ADDRESS_P microblaze_legitimate_address_p
+#define TARGET_LEGITIMATE_ADDRESS_P microblaze_legitimate_address_p
#undef TARGET_LRA_P
#define TARGET_LRA_P hook_bool_void_false
@@ -4033,7 +4033,7 @@ microblaze_starting_frame_offset (void)
#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
#undef TARGET_FUNCTION_VALUE
-#define TARGET_FUNCTION_VALUE microblaze_function_value
+#define TARGET_FUNCTION_VALUE microblaze_function_value
#undef TARGET_SECONDARY_RELOAD
#define TARGET_SECONDARY_RELOAD microblaze_secondary_reload
@@ -4051,7 +4051,7 @@ microblaze_starting_frame_offset (void)
#define TARGET_ASM_INIT_SECTIONS microblaze_elf_asm_init_sections
#undef TARGET_OPTION_OVERRIDE
-#define TARGET_OPTION_OVERRIDE microblaze_option_override
+#define TARGET_OPTION_OVERRIDE microblaze_option_override
#undef TARGET_LEGITIMATE_CONSTANT_P
#define TARGET_LEGITIMATE_CONSTANT_P microblaze_legitimate_constant_p
@@ -4075,5 +4075,5 @@ microblaze_starting_frame_offset (void)
#define TARGET_STARTING_FRAME_OFFSET microblaze_starting_frame_offset
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
#include "gt-microblaze.h"
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
index 0398902362b..f50e80af3ab 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -68,8 +68,8 @@ extern enum pipeline_type microblaze_pipe;
/* The default is to not need GOT for TLS. */
#define TLS_NEEDS_GOT 0
-/* What is the default setting for -mcpu= . We set it to v4.00.a even though
- we are actually ahead. This is safest version that has generate code
+/* What is the default setting for -mcpu= . We set it to v4.00.a even though
+ we are actually ahead. This is safest version that has generate code
compatible for the original ISA */
#define MICROBLAZE_DEFAULT_CPU "v4.00.a"
@@ -142,7 +142,7 @@ extern enum pipeline_type microblaze_pipe;
#define MB_ABI_SUB_RETURN_ADDR_REGNUM 15
#define MB_ABI_DEBUG_RETURN_ADDR_REGNUM 16
#define MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM 17
-#define MB_ABI_ASM_TEMP_REGNUM 18
+#define MB_ABI_ASM_TEMP_REGNUM 18
/* This is our temp register. */
#define MB_ABI_FRAME_POINTER_REGNUM 19
#define MB_ABI_PIC_ADDR_REGNUM 20
@@ -157,7 +157,7 @@ extern enum pipeline_type microblaze_pipe;
#define MB_ABI_STATIC_CHAIN_REGNUM 3
#define MB_ABI_TEMP1_REGNUM 11
#define MB_ABI_TEMP2_REGNUM 12
-#define MB_ABI_MSR_SAVE_REG 11
+#define MB_ABI_MSR_SAVE_REG 11
/* Volatile register used to save MSR in interrupt handlers. */
@@ -177,8 +177,8 @@ extern enum pipeline_type microblaze_pipe;
(GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
/* Initial state of return address on entry to func = R15.
- Actually, the RA is at R15+8, but gcc doesn't know how
- to generate this.
+ Actually, the RA is at R15+8, but gcc doesn't know how
+ to generate this.
NOTE: GDB has a workaround and expects this incorrect value.
If this is fixed, a corresponding fix to GDB is needed. */
#define INCOMING_RETURN_ADDR_RTX \
@@ -297,7 +297,7 @@ extern enum pipeline_type microblaze_pipe;
rMB_ABI_INTR_RETUREN_ADDR_REGNUM is a fixed
register(return address for interrupt), and will not be used for
anything else. */
-
+
#define FRAME_POINTER_REGNUM FRP_REG_NUM
#define HARD_FRAME_POINTER_REGNUM \
(GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM)
@@ -387,7 +387,7 @@ extern enum reg_class microblaze_regno_to_class[];
&& (((VALUE) & 0x0000ffff) != 0 \
|| (((VALUE) & ~2147483647) != 0 \
&& ((VALUE) & ~2147483647) != ~2147483647)))
-
+
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
((CLASS) != ALL_REGS \
? (CLASS) \
@@ -474,7 +474,7 @@ typedef struct microblaze_args
int fp_code; /* Mode of FP arguments */
int num_adjusts; /* number of adjustments made */
/* Adjustments made to args pass in regs. */
- /* ??? The size is doubled to work around a bug in the code that sets the
+ /* ??? The size is doubled to work around a bug in the code that sets the
adjustments in function_arg. */
rtx adjust[MAX_ARGS_IN_REGISTERS * 2];
} CUMULATIVE_ARGS;
@@ -516,7 +516,7 @@ typedef struct microblaze_args
#define MAX_REGS_PER_ADDRESS 2
-/* Identify valid constant addresses. Exclude if PIC addr which
+/* Identify valid constant addresses. Exclude if PIC addr which
needs scratch register. */
#define CONSTANT_ADDRESS_P(X) microblaze_constant_address_p(X)
@@ -612,7 +612,7 @@ typedef struct microblaze_args
/* ASM_OUTPUT_ALIGNED_COMMON and ASM_OUTPUT_ALIGNED_LOCAL
Unfortunately, we still need to set the section explicitly. Somehow,
- our binutils assign .comm and .lcomm variables to the "current" section
+ our binutils assign .comm and .lcomm variables to the "current" section
in the assembly file, rather than where they implicitly belong. We need to
remove this explicit setting in GCC when binutils can understand sections
better. */
@@ -840,11 +840,11 @@ do { \
#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
-/* Define the strings to put out for each section in the object file.
-
- Note: For ctors/dtors, we want to give these sections the SHF_WRITE
- attribute to allow shared libraries to patch/resolve addresses into
- these locations. On Microblaze, there is no concept of shared libraries
+/* Define the strings to put out for each section in the object file.
+
+ Note: For ctors/dtors, we want to give these sections the SHF_WRITE
+ attribute to allow shared libraries to patch/resolve addresses into
+ these locations. On Microblaze, there is no concept of shared libraries
yet, so this is for future use. */
#define TEXT_SECTION_ASM_OP "\t.text"
#define DATA_SECTION_ASM_OP "\t.data"
@@ -869,7 +869,7 @@ do { \
"\tbrlid r15, " #FUNC "\n\t nop\n" \
TEXT_SECTION_ASM_OP);
-/* We need to group -lm as well, since some Newlib math functions
+/* We need to group -lm as well, since some Newlib math functions
reference __errno! */
#undef LIB_SPEC
#define LIB_SPEC \
--git a/gcc/config/mips/frame-header-opt.cc b/gcc/config/mips/frame-header-opt.cc
index dece7eddb8c..b4e5f8ae548 100644
--- a/gcc/config/mips/frame-header-opt.cc
+++ b/gcc/config/mips/frame-header-opt.cc
@@ -207,7 +207,7 @@ callees_functions_use_frame_header (function *fn)
{
called_fn = DECL_STRUCT_FUNCTION (called_fn_tree);
if (called_fn == NULL
- || DECL_WEAK (called_fn_tree)
+ || DECL_WEAK (called_fn_tree)
|| has_inlined_assembly (called_fn)
|| !is_leaf_function (called_fn)
|| !called_fn->machine->does_not_use_frame_header)
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 0b25db47a22..303fe63098e 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -632,7 +632,7 @@ static const struct attribute_spec mips_attribute_table[] = {
{ "use_debug_exception_return", 0, 0, false, true, true, false, NULL, NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* A table describing all the processors GCC knows about; see
mips-cpus.def for details. */
static const struct mips_cpu_info mips_cpu_info_table[] = {
@@ -1159,13 +1159,13 @@ static const struct mips_rtx_cost_data
4 /* memory_latency */
}
};
-\f
+
static rtx mips_find_pic_call_symbol (rtx_insn *, rtx, bool);
static int mips_register_move_cost (machine_mode, reg_class_t,
reg_class_t);
static unsigned int mips_function_arg_boundary (machine_mode, const_tree);
static rtx mips_gen_const_int_vector_shuffle (machine_mode, int);
-\f
+
/* This hash table keeps track of implicit "mips16" and "nomips16" attributes
for -mflip_mips16. It maps decl names onto a boolean mode setting. */
static GTY (()) hash_map<nofree_string_hash, bool> *mflip_mips16_htab;
@@ -1202,7 +1202,7 @@ mflip_mips16_use_mips16_p (tree decl)
}
return *slot;
}
-\f
+
/* Predicates to test for presence of "near"/"short_call" and "far"/"long_call"
attributes on the given TYPE. */
@@ -1579,7 +1579,7 @@ mips_handle_use_shadow_register_set_attr (tree *node ATTRIBUTE_UNUSED,
return NULL_TREE;
}
-\f
+
/* If X is a PLUS of a CONST_INT, return the two terms in *BASE_PTR
and *OFFSET_PTR. Return X in *BASE_PTR and 0 in *OFFSET_PTR otherwise. */
@@ -1597,7 +1597,7 @@ mips_split_plus (rtx x, rtx *base_ptr, HOST_WIDE_INT *offset_ptr)
*offset_ptr = 0;
}
}
-\f
+
static unsigned int mips_build_integer (struct mips_integer_op *,
unsigned HOST_WIDE_INT);
@@ -1701,7 +1701,7 @@ mips_build_integer (struct mips_integer_op *codes,
return cost;
}
}
-\f
+
/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
static bool
@@ -1709,7 +1709,7 @@ mips_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
{
return mips_const_insns (x) > 0;
}
-\f
+
/* Return a SYMBOL_REF for a MIPS16 function called NAME. */
static rtx
@@ -1734,7 +1734,7 @@ mips16_stub_call_address (mips_one_only_stub *stub)
fn = force_reg (Pmode, fn);
return fn;
}
-\f
+
/* A stub for moving the thread pointer into TLS_GET_TP_REGNUM. */
class mips16_rdhwr_one_only_stub : public mips_one_only_stub
@@ -1802,7 +1802,7 @@ mips16_set_fcsr_one_only_stub::output_body ()
"\tctc1\t%s,$31\n"
"\tj\t$31\n", reg_names[SET_FCSR_REGNUM]);
}
-\f
+
/* Return true if symbols of type TYPE require a GOT access. */
static bool
@@ -2259,7 +2259,7 @@ mips_symbolic_constant_p (rtx x, enum mips_symbol_context context,
}
gcc_unreachable ();
}
-\f
+
/* Like mips_symbol_insns, but treat extended MIPS16 instructions as a
single instruction. We rely on the fact that, in the worst case,
all instructions involved in a MIPS16 address calculation are usually
@@ -2387,7 +2387,7 @@ mips_symbol_insns (enum mips_symbol_type type, machine_mode mode)
return mips_symbol_insns_1 (type, mode) * (TARGET_MIPS16 ? 2 : 1);
}
-\f
+
/* Implement TARGET_CANNOT_FORCE_CONST_MEM. */
static bool
@@ -2447,7 +2447,7 @@ mips_use_blocks_for_constant_p (machine_mode mode ATTRIBUTE_UNUSED,
{
return !TARGET_MIPS16_PCREL_LOADS;
}
-\f
+
/* Return true if register REGNO is a valid base register for mode MODE.
STRICT_P is true if REG_OK_STRICT is in effect. */
@@ -2650,7 +2650,7 @@ mips_lwxs_address_p (rtx addr)
return false;
}
-/* Return true if ADDR matches the pattern for the L{B,H,W,D}{,U}X load
+/* Return true if ADDR matches the pattern for the L{B,H,W,D}{,U}X load
indexed address instruction. Note that such addresses are
not considered legitimate in the TARGET_LEGITIMATE_ADDRESS_P
sense, because their use is so restricted. */
@@ -2674,7 +2674,7 @@ mips_lx_address_p (rtx addr, machine_mode mode)
return true;
return false;
}
-\f
+
/* Return true if a value at OFFSET bytes from base register BASE can be
accessed using an unextended MIPS16 instruction. MODE is the mode of
the value.
@@ -3011,7 +3011,7 @@ mips_idiv_insns (machine_mode mode)
return count;
}
-\f
+
/* Emit a move from SRC to DEST. Assume that the move expanders can
handle all moves if !can_create_pseudo_p (). The distinction is
important because, unlike emit_move_insn, the move expanders know
@@ -3143,7 +3143,7 @@ mips_emit_call_insn (rtx pattern, rtx orig_addr, rtx addr, bool lazy_p)
return insn;
}
-\f
+
/* Wrap symbol or label BASE in an UNSPEC address of type SYMBOL_TYPE,
then add CONST_INT OFFSET to the result. */
@@ -3202,7 +3202,7 @@ mips_unspec_offset_high (rtx temp, rtx base, rtx addr,
}
return base;
}
-\f
+
/* Return an instruction that copies $gp into register REG. We want
GCC to treat the register's value as constant, so that its value
can be rematerialized on demand. */
@@ -3422,7 +3422,7 @@ mips_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset)
}
return plus_constant (Pmode, reg, offset);
}
-\f
+
/* The __tls_get_attr symbol. */
static GTY(()) rtx mips_tls_symbol;
@@ -3566,7 +3566,7 @@ mips_legitimize_tls_address (rtx loc)
}
return dest;
}
-\f
+
/* Implement "TARGET = __builtin_mips_get_fcsr ()" for MIPS16,
using a stub. */
@@ -3591,7 +3591,7 @@ mips16_expand_set_fcsr (rtx newval)
emit_move_insn (gen_rtx_REG (SImode, SET_FCSR_REGNUM), newval);
emit_insn (PMODE_INSN (gen_mips_set_fcsr_mips16, (fn)));
}
-\f
+
/* If X is not a valid address for mode MODE, force it into a register. */
static rtx
@@ -3746,7 +3746,7 @@ mips_legitimize_move (machine_mode mode, rtx dest, rtx src)
}
return false;
}
-\f
+
/* Return true if value X in context CONTEXT is a small-data address
that can be rewritten as a LO_SUM. */
@@ -3833,7 +3833,7 @@ mips_rewrite_small_data (rtx pattern)
mips_rewrite_small_data_1 (&pattern, SYMBOL_CONTEXT_LEA);
return pattern;
}
-\f
+
/* The cost of loading values from the constant pool. It should be
larger than the cost of any constant we want to synthesize inline. */
#define CONSTANT_POOL_COST COSTS_N_INSNS (TARGET_MIPS16 ? 4 : 8)
@@ -4250,7 +4250,7 @@ mips_rtx_costs (rtx x, machine_mode mode, int outer_code,
+ set_src_cost (XEXP (XEXP (x, 1), 0), mode, speed));
return true;
}
-
+
/* Fall through. */
case IOR:
@@ -4578,7 +4578,7 @@ mips_no_speculation_in_delay_slots_p ()
{
return TARGET_CB_MAYBE;
}
-\f
+
/* Information about a single instruction in a multi-instruction
asm sequence. */
struct mips_multi_member {
@@ -4699,7 +4699,7 @@ mips_multi_write (void)
else
output_asm_insn (member->format, member->operands);
}
-\f
+
/* Return one word of double-word value OP, taking into account the fixed
endianness of certain registers. HIGH_P is true to select the high part,
false to select the low part. */
@@ -5084,7 +5084,7 @@ mips_split_msa_fill_d (rtx dest, rtx src)
emit_insn (gen_msa_insert_w (new_dest, high, new_dest, GEN_INT (1 << 1)));
emit_insn (gen_msa_insert_w (new_dest, high, new_dest, GEN_INT (1 << 3)));
}
-\f
+
/* Return true if a move from SRC to DEST in INSN should be split. */
bool
@@ -5101,7 +5101,7 @@ mips_split_move_insn (rtx dest, rtx src, rtx insn)
{
mips_split_move (dest, src, mips_insn_split_type (insn), insn);
}
-\f
+
/* Return the appropriate instructions to move SRC into DEST. Assume
that SRC is operand 1 and DEST is operand 0. */
@@ -5321,7 +5321,7 @@ mips_output_move (rtx dest, rtx src)
}
gcc_unreachable ();
}
-\f
+
/* Return true if CMP1 is a suitable second operand for integer ordering
test CODE. See also the *sCC patterns in mips.md. */
@@ -5656,7 +5656,7 @@ mips_emit_compare (enum rtx_code *code, rtx *op0, rtx *op1, bool need_eq_ne_p)
mips_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1);
}
}
-\f
+
/* Try performing the comparison in OPERANDS[1], whose arms are OPERANDS[2]
and OPERAND[3]. Store the result in OPERANDS[0].
@@ -5821,7 +5821,7 @@ mips_expand_conditional_trap (rtx comparison)
gen_rtx_fmt_ee (code, mode, op0, op1),
const0_rtx));
}
-\f
+
/* Initialize *CUM for a call to a function of type FNTYPE. */
void
@@ -6304,7 +6304,7 @@ mips_callee_copies (cumulative_args_t, const function_arg_info &arg)
{
return mips_abi == ABI_EABI && arg.named;
}
-\f
+
/* See whether VALTYPE is a record whose fields should be returned in
floating-point registers. If so, return the number of fields and
list them in FIELDS (which should have two elements). Return 0
@@ -6668,7 +6668,7 @@ mips_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED)
return (!IN_RANGE (int_size_in_bytes (type), 0, 2 * UNITS_PER_WORD));
}
-\f
+
/* Implement TARGET_SETUP_INCOMING_VARARGS. */
static void
@@ -7145,7 +7145,7 @@ mips_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
return addr;
}
-\f
+
/* Declare a unique, locally-binding function called NAME, then start
its definition. */
@@ -7236,7 +7236,7 @@ mips_finish_stub (mips_one_only_stub **stub_ptr)
delete stub;
*stub_ptr = 0;
}
-\f
+
/* Return true if calls to X can use R_MIPS_CALL* relocations. */
static bool
@@ -7273,7 +7273,7 @@ mips_load_call_address (enum mips_call_type type, rtx dest, rtx addr)
return false;
}
}
-\f
+
/* Each locally-defined hard-float MIPS16 function has a local symbol
associated with it. This hash table maps the function symbol (FUNC)
to the local symbol (LOCAL). */
@@ -7312,7 +7312,7 @@ mips16_local_alias (rtx func)
}
return *slot;
}
-\f
+
/* A chained list of functions for which mips16_build_call_stub has already
generated a stub. NAME is the name of the function and FP_RET_P is true
if the function returns a value in floating-point registers. */
@@ -7898,7 +7898,7 @@ mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
return insn;
}
-\f
+
/* Expand a call of type TYPE. RESULT is where the result will go (null
for "call"s and "sibcall"s), ADDR is the address of the function,
ARGS_SIZE is the size of the arguments and AUX is the value passed
@@ -8054,7 +8054,7 @@ mips_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
/* Otherwise OK. */
return true;
}
-\f
+
/* Implement TARGET_USE_MOVE_BY_PIECES_INFRASTRUCTURE_P. */
bool
@@ -8319,7 +8319,7 @@ mips_expand_block_move (rtx dest, rtx src, rtx length)
}
return false;
}
-\f
+
/* Expand a loop of synci insns for the address range [BEGIN, END). */
void
@@ -8370,7 +8370,7 @@ mips_expand_synci_loop (rtx begin, rtx end)
emit_label (end_label);
}
-\f
+
/* Expand a QI or HI mode atomic memory operation.
GENERATOR contains a pointer to the gen_* function that generates
@@ -8683,7 +8683,7 @@ mask_low_and_shift_len (machine_mode mode, rtx mask, rtx shift)
shval = INTVAL (shift) & (GET_MODE_BITSIZE (mode) - 1);
return exact_log2 ((UINTVAL (mask) >> shval) + 1);
}
-\f
+
/* Return true if -msplit-addresses is selected and should be honored.
-msplit-addresses is a half-way house between explicit relocations
@@ -9403,7 +9403,7 @@ mips_print_operand_address (FILE *file, machine_mode /*mode*/, rtx x)
}
gcc_unreachable ();
}
-\f
+
/* Implement TARGET_ENCODE_SECTION_INFO. */
static void
@@ -9516,7 +9516,7 @@ mips_use_anchors_for_symbol_p (const_rtx symbol)
return default_use_anchors_for_symbol_p (symbol);
}
}
-\f
+
/* The MIPS debug format wants all automatic variables and arguments
to be in terms of the virtual frame pointer (stack pointer before
any adjustment in the function), while the MIPS 3.0 linker wants
@@ -9546,7 +9546,7 @@ mips_debugger_offset (rtx addr, HOST_WIDE_INT offset)
return offset;
}
-\f
+
/* Implement ASM_OUTPUT_EXTERNAL. */
void
@@ -9943,7 +9943,7 @@ mips_set_text_contents_type (FILE *file ATTRIBUTE_UNUSED,
fputs ("\t.insn\n", file);
#endif
}
-\f
+
/* Return the FOO in the name of the ".mdebug.FOO" section associated
with the current ABI. */
@@ -10122,7 +10122,7 @@ mips_code_end (void)
mips_finish_stub (&mips16_get_fcsr_stub);
mips_finish_stub (&mips16_set_fcsr_stub);
}
-\f
+
/* Make the last instruction frame-related and note that it performs
the operation described by FRAME_PATTERN. */
@@ -10160,7 +10160,7 @@ mips_add_cfa_restore (rtx reg)
mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
mips_epilogue.cfa_restores);
}
-\f
+
/* If a MIPS16e SAVE or RESTORE instruction saves or restores register
mips16e_s2_s8_regs[X], it must also save the registers in indexes
X + 1 onwards. Likewise mips16e_a0_a3_regs. */
@@ -10615,7 +10615,7 @@ mips16e_output_save_restore (rtx pattern, HOST_WIDE_INT adjust)
return buffer;
}
-\f
+
/* Return true if the current function returns its value in a floating-point
register in MIPS16 mode. */
@@ -11419,7 +11419,7 @@ mips_initial_elimination_offset (int from, int to)
return offset;
}
-\f
+
/* Implement TARGET_EXTRA_LIVE_ON_ENTRY. */
static void
@@ -11587,7 +11587,7 @@ mips_restore_gp_from_cprestore_slot (rtx temp)
if (!TARGET_EXPLICIT_RELOCS)
emit_insn (gen_blockage ());
}
-\f
+
/* A function to save or store a register. The first argument is the
register and the second is the stack slot. */
typedef void (*mips_save_restore_fn) (rtx, rtx);
@@ -11896,7 +11896,7 @@ mips_emit_save_slot_move (rtx dest, rtx src, rtx temp)
if (MEM_P (dest))
mips_set_frame_expr (mips_frame_set (dest, src));
}
-\f
+
/* If we're generating n32 or n64 abicalls, and the current function
does not use $28 as its global pointer, emit a cplocal directive.
Use pic_offset_table_rtx as the argument to the directive. */
@@ -12028,7 +12028,7 @@ mips_output_function_epilogue (FILE *)
fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
mips_end_function_definition (fnname);
}
-\f
+
/* Emit an optimisation barrier for accesses to the current frame. */
static void
@@ -12217,7 +12217,7 @@ mips_output_probe_stack_range (rtx reg1, rtx reg2)
/* Probe at TEST_ADDR, test if TEST_ADDR == LAST_ADDR and branch. */
xops[1] = reg2;
strcpy (tmp, "%(%<bne\t%0,%1,");
- output_asm_insn (strcat (tmp, &loop_lab[1]), xops);
+ output_asm_insn (strcat (tmp, &loop_lab[1]), xops);
if (TARGET_64BIT)
output_asm_insn ("sd\t$0,0(%0)%)", xops);
else
@@ -12554,7 +12554,7 @@ mips_expand_prologue (void)
if (crtl->profile)
emit_insn (gen_blockage ());
}
-\f
+
/* Attach all pending register saves to the previous instruction.
Return that instruction. */
@@ -12897,7 +12897,7 @@ mips_expand_epilogue (bool sibcall_p)
emit_insn_before (gen_mips_ehb (), insn);
}
}
-\f
+
/* Return nonzero if this function is known to have a null epilogue.
This allows the optimizer to omit jumps to jumps if no stack
was created. */
@@ -12924,7 +12924,7 @@ mips_can_use_return_insn (void)
return (cfun->machine->frame.total_size == 0
&& !cfun->machine->use_frame_header_for_callee_saved_regs);
}
-\f
+
/* Return true if register REGNO can store a value of mode MODE.
The result of this function is cached in mips_hard_regno_mode_ok. */
@@ -13401,7 +13401,7 @@ mips_memory_move_cost (machine_mode mode, reg_class_t rclass, bool in)
{
return (mips_cost->memory_latency
+ memory_move_secondary_cost (mode, rclass, in));
-}
+}
/* Implement TARGET_SECONDARY_MEMORY_NEEDED.
@@ -13514,7 +13514,7 @@ mips_mode_rep_extended (scalar_int_mode mode, scalar_int_mode mode_rep)
return UNKNOWN;
}
-\f
+
/* Implement TARGET_VALID_POINTER_MODE. */
static bool
@@ -13564,7 +13564,7 @@ mips_scalar_mode_supported_p (scalar_mode mode)
return default_scalar_mode_supported_p (mode);
}
-\f
+
/* Implement TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */
static machine_mode
@@ -14137,7 +14137,7 @@ mips_output_order_conditional_branch (rtx_insn *insn, rtx *operands,
}
return mips_output_conditional_branch (insn, operands, branch[1], branch[0]);
}
-\f
+
/* Start a block of code that needs access to the LL, SC and SYNC
instructions. */
@@ -14478,7 +14478,7 @@ mips_sync_loop_insns (rtx_insn *insn, rtx *operands)
mips_process_sync_loop (insn, operands);
return mips_multi_num_insns;
}
-\f
+
/* Return the assembly code for DIV or DDIV instruction DIVISION, which has
the operands given by OPERANDS. Add in a divide-by-zero check if needed.
@@ -14655,7 +14655,7 @@ mips_msa_output_shift_immediate (const char *shift, rtx *operands)
return shift;
}
-\f
+
/* Return true if destination of IN_INSN is used as add source in
OUT_INSN. Both IN_INSN and OUT_INSN are of type fmadd. Example:
madd.s dst, x, y, z
@@ -14665,7 +14665,7 @@ bool
mips_fmadd_bypass (rtx_insn *out_insn, rtx_insn *in_insn)
{
int dst_reg, src_reg;
-
+
gcc_assert (get_attr_type (in_insn) == TYPE_FMADD);
gcc_assert (get_attr_type (out_insn) == TYPE_FMADD);
@@ -14721,7 +14721,7 @@ mips_store_data_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
return store_data_bypass_p (out_insn, in_insn);
}
-\f
+
/* Variables and flags used in scheduler hooks when tuning for
Loongson 2E/2F. */
@@ -14958,7 +14958,7 @@ mips_multipass_dfa_lookahead (void)
return 0;
}
-\f
+
/* Remove the instruction at index LOWER from ready queue READY and
reinsert it in front of the instruction at index HIGHER. LOWER must
be <= HIGHER. */
@@ -14992,7 +14992,7 @@ mips_maybe_swap_ready (rtx_insn **ready, int pos1, int pos2, int limit)
ready[pos2] = temp;
}
}
-\f
+
/* Used by TUNE_MACC_CHAINS to record the last scheduled instruction
that may clobber hi or lo. */
static rtx_insn *mips_macc_chains_last_hilo;
@@ -15032,7 +15032,7 @@ mips_macc_chains_reorder (rtx_insn **ready, int nready)
break;
}
}
-\f
+
/* The last instruction to be scheduled. */
static rtx_insn *vr4130_last_insn;
@@ -15132,7 +15132,7 @@ vr4130_reorder (rtx_insn **ready, int nready)
if (vr4130_swap_insns_p (ready[nready - 1], ready[nready - 2]))
mips_promote_ready (ready, nready - 2, nready - 1);
}
-\f
+
/* Record whether last 74k AGEN instruction was a load or store. */
static enum attr_type mips_last_74k_agen_insn = TYPE_UNKNOWN;
@@ -15205,7 +15205,7 @@ mips_74k_agen_reorder (rtx_insn **ready, int nready)
break;
}
}
-\f
+
/* Implement TARGET_SCHED_INIT. */
static void
@@ -15324,7 +15324,7 @@ mips_variable_issue (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
cached_can_issue_more = more;
return more;
}
-\f
+
/* Given that we have an rtx of the form (prefetch ... WRITE LOCALITY),
return the first operand of the associated PREF or PREFX insn. */
@@ -15360,7 +15360,7 @@ mips_loongson_ext2_prefetch_cookie (rtx write, rtx)
gcc_unreachable ();
}
-\f
+
/* Flags that indicate when a built-in function is available.
BUILTIN_AVAIL_NON_MIPS16
@@ -17461,7 +17461,7 @@ mips_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
gcc_unreachable ();
}
-\f
+
/* An entry in the MIPS16 constant pool. VALUE is the pool constant,
MODE is its mode, and LABEL is the CODE_LABEL associated with it. */
struct mips16_constant {
@@ -17755,7 +17755,7 @@ mips16_lay_out_constants (bool split_p)
}
mips16_emit_constants (pool.first, get_last_insn ());
}
-\f
+
/* Return true if it is worth r10k_simplify_address's while replacing
an address with X. We are looking for constants, and for addresses
at a known offset from the incoming stack pointer. */
@@ -18119,7 +18119,7 @@ r10k_insert_cache_barriers (void)
free_dominance_info (CDI_DOMINATORS);
}
-\f
+
/* If INSN is a call, return the underlying CALL expr. Return NULL_RTX
otherwise. If INSN has two call rtx, then store the second one in
SECOND_CALL. */
@@ -18330,7 +18330,7 @@ mips_annotate_pic_calls (void)
}
}
}
-\f
+
/* A temporary variable used by note_uses callbacks, etc. */
static rtx_insn *mips_sim_insn;
@@ -18570,7 +18570,7 @@ mips_seq_time (struct mips_sim *state, rtx_insn *seq)
}
return state->time;
}
-\f
+
/* Return the execution-time cost of mips_tuning_info.fast_mult_zero_zero_p
setting SETTING, using STATE to simulate instruction sequences. */
@@ -18660,7 +18660,7 @@ mips_expand_to_rtl_hook (void)
could be called during gimple optimization). */
mips_set_tuning_info ();
}
-\f
+
/* The VR4130 pipeline issues aligned pairs of instructions together,
but it stalls the second instruction if it depends on the first.
In order to cut down the amount of logic required, this dependence
@@ -18818,7 +18818,7 @@ vr4130_align_insns (void)
}
dfa_finish ();
}
-\f
+
/* This structure records that the current function has a LO_SUM
involving SYMBOL_REF or LABEL_REF BASE and that MAX_OFFSET is
the largest offset applied to BASE by all such LO_SUMs. */
@@ -19640,7 +19640,7 @@ make_pass_mips_machine_reorg2 (gcc::context *ctxt)
return new pass_mips_machine_reorg2 (ctxt);
}
-\f
+
/* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
in order to avoid duplicating too much logic from elsewhere. */
@@ -19772,7 +19772,7 @@ mips_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
the global pointer for us. */
reload_completed = 0;
}
-\f
+
/* The last argument passed to mips_set_compression_mode,
or negative if the function hasn't been called yet. */
@@ -19911,7 +19911,7 @@ mips_set_current_function (tree fndecl)
{
mips_set_compression_mode (mips_get_compress_mode (fndecl));
}
-\f
+
/* Allocate a chunk of memory for per-function machine-dependent data. */
static struct machine_function *
@@ -21213,7 +21213,7 @@ umips_movep_target_p (rtx reg1, rtx reg2)
return false;
}
-\f
+
/* Return the size in bytes of the trampoline code, padded to
TRAMPOLINE_ALIGNMENT bits. The static chain pointer and target
function address immediately follow. */
@@ -21484,7 +21484,7 @@ mips_prepare_pch_save (void)
mips16_globals = 0;
micromips_globals = 0;
}
-\f
+
/* Generate or test for an insn that supports a constant permutation. */
#define MAX_VECT_LEN 16
@@ -22747,7 +22747,7 @@ mips_asm_file_end (void)
if (NEED_INDICATE_EXEC_STACK)
file_end_indicate_exec_stack ();
}
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
@@ -23057,5 +23057,5 @@ mips_asm_file_end (void)
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
#include "gt-mips.h"
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index fbb4372864f..e6ea62f1047 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -113,7 +113,7 @@ struct mips_cpu_info {
#define BITMASK_UPPER16 ((unsigned long)0xffff << 16) /* 0xffff0000 */
#define BITMASK_LOWER16 ((unsigned long)0xffff) /* 0x0000ffff */
-\f
+
/* Run-time compilation parameters selecting different hardware subsets. */
/* True if we are generating position-independent VxWorks RTP code. */
@@ -1371,13 +1371,13 @@ struct mips_cpu_info {
/* The CACHE instruction is available. */
#define ISA_HAS_CACHE (TARGET_CACHE_BUILTIN && !TARGET_MIPS16)
-\f
+
/* Tell collect what flags to pass to nm. */
#ifndef NM_FLAGS
#define NM_FLAGS "-Bn"
#endif
-\f
+
/* SUBTARGET_ASM_DEBUGGING_SPEC handles passing debugging options to
the assembler. It may be overridden by subtargets.
@@ -1508,7 +1508,7 @@ FP_ASM_SPEC "\
#ifndef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS
#endif
-\f
+
#define DWARF2_DEBUGGING_INFO 1 /* dwarf2 debugging info */
#ifndef PREFERRED_DEBUGGING_TYPE
@@ -1581,7 +1581,7 @@ FP_ASM_SPEC "\
mips_debugger_offset (X, (HOST_WIDE_INT) 0)
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
mips_debugger_offset (X, (HOST_WIDE_INT) OFFSET)
-\f
+
/* Target machine storage layout */
#define BITS_BIG_ENDIAN 0
@@ -1729,7 +1729,7 @@ FP_ASM_SPEC "\
optimised to use word loads. */
#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
DATA_ALIGNMENT (TYPE, ALIGN)
-
+
#define PAD_VARARGS_DOWN \
(targetm.calls.function_arg_padding (TYPE_MODE (type), type) == PAD_DOWNWARD)
@@ -1769,7 +1769,7 @@ FP_ASM_SPEC "\
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
-\f
+
/* Standard register usage. */
/* Number of hardware registers. We have:
@@ -2071,7 +2071,7 @@ FP_ASM_SPEC "\
from there after reload. */
#define PIC_OFFSET_TABLE_REGNUM \
(reload_completed ? REGNO (pic_offset_table_rtx) : GLOBAL_POINTER_REGNUM)
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -2328,7 +2328,7 @@ enum reg_class
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) mips_class_max_nregs (CLASS, MODE)
-\f
+
/* Stack layout; function entry, exit and calling. */
#define STACK_GROWS_DOWNWARD 1
@@ -2411,7 +2411,7 @@ enum reg_class
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
#define STACK_BOUNDARY (TARGET_NEWABI ? 128 : 64)
-\f
+
/* Symbolic macros for the registers used to return integer and floating
point values. */
@@ -2453,7 +2453,7 @@ enum reg_class
|| TARGET_FLOAT32 \
|| ((N) % 2 == 0)))) \
&& !fixed_regs[N])
-\f
+
/* This structure has to cope with two different argument allocation
schemes. Most MIPS ABIs view the arguments as a structure, of which
the first N words go in registers and the rest go on the stack. If I
@@ -2531,7 +2531,7 @@ typedef struct mips_args {
#define EABI_FLOAT_VARARGS_P \
(mips_abi == ABI_EABI && UNITS_PER_FPVALUE >= UNITS_PER_DOUBLE)
-\f
+
#define EPILOGUE_USES(REGNO) mips_epilogue_uses (REGNO)
/* Treat LOC as a byte offset from the stack pointer and round it up
@@ -2539,7 +2539,7 @@ typedef struct mips_args {
#define MIPS_STACK_ALIGN(LOC) \
(TARGET_NEWABI ? ROUND_UP ((LOC), 16) : ROUND_UP ((LOC), 8))
-\f
+
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
@@ -2566,7 +2566,7 @@ typedef struct mips_args {
#define EXIT_IGNORE_STACK 1
-\f
+
/* Trampolines are a block of code followed by two pointers. */
#define TRAMPOLINE_SIZE \
@@ -2591,13 +2591,13 @@ typedef struct mips_args {
LCT_NORMAL, VOIDmode, ADDR, Pmode, SIZE, Pmode, \
GEN_INT (3), TYPE_MODE (integer_type_node))
-\f
+
/* Addressing modes, and classification of registers for them. */
#define REGNO_OK_FOR_INDEX_P(REGNO) 0
#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
mips_regno_mode_ok_for_base_p (REGNO, MODE, 1)
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 1
@@ -2620,7 +2620,7 @@ typedef struct mips_args {
else \
asm_fprintf ((FILE), "%U%s", (NAME)); \
} while (0)
-\f
+
/* Flag to mark a function decl symbol that requires a long call. */
#define SYMBOL_FLAG_LONG_CALL (SYMBOL_FLAG_MACH_DEP << 0)
#define SYMBOL_REF_LONG_CALL_P(X) \
@@ -2694,7 +2694,7 @@ typedef struct mips_args {
#define FUNCTION_MODE SImode
-\f
+
/* We allocate $fcc registers by hand and can't cope with moves of
CCmode registers to and from pseudos (or memory). */
#define AVOID_CCMODE_COPIES
@@ -2736,7 +2736,7 @@ typedef struct mips_args {
? ".option\tpic0\n\t" INSN "\n\t.option\tpic2" \
: INSN)
-\f
+
/* Control the assembler format that we output. */
/* Output to assembler file text saying following lines
@@ -3031,7 +3031,7 @@ do { \
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII mips_output_ascii
-\f
+
/* Default to -G 8 */
#ifndef MIPS_DEFAULT_GVALUE
#define MIPS_DEFAULT_GVALUE 8
@@ -3043,7 +3043,7 @@ do { \
#undef READONLY_DATA_SECTION_ASM_OP
#define READONLY_DATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
-\f
+
#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
do \
{ \
@@ -3077,7 +3077,7 @@ while (0)
#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START " #"
#endif
-\f
+
#undef SIZE_TYPE
#define SIZE_TYPE (POINTER_SIZE == 64 ? "long unsigned int" : "unsigned int")
@@ -3136,7 +3136,7 @@ while (0)
#define SET_RATIO(speed) \
((speed) ? 15 : MIPS_CALL_RATIO - 2)
-\f
+
/* Since the bits of the _init and _fini function is spread across
many object files, each potentially with its own GP, we must assume
we need to load our GP. We don't preserve $gp or $ra, since each
diff --git a/gcc/config/mips/sde.h b/gcc/config/mips/sde.h
index add2851c03b..6aaa230687d 100644
--- a/gcc/config/mips/sde.h
+++ b/gcc/config/mips/sde.h
@@ -45,7 +45,7 @@ along with GCC; see the file COPYING3. If not see
"%{!EB:%{!EL:%(endian_spec)}}", \
\
/* Configuration-independent MIPS rules. */ \
- BASE_DRIVER_SELF_SPECS
+ BASE_DRIVER_SELF_SPECS
/* Use trap rather than break for all but MIPS I ISA. Force -no-mips16,
so that MIPS16 assembler code requires an explicit ".set mips16".
diff --git a/gcc/config/mmix/mmix.cc b/gcc/config/mmix/mmix.cc
index 1ac7b883ac5..f6e1494afa8 100644
--- a/gcc/config/mmix/mmix.cc
+++ b/gcc/config/mmix/mmix.cc
@@ -763,7 +763,7 @@ mmix_function_value (const_tree valtype,
if (!outgoing)
return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
-
+
/* Return values that fit in a register need no special handling.
There's no register hole when parameters are passed in global
registers. */
diff --git a/gcc/config/mn10300/linux.h b/gcc/config/mn10300/linux.h
index 72bfac6a32f..0fb0c9a53b4 100644
--- a/gcc/config/mn10300/linux.h
+++ b/gcc/config/mn10300/linux.h
@@ -18,7 +18,7 @@
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-
+
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
@@ -77,7 +77,7 @@ extern int mn10300_protect_label;
asm_fprintf (FILE, "+"); \
asm_fprintf (FILE, "%U%s", real_name); \
} \
- while (0)
+ while (0)
#undef SIZE_TYPE
#undef PTRDIFF_TYPE
diff --git a/gcc/config/mn10300/mn10300.cc b/gcc/config/mn10300/mn10300.cc
index a8b01a543cc..ab7ad54e0f1 100644
--- a/gcc/config/mn10300/mn10300.cc
+++ b/gcc/config/mn10300/mn10300.cc
@@ -72,7 +72,7 @@ enum processor_type mn10300_tune_cpu = PROCESSOR_DEFAULT;
static int cc_flags_for_mode(machine_mode);
static int cc_flags_for_code(enum rtx_code);
-\f
+
/* Implement TARGET_OPTION_OVERRIDE. */
static void
mn10300_option_override (void)
@@ -118,7 +118,7 @@ mn10300_file_start (void)
else if (TARGET_AM33)
fprintf (asm_out_file, "\t.am33\n");
}
-\f
+
/* Note: This list must match the liw_op attribute in mn10300.md. */
static const char *liw_op_names[] =
@@ -475,7 +475,7 @@ mn10300_print_operand_address (FILE *file, rtx addr)
{
rtx base = XEXP (addr, 0);
rtx index = XEXP (addr, 1);
-
+
if (REG_P (index) && !REG_OK_FOR_INDEX_P (index))
{
rtx x = base;
@@ -651,7 +651,7 @@ mn10300_get_live_callee_saved_regs (unsigned int * bytes_saved)
for (i = 0x04000; i < 0x40000; i <<= 1)
if ((mask & i) == 0)
++ count;
-
+
mask |= 0x3c000;
}
@@ -748,7 +748,7 @@ static inline unsigned int
popcount (unsigned int mask)
{
unsigned int count = 0;
-
+
while (mask)
{
++ count;
@@ -1333,7 +1333,7 @@ mn10300_preferred_reload_class (rtx x, reg_class_t rclass)
if (x == stack_pointer_rtx && rclass != SP_REGS)
return (TARGET_AM33 ? GENERAL_REGS : ADDRESS_REGS);
else if (MEM_P (x)
- || (REG_P (x)
+ || (REG_P (x)
&& !HARD_REGISTER_P (x))
|| (GET_CODE (x) == SUBREG
&& REG_P (SUBREG_REG (x))
@@ -1706,7 +1706,7 @@ mn10300_output_add (rtx operands[3], bool need_flags)
src2_regnum = true_regnum (src2);
src2_class = REGNO_REG_CLASS (src2_regnum);
-
+
if (dest_regnum == src1_regnum)
return "add %2,%0";
if (dest_regnum == src2_regnum)
@@ -2295,7 +2295,7 @@ mn10300_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
move cost above. This is not a problem. */
static int
-mn10300_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
+mn10300_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t iclass, bool in ATTRIBUTE_UNUSED)
{
enum reg_class rclass = (enum reg_class) iclass;
@@ -2409,7 +2409,7 @@ mn10300_rtx_costs (rtx x, machine_mode mode, int outer_code,
}
}
goto do_arith_costs;
-
+
case MINUS:
case AND:
case IOR:
@@ -2532,7 +2532,7 @@ mn10300_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
0xdc jmp fnaddr
<disp>
- Note that the two extra insns are effectively nops; they
+ Note that the two extra insns are effectively nops; they
clobber the flags but do not affect the contents of D0 or D1. */
disp = expand_binop (SImode, sub_optab, fnaddr,
@@ -2630,7 +2630,7 @@ mn10300_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
|| (TARGET_AM33 && REGNO_REG_CLASS (regno) == ADDRESS_REGS)
|| REGNO_REG_CLASS (regno) == EXTENDED_REGS)
return GET_MODE_SIZE (mode) <= 4;
-
+
return false;
}
@@ -2856,7 +2856,7 @@ mn10300_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
SET_HARD_REG_BIT (clobbered_regs, CC_REG);
return NULL;
}
-\f
+
/* A helper function for splitting cbranch patterns after reload. */
void
@@ -2904,14 +2904,14 @@ mn10300_match_ccmode (rtx insn, machine_mode cc_mode)
}
/* This function is used to help split:
-
+
(set (reg) (and (reg) (int)))
-
+
into:
-
+
(set (reg) (shift (reg) (int))
(set (reg) (shift (reg) (int))
-
+
where the shitfs will be shorter than the "and" insn.
It returns the number of bits that should be shifted. A positive
@@ -2949,7 +2949,7 @@ mn10300_split_and_operand_count (rtx op)
return -count;
}
}
-\f
+
struct liw_data
{
enum attr_liw slot;
@@ -3036,7 +3036,7 @@ check_liw_constraints (struct liw_data * pliw1, struct liw_data * pliw2)
check its values prior to any changes made by OP. */
if (pliw1->op == LIW_OP_CMP)
{
- /* Two sequential comparisons means dead code, which ought to
+ /* Two sequential comparisons means dead code, which ought to
have been eliminated given that bundling only happens with
optimization. We cannot bundle them in any case. */
gcc_assert (pliw1->op != pliw2->op);
@@ -3074,7 +3074,7 @@ check_liw_constraints (struct liw_data * pliw1, struct liw_data * pliw2)
|| pliw2->op == LIW_OP_OR
|| pliw2->op == LIW_OP_XOR))
return false;
-
+
pliw2->src = pliw1->src;
return true;
}
@@ -3112,7 +3112,7 @@ mn10300_bundle_liw (void)
if (liw1.slot == LIW_OP2 || liw2.slot == LIW_OP1)
{
struct liw_data temp;
-
+
temp = liw1;
liw1 = liw2;
liw2 = temp;
@@ -3189,7 +3189,7 @@ mn10300_insert_setlb_lcc (rtx_insn *label, rtx_insn *branch)
if (GET_MODE (cmp_reg) == CC_FLOATmode)
lcc = gen_FLcc (comparison, label);
else
- lcc = gen_Lcc (comparison, label);
+ lcc = gen_Lcc (comparison, label);
rtx_insn *jump = emit_jump_insn_before (lcc, branch);
mark_jump_label (XVECEXP (lcc, 0, 0), jump, 0);
@@ -3292,7 +3292,7 @@ mn10300_scan_for_setlb_lcc (void)
loop_optimizer_finalize ();
- df_finish_pass (false);
+ df_finish_pass (false);
DUMP ("SETLB scan complete", NULL_RTX);
}
@@ -3310,7 +3310,7 @@ mn10300_reorg (void)
mn10300_bundle_liw ();
}
}
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_MACHINE_DEPENDENT_REORG
diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h
index 9cf6075cd9d..c7150198093 100644
--- a/gcc/config/mn10300/mn10300.h
+++ b/gcc/config/mn10300/mn10300.h
@@ -72,7 +72,7 @@ extern enum processor_type mn10300_tune_cpu;
#define PROCESSOR_DEFAULT PROCESSOR_MN10300
#endif
-\f
+
/* Target machine storage layout */
/* Define this if most significant bit is lowest numbered
@@ -127,7 +127,7 @@ extern enum processor_type mn10300_tune_cpu;
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -220,7 +220,7 @@ extern enum processor_type mn10300_tune_cpu;
/* 4 data, and effectively 3 address registers is small as far as I'm
concerned. */
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -370,7 +370,7 @@ enum reg_class
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -417,7 +417,7 @@ enum reg_class
#define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -482,12 +482,12 @@ struct cum_arg
the stack location is handiest for what unwinding needs. */
#define INCOMING_RETURN_ADDR_RTX \
gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM))
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
-\f
+
/* We have post-increments. */
#define HAVE_POST_INCREMENT TARGET_AM33
#define HAVE_POST_MODIFY_DISP TARGET_AM33
@@ -516,7 +516,7 @@ do { \
goto WIN; \
} \
} while (0)
-\f
+
/* Zero if this needs fixing up to become PIC. */
@@ -536,10 +536,10 @@ do { \
/* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */
#define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
-\f
+
#define SELECT_CC_MODE(OP, X, Y) mn10300_select_cc_mode (OP, X, Y)
#define REVERSIBLE_CC_MODE(MODE) 0
-\f
+
/* Nonzero if access to memory by bytes or half words is no faster
than accessing full words. */
#define SLOW_BYTE_ACCESS 1
diff --git a/gcc/config/moxie/moxie.cc b/gcc/config/moxie/moxie.cc
index 5efea6fb35c..c375b1caf04 100644
--- a/gcc/config/moxie/moxie.cc
+++ b/gcc/config/moxie/moxie.cc
@@ -63,12 +63,12 @@ moxie_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its
- FUNCTION_DECL; otherwise, FUNC is 0.
+ FUNCTION_DECL; otherwise, FUNC is 0.
We always return values in register $r0 for moxie. */
static rtx
-moxie_function_value (const_tree valtype,
+moxie_function_value (const_tree valtype,
const_tree fntype_or_decl ATTRIBUTE_UNUSED,
bool outgoing ATTRIBUTE_UNUSED)
{
@@ -118,12 +118,12 @@ moxie_print_operand_address (FILE *file, machine_mode, rtx x)
case REG:
fprintf (file, "(%s)", reg_names[REGNO (x)]);
break;
-
+
case PLUS:
switch (GET_CODE (XEXP (x, 1)))
{
case CONST_INT:
- fprintf (file, "%ld(%s)",
+ fprintf (file, "%ld(%s)",
INTVAL(XEXP (x, 1)), reg_names[REGNO (XEXP (x, 0))]);
break;
case SYMBOL_REF:
@@ -133,7 +133,7 @@ moxie_print_operand_address (FILE *file, machine_mode, rtx x)
case CONST:
{
rtx plus = XEXP (XEXP (x, 1), 0);
- if (GET_CODE (XEXP (plus, 0)) == SYMBOL_REF
+ if (GET_CODE (XEXP (plus, 0)) == SYMBOL_REF
&& CONST_INT_P (XEXP (plus, 1)))
{
output_addr_const(file, XEXP (plus, 0));
@@ -234,7 +234,7 @@ moxie_option_override (void)
/* Set the per-function-data initializer. */
init_machine_status = moxie_init_machine_status;
-#ifdef TARGET_MOXIEBOX
+#ifdef TARGET_MOXIEBOX
target_flags |= MASK_HAS_MULX;
#endif
}
@@ -267,9 +267,9 @@ moxie_compute_frame (void)
if (df_regs_ever_live_p (regno) && (! call_used_or_fixed_reg_p (regno)))
cfun->machine->callee_saved_reg_size += 4;
- cfun->machine->size_for_adjusting_sp =
+ cfun->machine->size_for_adjusting_sp =
crtl->args.pretend_args_size
- + cfun->machine->local_vars_size
+ + cfun->machine->local_vars_size
+ (ACCUMULATE_OUTGOING_ARGS
? (HOST_WIDE_INT) crtl->outgoing_args_size : 0);
}
@@ -298,19 +298,19 @@ moxie_expand_prologue (void)
if (cfun->machine->size_for_adjusting_sp > 0)
{
- int i = cfun->machine->size_for_adjusting_sp;
+ int i = cfun->machine->size_for_adjusting_sp;
while ((i >= 255) && (i <= 510))
{
- insn = emit_insn (gen_subsi3 (stack_pointer_rtx,
- stack_pointer_rtx,
+ insn = emit_insn (gen_subsi3 (stack_pointer_rtx,
+ stack_pointer_rtx,
GEN_INT (255)));
RTX_FRAME_RELATED_P (insn) = 1;
i -= 255;
}
if (i <= 255)
{
- insn = emit_insn (gen_subsi3 (stack_pointer_rtx,
- stack_pointer_rtx,
+ insn = emit_insn (gen_subsi3 (stack_pointer_rtx,
+ stack_pointer_rtx,
GEN_INT (i)));
RTX_FRAME_RELATED_P (insn) = 1;
}
@@ -319,8 +319,8 @@ moxie_expand_prologue (void)
rtx reg = gen_rtx_REG (SImode, MOXIE_R12);
insn = emit_move_insn (reg, GEN_INT (i));
RTX_FRAME_RELATED_P (insn) = 1;
- insn = emit_insn (gen_subsi3 (stack_pointer_rtx,
- stack_pointer_rtx,
+ insn = emit_insn (gen_subsi3 (stack_pointer_rtx,
+ stack_pointer_rtx,
reg));
RTX_FRAME_RELATED_P (insn) = 1;
}
@@ -339,8 +339,8 @@ moxie_expand_epilogue (void)
if (cfun->machine->callee_saved_reg_size <= 255)
{
emit_move_insn (reg, hard_frame_pointer_rtx);
- emit_insn (gen_subsi3
- (reg, reg,
+ emit_insn (gen_subsi3
+ (reg, reg,
GEN_INT (cfun->machine->callee_saved_reg_size)));
}
else
@@ -367,7 +367,7 @@ int
moxie_initial_elimination_offset (int from, int to)
{
int ret;
-
+
if ((from) == FRAME_POINTER_REGNUM && (to) == HARD_FRAME_POINTER_REGNUM)
{
/* Compute this since we need to use cfun->machine->local_vars_size. */
@@ -392,19 +392,19 @@ moxie_setup_incoming_varargs (cumulative_args_t cum_v,
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
int regno;
int regs = 8 - *cum;
-
+
*pretend_size = regs < 0 ? 0 : GET_MODE_SIZE (SImode) * regs;
-
+
if (no_rtl)
return;
-
+
for (regno = *cum; regno < 8; regno++)
{
rtx reg = gen_rtx_REG (SImode, regno);
rtx slot = gen_rtx_PLUS (Pmode,
gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
GEN_INT (UNITS_PER_WORD * (3 + (regno-2))));
-
+
emit_move_insn (gen_rtx_MEM (SImode, slot), reg);
}
}
@@ -430,7 +430,7 @@ moxie_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
if (*cum < 8)
return gen_rtx_REG (arg.mode, *cum);
- else
+ else
return NULL_RTX;
}
@@ -567,7 +567,7 @@ moxie_reg_ok_for_base_p (const_rtx reg, bool strict_p)
if (strict_p)
return HARD_REGNO_OK_FOR_BASE_P (regno)
|| HARD_REGNO_OK_FOR_BASE_P (reg_renumber[regno]);
- else
+ else
return !HARD_REGISTER_NUM_P (regno)
|| HARD_REGNO_OK_FOR_BASE_P (regno);
}
diff --git a/gcc/config/moxie/moxie.h b/gcc/config/moxie/moxie.h
index 7bd45815b84..0cfb7be2e2d 100644
--- a/gcc/config/moxie/moxie.h
+++ b/gcc/config/moxie/moxie.h
@@ -95,7 +95,7 @@
Special Registers...
$pc - 32-bit program counter.
-
+
*/
#define REGISTER_NAMES { \
@@ -108,7 +108,7 @@
#define MOXIE_FP 0
#define MOXIE_SP 1
#define MOXIE_R0 2
-#define MOXIE_R1 3
+#define MOXIE_R1 3
#define MOXIE_R2 4
#define MOXIE_R3 5
#define MOXIE_R4 6
@@ -213,7 +213,7 @@ enum reg_class
#define ACCUMULATE_OUTGOING_ARGS 1
/* A C statement (sans semicolon) for initializing the variable CUM
- for the state at the beginning of the argument list.
+ for the state at the beginning of the argument list.
For moxie, the first arg is passed in register 2 (aka $r0). */
#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
(CUM = MOXIE_R0)
@@ -304,7 +304,7 @@ enum reg_class
/* Every structures size must be a multiple of 8 bits. */
#define STRUCTURE_SIZE_BOUNDARY 8
-/* Look at the fundamental type that is used for a bit-field and use
+/* Look at the fundamental type that is used for a bit-field and use
that to impose alignment on the enclosing structure.
struct s {int a:8}; should have same alignment as "int", not "char". */
#define PCC_BITFIELD_TYPE_MATTERS 1
@@ -318,7 +318,7 @@ enum reg_class
(TREE_CODE (TYPE) == ARRAY_TYPE \
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
-
+
/* Set this nonzero if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 1
@@ -355,7 +355,7 @@ enum reg_class
#define ELIMINABLE_REGS \
{{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
- { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }}
+ { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }}
/* This macro returns the initial difference between the specified pair
of registers. */
diff --git a/gcc/config/msp430/msp430.cc b/gcc/config/msp430/msp430.cc
index 6c15780a2b6..5573ef4bb63 100644
--- a/gcc/config/msp430/msp430.cc
+++ b/gcc/config/msp430/msp430.cc
@@ -55,14 +55,14 @@
/* This file should be included last. */
#include "target-def.h"
-\f
+
static void msp430_compute_frame_info (void);
static bool msp430_use_16bit_hwmult (void);
static bool msp430_use_32bit_hwmult (void);
static bool use_helper_for_const_shift (machine_mode mode, HOST_WIDE_INT amt);
-\f
+
/* Run-time Target Specification. */
@@ -313,7 +313,7 @@ msp430_scalar_mode_supported_p (scalar_mode m)
return default_scalar_mode_supported_p (m);
}
-\f
+
/* Storage Layout */
@@ -326,7 +326,7 @@ msp430_ms_bitfield_layout_p (const_tree record_type ATTRIBUTE_UNUSED)
return false;
}
-\f
+
/* Register Usage */
@@ -432,7 +432,7 @@ msp430_initial_elimination_offset (int from, int to)
return rv;
}
-\f
+
/* Named Address Space support */
@@ -517,7 +517,7 @@ msp430_addr_space_convert (rtx op, tree from_type, tree to_type)
else
gcc_unreachable ();
}
-\f
+
/* Stack Layout and Calling Conventions. */
/* For each function, we list the gcc version and the TI version on
@@ -901,7 +901,7 @@ msp430_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
return addr;
}
-\f
+
#undef TARGET_LRA_P
#define TARGET_LRA_P hook_bool_void_false
@@ -1035,7 +1035,7 @@ msp430_legitimate_constant (machine_mode mode, rtx x)
&& INTVAL (x) >= (HOST_WIDE_INT)(HOST_WIDE_INT_M1U << 20));
}
-\f
+
/* Describing Relative Costs of Operations
To model the cost of an instruction, use the number of cycles when
optimizing for speed, and the number of words when optimizing for size.
@@ -1665,7 +1665,7 @@ msp430_insn_cost (rtx_insn *insn, bool speed ATTRIBUTE_UNUSED)
correlates with cycle cost. */
}
-\f
+
/* Function Entry and Exit */
/* The MSP430 call frame looks like this:
@@ -3721,7 +3721,7 @@ msp430_split_movsi (rtx *operands)
}
}
-\f
+
/* The MSPABI specifies the names of various helper functions, many of
which are compatible with GCC's helpers. This table maps the GCC
name to the MSPABI name. */
@@ -4400,7 +4400,7 @@ msp430_print_operand (FILE * file, rtx op, int letter)
}
}
-\f
+
/* Frame stuff. */
rtx
@@ -4444,7 +4444,7 @@ msp430_register_pre_includes (const char *sysroot ATTRIBUTE_UNUSED,
include_dir = update_path (include_dir, "");
add_path (include_dir, INC_SYSTEM, false, false);
}
-\f
+
/* Instruction generation stuff. */
/* Generate a sequence of instructions to sign-extend an HI
@@ -4512,7 +4512,7 @@ msp430_can_change_mode_class (machine_mode from, machine_mode to, reg_class_t)
return false;
return true;
}
-\f
+
#undef TARGET_HAVE_SPECULATION_SAFE_VALUE
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
diff --git a/gcc/config/msp430/msp430.h b/gcc/config/msp430/msp430.h
index 39667655c43..ca54d4c0793 100644
--- a/gcc/config/msp430/msp430.h
+++ b/gcc/config/msp430/msp430.h
@@ -17,7 +17,7 @@
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
/* Run-time Target Specification */
@@ -146,7 +146,7 @@ extern const char *msp430_get_linker_devices_include_path (int, const char **);
%{!T*:%{!msim:%{mmcu=*:--script=%*.ld}}} \
%{!T*:%{msim:%{mlarge:%Tmsp430xl-sim.ld}%{!mlarge:%Tmsp430-sim.ld}}} \
"
-\f
+
/* Storage Layout */
#define BITS_BIG_ENDIAN 0
@@ -225,7 +225,7 @@ extern const char *msp430_get_linker_devices_include_path (int, const char **);
&& GET_MODE_SIZE (MODE) < 2) \
(MODE) = HImode;
#endif
-\f
+
/* Layout of Source Language Data Types */
#undef SIZE_TYPE
@@ -268,7 +268,7 @@ extern const char *msp430_get_linker_devices_include_path (int, const char **);
cycles as calling an address stored in a register. However, in terms of
instruction length, calling a constant address is more expensive. */
#define NO_FUNCTION_CSE (optimize >= 2 && !optimize_size)
-\f
+
/* Register Usage */
@@ -396,7 +396,7 @@ enum reg_class
#define REGNO_OK_FOR_BASE_P(regno) 1
#define REGNO_OK_FOR_INDEX_P(regno) 1
-\f
+
typedef struct
{
@@ -414,14 +414,14 @@ typedef struct
#define INIT_CUMULATIVE_ARGS(CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
msp430_init_cumulative_args (&CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS)
-\f
+
/* FIXME */
#define NO_PROFILE_COUNTERS 1
#define PROFILE_BEFORE_PROLOGUE 1
#define FUNCTION_PROFILER(FILE, LABELNO) \
fprintf (FILE, "\tcall\t__mcount\n");
-\f
+
/* Exception Handling */
/* R12,R13,R14 - EH data
@@ -438,13 +438,13 @@ typedef struct
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_udata4
-\f
+
/* Stack Layout and Calling Conventions */
-\f
+
/* Addressing Modes */
-\f
+
#define TEXT_SECTION_ASM_OP ".text"
#define DATA_SECTION_ASM_OP ".data"
@@ -482,7 +482,7 @@ typedef struct
while (0)
#define JUMP_TABLES_IN_TEXT_SECTION 1
-\f
+
#undef DWARF2_ADDR_SIZE
#define DWARF2_ADDR_SIZE 4
diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h
index 0b44ee7061e..4b509f07d95 100644
--- a/gcc/config/nds32/nds32-protos.h
+++ b/gcc/config/nds32/nds32-protos.h
@@ -20,12 +20,12 @@
/* ------------------------------------------------------------------------ */
-\f
+
/* Defining Data Structures for Per-function Information. */
extern void nds32_init_expanders (void);
-\f
+
/* Register Usage. */
/* -- Order of Allocation of Registers. */
@@ -35,7 +35,7 @@ extern void nds32_adjust_reg_alloc_order (void);
extern enum reg_class nds32_regno_reg_class (int);
-\f
+
/* Stack Layout and Calling Conventions. */
/* -- Basic Stack Layout. */
diff --git a/gcc/config/nds32/nds32.cc b/gcc/config/nds32/nds32.cc
index 639baef6c17..ebedf85c16f 100644
--- a/gcc/config/nds32/nds32.cc
+++ b/gcc/config/nds32/nds32.cc
@@ -1645,7 +1645,7 @@ nds32_register_passes (void)
/* ------------------------------------------------------------------------ */
/* PART 3: Implement target hook stuff definitions. */
-\f
+
/* Computing the Length of an Insn.
Modifies the length assigned to instruction INSN.
@@ -1695,7 +1695,7 @@ nds32_expand_to_rtl_hook (void)
cfun->machine->strict_aligned_p = 1;
}
-\f
+
/* Register Usage. */
static void
@@ -1730,7 +1730,7 @@ nds32_conditional_register_usage (void)
}
}
-\f
+
/* Register Classes. */
static unsigned char
@@ -1782,7 +1782,7 @@ nds32_can_change_mode_class (machine_mode from,
return true;
}
-\f
+
/* Stack Layout and Calling Conventions. */
/* There are three kinds of pointer concepts using in GCC compiler:
@@ -2343,7 +2343,7 @@ nds32_warn_func_return (tree decl)
return !nds32_naked_function_p (decl);
}
-\f
+
/* Implementing the Varargs Macros. */
static void
@@ -2398,7 +2398,7 @@ nds32_strict_argument_naming (cumulative_args_t ca ATTRIBUTE_UNUSED)
return true;
}
-\f
+
/* Trampolines for Nested Functions. */
static void
@@ -2561,7 +2561,7 @@ nds32_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
emit_insn (gen_unspec_volatile_isb ());
}
-\f
+
/* Addressing Modes. */
static bool
@@ -2968,7 +2968,7 @@ nds32_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
return false;
}
-\f
+
/* Condition Code Status. */
/* -- Representation of condition codes using registers. */
@@ -3007,7 +3007,7 @@ nds32_canonicalize_comparison (int *code,
}
}
-\f
+
/* Describing Relative Costs of Operations. */
static int
@@ -3076,7 +3076,7 @@ nds32_address_cost (rtx address,
return nds32_address_cost_impl (address, mode, as, speed);
}
-\f
+
/* Dividing the Output into Sections (Texts, Data, . . . ). */
/* If references to a symbol or a constant must be treated differently
@@ -3115,7 +3115,7 @@ nds32_encode_section_info (tree decl, rtx rtl, int new_decl_p)
}
}
-\f
+
/* Defining the Output Assembler Language. */
/* -- The Overall Framework of an Assembler File. */
@@ -3908,7 +3908,7 @@ nds32_debugger_regno (unsigned int regno)
return regno;
}
-\f
+
/* Defining target-specific uses of __attribute__. */
/* Add some checking after merging attributes. */
@@ -4194,7 +4194,7 @@ nds32_option_override (void)
nds32_register_passes ();
}
-\f
+
/* Miscellaneous Parameters. */
static rtx_insn *
@@ -4248,7 +4248,7 @@ nds32_init_libfuncs (void)
/* PART 4: Implemet extern function definitions,
the prototype is in nds32-protos.h. */
-\f
+
/* Run-time Target Specification. */
void
@@ -4354,7 +4354,7 @@ nds32_cpu_cpp_builtins(struct cpp_reader *pfile)
#undef builtin_assert
}
-\f
+
/* Defining Data Structures for Per-function Information. */
void
@@ -4364,7 +4364,7 @@ nds32_init_expanders (void)
init_machine_status = nds32_init_machine_status;
}
-\f
+
/* Register Usage. */
/* -- Order of Allocation of Registers. */
@@ -4446,7 +4446,7 @@ nds32_modes_tieable_p (machine_mode mode1, machine_mode mode2)
return false;
}
-\f
+
/* Register Classes. */
enum reg_class
@@ -4479,7 +4479,7 @@ nds32_regno_reg_class (int regno)
return NO_REGS;
}
-\f
+
/* Stack Layout and Calling Conventions. */
/* -- Basic Stack Layout. */
@@ -5522,16 +5522,16 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
/* ------------------------------------------------------------------------ */
/* PART 5: Initialize target hook structure and definitions. */
-\f
+
/* Controlling the Compilation Driver. */
-\f
+
/* Run-time Target Specification. */
-\f
+
/* Defining Data Structures for Per-function Information. */
-\f
+
/* Storage Layout. */
#undef TARGET_PROMOTE_FUNCTION_MODE
@@ -5544,10 +5544,10 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_CONSTANT_ALIGNMENT
#define TARGET_CONSTANT_ALIGNMENT nds32_constant_alignment
-\f
+
/* Layout of Source Language Data Types. */
-\f
+
/* Register Usage. */
/* -- Basic Characteristics of Registers. */
@@ -5572,7 +5572,7 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
/* -- Registers That Form a Stack. */
-\f
+
/* Register Classes. */
#undef TARGET_CLASS_MAX_NREGS
@@ -5584,10 +5584,10 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_CAN_CHANGE_MODE_CLASS
#define TARGET_CAN_CHANGE_MODE_CLASS nds32_can_change_mode_class
-\f
+
/* Obsolete Macros for Defining Constraints. */
-\f
+
/* Stack Layout and Calling Conventions. */
/* -- Basic Stack Layout. */
@@ -5675,7 +5675,7 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
/* Stack smashing protection. */
-\f
+
/* Implementing the Varargs Macros. */
#undef TARGET_SETUP_INCOMING_VARARGS
@@ -5684,7 +5684,7 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_STRICT_ARGUMENT_NAMING
#define TARGET_STRICT_ARGUMENT_NAMING nds32_strict_argument_naming
-\f
+
/* Trampolines for Nested Functions. */
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
@@ -5693,10 +5693,10 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_TRAMPOLINE_INIT
#define TARGET_TRAMPOLINE_INIT nds32_trampoline_init
-\f
+
/* Implicit Calls to Library Routines. */
-\f
+
/* Addressing Modes. */
#undef TARGET_LEGITIMATE_ADDRESS_P
@@ -5717,10 +5717,10 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_DELEGITIMIZE_ADDRESS
#define TARGET_DELEGITIMIZE_ADDRESS nds32_delegitimize_address
-\f
+
/* Anchored Addresses. */
-\f
+
/* Condition Code Status. */
/* -- Representation of condition codes using (cc0). */
@@ -5732,7 +5732,7 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
/* -- Macros to control conditional execution. */
-\f
+
/* Describing Relative Costs of Operations. */
#undef TARGET_REGISTER_MOVE_COST
@@ -5747,19 +5747,19 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_ADDRESS_COST
#define TARGET_ADDRESS_COST nds32_address_cost
-\f
+
/* Adjusting the Instruction Scheduler. */
-\f
+
/* Dividing the Output into Sections (Texts, Data, . . . ). */
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO nds32_encode_section_info
-\f
+
/* Position Independent Code. */
-\f
+
/* Defining the Output Assembler Language. */
/* -- The Overall Framework of an Assembler File. */
@@ -5807,7 +5807,7 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
/* -- Assembler Commands for Alignment. */
-\f
+
/* Controlling Debugging Information Format. */
/* -- Macros Affecting All Debugging Formats. */
@@ -5816,13 +5816,13 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
/* -- Macros for VMS Debug Format. */
-\f
+
/* Cross Compilation and Floating Point. */
-\f
+
/* Mode Switching Instructions. */
-\f
+
/* Defining target-specific uses of __attribute__. */
#undef TARGET_ATTRIBUTE_TABLE
@@ -5840,25 +5840,25 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE nds32_option_override
-\f
+
/* Emulating TLS. */
#undef TARGET_HAVE_TLS
#define TARGET_HAVE_TLS TARGET_LINUX_ABI
-\f
+
/* Defining coprocessor specifics for MIPS targets. */
-\f
+
/* Parameters for Precompiled Header Validity Checking. */
-\f
+
/* C++ ABI parameters. */
-\f
+
/* Adding support for named address spaces. */
-\f
+
/* Miscellaneous Parameters. */
#undef TARGET_MD_ASM_ADJUST
@@ -5882,7 +5882,7 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#undef TARGET_HAVE_SPECULATION_SAFE_VALUE
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
-\f
+
/* ------------------------------------------------------------------------ */
/* Initialize the GCC target structure. */
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index cd00b2a6547..5c562e166f0 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -948,7 +948,7 @@ enum nds32_builtins
#endif
/* ------------------------------------------------------------------------ */
-\f
+
/* Controlling the Compilation Driver. */
#define OPTION_DEFAULT_SPECS \
@@ -1000,20 +1000,20 @@ enum nds32_builtins
#define MULTILIB_DEFAULTS \
{ NDS32_ENDIAN_DEFAULT, NDS32_CMODEL_DEFAULT }
-\f
+
/* Run-time Target Specification. */
#define TARGET_CPU_CPP_BUILTINS() \
nds32_cpu_cpp_builtins (pfile)
-\f
+
/* Defining Data Structures for Per-function Information. */
/* This macro is called once per function,
before generation of any RTL has begun. */
#define INIT_EXPANDERS nds32_init_expanders ()
-\f
+
/* Storage Layout. */
#define BITS_BIG_ENDIAN 0
@@ -1053,7 +1053,7 @@ enum nds32_builtins
#define PCC_BITFIELD_TYPE_MATTERS 1
-\f
+
/* Layout of Source Language Data Types. */
#define INT_TYPE_SIZE 32
@@ -1072,7 +1072,7 @@ enum nds32_builtins
#define WCHAR_TYPE "unsigned int"
#define WCHAR_TYPE_SIZE 32
-\f
+
/* Register Usage. */
/* Number of actual hardware registers.
@@ -1188,7 +1188,7 @@ enum nds32_builtins
own cost calculations. */
#define HONOR_REG_ALLOC_ORDER optimize_size
-\f
+
/* Register Classes. */
/* In nds32 target, we have three levels of registers:
@@ -1294,10 +1294,10 @@ enum reg_class
|| TEST_REGNO (num, ==, FRAME_POINTER_REGNUM) \
|| TEST_REGNO (num, ==, ARG_POINTER_REGNUM))
-\f
+
/* Obsolete Macros for Defining Constraints. */
-\f
+
/* Stack Layout and Calling Conventions. */
#define STACK_GROWS_DOWNWARD 1
@@ -1388,10 +1388,10 @@ enum reg_class
emit_library_call (fun, LCT_NORMAL, VOIDmode, lp, Pmode); \
}
-\f
+
/* Implementing the Varargs Macros. */
-\f
+
/* Trampolines for Nested Functions. */
/* Giving A-function and B-function,
@@ -1418,10 +1418,10 @@ enum reg_class
we set trampoline alignment 8*4=32 bits. */
#define TRAMPOLINE_ALIGNMENT 32
-\f
+
/* Implicit Calls to Library Routines. */
-\f
+
/* Addressing Modes. */
/* We can use "LWI.bi Rt, [Ra], 4" to support post increment. */
@@ -1444,13 +1444,13 @@ enum reg_class
#define MAX_REGS_PER_ADDRESS 3
-\f
+
/* Anchored Addresses. */
-\f
+
/* Condition Code Status. */
-\f
+
/* Describing Relative Costs of Operations. */
/* A C expression for the cost of a branch instruction.
@@ -1466,10 +1466,10 @@ enum reg_class
#define NO_FUNCTION_CSE 1
-\f
+
/* Adjusting the Instruction Scheduler. */
-\f
+
/* Dividing the Output into Sections (Texts, Data, . . . ). */
#define TEXT_SECTION_ASM_OP "\t.text"
@@ -1485,7 +1485,7 @@ enum reg_class
Otherwise, the readonly data section is used. */
#define JUMP_TABLES_IN_TEXT_SECTION 1
-\f
+
/* Position Independent Code. */
#define PIC_OFFSET_TABLE_REGNUM GP_REGNUM
@@ -1495,7 +1495,7 @@ enum reg_class
|| GET_CODE (X) == LABEL_REF \
|| (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
-\f
+
/* Defining the Output Assembler Language. */
#define ASM_COMMENT_START "!"
@@ -1654,7 +1654,7 @@ enum reg_class
#define ASM_OUTPUT_ALIGN(stream, power) \
fprintf (stream, "\t.align\t%d\n", power)
-\f
+
/* Controlling Debugging Information Format. */
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
@@ -1663,31 +1663,31 @@ enum reg_class
#define DWARF2_ASM_LINE_DEBUG_INFO 1
-\f
+
/* Cross Compilation and Floating Point. */
-\f
+
/* Mode Switching Instructions. */
-\f
+
/* Defining target-specific uses of __attribute__. */
-\f
+
/* Emulating TLS. */
-\f
+
/* Defining coprocessor specifics for MIPS targets. */
-\f
+
/* Parameters for Precompiled Header Validity Checking. */
-\f
+
/* C++ ABI parameters. */
-\f
+
/* Adding support for named address spaces. */
-\f
+
/* Miscellaneous Parameters. */
/* This is the machine mode that elements of a jump-table should have. */
diff --git a/gcc/config/netbsd.h b/gcc/config/netbsd.h
index b53caf822f8..5cd6ebd0d74 100644
--- a/gcc/config/netbsd.h
+++ b/gcc/config/netbsd.h
@@ -131,7 +131,7 @@ along with GCC; see the file COPYING3. If not see
#undef TARGET_LIBC_HAS_FUNCTION
#define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
-/* When building shared libraries, the initialization and finalization
+/* When building shared libraries, the initialization and finalization
functions for the library are .init and .fini respectively. */
#define COLLECT_SHARED_INIT_FUNC(STREAM,FUNC) \
diff --git a/gcc/config/nios2/elf.h b/gcc/config/nios2/elf.h
index 68656cf3fc4..0cae89e5af7 100644
--- a/gcc/config/nios2/elf.h
+++ b/gcc/config/nios2/elf.h
@@ -1,6 +1,6 @@
/* Definitions of ELF target support for Altera Nios II.
Copyright (C) 2012-2022 Free Software Foundation, Inc.
- Contributed by Jonah Graham (jgraham@altera.com),
+ Contributed by Jonah Graham (jgraham@altera.com),
Will Reece (wreece@altera.com), and Jeff DaSilva (jdasilva@altera.com).
Contributed by Mentor Graphics, Inc.
diff --git a/gcc/config/nios2/nios2.cc b/gcc/config/nios2/nios2.cc
index 6a894ec345e..0dc90f178bb 100644
--- a/gcc/config/nios2/nios2.cc
+++ b/gcc/config/nios2/nios2.cc
@@ -1,6 +1,6 @@
/* Target machine subroutines for Altera Nios II.
Copyright (C) 2012-2022 Free Software Foundation, Inc.
- Contributed by Jonah Graham (jgraham@altera.com),
+ Contributed by Jonah Graham (jgraham@altera.com),
Will Reece (wreece@altera.com), and Jeff DaSilva (jdasilva@altera.com).
Contributed by Mentor Graphics, Inc.
@@ -111,7 +111,7 @@ static bool custom_code_conflict = false;
regex_t nios2_gprel_sec_regex;
regex_t nios2_r0rel_sec_regex;
-\f
+
/* Definition of builtin function types for nios2. */
#define N2_FTYPES \
@@ -200,7 +200,7 @@ nios2_ftype (enum nios2_ftcode ftcode)
return types[(int) ftcode];
}
-\f
+
/* Definition of FPU instruction descriptions. */
struct nios2_fpu_insn_info
@@ -343,7 +343,7 @@ static bool
nios2_fpu_compare_enabled (enum rtx_code cond, machine_mode mode)
{
if (mode == SFmode)
- switch (cond)
+ switch (cond)
{
case EQ: return N2FPU_OP_ENABLED_P (fcmpeqs);
case NE: return N2FPU_OP_ENABLED_P (fcmpnes);
@@ -354,7 +354,7 @@ nios2_fpu_compare_enabled (enum rtx_code cond, machine_mode mode)
default: break;
}
else if (mode == DFmode)
- switch (cond)
+ switch (cond)
{
case EQ: return N2FPU_OP_ENABLED_P (fcmpeqd);
case NE: return N2FPU_OP_ENABLED_P (fcmpned);
@@ -388,7 +388,7 @@ nios2_compute_frame_layout (void)
if (cfun->machine->initialized)
return cfun->machine->total_size;
-
+
/* Calculate space needed for gp registers. */
save_reg_size = 0;
for (regno = 0; regno <= LAST_GP_REG; regno++)
@@ -434,7 +434,7 @@ nios2_compute_frame_layout (void)
{
unsigned i;
unsigned r;
-
+
for (i = 0; (r = EH_RETURN_DATA_REGNO (i)) != INVALID_REGNUM; i++)
if (!(save_mask & (1 << r)))
{
@@ -552,7 +552,7 @@ nios2_create_cfa_notes (rtx_insn *insn, bool epilogue_p)
#define TEMP_REG_NUM 8
/* Emit conditional trap for checking stack limit. SIZE is the number of
- additional bytes required.
+ additional bytes required.
GDB prologue analysis depends on this generating a direct comparison
to the SP register, so the adjustment to add SIZE needs to be done on
@@ -995,7 +995,7 @@ nios2_set_return_address (rtx address, rtx scratch)
{
unsigned offset = cfun->machine->save_reg_size - 4;
rtx base;
-
+
if (frame_pointer_needed)
base = hard_frame_pointer_rtx;
else
@@ -1080,7 +1080,7 @@ static bool
prologue_saved_reg_p (unsigned regno)
{
gcc_assert (GP_REG_P (regno));
-
+
if (df_regs_ever_live_p (regno) && !call_used_or_fixed_reg_p (regno))
return true;
@@ -1135,7 +1135,7 @@ nios2_initial_elimination_offset (int from, int to)
by the offset from the frame pointer to the stack pointer. */
if (to == HARD_FRAME_POINTER_REGNUM)
offset -= (cfun->machine->save_regs_offset
- + cfun->machine->fp_save_offset);
+ + cfun->machine->fp_save_offset);
return offset;
}
@@ -1166,7 +1166,7 @@ nios2_can_use_return_insn (void)
return total_frame_size == 0;
}
-\f
+
/* Check and signal some warnings/errors on FPU insn options. */
static void
nios2_custom_check_insns (void)
@@ -1390,13 +1390,13 @@ nios2_option_override (void)
/* Process -mgprel-sec= and -m0rel-sec=. */
if (nios2_gprel_sec)
{
- if (regcomp (&nios2_gprel_sec_regex, nios2_gprel_sec,
+ if (regcomp (&nios2_gprel_sec_regex, nios2_gprel_sec,
REG_EXTENDED | REG_NOSUB))
error ("%<-mgprel-sec=%> argument is not a valid regular expression");
}
if (nios2_r0rel_sec)
{
- if (regcomp (&nios2_r0rel_sec_regex, nios2_r0rel_sec,
+ if (regcomp (&nios2_r0rel_sec_regex, nios2_r0rel_sec,
REG_EXTENDED | REG_NOSUB))
error ("%<-mr0rel-sec=%> argument is not a valid regular expression");
}
@@ -1446,7 +1446,7 @@ nios2_option_override (void)
= build_target_option_node (&global_options, &global_options_set);
}
-\f
+
/* Return true if CST is a constant within range of movi/movui/movhi. */
static bool
nios2_simple_const_p (const_rtx cst)
@@ -1533,7 +1533,7 @@ nios2_rtx_costs (rtx x, machine_mode mode,
*total = COSTS_N_INSNS (5); /* Guess? */
else if (speed)
*total = COSTS_N_INSNS (2); /* Latency adjustment. */
- else
+ else
*total = COSTS_N_INSNS (1);
if (TARGET_HAS_MULX && GET_MODE (x) == DImode)
{
@@ -1557,7 +1557,7 @@ nios2_rtx_costs (rtx x, machine_mode mode,
*total = COSTS_N_INSNS (5); /* Guess? */
else if (speed)
*total = COSTS_N_INSNS (2); /* Latency adjustment. */
- else
+ else
*total = COSTS_N_INSNS (1);
return false;
}
@@ -1569,11 +1569,11 @@ nios2_rtx_costs (rtx x, machine_mode mode,
{
if (!speed)
*total = COSTS_N_INSNS (1);
- else
+ else
*total = COSTS_N_INSNS (2); /* Latency adjustment. */
return false;
}
-
+
case ZERO_EXTRACT:
if (TARGET_HAS_BMX)
{
@@ -1639,7 +1639,7 @@ nios2_call_tls_get_addr (rtx ti)
rtx ret = gen_rtx_REG (Pmode, FIRST_RETVAL_REGNO);
rtx fn;
rtx_insn *insn;
-
+
if (!nios2_tls_symbol)
nios2_tls_symbol = init_one_libfunc ("__tls_get_addr");
@@ -1863,7 +1863,7 @@ nios2_emit_expensive_div (rtx *operands, machine_mode mode)
LABEL_NUSES (lab1) = 1;
}
-\f
+
/* Branches and compares. */
/* Return in *ALT_CODE and *ALT_OP, an alternate equivalent constant
@@ -2005,7 +2005,7 @@ nios2_validate_compare (machine_mode mode, rtx *cmp, rtx *op1, rtx *op2)
}
else if (!reg_or_0_operand (*op2, mode))
*op2 = force_reg (mode, *op2);
-
+
check_rebuild_cmp:
if (code == GT || code == GTU || code == LE || code == LEU)
{
@@ -2057,7 +2057,7 @@ nios2_symbolic_constant_p (rtx x)
return false;
}
-/* Return true if X is an expression of the form
+/* Return true if X is an expression of the form
(PLUS reg large_constant). */
static bool
nios2_plus_large_constant_p (rtx x)
@@ -2134,7 +2134,7 @@ nios2_valid_addr_expr_p (rtx base, rtx offset, bool strict_p)
&& nios2_regno_ok_for_base_p (REGNO (base), strict_p)
&& (offset == NULL_RTX
|| nios2_valid_addr_offset_p (offset)
- || (nios2_large_constant_allowed ()
+ || (nios2_large_constant_allowed ()
&& nios2_symbolic_constant_p (offset))
|| nios2_unspec_reloc_p (offset)));
}
@@ -2158,7 +2158,7 @@ nios2_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
/* Else, fall through. */
case LABEL_REF:
- if (nios2_large_constant_allowed ()
+ if (nios2_large_constant_allowed ()
&& nios2_symbolic_constant_p (operand))
return true;
return false;
@@ -2181,7 +2181,7 @@ nios2_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
rtx op0 = XEXP (operand, 0);
rtx op1 = XEXP (operand, 1);
- if (nios2_valid_addr_expr_p (op0, op1, strict_p)
+ if (nios2_valid_addr_expr_p (op0, op1, strict_p)
|| nios2_valid_addr_expr_p (op1, op0, strict_p))
return true;
}
@@ -2191,7 +2191,7 @@ nios2_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
This requires a 16-bit relocation and isn't valid with R2
io-variant load/stores. */
case LO_SUM:
- if (TARGET_ARCH_R2
+ if (TARGET_ARCH_R2
&& (TARGET_BYPASS_CACHE || TARGET_BYPASS_CACHE_VOLATILE))
return false;
else
@@ -2215,18 +2215,18 @@ nios2_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
the (plus reg symbolic_constant) and (plus reg (const ...)) forms
but giving (plus reg symbol_ref) address modes the same cost as those
that don't require splitting. Also, from a theoretical point of view:
- - This is in line with the recommendation in the GCC internals
+ - This is in line with the recommendation in the GCC internals
documentation to make address forms involving multiple
- registers more expensive than single-register forms.
- - OTOH it still encourages fwprop1 to propagate constants into
+ registers more expensive than single-register forms.
+ - OTOH it still encourages fwprop1 to propagate constants into
address expressions more aggressively.
- We should discourage splitting (symbol + offset) into hi/lo pairs
to allow CSE'ing the symbol when it's used with more than one offset,
but not so heavily as to avoid this addressing mode at all. */
static int
-nios2_address_cost (rtx address,
+nios2_address_cost (rtx address,
machine_mode mode ATTRIBUTE_UNUSED,
- addr_space_t as ATTRIBUTE_UNUSED,
+ addr_space_t as ATTRIBUTE_UNUSED,
bool speed ATTRIBUTE_UNUSED)
{
if (nios2_plus_large_constant_p (address))
@@ -2257,7 +2257,7 @@ nios2_large_constant_memory_operand_p (rtx x)
}
-/* Return true if X is something that needs to be split into a
+/* Return true if X is something that needs to be split into a
high/lo_sum pair. */
bool
nios2_large_constant_p (rtx x)
@@ -2268,8 +2268,8 @@ nios2_large_constant_p (rtx x)
}
/* Given an RTX X that satisfies nios2_large_constant_p, split it into
- high and lo_sum parts using TEMP as a scratch register. Emit the high
- instruction and return the lo_sum expression.
+ high and lo_sum parts using TEMP as a scratch register. Emit the high
+ instruction and return the lo_sum expression.
Also handle special cases involving constant integers. */
rtx
nios2_split_large_constant (rtx x, rtx temp)
@@ -2292,7 +2292,7 @@ nios2_split_large_constant (rtx x, rtx temp)
return gen_rtx_PLUS (Pmode, temp, gen_int_mode (low, Pmode));
}
}
-
+
emit_insn (gen_rtx_SET (temp, gen_rtx_HIGH (Pmode, copy_rtx (x))));
return gen_rtx_LO_SUM (Pmode, temp, copy_rtx (x));
}
@@ -2316,7 +2316,7 @@ nios2_split_plus_large_constant (rtx op0, rtx op1)
}
/* Given a MEM OP with an address that includes a splittable symbol or
- other large constant, emit some instructions to do the split and
+ other large constant, emit some instructions to do the split and
return a new MEM. */
rtx
nios2_split_large_constant_memory_operand (rtx op)
@@ -2340,7 +2340,7 @@ nios2_small_section_name_p (const char *section)
|| startswith (section, ".sbss.")
|| strcmp (section, ".sdata") == 0
|| startswith (section, ".sdata.")
- || (nios2_gprel_sec
+ || (nios2_gprel_sec
&& regexec (&nios2_gprel_sec_regex, section, 0, NULL, 0) == 0));
}
@@ -2348,7 +2348,7 @@ nios2_small_section_name_p (const char *section)
static bool
nios2_r0rel_section_name_p (const char *section)
{
- return (nios2_r0rel_sec
+ return (nios2_r0rel_sec
&& regexec (&nios2_r0rel_sec_regex, section, 0, NULL, 0) == 0);
}
@@ -2590,7 +2590,7 @@ nios2_legitimize_constant_address (rtx addr)
base = nios2_legitimize_tls_address (base);
else if (flag_pic)
base = nios2_load_pic_address (base, UNSPEC_PIC_SYM, NULL_RTX);
- else if (!nios2_large_constant_allowed ()
+ else if (!nios2_large_constant_allowed ()
&& nios2_symbolic_constant_p (addr))
return nios2_split_large_constant (addr, gen_reg_rtx (Pmode));
else if (CONST_INT_P (addr))
@@ -2624,7 +2624,7 @@ nios2_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
machine_mode mode ATTRIBUTE_UNUSED)
{
rtx op0, op1;
-
+
if (CONSTANT_P (x))
return nios2_legitimize_constant_address (x);
@@ -2748,15 +2748,15 @@ nios2_emit_move_sequence (rtx *operands, machine_mode mode)
}
}
else if (gprel_constant_p (from) || r0rel_constant_p (from))
- /* Handled directly by movsi_internal as gp + offset
+ /* Handled directly by movsi_internal as gp + offset
or r0 + offset. */
;
else if (nios2_large_constant_p (from))
/* This case covers either a regular symbol reference or an UNSPEC
- representing a 32-bit offset. We split the former
+ representing a 32-bit offset. We split the former
only conditionally and the latter always. */
{
- if (!nios2_large_constant_allowed ()
+ if (!nios2_large_constant_allowed ()
|| nios2_large_unspec_reloc_p (from))
{
rtx lo = nios2_split_large_constant (from, to);
@@ -2766,7 +2766,7 @@ nios2_emit_move_sequence (rtx *operands, machine_mode mode)
return true;
}
}
- else
+ else
/* This is a TLS or PIC symbol. */
{
from = nios2_legitimize_constant_address (from);
@@ -2810,7 +2810,7 @@ nios2_adjust_call_address (rtx *call_op, rtx reg)
}
}
-\f
+
/* Output assembly language related definitions. */
/* Implement TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
@@ -2838,7 +2838,7 @@ nios2_print_operand_punct_valid_p (unsigned char code)
z: prints the third register immediate operand in assembly
instructions. Outputs const0_rtx as the 'zero' register
instead of '0'.
-
+
y: same as 'z', but for specifically for logical instructions,
where the processing for immediates are slightly different.
@@ -3291,7 +3291,7 @@ nios2_fpu_insn_asm (enum n2fpu_code code)
static char buf[256];
const char *op1, *op2, *op3;
int ln = 256, n = 0;
-
+
int N = N2FPU_N (code);
int num_operands = N2FPU (code).num_operands;
const char *insn_name = N2FPU_NAME (code);
@@ -3368,7 +3368,7 @@ nios2_fpu_insn_asm (enum n2fpu_code code)
return buf;
}
-\f
+
/* Function argument related. */
@@ -3383,7 +3383,7 @@ nios2_fpu_insn_asm (enum n2fpu_code code)
static rtx
nios2_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
{
- CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
+ CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
rtx return_rtx = NULL_RTX;
if (cum->regs_used < NUM_ARG_REGS)
@@ -3399,7 +3399,7 @@ nios2_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
static int
nios2_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
{
- CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
+ CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
HOST_WIDE_INT param_size = arg.promoted_size_in_bytes ();
gcc_assert (param_size >= 0);
@@ -3419,7 +3419,7 @@ static void
nios2_function_arg_advance (cumulative_args_t cum_v,
const function_arg_info &arg)
{
- CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
+ CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
HOST_WIDE_INT param_size = arg.promoted_size_in_bytes ();
gcc_assert (param_size >= 0);
@@ -3516,7 +3516,7 @@ nios2_setup_incoming_varargs (cumulative_args_t cum_v,
const function_arg_info &arg,
int *pretend_size, int second_time)
{
- CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
+ CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
CUMULATIVE_ARGS local_cum;
cumulative_args_t local_cum_v = pack_cumulative_args (&local_cum);
int regs_to_push;
@@ -3546,7 +3546,7 @@ nios2_setup_incoming_varargs (cumulative_args_t cum_v,
*pretend_size = pret_size;
}
-\f
+
/* Init FPU builtins. */
static void
@@ -3714,7 +3714,7 @@ nios2_expand_custom_builtin (tree exp, unsigned int index, rtx target)
}
-\f
+
/* Main definition of built-in functions. Nios II has a small number of fixed
builtins, plus a large number of FPU insn builtins, and builtins for
@@ -3825,7 +3825,7 @@ nios2_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED)
return nios2_builtin_decls[code];
}
-\f
+
/* Low-level built-in expand routine. */
static rtx
nios2_expand_builtin_insn (const struct nios2_builtin_desc *d, int n,
@@ -3836,8 +3836,8 @@ nios2_expand_builtin_insn (const struct nios2_builtin_desc *d, int n,
else
{
error ("invalid argument to built-in function %s", d->name);
- return has_target_p ? gen_reg_rtx (ops[0].mode) : const0_rtx;
- }
+ return has_target_p ? gen_reg_rtx (ops[0].mode) : const0_rtx;
+ }
}
/* Expand ldio/stio and ldex/ldsex/stex/stsex form load-store
@@ -3952,7 +3952,7 @@ nios2_expand_cache_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
mem = gen_rtx_MEM (SImode, addr);
create_input_operand (&ops[0], mem, SImode);
-
+
return nios2_expand_builtin_insn (d, 1, ops, false);
}
@@ -3966,7 +3966,7 @@ nios2_expand_wrpie_builtin (tree exp, rtx target,
val = expand_normal (CALL_EXPR_ARG (exp, 0));
create_input_operand (&ops[1], val, SImode);
create_output_operand (&ops[0], target, SImode);
-
+
return nios2_expand_builtin_insn (d, 2, ops, true);
}
@@ -3980,10 +3980,10 @@ nios2_expand_eni_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
if (INTVAL (imm) != 0 && INTVAL (imm) != 1)
{
error ("the ENI instruction operand must be either 0 or 1");
- return const0_rtx;
+ return const0_rtx;
}
create_integer_operand (&ops[0], INTVAL (imm));
-
+
return nios2_expand_builtin_insn (d, 1, ops, false);
}
@@ -4073,7 +4073,7 @@ nios2_init_libfuncs (void)
init_sync_libfuncs (UNITS_PER_WORD);
}
-\f
+
/* Register a custom code use, and signal error if a conflict was found. */
static void
@@ -4305,7 +4305,7 @@ nios2_valid_target_attribute_rec (tree args)
if (ISSPACE (*t))
continue;
if (!ISDIGIT (*t))
- {
+ {
error ("%<custom-%s=%> argument should be "
"a non-negative integer", N2FPU_NAME (code));
return false;
@@ -4321,7 +4321,7 @@ nios2_valid_target_attribute_rec (tree args)
error ("%<custom-%s=%> is not recognized as FPU instruction",
argstr + 7);
return false;
- }
+ }
}
else
{
@@ -4681,7 +4681,7 @@ static bool nios2_add_insn_narrow[] = {
false, false};
/* Function to classify kinds of add instruction patterns. */
-static enum nios2_add_insn_kind
+static enum nios2_add_insn_kind
nios2_add_insn_classify (rtx_insn *insn ATTRIBUTE_UNUSED,
rtx lhs, rtx rhs1, rtx rhs2)
{
@@ -5037,7 +5037,7 @@ ldstwm_operation_p (rtx op, bool load_p)
{
int start, i, end = XVECLEN (op, 0) - 1, last_regno = -1;
unsigned int regset = 0;
- rtx base_reg, offset;
+ rtx base_reg, offset;
rtx first_elt = XVECEXP (op, 0, 0);
bool inc_p = true;
bool wb_p = base_reg_adjustment_p (first_elt, &base_reg, &offset);
@@ -5411,7 +5411,7 @@ nios2_reorg (void)
max_labelno = max_label_num ();
min_labelno = get_first_label_num ();
label_align = XCNEWVEC (unsigned char, max_labelno - min_labelno + 1);
-
+
/* Iterate on inserting alignment and adjusting branch lengths until
no more changes. */
while (changed)
@@ -5462,7 +5462,7 @@ nios2_adjust_reg_alloc_order (void)
const int cdx_reg_alloc_order[] =
{
/* Call-clobbered GPRs within CDX 3-bit encoded range. */
- 2, 3, 4, 5, 6, 7,
+ 2, 3, 4, 5, 6, 7,
/* Call-saved GPRs within CDX 3-bit encoded range. */
16, 17,
/* Other call-clobbered GPRs. */
@@ -5478,7 +5478,7 @@ nios2_adjust_reg_alloc_order (void)
sizeof (int) * FIRST_PSEUDO_REGISTER);
}
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE nios2_asm_function_prologue
diff --git a/gcc/config/nios2/nios2.h b/gcc/config/nios2/nios2.h
index 7c7d5c05fd7..742837b3b93 100644
--- a/gcc/config/nios2/nios2.h
+++ b/gcc/config/nios2/nios2.h
@@ -1,6 +1,6 @@
/* Definitions of target machine for Altera Nios II.
Copyright (C) 2012-2022 Free Software Foundation, Inc.
- Contributed by Jonah Graham (jgraham@altera.com),
+ Contributed by Jonah Graham (jgraham@altera.com),
Will Reece (wreece@altera.com), and Jeff DaSilva (jdasilva@altera.com).
Contributed by Mentor Graphics, Inc.
@@ -130,7 +130,7 @@
29 r29 ea Exception Return Address
30 r30 ba Breakpoint Return Address
31 r31 ra Return Address
-
+
32 ctl0 status
33 ctl1 estatus STATUS saved by exception
34 ctl2 bstatus STATUS saved by break
@@ -144,7 +144,7 @@
40 First Pseudo Register
In addition, r12 is used as the static chain register and r13, r14, and r15
- are clobbered by PLT code sequences.
+ are clobbered by PLT code sequences.
The definitions for all the hard register numbers are located in nios2.md.
*/
diff --git a/gcc/config/nvptx/nvptx.cc b/gcc/config/nvptx/nvptx.cc
index 06a9585dd3b..87573408ec6 100644
--- a/gcc/config/nvptx/nvptx.cc
+++ b/gcc/config/nvptx/nvptx.cc
@@ -593,7 +593,7 @@ nvptx_emit_forking (unsigned mask, bool is_call)
if (mask)
{
rtx op = GEN_INT (mask | (is_call << GOMP_DIM_MAX));
-
+
/* Emit fork at all levels. This helps form SESE regions, as
it creates a block with a single successor before entering a
partitooned region. That is a good candidate for the end of
@@ -622,7 +622,7 @@ nvptx_emit_joining (unsigned mask, bool is_call)
}
}
-\f
+
/* Determine whether MODE and TYPE (possibly NULL) should be passed or
returned in memory. Integer and floating types supported by the
machine are passed in registers, everything else is passed in
@@ -901,10 +901,10 @@ write_return_mode (std::stringstream &s, bool for_proto, machine_mode mode)
const char *ptx_type = nvptx_ptx_type_from_mode (mode, false);
const char *pfx = "\t.reg";
const char *sfx = ";\n";
-
+
if (for_proto)
pfx = "(.param", sfx = "_out) ";
-
+
s << pfx << ptx_type << " " << reg_names[NVPTX_RETURN_REGNUM] << sfx;
}
@@ -927,7 +927,7 @@ write_return_type (std::stringstream &s, bool for_proto, tree type)
{
if (for_proto)
return return_in_mem;
-
+
/* Named return values can cause us to return a pointer as well
as expect an argument for the return location. This is
optimization-level specific, so no caller can make use of
@@ -1054,7 +1054,7 @@ write_fn_proto_1 (std::stringstream &s, bool is_defn,
for (; args; args = TREE_CHAIN (args), not_atomic_weak_arg--)
{
tree type = prototyped ? TREE_VALUE (args) : TREE_TYPE (args);
-
+
if (not_atomic_weak_arg)
argno = write_arg_type (s, -1, argno, type, prototyped);
else
@@ -1224,7 +1224,7 @@ static void
nvptx_maybe_record_fnsym (rtx sym)
{
tree decl = SYMBOL_REF_DECL (sym);
-
+
if (decl && TREE_CODE (decl) == FUNCTION_DECL && DECL_EXTERNAL (decl))
nvptx_record_needed_fndecl (decl);
}
@@ -1508,7 +1508,7 @@ nvptx_declare_function_name (FILE *file, const char *name, const_tree decl)
bool return_in_mem = write_return_type (s, false, result_type);
if (return_in_mem)
argno = write_arg_type (s, 0, argno, ptr_type_node, true);
-
+
/* Declare and initialize incoming arguments. */
tree args = TYPE_ARG_TYPES (fntype);
bool prototyped = true;
@@ -1766,7 +1766,7 @@ nvptx_function_end (FILE *file)
{
fprintf (file, "}\n");
}
-\f
+
/* Decide whether we can make a sibling call to a function. For ptx, we
can't. */
@@ -1943,7 +1943,7 @@ static rtx
nvptx_gen_unpack (rtx dst0, rtx dst1, rtx src)
{
rtx res;
-
+
switch (GET_MODE (src))
{
case E_DImode:
@@ -1964,7 +1964,7 @@ static rtx
nvptx_gen_pack (rtx dst, rtx src0, rtx src1)
{
rtx res;
-
+
switch (GET_MODE (dst))
{
case E_DImode:
@@ -2067,7 +2067,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx, nvptx_shuffle_kind kind)
case E_BImode:
{
rtx tmp = gen_reg_rtx (SImode);
-
+
start_sequence ();
emit_insn (gen_sel_truesi (tmp, src, GEN_INT (1), const0_rtx));
emit_insn (nvptx_gen_shuffle (tmp, tmp, idx, kind));
@@ -2090,7 +2090,7 @@ nvptx_gen_shuffle (rtx dst, rtx src, rtx idx, nvptx_shuffle_kind kind)
end_sequence ();
}
break;
-
+
default:
gcc_unreachable ();
}
@@ -2130,7 +2130,7 @@ enum propagate_mask
/* Generate instruction(s) to spill or fill register REG to/from the
worker broadcast array. PM indicates what is to be done, REP
how many loop iterations will be executed (0 for not a loop). */
-
+
static rtx
nvptx_gen_shared_bcast (rtx reg, propagate_mask pm, unsigned rep,
broadcast_data_t *data, bool vector)
@@ -2143,7 +2143,7 @@ nvptx_gen_shared_bcast (rtx reg, propagate_mask pm, unsigned rep,
case E_BImode:
{
rtx tmp = gen_reg_rtx (SImode);
-
+
start_sequence ();
if (pm & PM_read)
emit_insn (gen_sel_truesi (tmp, reg, GEN_INT (1), const0_rtx));
@@ -2170,7 +2170,7 @@ nvptx_gen_shared_bcast (rtx reg, propagate_mask pm, unsigned rep,
if (data->offset)
addr = gen_rtx_PLUS (Pmode, addr, GEN_INT (data->offset));
}
-
+
addr = gen_rtx_MEM (mode, addr);
if (pm == PM_read)
res = gen_rtx_SET (addr, reg);
@@ -2183,7 +2183,7 @@ nvptx_gen_shared_bcast (rtx reg, propagate_mask pm, unsigned rep,
{
/* We're using a ptr, increment it. */
start_sequence ();
-
+
emit_insn (res);
emit_insn (gen_adddi3 (data->ptr, data->ptr,
GEN_INT (GET_MODE_SIZE (GET_MODE (reg)))));
@@ -2198,7 +2198,7 @@ nvptx_gen_shared_bcast (rtx reg, propagate_mask pm, unsigned rep,
}
return res;
}
-\f
+
/* Returns true if X is a valid address for use in a memory reference. */
static bool
@@ -2225,7 +2225,7 @@ nvptx_legitimate_address_p (machine_mode, rtx x, bool)
return false;
}
}
-\f
+
/* Machinery to output constant initializers. When beginning an
initializer, we decide on a fragment size (which is visible in ptx
in the type used), and then all initializer data is buffered until
@@ -2256,7 +2256,7 @@ output_init_frag (rtx sym)
init_frag.val = 0;
init_frag.offset = 0;
init_frag.remaining--;
-
+
if (sym)
{
bool function = (SYMBOL_REF_DECL (sym)
@@ -2737,7 +2737,7 @@ nvptx_output_call_insn (rtx_insn *insn, rtx result, rtx callee)
fprintf (asm_out_file, "\t\tcall ");
if (result != NULL_RTX)
fprintf (asm_out_file, "(%s_in), ", reg_names[NVPTX_RETURN_REGNUM]);
-
+
if (decl)
{
char *replaced_dots = NULL;
@@ -2999,7 +2999,7 @@ nvptx_print_operand (FILE *file, rtx x, int code)
{
nvptx_shuffle_kind kind = (nvptx_shuffle_kind) UINTVAL (x);
/* Same order as nvptx_shuffle_kind. */
- static const char *const kinds[] =
+ static const char *const kinds[] =
{".up", ".down", ".bfly", ".idx"};
fputs (kinds[kind], file);
}
@@ -3166,7 +3166,7 @@ nvptx_print_operand (FILE *file, rtx x, int code)
}
}
}
-\f
+
/* Record replacement regs used to deal with subreg operands. */
struct reg_replace
{
@@ -3494,7 +3494,7 @@ struct parallel
{
/* Parent parallel. */
parallel *parent;
-
+
/* Next sibling parallel. */
parallel *next;
@@ -3538,7 +3538,7 @@ parallel::parallel (parallel *parent_, unsigned mask_)
forked_block = join_block = 0;
forked_insn = join_insn = 0;
fork_insn = joining_insn = 0;
-
+
if (parent)
{
next = parent->inner;
@@ -3626,7 +3626,7 @@ nvptx_split_blocks (bb_insn_map_t *map)
block = elt->second;
remap = block;
}
-
+
/* Split block before insn. The insn is in the new block */
edge e = split_block (block, PREV_INSN (elt->first));
@@ -3798,7 +3798,7 @@ nvptx_discover_pars (bb_insn_map_t *map)
nvptx_dump_pars (par, 0);
fprintf (dump_file, "\n");
}
-
+
return par;
}
@@ -3829,7 +3829,7 @@ nvptx_discover_pars (bb_insn_map_t *map)
the node itself and one for the output edges. Such back edges are
referred to as 'Brackets'. Cycle equivalent nodes will have the
same set of brackets.
-
+
Determining bracket equivalency is done by maintaining a list of
brackets in such a manner that the list length and final bracket
uniquely identify the set.
@@ -3839,7 +3839,7 @@ nvptx_discover_pars (bb_insn_map_t *map)
algorithm. Notice it doesn't actually find the set of nodes within
a particular region, just unorderd sets of nodes that are the
entries and exits of SESE regions.
-
+
After determining cycle equivalency, we need to find the minimal
set of SESE regions. Do this with a DFS coloring walk of the
complete graph. We're either 'looking' or 'coloring'. When
@@ -3930,7 +3930,7 @@ struct bb_sese
back.first ? back.first->index : 0, back.second);
brackets.safe_push (bracket (back));
}
-
+
void append (bb_sese *child);
void remove (const pseudo_node_t &);
@@ -4018,10 +4018,10 @@ nvptx_sese_number (int n, int p, int dir, basic_block b,
if (dump_file)
fprintf (dump_file, "Block %d(%d), parent (%d), orientation %+d\n",
b->index, n, p, dir);
-
+
BB_SET_SESE (b, new bb_sese (n, p, dir));
p = n;
-
+
n += 3;
list->quick_push (b);
@@ -4038,7 +4038,7 @@ nvptx_sese_number (int n, int p, int dir, basic_block b,
FOR_EACH_EDGE (e, ei, edges)
{
basic_block target = *(basic_block *)((char *)e + offset);
-
+
if (target->flags & BB_VISITED)
n = nvptx_sese_number (n, p, dir, target, list);
}
@@ -4116,7 +4116,7 @@ nvptx_sese_pseudo (basic_block me, bb_sese *sese, int depth, int dir,
/* Non-parental ancestor node -- a backlink. */
int d = usd * t_sese->dir;
int back = t_sese->node + d;
-
+
if (hi_back > back)
{
hi_back = back;
@@ -4151,7 +4151,7 @@ nvptx_sese_pseudo (basic_block me, bb_sese *sese, int depth, int dir,
sese->push (pseudo_node_t (nullptr, 0));
}
}
-
+
/* If this node leads directly or indirectly to a no-return region of
the graph, then fake a backedge to entry node. */
if (!sese->brackets.length () || !edges || !edges->length ())
@@ -4208,7 +4208,7 @@ nvptx_sese_pseudo (basic_block me, bb_sese *sese, int depth, int dir,
node_child = t_sese->high;
}
}
-
+
sese->push (node_child);
}
}
@@ -4231,7 +4231,7 @@ nvptx_sese_color (auto_vec<unsigned> &color_counts, bb_pair_vec_t ®ions,
gcc_assert (coloring < 0 || (sese && coloring == sese->color));
return;
}
-
+
block->flags |= BB_VISITED;
if (sese)
@@ -4263,7 +4263,7 @@ nvptx_sese_color (auto_vec<unsigned> &color_counts, bb_pair_vec_t ®ions,
{
edge e;
edge_iterator ei;
-
+
FOR_EACH_EDGE (e, ei, block->succs)
nvptx_sese_color (color_counts, regions, e->dest, coloring);
}
@@ -4280,7 +4280,7 @@ nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions)
basic_block block;
int ix;
- /* First clear each BB of the whole function. */
+ /* First clear each BB of the whole function. */
FOR_ALL_BB_FN (block, cfun)
{
block->flags &= ~BB_VISITED;
@@ -4311,7 +4311,7 @@ nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions)
if (dump_file)
fprintf (dump_file, "Searching graph starting at %d\n", block->index);
-
+
/* Number the nodes reachable from block initial DFS order. */
int depth = nvptx_sese_number (2, 0, +1, block, &spanlist);
@@ -4341,7 +4341,7 @@ nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions)
{
unsigned count;
const char *comma = "";
-
+
fprintf (dump_file, "Found %d cycle equivalents\n",
color_counts.length ());
for (ix = 0; color_counts.iterate (ix, &count); ix++)
@@ -4361,7 +4361,7 @@ nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions)
}
fprintf (dump_file, "\n");
}
-
+
/* Now we've colored every block in the subgraph. We now need to
determine the minimal set of SESE regions that cover that
subgraph. Do this with a DFS walk of the complete function.
@@ -4383,7 +4383,7 @@ nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions)
{
const char *comma = "";
int len = regions.length ();
-
+
fprintf (dump_file, "SESE regions:");
for (ix = 0; ix != len; ix++)
{
@@ -4413,7 +4413,7 @@ nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions)
}
fprintf (dump_file, "\n\n");
}
-
+
for (ix = 0; blocks.iterate (ix, &block); ix++)
delete BB_GET_SESE (block);
}
@@ -4475,7 +4475,7 @@ nvptx_propagate (bool is_call, basic_block block, rtx_insn *insn,
idx = gen_reg_rtx (SImode);
pred = gen_reg_rtx (BImode);
label = gen_label_rtx ();
-
+
emit_insn (gen_rtx_SET (idx, GEN_INT (fs)));
/* Allow worker function to initialize anything needed. */
rtx init = fn (tmp, PM_loop_begin, fs, data, vector);
@@ -4533,7 +4533,7 @@ warp_prop_gen (rtx reg, propagate_mask pm,
{
if (!(pm & PM_read_write))
return 0;
-
+
return nvptx_gen_warp_bcast (reg);
}
@@ -4795,7 +4795,7 @@ verify_neutering_labels (basic_block to, rtx_insn *vector_label,
/* Single neutering according to MASK. FROM is the incoming block and
TO is the outgoing block. These may be the same block. Insert at
start of FROM:
-
+
if (tid.<axis>) goto end.
and insert before ending branch of TO (if there is such an insn):
@@ -5164,7 +5164,7 @@ nvptx_process_pars (parallel *par)
{
if (nvptx_optimize)
nvptx_optimize_inner (par);
-
+
unsigned inner_mask = par->mask;
/* Do the inner parallels first. */
@@ -5230,7 +5230,7 @@ nvptx_neuter_pars (parallel *par, unsigned modes, unsigned outer)
& (GOMP_DIM_MASK (GOMP_DIM_WORKER)
| GOMP_DIM_MASK (GOMP_DIM_VECTOR)));
unsigned skip_mask = 0, neuter_mask = 0;
-
+
if (par->inner)
nvptx_neuter_pars (par->inner, modes, outer | me);
@@ -5291,7 +5291,7 @@ nvptx_neuter_pars (parallel *par, unsigned modes, unsigned outer)
if (skip_mask)
nvptx_skip_par (skip_mask, par);
-
+
if (par->next)
nvptx_neuter_pars (par->next, modes, outer);
}
@@ -5734,7 +5734,7 @@ nvptx_reorg (void)
if (dump_file)
df_dump (dump_file);
-
+
/* Mark unused regs as unused. */
int max_regs = max_reg_num ();
for (int i = LAST_VIRTUAL_REGISTER + 1; i < max_regs; i++)
@@ -5785,7 +5785,7 @@ nvptx_reorg (void)
df_finish_pass (true);
}
-\f
+
/* Handle a "kernel" attribute; arguments as in
struct attribute_spec.handler. */
@@ -5843,7 +5843,7 @@ static const struct attribute_spec nvptx_attribute_table[] =
NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* Limit vector alignments to BIGGEST_ALIGNMENT. */
static HOST_WIDE_INT
@@ -5899,7 +5899,7 @@ nvptx_use_anchors_for_symbol_p (const_rtx ARG_UNUSED (a))
{
return false;
}
-\f
+
/* Record a symbol for mkoffload to enter into the mapping table. */
static void
@@ -6025,7 +6025,7 @@ nvptx_expand_shuffle (tree exp, rtx target, machine_mode mode, int ignore)
{
if (ignore)
return target;
-
+
rtx src = expand_expr (CALL_EXPR_ARG (exp, 0),
NULL_RTX, mode, EXPAND_NORMAL);
if (!REG_P (src))
@@ -6035,7 +6035,7 @@ nvptx_expand_shuffle (tree exp, rtx target, machine_mode mode, int ignore)
NULL_RTX, SImode, EXPAND_NORMAL);
rtx op = expand_expr (CALL_EXPR_ARG (exp, 2),
NULL_RTX, SImode, EXPAND_NORMAL);
-
+
if (!REG_P (idx) && GET_CODE (idx) != CONST_INT)
idx = copy_to_mode_reg (SImode, idx);
@@ -6121,7 +6121,7 @@ nvptx_expand_cmp_swap (tree exp, rtx target,
machine_mode ARG_UNUSED (m), int ARG_UNUSED (ignore))
{
machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
-
+
if (!target)
target = gen_reg_rtx (mode);
@@ -6138,7 +6138,7 @@ nvptx_expand_cmp_swap (tree exp, rtx target,
cmp = copy_to_mode_reg (mode, cmp);
if (!REG_P (src))
src = copy_to_mode_reg (mode, src);
-
+
if (mode == SImode)
pat = gen_atomic_compare_and_swapsi_1 (target, mem, cmp, src, const0_rtx);
else
@@ -6708,7 +6708,7 @@ nvptx_generate_vector_shuffle (location_t loc,
fn = NVPTX_BUILTIN_SHUFFLELL;
arg_type = long_long_unsigned_type_node;
}
-
+
tree call = nvptx_builtin_decl (fn, true);
tree bits = build_int_cst (unsigned_type_node, shift);
tree kind = build_int_cst (unsigned_type_node, SHUFFLE_DOWN);
@@ -6745,7 +6745,7 @@ static tree
nvptx_global_lock_addr ()
{
tree v = global_lock_var;
-
+
if (!v)
{
tree name = get_identifier ("__reduction_lock");
@@ -6808,7 +6808,7 @@ nvptx_lockless_update (location_t loc, gimple_stmt_iterator *gsi,
gimple *init_end = gimple_seq_last (init_seq);
gsi_insert_seq_before (gsi, init_seq, GSI_SAME_STMT);
-
+
/* Split the block just after the init stmts. */
basic_block pre_bb = gsi_bb (*gsi);
edge pre_edge = split_block (pre_bb, init_end);
@@ -6820,7 +6820,7 @@ nvptx_lockless_update (location_t loc, gimple_stmt_iterator *gsi,
tree expect_var = make_ssa_name (arg_type);
tree actual_var = make_ssa_name (arg_type);
tree write_var = make_ssa_name (arg_type);
-
+
/* Build and insert the reduction calculation. */
gimple_seq red_seq = NULL;
tree write_expr = fold_build1 (code, var_type, expect_var);
@@ -6922,7 +6922,7 @@ nvptx_lockfull_update (location_t loc, gimple_stmt_iterator *gsi,
basic_block update_bb = locked_edge->dest;
lock_bb = locked_edge->src;
*gsi = gsi_for_stmt (gsi_stmt (*gsi));
-
+
/* Create the lock loop ... */
locked_edge->flags ^= EDGE_TRUE_VALUE | EDGE_FALLTHRU;
locked_edge->probability = profile_probability::even ();
@@ -6954,11 +6954,11 @@ nvptx_lockfull_update (location_t loc, gimple_stmt_iterator *gsi,
tree ref_in = build_simple_mem_ref (ptr);
TREE_THIS_VOLATILE (ref_in) = 1;
gimplify_assign (acc_in, ref_in, &red_seq);
-
+
tree acc_out = make_ssa_name (var_type);
tree update_expr = fold_build2 (op, var_type, ref_in, var);
gimplify_assign (acc_out, update_expr, &red_seq);
-
+
tree ref_out = build_simple_mem_ref (ptr);
TREE_THIS_VOLATILE (ref_out) = 1;
gimplify_assign (ref_out, acc_out, &red_seq);
@@ -7021,7 +7021,7 @@ nvptx_goacc_reduction_setup (gcall *call, offload_attrs *oa)
if (!integer_zerop (ref_to_res))
var = build_simple_mem_ref (ref_to_res);
}
-
+
if (level == GOMP_DIM_WORKER
|| (level == GOMP_DIM_VECTOR && oa->vector_length > PTX_WARP_SIZE))
{
@@ -7058,7 +7058,7 @@ nvptx_goacc_reduction_init (gcall *call, offload_attrs *oa)
tree init = omp_reduction_init_op (gimple_location (call), rcode,
TREE_TYPE (var));
gimple_seq seq = NULL;
-
+
push_gimplify_context (true);
if (level == GOMP_DIM_VECTOR && oa->vector_length == PTX_WARP_SIZE)
@@ -7083,7 +7083,7 @@ nvptx_goacc_reduction_init (gcall *call, offload_attrs *oa)
/* Fixup flags from call_bb to init_bb. */
init_edge->flags ^= EDGE_FALLTHRU | EDGE_TRUE_VALUE;
init_edge->probability = profile_probability::even ();
-
+
/* Set the initialization stmts. */
gimple_seq init_seq = NULL;
tree init_var = make_ssa_name (TREE_TYPE (var));
@@ -7095,7 +7095,7 @@ nvptx_goacc_reduction_init (gcall *call, offload_attrs *oa)
gsi_prev (&gsi);
edge inited_edge = split_block (gsi_bb (gsi), gsi_stmt (gsi));
basic_block dst_bb = inited_edge->dest;
-
+
/* Create false edge from call_bb to dst_bb. */
edge nop_edge = make_edge (call_bb, dst_bb, EDGE_FALSE_VALUE);
nop_edge->probability = profile_probability::even ();
@@ -7210,7 +7210,7 @@ nvptx_goacc_reduction_teardown (gcall *call, offload_attrs *oa)
tree var = gimple_call_arg (call, 2);
int level = TREE_INT_CST_LOW (gimple_call_arg (call, 3));
gimple_seq seq = NULL;
-
+
push_gimplify_context (true);
if (level == GOMP_DIM_WORKER
|| (level == GOMP_DIM_VECTOR && oa->vector_length > PTX_WARP_SIZE))
@@ -7237,7 +7237,7 @@ nvptx_goacc_reduction_teardown (gcall *call, offload_attrs *oa)
if (lhs)
gimplify_assign (lhs, var, &seq);
-
+
pop_gimplify_context (NULL);
gsi_replace_with_seq (&gsi, seq, true);
diff --git a/gcc/config/nvptx/nvptx.h b/gcc/config/nvptx/nvptx.h
index dc676dcb5fc..10a1c6bd286 100644
--- a/gcc/config/nvptx/nvptx.h
+++ b/gcc/config/nvptx/nvptx.h
@@ -182,7 +182,7 @@ struct nvptx_args {
#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT 256
-\f
+
/* We don't run reload, so this isn't actually used, but it still needs to be
defined. Showing an argp->fp elimination also stops
expand_builtin_setjmp_receiver from generating invalid insns. */
@@ -196,13 +196,13 @@ struct nvptx_args {
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = 0)
-\f
+
/* Addressing Modes. */
#define MAX_REGS_PER_ADDRESS 1
#define LEGITIMATE_PIC_OPERAND_P(X) 1
-\f
+
#if defined HOST_WIDE_INT
struct GTY(()) machine_function
@@ -237,13 +237,13 @@ struct GTY(()) machine_function
unsigned HOST_WIDE_INT simt_stack_align;
};
#endif
-\f
+
/* Costs. */
#define NO_FUNCTION_CSE 1
#define SLOW_BYTE_ACCESS 0
#define BRANCH_COST(speed_p, predictable_p) 6
-\f
+
/* Assembler Format. */
#undef ASM_DECLARE_FUNCTION_NAME
diff --git a/gcc/config/openbsd-stdint.h b/gcc/config/openbsd-stdint.h
index a6da1da191f..00ca36c37a8 100644
--- a/gcc/config/openbsd-stdint.h
+++ b/gcc/config/openbsd-stdint.h
@@ -1,5 +1,5 @@
#define SIG_ATOMIC_TYPE "int"
-
+
#define INT8_TYPE "signed char"
#define INT16_TYPE "short int"
#define INT32_TYPE "int"
@@ -8,7 +8,7 @@
#define UINT16_TYPE "short unsigned int"
#define UINT32_TYPE "unsigned int"
#define UINT64_TYPE "long long unsigned int"
-
+
#define INT_LEAST8_TYPE "signed char"
#define INT_LEAST16_TYPE "short int"
#define INT_LEAST32_TYPE "int"
@@ -17,7 +17,7 @@
#define UINT_LEAST16_TYPE "short unsigned int"
#define UINT_LEAST32_TYPE "unsigned int"
#define UINT_LEAST64_TYPE "long long unsigned int"
-
+
#define INT_FAST8_TYPE "int"
#define INT_FAST16_TYPE "int"
#define INT_FAST32_TYPE "int"
@@ -29,6 +29,6 @@
#define INTMAX_TYPE "long long int"
#define UINTMAX_TYPE "long long unsigned int"
-
+
#define INTPTR_TYPE "long int"
#define UINTPTR_TYPE "long unsigned int"
diff --git a/gcc/config/openbsd.h b/gcc/config/openbsd.h
index 645302684b1..cc379804be3 100644
--- a/gcc/config/openbsd.h
+++ b/gcc/config/openbsd.h
@@ -17,27 +17,27 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* Common OpenBSD configuration.
+/* Common OpenBSD configuration.
All OpenBSD architectures include this file, which is intended as
- a repository for common defines.
+ a repository for common defines.
Some defines are common to all architectures, a few of them are
triggered by OBSD_* guards, so that we won't override architecture
defaults by mistakes.
- OBSD_HAS_CORRECT_SPECS:
+ OBSD_HAS_CORRECT_SPECS:
another mechanism provides correct specs already.
- OBSD_NO_DYNAMIC_LIBRARIES:
+ OBSD_NO_DYNAMIC_LIBRARIES:
no implementation of dynamic libraries.
- OBSD_OLD_GAS:
+ OBSD_OLD_GAS:
older flavor of gas which needs help for PIC.
OBSD_HAS_DECLARE_FUNCTION_NAME, OBSD_HAS_DECLARE_FUNCTION_SIZE,
- OBSD_HAS_DECLARE_OBJECT:
+ OBSD_HAS_DECLARE_OBJECT:
PIC support, FUNCTION_NAME/FUNCTION_SIZE are independent, whereas
the corresponding logic for OBJECTS is necessarily coupled.
There are also a few `default' defines such as ASM_WEAKEN_LABEL,
- intended as common ground for arch that don't provide
+ intended as common ground for arch that don't provide
anything suitable. */
/* OPENBSD_NATIVE is defined only when gcc is configured as part of
@@ -69,7 +69,7 @@ along with GCC; see the file COPYING3. If not see
#endif
-\f
+
/* Controlling the compilation driver. */
/* TARGET_OS_CPP_BUILTINS() common to all OpenBSD targets. */
#define OPENBSD_OS_CPP_BUILTINS() \
@@ -104,7 +104,7 @@ while (0)
/* CPP_SPEC appropriate for OpenBSD. We deal with -posix and -pthread.
XXX the way threads are handled currently is not very satisfying,
- since all code must be compiled with -pthread to work.
+ since all code must be compiled with -pthread to work.
This two-stage defines makes it easy to pick that for targets that
have subspecs. */
#ifdef CPP_CPU_SPEC
@@ -122,8 +122,8 @@ while (0)
#define CPP_SPEC OBSD_CPP_SPEC
#ifdef OBSD_OLD_GAS
-/* ASM_SPEC appropriate for OpenBSD. For some architectures, OpenBSD
- still uses a special flavor of gas that needs to be told when generating
+/* ASM_SPEC appropriate for OpenBSD. For some architectures, OpenBSD
+ still uses a special flavor of gas that needs to be told when generating
pic code. */
#undef ASM_SPEC
#define ASM_SPEC "%{" FPIE1_OR_FPIC1_SPEC ":-k} %{" FPIE2_OR_FPIC2_SPEC ":-k -K}"
@@ -150,9 +150,9 @@ while (0)
#undef TARGET_LIBC_HAS_FUNCTION
#define TARGET_LIBC_HAS_FUNCTION default_libc_has_function
-\f
+
/* - we use . - _func instead of a local label,
- - we put extra spaces in expressions such as
+ - we put extra spaces in expressions such as
.type _func , @function
This is more readable for a human being and confuses c++filt less. */
@@ -161,11 +161,11 @@ while (0)
/* Define the strings used for the .type and .size directives.
These strings generally do not vary from one system running OpenBSD
to another, but if a given system needs to use different pseudo-op
- names for these, they may be overridden in the arch specific file. */
+ names for these, they may be overridden in the arch specific file. */
/* OpenBSD assembler is hacked to have .type & .size support even in a.out
- format object files. Functions size are supported but not activated
- yet (look for GRACE_PERIOD_EXPIRED in gas/config/obj-aout.c).
+ format object files. Functions size are supported but not activated
+ yet (look for GRACE_PERIOD_EXPIRED in gas/config/obj-aout.c).
SET_ASM_OP is needed for attribute alias to work. */
#undef TYPE_ASM_OP
@@ -191,12 +191,12 @@ while (0)
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
- entries under OpenBSD. These macros also have to output the starting
+ entries under OpenBSD. These macros also have to output the starting
labels for the relevant functions/objects. */
#ifndef OBSD_HAS_DECLARE_FUNCTION_NAME
/* Extra assembler code needed to declare a function properly.
- Some assemblers may also need to also have something extra said
+ Some assemblers may also need to also have something extra said
about the function's return value. We allow for that here. */
#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
@@ -238,7 +238,7 @@ while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
- size_directive_output was set by ASM_DECLARE_OBJECT_NAME
+ size_directive_output was set by ASM_DECLARE_OBJECT_NAME
when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
@@ -257,22 +257,22 @@ do { \
} while (0)
#endif
-\f
+
/* Those are `generic' ways to weaken/globalize a label. We shouldn't need
to override a processor specific definition. Hence, #ifndef ASM_*
- In case overriding turns out to be needed, one can always #undef ASM_*
+ In case overriding turns out to be needed, one can always #undef ASM_*
before including this file. */
/* Tell the assembler that a symbol is weak. */
-/* Note: netbsd arm32 assembler needs a .globl here. An override may
+/* Note: netbsd arm32 assembler needs a .globl here. An override may
be needed when/if we go for arm32 support. */
#ifndef ASM_WEAKEN_LABEL
#define ASM_WEAKEN_LABEL(FILE,NAME) \
do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
fputc ('\n', FILE); } while (0)
#endif
-\f
+
/* Storage layout. */
-\f
+
#define HAVE_ENABLE_EXECUTE_STACK
diff --git a/gcc/config/pa/pa-64.h b/gcc/config/pa/pa-64.h
index 5157b7f3053..d0828474368 100644
--- a/gcc/config/pa/pa-64.h
+++ b/gcc/config/pa/pa-64.h
@@ -35,7 +35,7 @@ along with GCC; see the file COPYING3. If not see
size_t 8 bytes
ptrdiff_t 8 bytes
wchar 4 bytes
-
+
Make GCC agree with types.h. */
#undef SIZE_TYPE
#define SIZE_TYPE "long unsigned int"
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 9f43802075f..ba6b32d5793 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -57,7 +57,7 @@ along with GCC; see the file COPYING3. If not see
/* This file should be included last. */
#include "target-def.h"
-/* Return nonzero if there is a bypass for the output of
+/* Return nonzero if there is a bypass for the output of
OUT_INSN and the fp store IN_INSN. */
int
pa_fpstore_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
@@ -82,7 +82,7 @@ pa_fpstore_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
return (GET_MODE_SIZE (store_mode) == GET_MODE_SIZE (other_mode));
}
-
+
#ifndef DO_FRAME_NOTES
#ifdef INCOMING_RETURN_ADDR_RTX
@@ -240,7 +240,7 @@ struct GTY(()) deferred_plabel
static GTY((length ("n_deferred_plabels"))) struct deferred_plabel *
deferred_plabels;
static size_t n_deferred_plabels = 0;
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_OPTION_OVERRIDE
@@ -426,7 +426,7 @@ static size_t n_deferred_plabels = 0;
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Parse the -mfixed-range= option string. */
static void
@@ -742,7 +742,7 @@ pa_cint_ok_for_move (unsigned HOST_WIDE_INT ival)
|| pa_ldil_cint_p (ival)
|| pa_zdepi_cint_p (ival));
}
-\f
+
/* True iff ldil can be used to load this CONST_INT. The least
significant 11 bits of the value must be zero and the value must
not change sign when extended from 32 to 64 bits. */
@@ -791,7 +791,7 @@ pa_ior_mask_p (unsigned HOST_WIDE_INT mask)
mask += mask & -mask;
return (mask & (mask - 1)) == 0;
}
-\f
+
/* Legitimize PIC addresses. If the address is already
position-independent, we return ORIG. Newly generated
position-independent addresses go to REG. If we need more
@@ -905,7 +905,7 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg)
gcc_assert (reg);
gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
-
+
base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
base == reg ? 0 : reg);
@@ -955,7 +955,7 @@ legitimize_tls_address (rtx addr)
if (GET_CODE (addr) != SYMBOL_REF)
return addr;
- switch (SYMBOL_REF_TLS_MODEL (addr))
+ switch (SYMBOL_REF_TLS_MODEL (addr))
{
case TLS_MODEL_GLOBAL_DYNAMIC:
tmp = gen_reg_rtx (Pmode);
@@ -978,7 +978,7 @@ legitimize_tls_address (rtx addr)
insn = get_insns ();
end_sequence ();
t2 = gen_reg_rtx (Pmode);
- emit_libcall_block (insn, t2, t1,
+ emit_libcall_block (insn, t2, t1,
gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
UNSPEC_TLSLDBASE));
emit_insn (gen_tld_offset_load (ret, addr, t2));
@@ -2074,7 +2074,7 @@ pa_emit_move_sequence (rtx *operands, machine_mode mode, rtx scratch_reg)
&& !HARD_REGISTER_P (operand0))
copy_reg_pointer (operand0, operand1);
}
-
+
/* When MEMs are broken out, the REG_POINTER flag doesn't
get set. In some cases, we can set the REG_POINTER flag
from the declaration for the MEM. */
@@ -2517,7 +2517,7 @@ pa_reloc_needed (tree exp)
return reloc;
}
-\f
+
/* Return the best assembler insn template
for moving operands[1] into operands[0] as a fullword. */
const char *
@@ -2557,7 +2557,7 @@ pa_singlemove_string (rtx *operands)
}
return "copy %1,%0";
}
-\f
+
/* Compute position (in OP[1]) and width (in OP[2])
useful for copying IMM to a register using the zdepi
@@ -2717,7 +2717,7 @@ pa_output_move_double (rtx *operands)
&& GET_CODE (operands[0]) == REG);
gcc_assert (!reg_overlap_mentioned_p (high_reg, addr));
-
+
/* No overlap between high target register and address
register. (We do this in a non-obvious way to
save a register file writeback) */
@@ -2732,7 +2732,7 @@ pa_output_move_double (rtx *operands)
operands[0] = XEXP (addr, 0);
gcc_assert (GET_CODE (operands[1]) == REG
&& GET_CODE (operands[0]) == REG);
-
+
gcc_assert (!reg_overlap_mentioned_p (high_reg, addr));
/* No overlap between high target register and address
register. (We do this in a non-obvious way to save a
@@ -2934,7 +2934,7 @@ pa_output_move_double (rtx *operands)
return "";
}
-\f
+
const char *
pa_output_fp_move_double (rtx *operands)
{
@@ -2953,22 +2953,22 @@ pa_output_fp_move_double (rtx *operands)
else
{
rtx xoperands[2];
-
+
gcc_assert (operands[1] == CONST0_RTX (GET_MODE (operands[0])));
-
+
/* This is a pain. You have to be prepared to deal with an
arbitrary address here including pre/post increment/decrement.
so avoid this in the MD. */
gcc_assert (GET_CODE (operands[0]) == REG);
-
+
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xoperands[0] = operands[0];
output_asm_insn ("copy %%r0,%0\n\tcopy %%r0,%1", xoperands);
}
return "";
}
-\f
+
/* Return a REG that occurs in ADDR with coefficient 1.
ADDR can be effectively incremented by incrementing REG. */
@@ -3300,7 +3300,7 @@ compute_clrmem_length (rtx_insn *insn)
/* Lengths are expressed in bytes now; each insn is 4 bytes. */
return n_insns * 4;
}
-\f
+
const char *
pa_output_and (rtx *operands)
@@ -3456,7 +3456,7 @@ pa_output_64bit_ior (rtx *operands)
operands[3] = GEN_INT (len);
return "depdi -1,%2,%3,%0";
}
-\f
+
/* Target hook for assembling integer objects. This code handles
aligned SI and DI integers specially since function references
must be preceded by P%. */
@@ -3504,7 +3504,7 @@ pa_assemble_integer (rtx x, unsigned int size, int aligned_p)
return result;
}
-\f
+
/* Output an ascii string. */
void
pa_output_ascii (FILE *file, const char *p, int size)
@@ -3706,7 +3706,7 @@ remove_useless_addtr_insns (int check_notes)
pass = !pass;
}
-\f
+
/* You may have trouble believing this, but this is the 32 bit HP-PA
stack layout. Wow.
@@ -3930,7 +3930,7 @@ pa_compute_frame_size (poly_int64 size, int *fregs_live)
first slot is only used when the frame pointer is needed. */
if (size || frame_pointer_needed)
size += pa_starting_frame_offset ();
-
+
/* If the current function calls __builtin_eh_return, then we need
to allocate stack space for registers that will hold data for
the exception handler. */
@@ -4269,7 +4269,7 @@ pa_expand_prologue (void)
to do for functions which make no calls and allocate no
frame? Do we need to allocate a frame, or can we just omit
the save? For now we'll just omit the save.
-
+
We don't want a note on this insn as the frame marker can
move if there is a dynamic stack allocation. */
if (flag_pic && actual_fsize != 0 && !TARGET_64BIT)
@@ -5080,7 +5080,7 @@ pa_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
/* A fpload can't be issued until one cycle before a
preceding arithmetic operation has finished if
the target of the fpload is the destination of the
- arithmetic operation.
+ arithmetic operation.
Exception: For PA7100LC, PA7200 and PA7300, the cost
is 3 cycles, unless they bundle together. We also
@@ -5714,7 +5714,7 @@ pa_output_global_address (FILE *file, rtx x, int round_constant)
default:
gcc_unreachable ();
}
-
+
if (!read_only_operand (base, VOIDmode) && !flag_pic)
fputs ("-$global$", file);
if (offset)
@@ -5774,7 +5774,7 @@ pa_file_start_mcount (const char *aswhat)
if (profile_flag)
fprintf (asm_out_file, "\t.IMPORT _mcount,%s\n", aswhat);
}
-
+
static void
pa_elf_file_start (void)
{
@@ -6163,7 +6163,7 @@ pa_output_arg_descriptor (rtx_insn *call_insn)
}
fputc ('\n', asm_out_file);
}
-\f
+
/* Inform reload about cases where moving X with a mode MODE to or from
a register in RCLASS requires an extra scratch or immediate register.
Return the class needed for the immediate register. */
@@ -6417,7 +6417,7 @@ pa_function_arg_padding (machine_mode mode, const_tree type)
return PAD_NONE;
}
-\f
+
/* Do what is necessary for `va_start'. We look at the current function
to determine if stdargs or varargs is used and fill in an initial
va_list. A pointer to this constructor is returned. */
@@ -6958,7 +6958,7 @@ const char *
pa_output_lbranch (rtx dest, rtx_insn *insn, int xdelay)
{
rtx xoperands[4];
-
+
xoperands[0] = dest;
/* First, free up the delay slot. */
@@ -7479,7 +7479,7 @@ pa_output_dbra (rtx *operands, rtx_insn *insn, int which_alternative)
}
else
return "addib,%C2 %1,%0,%3";
-
+
case 8:
/* Handle weird backwards branch with a fulled delay slot
which is nullified. */
@@ -7529,7 +7529,7 @@ pa_output_dbra (rtx *operands, rtx_insn *insn, int which_alternative)
return pa_output_lbranch (operands[3], insn, xdelay);
}
-
+
}
/* Deal with gross reload from FP register case. */
else if (which_alternative == 1)
@@ -8325,7 +8325,7 @@ pa_output_indirect_call (rtx_insn *insn, rtx call_dest)
pa_output_arg_descriptor (insn);
if (TARGET_PA_20)
return "bve,l,n (%%r22),%%r2\n\tnop";
- return "ble 0(%%sr4,%%r22)\n\tcopy %%r31,%%r2";
+ return "ble 0(%%sr4,%%r22)\n\tcopy %%r31,%%r2";
}
if (TARGET_PORTABLE_RUNTIME)
@@ -8337,7 +8337,7 @@ pa_output_indirect_call (rtx_insn *insn, rtx call_dest)
}
/* Now the normal case -- we can reach $$dyncall directly or
- we're sure that we can get there via a long-branch stub.
+ we're sure that we can get there via a long-branch stub.
No need to check target flags as the length uniquely identifies
the remaining cases. */
@@ -9051,7 +9051,7 @@ pa_asm_out_destructor (rtx symbol, int priority)
The ASM_OUTPUT_ALIGNED_BSS macro needs to be defined to call this
function on the SOM port to prevent uninitialized global data from
being placed in the data section. */
-
+
void
pa_asm_output_aligned_bss (FILE *stream,
const char *name,
@@ -9217,7 +9217,7 @@ forward_branch_p (rtx_insn *insn)
gcc_assert (lab != NULL_RTX);
if (INSN_ADDRESSES_SET_P ())
- return INSN_ADDRESSES (INSN_UID (lab)) > INSN_ADDRESSES (INSN_UID (insn));
+ return INSN_ADDRESSES (INSN_UID (lab)) > INSN_ADDRESSES (INSN_UID (insn));
while (insn)
{
@@ -9652,8 +9652,8 @@ pa_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
to match the HP Compiler ABI. */
static rtx
-pa_function_value (const_tree valtype,
- const_tree func ATTRIBUTE_UNUSED,
+pa_function_value (const_tree valtype,
+ const_tree func ATTRIBUTE_UNUSED,
bool outgoing ATTRIBUTE_UNUSED)
{
machine_mode valmode;
@@ -10173,7 +10173,7 @@ pa_select_section (tree exp, int reloc,
and the function is in a COMDAT group, place the plabel reference in the
.data.rel.ro.local section. The linker ignores references to symbols in
discarded sections from this section. */
-
+
static section *
pa_elf_select_rtx_section (machine_mode mode, rtx x,
unsigned HOST_WIDE_INT align)
@@ -10324,7 +10324,7 @@ pa_can_change_mode_class (machine_mode from, machine_mode to,
if (COMPLEX_MODE_P (from) || VECTOR_MODE_P (from)
|| COMPLEX_MODE_P (to) || VECTOR_MODE_P (to))
return false;
-
+
/* There is no way to load QImode or HImode values directly from memory
to a FP register. SImode loads to the FP registers are not zero
extended. On the 64-bit target, this conflicts with the definition
@@ -10345,7 +10345,7 @@ pa_can_change_mode_class (machine_mode from, machine_mode to,
}
/* Implement TARGET_MODES_TIEABLE_P.
-
+
We should return FALSE for QImode and HImode because these modes
are not ok in the floating-point registers. However, this prevents
tieing these modes to SImode and DImode in the general registers.
@@ -10363,7 +10363,7 @@ pa_modes_tieable_p (machine_mode mode1, machine_mode mode2)
return true;
}
-\f
+
/* Length in units of the trampoline instruction code. */
#define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 36 : 48))
@@ -10571,7 +10571,7 @@ pa_delegitimize_address (rtx orig_x)
return gen_const_mem (Pmode, XVECEXP (XEXP (x, 1), 0, 0));
return x;
}
-\f
+
static rtx
pa_internal_arg_pointer (void)
{
@@ -10749,7 +10749,7 @@ pa_section_type_flags (tree decl, const char *name, int reloc)
must provide patterns for doing indexed integer stores, or the move
expanders must force the address of an indexed store to a register.
We have adopted the latter approach.
-
+
Another function of pa_legitimate_address_p is to ensure that
the base register is a valid pointer for indexed instructions.
On targets that have non-equivalent space registers, we have to
@@ -11076,7 +11076,7 @@ pa_function_arg_size (machine_mode mode, const_tree type)
{
HOST_WIDE_INT size;
- size = mode != BLKmode ? GET_MODE_SIZE (mode) : int_size_in_bytes (type);
+ size = mode != BLKmode ? GET_MODE_SIZE (mode) : int_size_in_bytes (type);
return CEIL (size, UNITS_PER_WORD);
}
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index bafdf602138..95bf426211e 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -207,7 +207,7 @@ do { \
#define PTRDIFF_TYPE "int"
#define WCHAR_TYPE "unsigned int"
#define WCHAR_TYPE_SIZE 32
-\f
+
/* target machine storage layout */
typedef struct GTY(()) machine_function
{
@@ -217,7 +217,7 @@ typedef struct GTY(()) machine_function
} machine_function;
/* Define this macro if it is advisable to hold scalars in registers
- in a wider mode than that declared by the program. In such cases,
+ in a wider mode than that declared by the program. In such cases,
the value is constrained to be within the bounds of the declared
type, but kept valid in the wider mode. The signedness of the
extension may differ from that of the type. */
@@ -251,7 +251,7 @@ typedef struct GTY(()) machine_function
This needs to be 8 when TARGET_64BIT is true to allow building various
TImode routines in libgcc. However, we also need the DImode DIVMOD
routines because they are not currently implemented in pa.md.
-
+
The HP runtime specification doesn't provide the alignment requirements
and calling conventions for TImode variables. */
#ifdef IN_LIBGCC2
@@ -465,7 +465,7 @@ extern rtx hppa_pic_save_rtx (void);
goto DONE; \
} \
} while (0)
-\f
+
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS GENERAL_REGS
@@ -480,7 +480,7 @@ extern rtx hppa_pic_save_rtx (void);
#define MAYBE_FP_REG_CLASS_P(CLASS) \
reg_classes_intersect_p ((CLASS), FP_REGS)
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -544,7 +544,7 @@ extern rtx hppa_pic_save_rtx (void);
? (STACK_POINTER_OFFSET) \
: ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -555,13 +555,13 @@ extern rtx hppa_pic_save_rtx (void);
of arguments scanned so far (including the invisible argument,
if any, which holds the structure-value-address). Thus, 4 or
more means all following args should go on the stack.
-
+
The INCOMING field tracks whether this is an "incoming" or
"outgoing" argument.
-
+
The INDIRECT field indicates whether this is an indirect
call or not.
-
+
The NARGS_PROTOTYPE field indicates that an argument does not
have a prototype when it less than or equal to 0. */
@@ -652,7 +652,7 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; };
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
targetm.calls.function_arg_padding ((MODE), (TYPE))
-\f
+
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
as assembly via FUNCTION_PROFILER. Just output a local label.
We can't use the function label because the GAS SOM target can't
@@ -702,8 +702,8 @@ extern int may_call_alloca;
#define MIN_CACHELINE_SIZE 32
-\f
-/* Addressing modes, and classification of registers for them.
+
+/* Addressing modes, and classification of registers for them.
Using autoincrement addressing modes on PA8000 class machines is
not profitable. */
@@ -751,7 +751,7 @@ extern int may_call_alloca;
/* 1 if X is an fp register. */
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
@@ -921,7 +921,7 @@ do { \
} \
} while (0)
-\f
+
#define TARGET_ASM_SELECT_SECTION pa_select_section
/* Return a nonzero value if DECL has a section attribute. */
@@ -973,7 +973,7 @@ do { \
/* Higher than the default as we prefer to use simple move insns
(better scheduling and delay slot filling) and because our
- built-in block move is really a 2X unrolled loop.
+ built-in block move is really a 2X unrolled loop.
Believe it or not, this has to be big enough to allow for copying all
arguments passed in registers to avoid infinite recursion during argument
@@ -1053,7 +1053,7 @@ do { \
in particular. */
#define INSN_REFERENCES_ARE_DELAYED(X) (pa_insn_refs_are_delayed (X))
-\f
+
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
@@ -1166,7 +1166,7 @@ do { \
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
fprintf (FILE, "\t.word L$%d\n", VALUE)
-/* This is how to output an element of a case-vector that is relative.
+/* This is how to output an element of a case-vector that is relative.
Since we always place jump tables in the text section, the difference
is absolute and requires no relocation. */
@@ -1200,7 +1200,7 @@ do { \
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
-
+
/* This says how to output an assembler line to define a global common symbol
with size SIZE (in bytes) and alignment ALIGN (in bits). */
@@ -1214,7 +1214,7 @@ do { \
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
-
+
/* All HP assemblers use "!" to separate logical lines. */
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
@@ -1234,7 +1234,7 @@ do { \
#define PRINT_OPERAND(FILE, X, CODE) pa_print_operand (FILE, X, CODE)
-\f
+
/* Print a memory address as an operand to reference that memory location. */
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
@@ -1268,7 +1268,7 @@ do { \
output_addr_const (FILE, addr); \
}}
-\f
+
/* Find the return address associated with the frame given by
FRAMEADDR. */
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
@@ -1295,7 +1295,7 @@ do { \
instructions for non-PIC and PIC, respectively. Import stubs are
seven and five instructions for HP-UX and ELF targets, respectively.
The default stub group size for ELF targets is 217856 bytes.
- FIXME: We need an option to set the maximum offset. */
+ FIXME: We need an option to set the maximum offset. */
#define MAX_PCREL17F_OFFSET (TARGET_HPUX ? 198164 : 217856)
#define NEED_INDICATE_EXEC_STACK 0
diff --git a/gcc/config/pa/pa32-regs.h b/gcc/config/pa/pa32-regs.h
index 1d511aaffcd..cf58ed469f3 100644
--- a/gcc/config/pa/pa32-regs.h
+++ b/gcc/config/pa/pa32-regs.h
@@ -318,7 +318,7 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
/* 1 if N is a possible register number for function argument passing. */
#define FUNCTION_ARG_REGNO_P(N) \
- (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
+ (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
/* How to refer to registers in assembler output.
This sequence is indexed by compiler's hard-register-number (see above). */
diff --git a/gcc/config/pa/som.h b/gcc/config/pa/som.h
index 3efae0e1fa0..2e1a540c6fd 100644
--- a/gcc/config/pa/som.h
+++ b/gcc/config/pa/som.h
@@ -25,7 +25,7 @@ along with GCC; see the file COPYING3. If not see
linked executables and shared libraries. */
#define LDD_SUFFIX "chatr"
/* Look for lines like "dynamic /usr/lib/X11R5/libX11.sl"
- or "static /usr/lib/X11R5/libX11.sl".
+ or "static /usr/lib/X11R5/libX11.sl".
HPUX 10.20 also has lines like "static branch prediction ..."
so we filter that out explicitly.
@@ -82,7 +82,7 @@ do { \
#define SFMODE_RETURN_STRING ",RTNVAL=FU"
#endif
-\f
+
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
do { tree tree_type = TREE_TYPE (DECL); \
tree fntype = TREE_TYPE (tree_type); \
@@ -357,7 +357,7 @@ do { \
#define GTHREAD_USE_WEAK 0
/* Shared library suffix. Collect2 strips the version string after
- this suffix when generating constructor/destructor names. */
+ this suffix when generating constructor/destructor names. */
#define SHLIB_SUFFIX ".sl"
/* We don't have named sections. */
diff --git a/gcc/config/pdp11/pdp11.cc b/gcc/config/pdp11/pdp11.cc
index 380223439a4..5cd108c55e2 100644
--- a/gcc/config/pdp11/pdp11.cc
+++ b/gcc/config/pdp11/pdp11.cc
@@ -50,7 +50,7 @@ along with GCC; see the file COPYING3. If not see
/* This file should be included last. */
#include "target-def.h"
-/* this is the current value returned by the macro FIRST_PARM_OFFSET
+/* this is the current value returned by the macro FIRST_PARM_OFFSET
defined in tm.h */
int current_first_parm_offset;
@@ -168,7 +168,7 @@ static void pdp11_conditional_register_usage (void);
static bool pdp11_legitimate_constant_p (machine_mode, rtx);
static bool pdp11_scalar_mode_supported_p (scalar_mode);
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_BYTE_OP
#define TARGET_ASM_BYTE_OP NULL
@@ -219,7 +219,7 @@ static bool pdp11_scalar_mode_supported_p (scalar_mode);
#undef TARGET_SECONDARY_RELOAD
#define TARGET_SECONDARY_RELOAD pdp11_secondary_reload
-#undef TARGET_REGISTER_MOVE_COST
+#undef TARGET_REGISTER_MOVE_COST
#define TARGET_REGISTER_MOVE_COST pdp11_register_move_cost
#undef TARGET_PREFERRED_RELOAD_CLASS
@@ -305,7 +305,7 @@ static bool pdp11_scalar_mode_supported_p (scalar_mode);
#undef TARGET_STACK_PROTECT_RUNTIME_ENABLED_P
#define TARGET_STACK_PROTECT_RUNTIME_ENABLED_P hook_bool_void_false
-\f
+
/* A helper function to determine if REGNO should be saved in the
current function's stack frame. */
@@ -326,7 +326,7 @@ pdp11_saved_regno (unsigned regno)
alloca storage if any. */
void
pdp11_expand_prologue (void)
-{
+{
HOST_WIDE_INT fsize = get_frame_size ();
unsigned regno;
rtx x, via_ac = NULL;
@@ -338,7 +338,7 @@ pdp11_expand_prologue (void)
emit_insn (gen_setd ());
emit_insn (gen_seti ());
}
-
+
/* Save CPU registers. */
for (regno = R0_REGNUM; regno <= PC_REGNUM; regno++)
if (pdp11_saved_regno (regno))
@@ -349,7 +349,7 @@ pdp11_expand_prologue (void)
}
/* Save FPU registers. */
- for (regno = AC0_REGNUM; regno <= AC3_REGNUM; regno++)
+ for (regno = AC0_REGNUM; regno <= AC3_REGNUM; regno++)
if (pdp11_saved_regno (regno))
{
x = gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx);
@@ -387,7 +387,7 @@ pdp11_expand_prologue (void)
void
pdp11_expand_epilogue (void)
-{
+{
HOST_WIDE_INT fsize = get_frame_size ();
unsigned regno;
rtx x, reg, via_ac = NULL;
@@ -457,7 +457,7 @@ singlemove_string (rtx *operands)
return "clr\t%0";
}
-\f
+
/* Expand multi-word operands (SImode or DImode) into the 2 or 4
corresponding HImode operands. The number of operands is given as
the third argument, the word count for the mode as the fourth
@@ -475,13 +475,13 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
bool sameoff = false;
enum { REGOP, OFFSOP, MEMOP, PUSHOP, POPOP, CNSTOP, RNDOP } optype;
long sval[2];
-
+
/* If either piece order is accepted and one is pre-decrement
while the other is post-increment, set order to be high order
word first. That will force the pre-decrement to be turned
into a pointer adjust, then offset addressing.
Otherwise, if either operand uses pre-decrement, that means
- the order is low order first.
+ the order is low order first.
Otherwise, if both operands are registers and destination is
higher than source and they overlap, do low order word (highest
register number) first. */
@@ -511,7 +511,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
the push increases the offset to each source word.
In theory there are other cases like this, for example dest == pop,
but those don't occur in real life so ignore those. */
- if (GET_CODE (operands[0]) == MEM
+ if (GET_CODE (operands[0]) == MEM
&& GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
&& REGNO (XEXP (XEXP (operands[0], 0), 0)) == STACK_POINTER_REGNUM
&& reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
@@ -528,7 +528,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
else
gcc_assert (useorder == either || useorder == order);
-
+
for (op = 0; op < opcount; op++)
{
/* First classify the operand. */
@@ -552,10 +552,10 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
supposed to allow to happen. Return failure for such cases. */
if (optype == RNDOP)
return false;
-
+
if (action != NULL)
action[op] = no_action;
-
+
/* If the operand uses pre-decrement addressing but we
want to get the parts high order first,
decrement the former register explicitly
@@ -568,7 +568,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
XEXP (XEXP (operands[op], 0), 0));
optype = OFFSOP;
}
- /* If the operand uses post-increment mode but we want
+ /* If the operand uses post-increment mode but we want
to get the parts low order first, change the operand
into ordinary indexing and remember to increment
the register explicitly when we're done. */
@@ -587,7 +587,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
REAL_VALUE_TO_TARGET_DOUBLE
(*CONST_DOUBLE_REAL_VALUE (operands[op]), sval);
}
-
+
for (i = 0; i < words; i++)
{
if (order == big)
@@ -632,18 +632,18 @@ output_move_multiple (rtx *operands)
rtx inops[2];
rtx exops[4][2];
rtx adjops[2];
-
+
pdp11_action action[2];
int i, words;
-
+
words = GET_MODE_BITSIZE (GET_MODE (operands[0])) / 16;
adjops[1] = gen_rtx_CONST_INT (HImode, words * 2);
inops[0] = operands[0];
inops[1] = operands[1];
-
+
pdp11_expand_operands (inops, exops, 2, words, action, either);
-
+
/* Check for explicit decrement before. */
if (action[0] == dec_before)
{
@@ -674,7 +674,7 @@ output_move_multiple (rtx *operands)
return "";
}
-\f
+
/* Build an internal label. */
void
pdp11_gen_int_label (char *label, const char *prefix, int num)
@@ -685,7 +685,7 @@ pdp11_gen_int_label (char *label, const char *prefix, int num)
else
sprintf (label, "*%s_%u", prefix, num);
}
-
+
/* Output an ascii string. */
void
output_ascii (FILE *file, const char *p, int size)
@@ -693,7 +693,7 @@ output_ascii (FILE *file, const char *p, int size)
int i, c;
const char *pseudo = "\t.ascii\t";
bool delim = false;
-
+
if (TARGET_DEC_ASM)
{
if (p[size - 1] == '\0')
@@ -768,7 +768,7 @@ pdp11_asm_output_var (FILE *file, const char *name, int size,
assemble_name (file, name);
fputs (":", file);
ASM_OUTPUT_SKIP (file, size);
- }
+ }
}
/* Special format operators handled here:
@@ -781,7 +781,7 @@ static void
pdp11_asm_print_operand (FILE *file, rtx x, int code)
{
long sval[2];
-
+
if (code == '#')
{
if (TARGET_DEC_ASM)
@@ -954,7 +954,7 @@ pdp11_lra_p (void)
/* Register to register moves are cheap if both are general
registers. */
-static int
+static int
pdp11_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t c1, reg_class_t c2)
{
@@ -978,7 +978,7 @@ pdp11_rtx_costs (rtx x, machine_mode mode, int outer_code,
const int asize = (mode == QImode) ? 2 : GET_MODE_SIZE (mode);
rtx src, dest;
const char *fmt;
-
+
switch (code)
{
case CONST_INT:
@@ -1025,7 +1025,7 @@ pdp11_rtx_costs (rtx x, machine_mode mode, int outer_code,
if (GET_RTX_LENGTH (code) > 1)
src = XEXP (x, 1);
dest = XEXP (x, 0);
-
+
/* If optimizing for size, claim everything costs 2 per word, plus
whatever the operands require. */
if (!speed)
@@ -1069,7 +1069,7 @@ pdp11_rtx_costs (rtx x, machine_mode mode, int outer_code,
case DIV:
*total = 10 * asize * asize;
break;
-
+
case MOD:
/* Fake value because it's accounted for under DIV, since we
use a divmod pattern. */
@@ -1084,14 +1084,14 @@ pdp11_rtx_costs (rtx x, machine_mode mode, int outer_code,
case of a one bit shift. */
*total = asize;
break;
-
+
default:
*total = asize;
break;
}
}
}
-
+
/* Now see if we're looking at a SET. If yes, then look at the
source to see if this is a move or an arithmetic operation, and
continue accordingly to handle the operands. */
@@ -1141,7 +1141,7 @@ pdp11_addr_cost (rtx addr, machine_mode mode, addr_space_t as ATTRIBUTE_UNUSED,
bool speed)
{
int cost = 0;
-
+
if (GET_CODE (addr) != REG)
{
if (!simple_memory_operand (addr, mode))
@@ -1183,7 +1183,7 @@ pdp11_insn_cost (rtx_insn *insn, bool speed)
the actual operation plus a clobber, or the implicit compare plus
the actual operation. Find the actual operation. */
pat = PATTERN (insn);
-
+
if (GET_CODE (pat) == PARALLEL)
{
set = XVECEXP (pat, 0, 0);
@@ -1198,7 +1198,7 @@ pdp11_insn_cost (rtx_insn *insn, bool speed)
if (GET_CODE (set) != SET)
return 0;
}
-
+
/* Pick up the SET source and destination RTL. */
dest = XEXP (set, 0);
src = XEXP (set, 1);
@@ -1241,7 +1241,7 @@ pdp11_insn_cost (rtx_insn *insn, bool speed)
src2 = XEXP (src, 1);
base_cost += pdp11_addr_cost (src2, mode, ADDR_SPACE_GENERIC, speed);
}
-
+
return base_cost;
}
@@ -1353,7 +1353,7 @@ simple_memory_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED)
/* Decode the address now. */
indirection:
-
+
addr = XEXP (op, 0);
switch (GET_CODE (addr))
@@ -1361,27 +1361,27 @@ simple_memory_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED)
case REG:
/* (R0) - no extra cost */
return 1;
-
+
case PRE_DEC:
case POST_INC:
case PRE_MODIFY:
case POST_MODIFY:
/* -(R0), (R0)+ - cheap! */
return 1;
-
+
case MEM:
- /* cheap - is encoded in addressing mode info!
+ /* cheap - is encoded in addressing mode info!
-- except for @(R0), which has to be @0(R0) !!! */
if (GET_CODE (XEXP (addr, 0)) == REG)
return 0;
-
+
op=addr;
goto indirection;
-
+
case CONST_INT:
- case LABEL_REF:
+ case LABEL_REF:
case CONST:
case SYMBOL_REF:
/* @#address - extra cost */
@@ -1394,7 +1394,7 @@ simple_memory_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED)
default:
break;
}
-
+
return FALSE;
}
@@ -1411,7 +1411,7 @@ no_side_effect_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED)
/* Decode the address now. */
indirection:
-
+
addr = XEXP (op, 0);
switch (GET_CODE (addr))
@@ -1419,26 +1419,26 @@ no_side_effect_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED)
case REG:
/* (R0) - no extra cost */
return 1;
-
+
case PRE_DEC:
case POST_INC:
case PRE_MODIFY:
case POST_MODIFY:
return 0;
-
+
case MEM:
- /* cheap - is encoded in addressing mode info!
+ /* cheap - is encoded in addressing mode info!
-- except for @(R0), which has to be @0(R0) !!! */
if (GET_CODE (XEXP (addr, 0)) == REG)
return 0;
-
+
op=addr;
goto indirection;
-
+
case CONST_INT:
- case LABEL_REF:
+ case LABEL_REF:
case CONST:
case SYMBOL_REF:
/* @#address - extra cost */
@@ -1451,7 +1451,7 @@ no_side_effect_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED)
default:
break;
}
-
+
return FALSE;
}
@@ -1513,7 +1513,7 @@ pdp11_can_change_mode_class (machine_mode from,
So we disallow all mode changes involving FPRs. */
if (FLOAT_MODE_P (from) != FLOAT_MODE_P (to))
return false;
-
+
return !reg_classes_intersect_p (FPU_REGS, rclass);
}
@@ -1529,7 +1529,7 @@ pdp11_guard_type (void)
Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.
In general this is just CLASS; but on some machines
- in some cases it is preferable to use a more restrictive class.
+ in some cases it is preferable to use a more restrictive class.
loading is easier into LOAD_FPU_REGS than FPU_REGS! */
@@ -1553,7 +1553,7 @@ pdp11_preferred_reload_class (rtx x, reg_class_t rclass)
Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.
In general this is just CLASS; but on some machines
- in some cases it is preferable to use a more restrictive class.
+ in some cases it is preferable to use a more restrictive class.
loading is easier into LOAD_FPU_REGS than FPU_REGS! */
@@ -1575,10 +1575,10 @@ pdp11_preferred_output_reload_class (rtx x, reg_class_t rclass)
/* TARGET_SECONDARY_RELOAD.
- FPU registers AC4 and AC5 (class NO_LOAD_FPU_REGS) require an
+ FPU registers AC4 and AC5 (class NO_LOAD_FPU_REGS) require an
intermediate register (AC0-AC3: LOAD_FPU_REGS). Everything else
can be loaded/stored directly. */
-static reg_class_t
+static reg_class_t
pdp11_secondary_reload (bool in_p ATTRIBUTE_UNUSED,
rtx x,
reg_class_t reload_class,
@@ -1588,7 +1588,7 @@ pdp11_secondary_reload (bool in_p ATTRIBUTE_UNUSED,
if (reload_class != NO_LOAD_FPU_REGS || GET_CODE (x) != REG ||
REGNO_REG_CLASS (REGNO (x)) == LOAD_FPU_REGS)
return NO_REGS;
-
+
return LOAD_FPU_REGS;
}
@@ -1599,11 +1599,11 @@ pdp11_secondary_reload (bool in_p ATTRIBUTE_UNUSED,
static bool
pdp11_secondary_memory_needed (machine_mode, reg_class_t c1, reg_class_t c2)
{
- int fromfloat = (c1 == LOAD_FPU_REGS || c1 == NO_LOAD_FPU_REGS ||
+ int fromfloat = (c1 == LOAD_FPU_REGS || c1 == NO_LOAD_FPU_REGS ||
c1 == FPU_REGS);
- int tofloat = (c2 == LOAD_FPU_REGS || c2 == NO_LOAD_FPU_REGS ||
+ int tofloat = (c2 == LOAD_FPU_REGS || c2 == NO_LOAD_FPU_REGS ||
c2 == FPU_REGS);
-
+
return (fromfloat != tofloat);
}
@@ -1623,13 +1623,13 @@ pdp11_legitimate_address_p (machine_mode mode,
/* accept @#address */
if (CONSTANT_ADDRESS_P (operand))
return true;
-
+
switch (GET_CODE (operand))
{
case REG:
/* accept (R0) */
return !strict || REGNO_OK_FOR_BASE_P (REGNO (operand));
-
+
case PLUS:
/* accept X(R0) */
return GET_CODE (XEXP (operand, 0)) == REG
@@ -1671,11 +1671,11 @@ pdp11_legitimate_address_p (machine_mode mode,
xfoob = XEXP (operand, 0);
/* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently
- also forbidden for float, because we have to handle this
+ also forbidden for float, because we have to handle this
in output_move_double and/or output_move_quad() - we could
- do it, but currently it's not worth it!!!
- now that DFmode cannot go into CPU register file,
- maybe I should allow float ...
+ do it, but currently it's not worth it!!!
+ now that DFmode cannot go into CPU register file,
+ maybe I should allow float ...
but then I have to handle memory-to-memory moves in movdf ?? */
if (GET_MODE_BITSIZE(mode) > 16)
return false;
@@ -1721,7 +1721,7 @@ pdp11_legitimate_address_p (machine_mode mode,
reg number REGNO. */
enum reg_class
pdp11_regno_reg_class (int regno)
-{
+{
if (regno == ARG_POINTER_REGNUM)
return NOTSP_REG;
else if (regno == CC_REGNUM || regno == FCC_REGNUM)
@@ -1758,9 +1758,9 @@ pdp11_reg_save_size (void)
for (regno = AC0_REGNUM; regno <= AC5_REGNUM; regno++)
if (pdp11_saved_regno (regno))
offset += 8;
-
+
return offset;
-}
+}
/* Return the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */
@@ -1790,7 +1790,7 @@ output_addr_const_pdp11 (FILE *file, rtx x)
{
char buf[256];
int i;
-
+
restart:
switch (GET_CODE (x))
{
@@ -1890,7 +1890,7 @@ pdp11_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
On the pdp11 the value is found in R0 (or ac0??? not without FPU!!!! ) */
static rtx
-pdp11_function_value (const_tree valtype,
+pdp11_function_value (const_tree valtype,
const_tree fntype_or_decl ATTRIBUTE_UNUSED,
bool outgoing ATTRIBUTE_UNUSED)
{
@@ -1934,7 +1934,7 @@ pdp11_expand_shift (rtx *operands, rtx (*shift_sc) (rtx, rtx, rtx),
{
rtx r, test;
rtx_code_label *lb;
-
+
if (CONST_INT_P (operands[2]) && pdp11_small_shift (INTVAL (operands[2])))
emit_insn ((*shift_sc) (operands[0], operands[1], operands[2]));
else if (TARGET_40_PLUS)
@@ -1987,7 +1987,7 @@ pdp11_assemble_shift (rtx *operands, machine_mode m, int code)
inops[0] = operands[0];
pdp11_expand_operands (inops, exops, 1, 2, action, either);
}
-
+
if (!small)
{
/* Loop case, generate the top of loop label. */
@@ -2152,8 +2152,8 @@ pdp11_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
/* Worker function for TARGET_TRAMPOLINE_INIT.
- trampoline - how should i do it in separate i+d ?
- have some allocate_trampoline magic???
+ trampoline - how should i do it in separate i+d ?
+ have some allocate_trampoline magic???
the following should work for shared I/D:
@@ -2250,7 +2250,7 @@ static void pdp11_output_ident (const char *ident)
if (!startswith (ident, "GCC:"))
fprintf (asm_out_file, "\t.ident\t\"%s\"\n", ident);
}
-
+
}
/* This emits a (user) label, which gets a "_" prefix except for DEC
@@ -2279,7 +2279,7 @@ pdp11_output_def (FILE *file, const char *label1, const char *label2)
assemble_name (file, label1);
putc (',', file);
assemble_name (file, label2);
- }
+ }
putc ('\n', file);
}
@@ -2312,7 +2312,7 @@ pdp11_asm_named_section (const char *name, unsigned int flags,
{
const char *rwro = (flags & SECTION_WRITE) ? "rw" : "ro";
const char *insdat = (flags & SECTION_CODE) ? "i" : "d";
-
+
gcc_assert (TARGET_DEC_ASM);
fprintf (asm_out_file, "\t.psect\t%s,con,%s,%s\n", name, insdat, rwro);
}
@@ -2331,12 +2331,12 @@ pdp11_asm_init_sections (void)
".bss");
}
}
-
+
static void
pdp11_file_start (void)
{
default_file_start ();
-
+
if (TARGET_DEC_ASM)
fprintf (asm_out_file, "\t.enabl\tlsb,reg\n\n");
}
diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h
index d783b36b652..ba53ae6948a 100644
--- a/gcc/config/pdp11/pdp11.h
+++ b/gcc/config/pdp11/pdp11.h
@@ -63,13 +63,13 @@ along with GCC; see the file COPYING3. If not see
-mgnu-asm and -mdec-asm as equivalent (both are dialect zero). */
#define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
-\f
+
/* TYPE SIZES */
#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
#define LONG_TYPE_SIZE 32
-#define LONG_LONG_TYPE_SIZE 64
+#define LONG_LONG_TYPE_SIZE 64
/* In earlier versions, FLOAT_TYPE_SIZE was selectable as 32 or 64,
but that conflicts with Fortran language rules. Since there is no
@@ -104,7 +104,7 @@ along with GCC; see the file COPYING3. If not see
/* Define that floats are in VAX order, not high word first as for ints. */
#define FLOAT_WORDS_BIG_ENDIAN 0
-/* Width of a word, in units (bytes).
+/* Width of a word, in units (bytes).
UNITS OR BYTES - seems like units */
#define UNITS_PER_WORD 2
@@ -118,7 +118,7 @@ extern const struct real_format pdp11_f_format;
extern const struct real_format pdp11_d_format;
/* Maximum sized of reasonable data type -- DImode ...*/
-#define MAX_FIXED_MODE_SIZE 64
+#define MAX_FIXED_MODE_SIZE 64
/* Allocation boundary (in *bits*) for storing pointers in memory. */
#define POINTER_BOUNDARY 16
@@ -146,7 +146,7 @@ extern const struct real_format pdp11_d_format;
models have hardware divide, it is for 32 by 16 bits only, so we
call this platform "no hardware divide". */
#define TARGET_HAS_NO_HW_DIVIDE 1
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -155,7 +155,7 @@ extern const struct real_format pdp11_d_format;
All registers that the compiler knows about must be given numbers,
even those that are not normally considered general registers.
- we have 8 integer registers, plus 6 float
+ we have 8 integer registers, plus 6 float
(don't use scratch float !) */
/* 1 for registers that have pervasive standard uses
@@ -164,7 +164,7 @@ extern const struct real_format pdp11_d_format;
On the pdp, these are:
Reg 7 = pc;
reg 6 = sp;
- reg 5 = fp; not necessarily!
+ reg 5 = fp; not necessarily!
*/
#define FIXED_REGISTERS \
@@ -194,7 +194,7 @@ extern const struct real_format pdp11_d_format;
/* Register in which static-chain is passed to a function. */
/* ??? - i don't want to give up a reg for this! */
#define STATIC_CHAIN_REGNUM 4
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -214,7 +214,7 @@ extern const struct real_format pdp11_d_format;
For any two classes, it is very desirable that there be another
class that represents their union. */
-
+
/* The pdp has a couple of classes:
MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
@@ -222,7 +222,7 @@ MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
GENERAL_REGS is all cpu
LOAD_FPU_REGS is the first four cpu regs, they are easier to load
NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
-FPU_REGS is all fpu regs
+FPU_REGS is all fpu regs
CC_REGS is the condition codes (CPU and FPU)
*/
@@ -303,7 +303,7 @@ enum reg_class
/* Return TRUE if the class is a CPU register. */
#define CPU_REG_CLASS(CLASS) \
(CLASS >= NOTR0_REG && CLASS <= GENERAL_REGS)
-
+
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
@@ -311,7 +311,7 @@ enum reg_class
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
1 \
)
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -327,7 +327,7 @@ enum reg_class
#define PUSH_ROUNDING(BYTES) pdp11_push_rounding (BYTES)
-/* current_first_parm_offset stores the # of registers pushed on the
+/* current_first_parm_offset stores the # of registers pushed on the
stack */
extern int current_first_parm_offset;
@@ -339,13 +339,13 @@ extern int current_first_parm_offset;
If the precise function being called is known, FUNC is its FUNCTION_DECL;
otherwise, FUNC is 0. */
#define BASE_RETURN_VALUE_REG(MODE) \
- (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM)
+ (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM)
/* 1 if N is a possible register number for function argument passing.
- not used on pdp */
#define FUNCTION_ARG_REGNO_P(N) 0
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -398,7 +398,7 @@ extern int current_first_parm_offset;
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO)))
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT 1
@@ -425,7 +425,7 @@ extern int current_first_parm_offset;
*/
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 1
@@ -460,7 +460,7 @@ extern int current_first_parm_offset;
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#endif
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE HImode
@@ -473,7 +473,7 @@ extern int current_first_parm_offset;
#define DEFAULT_SIGNED_CHAR 1
/* Max number of bytes we can move from memory to memory
- in one reasonably fast instruction.
+ in one reasonably fast instruction.
*/
#define MOVE_MAX 2
@@ -513,7 +513,7 @@ extern int current_first_parm_offset;
but a CALL with constant address is cheap. */
/* #define NO_FUNCTION_CSE */
-\f
+
/* Control the assembler format that we output. */
/* Output to assembler file text saying following lines
diff --git a/gcc/config/pru/pru-passes.cc b/gcc/config/pru/pru-passes.cc
index b79a0d9ce90..32dfbd7d78d 100644
--- a/gcc/config/pru/pru-passes.cc
+++ b/gcc/config/pru/pru-passes.cc
@@ -74,7 +74,7 @@ public:
}
}; // class pass_tiabi_check
-\f
+
/* Return 1 if type TYPE is a pointer to function type or a
structure having a pointer to function type as one of its fields.
Otherwise return 0. */
diff --git a/gcc/config/pru/pru.cc b/gcc/config/pru/pru.cc
index 0029dcbc6aa..4d14a34e3a9 100644
--- a/gcc/config/pru/pru.cc
+++ b/gcc/config/pru/pru.cc
@@ -89,7 +89,7 @@ struct GTY (()) machine_function
/* True if the last tag was allocated to a doloop_end. */
bool doloop_tag_from_end;
};
-\f
+
/* Stack layout and calling conventions.
The PRU ABI defines r4 as Argument Pointer. GCC implements the same
@@ -512,7 +512,7 @@ pru_can_use_return_insn (void)
return cfun->machine->total_size == 0;
}
-\f
+
/* Implement TARGET_HARD_REGNO_MODE_OK. */
static bool
@@ -580,7 +580,7 @@ pru_hard_regno_rename_ok (unsigned int old_reg,
return 1;
}
-\f
+
/* Allocate a chunk of memory for per-function machine-dependent data. */
static struct machine_function *
pru_init_machine_status (void)
@@ -628,7 +628,7 @@ pru_option_override (void)
compliant output. */
pru_register_abicheck_pass ();
}
-\f
+
/* Compute a (partial) cost for rtx X. Return true if the complete
cost has been computed, and false if subexpressions should be
scanned. In either case, *TOTAL contains the cost result. */
@@ -783,7 +783,7 @@ pru_rtx_costs (rtx x, machine_mode mode,
}
}
}
-\f
+
static GTY(()) rtx eqdf_libfunc;
static GTY(()) rtx nedf_libfunc;
static GTY(()) rtx ledf_libfunc;
@@ -985,7 +985,7 @@ pru_expand_fp_compare (rtx comparison, machine_mode mode)
return gen_rtx_fmt_ee (jump_code, mode, cmp, const0_rtx);
}
-\f
+
/* Return the sign bit position for given OP's mode. */
static int
sign_bit_position (const rtx op)
@@ -1045,7 +1045,7 @@ pru_calc_byterange (HOST_WIDE_INT cval, machine_mode mode)
return invalid_range;
return r;
}
-\f
+
/* Branches and compares. */
/* PRU's ALU does not support signed comparison operations. That's why we
@@ -1510,7 +1510,7 @@ pru_addr_space_legitimate_address_p (machine_mode mode, rtx operand,
}
return false;
}
-\f
+
/* Output assembly language related definitions. */
/* Implement TARGET_ASM_CONSTRUCTOR. */
@@ -2180,7 +2180,7 @@ pru_insert_attributes (tree node, tree *attributes ATTRIBUTE_UNUSED)
if (typ != NULL_TREE && pru_nongeneric_pointer_addrspace (typ))
error ("pointers to %<__regio_symbol%> address space are prohibited");
}
-\f
+
/* Function argument related. */
/* Return the number of bytes needed for storing an argument with
@@ -2368,7 +2368,7 @@ pru_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
return in_memory;
}
-\f
+
/* Implement TARGET_CAN_USE_DOLOOP_P. */
static bool
@@ -2878,7 +2878,7 @@ pru_reorg (void)
df_finish_pass (false);
}
-\f
+
/* Enumerate all PRU-specific builtins. */
enum pru_builtin
{
@@ -2941,7 +2941,7 @@ pru_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED)
return error_mark_node;
}
}
-\f
+
/* Emit a sequence of one or more delay_cycles_X insns, in order to generate
code that delays exactly ARG cycles. */
@@ -3050,7 +3050,7 @@ pru_expand_builtin (tree exp, rtx target,
return NULL_RTX;
}
-\f
+
/* Remember the last target of pru_set_current_function. */
static GTY(()) tree pru_previous_fndecl;
@@ -3091,7 +3091,7 @@ pru_set_current_function (tree fndecl)
}
}
}
-\f
+
/* Implement TARGET_UNWIND_WORD_MODE.
Since PRU is really a 32-bit CPU, the default word_mode is not suitable. */
@@ -3100,7 +3100,7 @@ pru_unwind_word_mode (void)
{
return SImode;
}
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_FUNCTION_PROLOGUE
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 9a53999a39d..d44d5942579 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -1584,7 +1584,7 @@ riscv_legitimize_tls_address (rtx loc)
}
return dest;
}
-\f
+
/* If X is not a valid address for mode MODE, force it into a register. */
static rtx
@@ -2055,8 +2055,8 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src)
}
return true;
}
- /* Expand
- (set (reg:QI target) (mem:QI (address)))
+ /* Expand
+ (set (reg:QI target) (mem:QI (address)))
to
(set (reg:DI temp) (zero_extend:DI (mem:QI (address))))
(set (reg:QI target) (subreg:QI (reg:DI temp) 0))
@@ -2071,7 +2071,7 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src)
temp_reg = gen_reg_rtx (word_mode);
zero_extend_p = (LOAD_EXTEND_OP (mode) == ZERO_EXTEND);
- emit_insn (gen_extend_insn (temp_reg, src, word_mode, mode,
+ emit_insn (gen_extend_insn (temp_reg, src, word_mode, mode,
zero_extend_p));
riscv_emit_move (dest, gen_lowpart (mode, temp_reg));
return true;
@@ -2761,7 +2761,7 @@ riscv_split_doubleword_move (rtx dest, rtx src)
riscv_emit_move (riscv_subword (dest, true), riscv_subword (src, true));
}
}
-\f
+
/* Return the appropriate instructions to move SRC into DEST. Assume
that SRC is operand 1 and DEST is operand 0. */
@@ -2925,7 +2925,7 @@ riscv_output_return ()
return "ret";
}
-\f
+
/* Return true if CMP1 is a suitable second operand for integer ordering
test CODE. See also the *sCC patterns in riscv.md. */
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 0ab739bd6eb..2e4957c8726 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -579,7 +579,7 @@ enum reg_class
#define POLY_SMALL_OPERAND_P(POLY_VALUE) \
(POLY_VALUE.is_constant () ? \
SMALL_OPERAND (POLY_VALUE.to_constant ()) : false)
-
+
/* True if VALUE can be loaded into a register using LUI. */
#define LUI_OPERAND(VALUE) \
diff --git a/gcc/config/rl78/rl78-protos.h b/gcc/config/rl78/rl78-protos.h
index 9b882d3bf10..2a78968c6db 100644
--- a/gcc/config/rl78/rl78-protos.h
+++ b/gcc/config/rl78/rl78-protos.h
@@ -17,7 +17,7 @@
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
const char * rl78_addsi3_internal (rtx *, unsigned int);
void rl78_emit_eh_epilogue (rtx);
void rl78_expand_compare (rtx *);
diff --git a/gcc/config/rl78/rl78.cc b/gcc/config/rl78/rl78.cc
index b3727c0a81d..cfcaa51da46 100644
--- a/gcc/config/rl78/rl78.cc
+++ b/gcc/config/rl78/rl78.cc
@@ -53,14 +53,14 @@
/* This file should be included last. */
#include "target-def.h"
-\f
+
static inline bool is_interrupt_func (const_tree decl);
static inline bool is_brk_interrupt_func (const_tree decl);
static void rl78_reorg (void);
static const char *rl78_strip_name_encoding (const char *);
static const char *rl78_strip_nonasm_name_encoding (const char *);
static section * rl78_select_section (tree, int, unsigned HOST_WIDE_INT);
-\f
+
/* Debugging statements are tagged with DEBUG0 only so that they can
be easily enabled individually, by replacing the '0' with '1' as
@@ -337,7 +337,7 @@ rl78_output_symbol_ref (FILE * file, rtx sym)
assemble_name (file, str);
}
}
-\f
+
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE rl78_option_override
@@ -780,7 +780,7 @@ rl78_compute_frame_info (void)
+ cfun->machine->framesize_locals
+ cfun->machine->framesize_outgoing);
}
-\f
+
/* Returns true if the provided function has the specified attribute. */
static inline bool
has_func_attr (const_tree decl, const char * func_attr)
@@ -916,7 +916,7 @@ const struct attribute_spec rl78_attribute_table[] =
};
-\f
+
/* Break down an address RTX into its component base/index/addend
portions and return TRUE if the address is of a valid form, else
FALSE. */
@@ -1674,7 +1674,7 @@ static void
rl78_start_function (FILE *file)
{
int i;
-
+
add_vector_labels (file, "interrupt");
add_vector_labels (file, "vector");
@@ -2215,7 +2215,7 @@ rl78_trampoline_adjust_address (rtx m_tramp)
rtx x = gen_rtx_MEM (HImode, m_tramp);
return x;
}
-\f
+
/* Expander for cbranchqi4 and cbranchhi4. RL78 is missing some of
the "normal" compares, specifically, it only has unsigned compares,
so we must synthesize the missing ones. */
@@ -2226,7 +2226,7 @@ rl78_expand_compare (rtx *operands)
operands[2] = copy_to_mode_reg (GET_MODE (operands[2]), operands[2]);
}
-\f
+
/* Define this to 1 if you are debugging the peephole optimizers. */
#define DEBUG_PEEP 0
@@ -2389,7 +2389,7 @@ rl78_setup_peep_movhi (rtx *operands)
}
}
}
-\f
+
/*
How Devirtualization works in the RL78 GCC port
@@ -4355,7 +4355,7 @@ rl78_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
return (size == -1 || size > 8);
}
-\f
+
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS rl78_rtx_costs
@@ -4443,7 +4443,7 @@ rl78_rtx_costs (rtx x,
}
return false;
}
-\f
+
static GTY(()) section * saddr_section;
static GTY(()) section * frodata_section;
@@ -4754,7 +4754,7 @@ rl78_asm_out_integer (rtx x, unsigned int size, int aligned_p)
return false;
}
-\f
+
#undef TARGET_UNWIND_WORD_MODE
#define TARGET_UNWIND_WORD_MODE rl78_unwind_word_mode
@@ -4958,7 +4958,7 @@ rl78_emit_libcall (const char *name, enum rtx_code code,
return ret;
}
-\f
+
#undef TARGET_PREFERRED_RELOAD_CLASS
#define TARGET_PREFERRED_RELOAD_CLASS rl78_preferred_reload_class
@@ -4971,7 +4971,7 @@ rl78_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass)
return rclass;
}
-\f
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-rl78.h"
diff --git a/gcc/config/rl78/rl78.h b/gcc/config/rl78/rl78.h
index ead5cdda472..16f0a7ba8d8 100644
--- a/gcc/config/rl78/rl78.h
+++ b/gcc/config/rl78/rl78.h
@@ -17,7 +17,7 @@
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
#define RL78_MUL_NONE (rl78_mul_type == MUL_NONE)
#define RL78_MUL_G13 (rl78_mul_type == MUL_G13)
@@ -83,7 +83,7 @@
--end-group \
%{!T*: %{msim:%Trl78-sim.ld}%{!msim:%Trl78.ld}} \
"
-\f
+
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
@@ -161,7 +161,7 @@
#define STORE_FLAG_VALUE 1
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
-\f
+
/* The RL78 has four register banks. Normal operation uses RB0 as
real registers, RB1 and RB2 as "virtual" registers (because we know
@@ -395,14 +395,14 @@ typedef unsigned int CUMULATIVE_ARGS;
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
(CUM) = 0
-\f
+
/* FIXME */
#define NO_PROFILE_COUNTERS 1
#define PROFILE_BEFORE_PROLOGUE 1
#define FUNCTION_PROFILER(FILE, LABELNO) \
fprintf (FILE, "\tbsr\t__mcount\n");
-\f
+
#define TEXT_SECTION_ASM_OP ".text"
#define DATA_SECTION_ASM_OP ".data"
@@ -452,13 +452,13 @@ typedef unsigned int CUMULATIVE_ARGS;
/* For PIC put jump tables into the text section so that the offsets that
they contain are always computed between two same-section symbols. */
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
-\f
+
/* This is a version of REG_P that also returns TRUE for SUBREGs. */
#define RL78_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
/* Like REG_P except that this macro is true for SET expressions. */
#define SET_P(rtl) (GET_CODE (rtl) == SET)
-\f
+
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
@@ -469,7 +469,7 @@ typedef unsigned int CUMULATIVE_ARGS;
#define EXIT_IGNORE_STACK 0
#define INCOMING_FRAME_SP_OFFSET 4
-\f
+
#define BRANCH_COST(SPEED,PREDICT) 1
#define REGISTER_MOVE_COST(MODE,FROM,TO) 2
diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h
index ad3238bf09a..ead064c596f 100644
--- a/gcc/config/rs6000/aix.h
+++ b/gcc/config/rs6000/aix.h
@@ -182,7 +182,7 @@
Don't do this until the fixed IBM assembler is more generally available.
When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
- longer be needed. Also, the extern declaration of mcount in
+ longer be needed. Also, the extern declaration of mcount in
rs6000_xcoff_file_start will no longer be needed. */
/* #define ASM_SPEC "-u %(asm_cpu)" */
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 323d7c884d1..463a36dc82d 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -124,7 +124,7 @@ do { \
%{mpe: -I%R/usr/lpp/ppe.poe/include} \
%{pthread: -D_THREAD_SAFE}"
-/* The GNU C++ standard library requires that these macros be
+/* The GNU C++ standard library requires that these macros be
defined. Synchronize with libstdc++ os_defines.h. */
#define CPLUSPLUS_CPP_SPEC_COMMON \
"-D_ALL_SOURCE -D__COMPATMATH__ \
@@ -256,7 +256,7 @@ do { \
#define LD_INIT_SWITCH "-binitfini"
#ifndef _AIX52
-extern long long int atoll(const char *);
+extern long long int atoll(const char *);
#endif
/* This target uses the aix64.opt file. */
diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index f6e8b1e5a0c..4673f4d9864 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -35,7 +35,7 @@
#endif
/* If __APPLE_ALTIVEC__ is defined, the compiler supports 'vector',
- 'pixel' and 'bool' as context-sensitive AltiVec keywords (in
+ 'pixel' and 'bool' as context-sensitive AltiVec keywords (in
non-AltiVec contexts, they revert to their original meanings,
if any), so we do not need to define them as macros. Also,
avoid defining them as macros for C++ with strict ANSI, as
diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h
index 6a8845eb3bb..29664b0a9e7 100644
--- a/gcc/config/rs6000/darwin.h
+++ b/gcc/config/rs6000/darwin.h
@@ -486,14 +486,14 @@
default, as kernel code doesn't save/restore those registers. */
#define OS_MISSING_ALTIVEC (flag_mkernel || flag_apple_kext)
-/* Darwin has support for section anchors on powerpc*.
+/* Darwin has support for section anchors on powerpc*.
It is disabled for any section containing a "zero-sized item" (because these
are re-written as size=1 to be compatible with the OSX ld64).
The re-writing would interfere with the computation of anchor offsets.
Therefore, we place zero-sized items in their own sections and make such
sections unavailable to section anchoring. */
-#undef TARGET_ASM_OUTPUT_ANCHOR
+#undef TARGET_ASM_OUTPUT_ANCHOR
#define TARGET_ASM_OUTPUT_ANCHOR darwin_asm_output_anchor
#undef TARGET_USE_ANCHORS_FOR_SYMBOL_P
diff --git a/gcc/config/rs6000/driver-rs6000.cc b/gcc/config/rs6000/driver-rs6000.cc
index b871f0a36a8..c08d1803b2b 100644
--- a/gcc/config/rs6000/driver-rs6000.cc
+++ b/gcc/config/rs6000/driver-rs6000.cc
@@ -627,7 +627,7 @@ host_detect_local_cpu (int argc, const char **argv)
arch = strcmp (argv[0], "cpu") == 0;
if (!arch && strcmp (argv[0], "tune"))
return NULL;
-
+
if (arch)
cpu = "powerpc";
diff --git a/gcc/config/rs6000/freebsd.h b/gcc/config/rs6000/freebsd.h
index 29ada25eaef..7d008a08931 100644
--- a/gcc/config/rs6000/freebsd.h
+++ b/gcc/config/rs6000/freebsd.h
@@ -50,7 +50,7 @@
/************************[ Target stuff ]***********************************/
-/* Define the actual types of some ANSI-mandated types.
+/* Define the actual types of some ANSI-mandated types.
Needs to agree with <machine/ansi.h>. GCC defaults come from c-decl.cc,
c-common.cc, and config/<arch>/<arch>.h. */
diff --git a/gcc/config/rs6000/freebsd64.h b/gcc/config/rs6000/freebsd64.h
index a73752a18f5..2b83e95bc78 100644
--- a/gcc/config/rs6000/freebsd64.h
+++ b/gcc/config/rs6000/freebsd64.h
@@ -238,7 +238,7 @@ extern int dot_symbols;
/************************[ Target stuff ]***********************************/
-/* Define the actual types of some ANSI-mandated types.
+/* Define the actual types of some ANSI-mandated types.
Needs to agree with <machine/ansi.h>. GCC defaults come from c-decl.cc,
c-common.cc, and config/<arch>/<arch>.h. */
diff --git a/gcc/config/rs6000/host-darwin.cc b/gcc/config/rs6000/host-darwin.cc
index 6072a6cddc4..0416975d2bf 100644
--- a/gcc/config/rs6000/host-darwin.cc
+++ b/gcc/config/rs6000/host-darwin.cc
@@ -92,7 +92,7 @@ segv_handler (int sig ATTRIBUTE_UNUSED,
|| (faulting_insn & 0xFC1F8000) == 0xBC018000 /* stmw xxx, -yyy(%r1) */)
{
char *shell_name;
-
+
fnotice (stderr, "Out of stack space.\n");
shell_name = getenv ("SHELL");
if (shell_name != NULL)
@@ -109,23 +109,23 @@ segv_handler (int sig ATTRIBUTE_UNUSED,
{ "zsh", "limit stacksize 32m" }
};
size_t i;
-
+
for (i = 0; i < ARRAY_SIZE (shell_commands); i++)
if (strcmp (shell_commands[i][0], shell_name + 1) == 0)
{
- fnotice (stderr,
+ fnotice (stderr,
"Try running '%s' in the shell to raise its limit.\n",
shell_commands[i][1]);
}
}
-
+
if (global_dc->abort_on_error)
fancy_abort (__FILE__, __LINE__, __FUNCTION__);
exit (FATAL_EXIT_CODE);
}
- fprintf (stderr, "[address=%08lx pc=%08x]\n",
+ fprintf (stderr, "[address=%08lx pc=%08x]\n",
uc->uc_mcontext->MC_FLD(es).MC_FLD(dar),
uc->uc_mcontext->MC_FLD(ss).MC_FLD(srr0));
internal_error ("segmentation fault");
@@ -147,9 +147,9 @@ darwin_rs6000_extra_signals (void)
sigemptyset(&sact.sa_mask);
sact.sa_flags = SA_ONSTACK | SA_SIGINFO;
sact.sa_sigaction = segv_handler;
- if (sigaction (SIGSEGV, &sact, 0) < 0)
+ if (sigaction (SIGSEGV, &sact, 0) < 0)
fatal_error (input_location, "While setting up signal handler: %m");
}
-\f
+
const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/gcc/config/rs6000/linux.h b/gcc/config/rs6000/linux.h
index 8c9039ac1e5..724fc564e4b 100644
--- a/gcc/config/rs6000/linux.h
+++ b/gcc/config/rs6000/linux.h
@@ -113,7 +113,7 @@
/* We are 32-bit all the time, so optimize a little. */
#undef TARGET_64BIT
#define TARGET_64BIT 0
-
+
/* We don't need to generate entries in .fixup, except when
-mrelocatable or -mrelocatable-lib is given. */
#undef RELOCATABLE_NEEDS_FIXUP
diff --git a/gcc/config/rs6000/ppu_intrinsics.h b/gcc/config/rs6000/ppu_intrinsics.h
index 7f6d8ec39fb..febc266e610 100644
--- a/gcc/config/rs6000/ppu_intrinsics.h
+++ b/gcc/config/rs6000/ppu_intrinsics.h
@@ -34,7 +34,7 @@
#ifdef __cplusplus
extern "C" {
-#endif
+#endif
/*
* unsigned int __cntlzw(unsigned int)
@@ -113,7 +113,7 @@ extern "C" {
* void __mtfsb1(int)
* double __setflm(double)
*
- * dcbt intrinsics
+ * dcbt intrinsics
* void __protected_unlimited_stream_set (unsigned int direction, const void *add, unsigned int ID)
* void __protected_stream_set (unsigned int direction, const void *add, unsigned int ID)
* void __protected_stream_stop_all (void)
@@ -178,7 +178,7 @@ typedef int __V4SI __attribute__((vector_size(16)));
#ifdef __powerpc64__
#define __mtspr(spr, value) \
__asm__ volatile ("mtspr %0,%1" : : "n" (spr), "r" (value))
-
+
#define __mfspr(spr) __extension__ \
({ unsigned long long result; \
__asm__ volatile ("mfspr %0,%1" : "=r" (result) : "n" (spr)); \
@@ -211,7 +211,7 @@ typedef int __V4SI __attribute__((vector_size(16)));
#define __dcbf(base) \
__asm__ volatile ("dcbf %y0" : "=Z" (*(__V4SI*) (base)) : : "memory")
-
+
#define __dcbz(base) \
__asm__ volatile ("dcbz %y0" : "=Z" (*(__V4SI*) (base)) : : "memory")
@@ -226,7 +226,7 @@ typedef int __V4SI __attribute__((vector_size(16)));
#define __icbi(base) \
__asm__ volatile ("icbi %y0" : "=Z" (*(__V4SI*) (base)) : : "memory")
-
+
#define __dcbt_TH1000(EATRUNC, D, UG, ID) \
__asm__ volatile ("dcbt %y0,8" \
: "=Z" (*(__V4SI*) (__SIZE_TYPE__)((((__SIZE_TYPE__) (EATRUNC)) & ~0x7F) \
@@ -390,7 +390,7 @@ typedef int __V4SI __attribute__((vector_size(16)));
#define __mtfsf(mask,value) \
__asm__ volatile ("mtfsf %0,%1" : : "n" (mask), "d" ((double) (value)))
-
+
#define __mtfsfi(bits,field) \
__asm__ volatile ("mtfsfi %0,%1" : : "n" (bits), "n" (field))
@@ -406,10 +406,10 @@ typedef int __V4SI __attribute__((vector_size(16)));
/* __builtin_fabs may perform unnecessary rounding. */
-/* Rename __fabs and __fabsf to work around internal prototypes defined
- in bits/mathcalls.h with some glibc versions. */
-#define __fabs __ppu_fabs
-#define __fabsf __ppu_fabsf
+/* Rename __fabs and __fabsf to work around internal prototypes defined
+ in bits/mathcalls.h with some glibc versions. */
+#define __fabs __ppu_fabs
+#define __fabsf __ppu_fabsf
static __inline__ double __fabs(double x) __attribute__((always_inline));
static __inline__ double
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 56609462629..c92eb4e1f35 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -782,7 +782,7 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__STRUCT_PARM_ALIGN__=16");
}
-\f
+
/* Convert a type stored into a struct altivec_builtin_types as ID,
into a tree. The types are in rs6000_builtin_types: negative values
@@ -813,7 +813,7 @@ is_float128_p (tree t)
&& TARGET_LONG_DOUBLE_128
&& t == long_double_type_node));
}
-
+
/* Return true iff ARGTYPE can be compatibly passed as PARMTYPE. */
static bool
diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc
index 59c51fa3579..0a62970c0b7 100644
--- a/gcc/config/rs6000/rs6000-call.cc
+++ b/gcc/config/rs6000/rs6000-call.cc
@@ -407,15 +407,15 @@ rs6000_discover_homogeneous_aggregate (machine_mode mode, const_tree type,
The AIX ABI for the RS/6000 specifies that all structures are
returned in memory. The Darwin ABI does the same.
-
+
For the Darwin 64 Bit ABI, a function result can be returned in
registers or in memory, depending on the size of the return data
type. If it is returned in registers, the value occupies the same
registers as it would if it were the first and only function
argument. Otherwise, the function places its result in memory at
the location pointed to by GPR3.
-
- The SVR4 ABI specifies that structures <= 8 bytes are returned in r3/r4,
+
+ The SVR4 ABI specifies that structures <= 8 bytes are returned in r3/r4,
but a draft put them in memory, and GCC used to implement the draft
instead of the final standard. Therefore, aix_struct_return
controls this instead of DEFAULT_ABI; V.4 targets needing backward
@@ -685,7 +685,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype,
" to enable them", "-maltivec");
}
}
-\f
+
/* On rs6000, function arguments are promoted, as are function return
values. */
@@ -901,7 +901,7 @@ rs6000_arg_size (machine_mode mode, const_tree type)
else
return (size + 7) >> 3;
}
-\f
+
/* Use this to flush pending int fields. */
static void
@@ -1045,10 +1045,10 @@ int
rs6000_darwin64_struct_check_p (machine_mode mode, const_tree type)
{
return rs6000_darwin64_abi
- && ((mode == BLKmode
- && TREE_CODE (type) == RECORD_TYPE
+ && ((mode == BLKmode
+ && TREE_CODE (type) == RECORD_TYPE
&& int_size_in_bytes (type) > 0)
- || (type && TREE_CODE (type) == RECORD_TYPE
+ || (type && TREE_CODE (type) == RECORD_TYPE
&& int_size_in_bytes (type) == 8)) ? 1 : 0;
}
@@ -1178,7 +1178,7 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode,
{
fprintf (stderr, "function_adv: words = %2d, align=%d, size=%d",
cum->words, TYPE_ALIGN (type), size);
- fprintf (stderr,
+ fprintf (stderr,
"nargs = %4d, proto = %d, mode = %4s (darwin64 abi)\n",
cum->nargs_prototype, cum->prototype,
GET_MODE_NAME (mode));
@@ -1868,7 +1868,7 @@ rs6000_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
return NULL_RTX;
}
}
-\f
+
/* For an arg passed partly in registers and partly in memory, this is
the number of bytes passed in registers. For args passed entirely in
registers or entirely in memory, zero. When an arg is described by a
@@ -1964,7 +1964,7 @@ rs6000_arg_partial_bytes (cumulative_args_t cum_v,
return ret;
}
-\f
+
/* A C expression that indicates when an argument must be passed by
reference. If nonzero for an argument, a copy of that argument is
made in memory and a pointer to the argument is passed instead of
@@ -2225,7 +2225,7 @@ rs6000_move_block_from_reg (int regno, rtx x, int nregs)
emit_move_insn (tem, gen_rtx_REG (reg_mode, regno + i));
}
}
-\f
+
/* Perform any needed actions needed for a function that is receiving a
variable number of arguments.
@@ -2567,9 +2567,9 @@ rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
/* We need to deal with the fact that the darwin ppc64 ABI is defined by an
earlier version of gcc, with the property that it always applied alignment
adjustments to the va-args (even for zero-sized types). The cheapest way
- to deal with this is to replicate the effect of the part of
- std_gimplify_va_arg_expr that carries out the align adjust, for the case
- of relevance.
+ to deal with this is to replicate the effect of the part of
+ std_gimplify_va_arg_expr that carries out the align adjust, for the case
+ of relevance.
We don't need to check for pass-by-reference because of the test above.
We can return a simplifed answer, since we know there's no offset to add. */
@@ -2885,7 +2885,7 @@ rs6000_internal_arg_pointer (void)
return virtual_incoming_args_rtx;
}
-\f
+
/* A C compound statement that outputs the assembler code for a thunk
function, used to implement C++ virtual function calls with
multiple inheritance. The thunk acts as a wrapper around a virtual
diff --git a/gcc/config/rs6000/rs6000-internal.h b/gcc/config/rs6000/rs6000-internal.h
index e75b8d5c7e8..e1d857f1b73 100644
--- a/gcc/config/rs6000/rs6000-internal.h
+++ b/gcc/config/rs6000/rs6000-internal.h
@@ -149,7 +149,7 @@ extern machine_mode rs6000_promote_function_mode (const_tree type ATTRIBUTE_UNUS
machine_mode mode,
int *punsignedp ATTRIBUTE_UNUSED,
const_tree, int);
-extern bool rs6000_return_in_memory (const_tree type,
+extern bool rs6000_return_in_memory (const_tree type,
const_tree fntype ATTRIBUTE_UNUSED);
extern bool rs6000_return_in_msb (const_tree valtype);
extern bool rs6000_pass_by_reference (cumulative_args_t,
diff --git a/gcc/config/rs6000/rs6000-logue.cc b/gcc/config/rs6000/rs6000-logue.cc
index 669a2583402..d87472f21f9 100644
--- a/gcc/config/rs6000/rs6000-logue.cc
+++ b/gcc/config/rs6000/rs6000-logue.cc
@@ -77,7 +77,7 @@ rs6000_init_machine_status (void)
stack_info.reload_completed = 0;
return ggc_cleared_alloc<machine_function> ();
}
-\f
+
/* This page contains routines that are used to determine what the
function prologue and epilogue code will do and write them out. */
@@ -281,7 +281,7 @@ is_altivec_return_reg (rtx reg, void *xyes)
*yes = true;
}
-\f
+
/* Return whether REG is a global user reg or has been specifed by
-ffixed-REG. We should not restore these, and so cannot use
lmw or out-of-line restore functions if there are any. We also
@@ -1248,7 +1248,7 @@ rs6000_ra_ever_killed (void)
}
return 0;
}
-\f
+
/* Emit instructions needed to load the TOC register.
This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
a constant pool; or for SVR4 -fpic. */
@@ -1386,7 +1386,7 @@ rs6000_emit_eh_reg_restore (rtx source, rtx scratch)
/* Freeze lr_save_p. We've just emitted rtl that depends on the
state of lr_save_p so any change from here on would be a bug. In
particular, stop rs6000_ra_ever_killed from considering the SET
- of lr we may have added just above. */
+ of lr we may have added just above. */
cfun->machine->lr_save_state = info->lr_save_p + 1;
}
@@ -1439,7 +1439,7 @@ rs6000_aix_asm_output_dwarf_table_ref (char * frame_table_label)
fprintf (asm_out_file, "\t.ref %s\n",
(* targetm.strip_name_encoding) (frame_table_label));
}
-\f
+
/* This ties together stack memory (MEM with an alias set of frame_alias_set)
and the change to the stack pointer. */
@@ -1472,7 +1472,7 @@ rs6000_emit_stack_tie (rtx fp, bool hard_frame_needed)
/* Allocate SIZE_INT bytes on the stack using a store with update style insn
and set the appropriate attributes for the generated insn. Return the
first insn which adjusts the stack pointer or the last insn before
- the stack adjustment loop.
+ the stack adjustment loop.
SIZE_INT is used to create the CFI note for the allocation.
@@ -1497,7 +1497,7 @@ rs6000_emit_allocate_stack_1 (HOST_WIDE_INT size_int, rtx orig_sp)
try_split (PATTERN (insn), insn, 0);
size_rtx = tmp_reg;
}
-
+
if (TARGET_32BIT)
insn = emit_insn (gen_movsi_update_stack (stack_pointer_rtx,
stack_pointer_rtx,
@@ -4698,7 +4698,7 @@ rs6000_emit_epilogue (enum epilogue_type epilogue_type)
if (newptr_regno != 1 && REGNO (frame_reg_rtx) != newptr_regno)
frame_reg_rtx = gen_rtx_REG (Pmode, newptr_regno);
-
+
if (end_save + ptr_off != 0)
{
rtx offset = GEN_INT (end_save + ptr_off);
diff --git a/gcc/config/rs6000/rs6000-p8swap.cc b/gcc/config/rs6000/rs6000-p8swap.cc
index 19fbbfb67dc..f76239308fa 100644
--- a/gcc/config/rs6000/rs6000-p8swap.cc
+++ b/gcc/config/rs6000/rs6000-p8swap.cc
@@ -133,7 +133,7 @@
already in a register. In some cases, this mask may be a constant
that we can discover with ud-chains, in which case the above
transformation is ok. However, the common usage here is for the
- mask to be produced by an UNSPEC_LVSL, in which case the mask
+ mask to be produced by an UNSPEC_LVSL, in which case the mask
cannot be known at compile time. In such a case we would have to
generate several instructions to compute M' as above at run time,
and a cost model is needed again.
@@ -634,7 +634,7 @@ v2df_reduction_p (rtx op)
{
if (GET_MODE (op) != V2DFmode)
return false;
-
+
enum rtx_code code = GET_CODE (op);
if (code != PLUS && code != SMIN && code != SMAX)
return false;
@@ -913,7 +913,7 @@ insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn,
return 0;
if (GET_CODE (XEXP (lhs, 0)) == AND)
return 0;
-
+
*special = SH_NOSWAP_ST;
return 1;
}
@@ -1355,7 +1355,7 @@ adjust_vperm (rtx_insn *insn)
break;
}
gcc_assert (swap_insn);
-
+
/* Find the load. */
insn_info = DF_INSN_INFO_GET (swap_insn);
rtx_insn *load_insn = 0;
@@ -2094,7 +2094,7 @@ alignment_with_canonical_addr (rtx align)
return gen_rtx_AND (GET_MODE (align), canon, GEN_INT (-16));
}
-/* Check whether an rtx is an alignment mask, and if so, return
+/* Check whether an rtx is an alignment mask, and if so, return
a fully-expanded rtx for the masking operation. */
static rtx
alignment_mask (rtx_insn *insn)
@@ -2397,7 +2397,7 @@ recombine_lvx_stvx_patterns (function *fun)
remove_insn (to_delete[i].replace_insn);
to_delete[i].replace_insn->set_deleted ();
}
-
+
free (to_delete);
}
diff --git a/gcc/config/rs6000/rs6000-pcrel-opt.cc b/gcc/config/rs6000/rs6000-pcrel-opt.cc
index 1bb4707a29c..82280c8a6cd 100644
--- a/gcc/config/rs6000/rs6000-pcrel-opt.cc
+++ b/gcc/config/rs6000/rs6000-pcrel-opt.cc
@@ -142,7 +142,7 @@ static struct {
/* Unique integer that is appended to .Lpcrel to make a pcrel_opt label. */
static unsigned int pcrel_opt_next_num;
-\f
+
/* Optimize a PC-relative load address to be used in a load. Before it calls
this function, pcrel_opt_address () uses DF to make sure that it is safe
to do the PCREL_OPT optimization on these insns.
@@ -375,7 +375,7 @@ pcrel_opt_load (rtx_insn *addr_insn, rtx_insn *load_insn)
df_analyze ();
}
-\f
+
/* Optimize a PC-relative load address to be used in a store. Before calling
this function, pcrel_opt_address () uses DF to make sure it is safe to do
the PCREL_OPT optimization.
@@ -860,7 +860,7 @@ pcrel_opt_pass (function *fun)
df_analyze ();
return 0;
}
-\f
+
/* Optimize pc-relative references for the new PCREL_OPT pass. */
const pass_data pass_data_pcrel_opt =
{
diff --git a/gcc/config/rs6000/rs6000-string.cc b/gcc/config/rs6000/rs6000-string.cc
index cd8ee8c2f7e..e1ac4d07bed 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -1336,7 +1336,7 @@ expand_compare_loop (rtx operands[])
{
/* If remainder length < word length, branch to final
cleanup compare. */
-
+
if (!bytes_is_const)
{
do_ifelse (CCmode, LT, cmp_rem, GEN_INT (load_mode_size),
@@ -2704,7 +2704,7 @@ gen_lvx_v4si_move (rtx dest, rtx src)
if (MEM_P (dest))
return gen_altivec_stvx_v4si_internal (dest, src);
- else
+ else
return gen_altivec_lvx_v4si_internal (dest, src);
}
@@ -2921,7 +2921,7 @@ expand_block_move (rtx operands[], bool might_overlap)
emit_insn (stores[i]);
num_reg = 0;
}
-
+
}
return 1;
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 6ac3adcec6b..20f2003c318 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -479,7 +479,7 @@ rs6000_store_data_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
return store_data_bypass_p (out_insn, in_insn);
}
-\f
+
/* Processor costs (relative to an add) */
const struct processor_costs *rs6000_cost;
@@ -1108,7 +1108,7 @@ struct processor_costs ppca2_cost = {
/* Support for -mveclibabi=<xxx> to control which vector library to use. */
static tree (*rs6000_veclib_handler) (combined_fn, tree, tree);
-\f
+
static bool rs6000_debug_legitimate_address_p (machine_mode, rtx, bool);
static tree rs6000_handle_longcall_attribute (tree *, tree, tree, int, bool *);
static tree rs6000_handle_altivec_attribute (tree *, tree, tree, int, bool *);
@@ -1198,7 +1198,7 @@ struct toc_hasher : ggc_ptr_hash<toc_hash_struct>
static GTY (()) hash_table<toc_hasher> *toc_hash_table;
-\f
+
/* Default register names. */
char rs6000_reg_names[][8] =
{
@@ -1273,11 +1273,11 @@ static const struct attribute_spec rs6000_attribute_table[] =
#endif
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
#ifndef TARGET_PROFILE_KERNEL
#define TARGET_PROFILE_KERNEL 0
#endif
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE rs6000_attribute_table
@@ -1760,7 +1760,7 @@ static const struct attribute_spec rs6000_attribute_table[] =
#undef TARGET_UPDATE_IPA_FN_TARGET_INFO
#define TARGET_UPDATE_IPA_FN_TARGET_INFO rs6000_update_ipa_fn_target_info
-\f
+
/* Processor table. */
struct rs6000_ptt
@@ -1795,7 +1795,7 @@ rs6000_cpu_name_lookup (const char *name)
return -1;
}
-\f
+
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
This is ordinarily the length in words of a value of mode MODE
@@ -2573,7 +2573,7 @@ rs6000_debug_reg_global (void)
(int)VECTOR_ELEMENT_MFVSRLD_64BIT);
}
-\f
+
/* Update the addr mask bits in reg_addr to help secondary reload and go if
legitimate address support to figure out the appropriate addressing to
use. */
@@ -2733,7 +2733,7 @@ rs6000_setup_reg_addr_masks (void)
}
}
-\f
+
/* Initialize the various global tables that are based on register size. */
static void
rs6000_init_hard_regno_mode_ok (bool global_init_p)
@@ -4332,10 +4332,10 @@ rs6000_option_override_internal (bool global_init_p)
}
}
- /* Set the Darwin64 ABI as default for 64-bit Darwin.
+ /* Set the Darwin64 ABI as default for 64-bit Darwin.
So far, the only darwin64 targets are also MACH-O. */
if (TARGET_MACHO
- && DEFAULT_ABI == ABI_DARWIN
+ && DEFAULT_ABI == ABI_DARWIN
&& TARGET_64BIT)
{
if (main_target_opt != NULL && !main_target_opt->x_rs6000_darwin64_abi)
@@ -4880,7 +4880,7 @@ rs6000_option_override (void)
(void) rs6000_option_override_internal (true);
}
-\f
+
/* Implement LOOP_ALIGN. */
align_flags
rs6000_loop_align (rtx label)
@@ -4938,7 +4938,7 @@ rs6000_vector_alignment_reachable (const_tree type ATTRIBUTE_UNUSED, bool is_pac
}
/* Return true if the vector misalignment factor is supported by the
- target. */
+ target. */
static bool
rs6000_builtin_support_vector_misalignment (machine_mode mode,
const_tree type,
@@ -5818,7 +5818,7 @@ rs6000_builtin_vectorized_libmass (combined_fn fn, tree type_out,
return new_fndecl;
}
-\f
+
/* Default CPU string for rs6000*_file_start functions. */
static const char *rs6000_default_cpu;
@@ -5995,7 +5995,7 @@ rs6000_file_start (void)
fprintf (file, "\t.abiversion 2\n");
}
-\f
+
/* Return nonzero if this function is known to have a null epilogue. */
int
@@ -8034,7 +8034,7 @@ rs6000_split_vec_extract_var (rtx dest, rtx src, rtx element, rtx tmp_gpr,
/* Return alignment of TYPE. Existing alignment is ALIGN. HOW
selects whether the alignment is abi mandated, optional, or
both abi and optional alignment. */
-
+
unsigned int
rs6000_data_alignment (tree type, unsigned int align, enum data_align how)
{
@@ -8585,7 +8585,7 @@ mem_operand_ds_form (rtx op, machine_mode mode)
return SIGNED_16BIT_OFFSET_EXTRA_P (offset, extra);
}
-\f
+
/* Subroutines of rs6000_legitimize_address and rs6000_legitimate_address_p. */
static bool
@@ -8658,7 +8658,7 @@ virtual_stack_registers_memory_p (rtx op)
to determine whether -mcmodel=medium code can use TOC pointer
relative addressing for OP. This means the alignment of the TOC
pointer must also be taken into account, and unfortunately that is
- only 8 bytes. */
+ only 8 bytes. */
#ifndef POWERPC64_TOC_POINTER_ALIGNMENT
#define POWERPC64_TOC_POINTER_ALIGNMENT 8
@@ -8806,8 +8806,8 @@ static const_rtx tocrel_base_oac, tocrel_offset_oac;
/* Return true if OP is a toc pointer relative address (the output
of create_TOC_reference). If STRICT, do not match non-split
- -mcmodel=large/medium toc pointer relative addresses. If the pointers
- are non-NULL, place base and offset pieces in TOCREL_BASE_RET and
+ -mcmodel=large/medium toc pointer relative addresses. If the pointers
+ are non-NULL, place base and offset pieces in TOCREL_BASE_RET and
TOCREL_OFFSET_RET respectively. */
bool
@@ -9534,7 +9534,7 @@ rs6000_legitimize_tls_address_aix (rtx addr, enum tls_model model)
tocref = create_TOC_reference (modaddr, NULL_RTX);
rtx modmem = gen_const_mem (Pmode, tocref);
set_mem_alias_set (modmem, get_TOC_alias_set ());
-
+
rtx modreg = gen_reg_rtx (Pmode);
emit_insn (gen_rtx_SET (modreg, modmem));
@@ -10091,13 +10091,13 @@ rs6000_offsettable_memref_p (rtx op, machine_mode reg_mode, bool strict)
This takes into account how many parallel operations we
can actually do of a given type, and also the latency.
P8:
- int add/sub 6/cycle
+ int add/sub 6/cycle
mul 2/cycle
vect add/sub/mul 2/cycle
fp add/sub/mul 2/cycle
dfp 1/cycle
*/
-
+
static int
rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
machine_mode mode)
@@ -10111,7 +10111,7 @@ rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
return 1;
if (VECTOR_MODE_P (mode))
return 4;
- if (INTEGRAL_MODE_P (mode))
+ if (INTEGRAL_MODE_P (mode))
return 1;
if (FLOAT_MODE_P (mode))
return 4;
@@ -10181,7 +10181,7 @@ rs6000_conditional_register_usage (void)
}
}
-\f
+
/* Output insns to set DEST equal to the constant SOURCE as a series of
lis, ori and shl instructions and return TRUE. */
@@ -11076,7 +11076,7 @@ rs6000_emit_move (rtx dest, rtx source, machine_mode mode)
emit_insn (gen_rtx_SET (operands[0], operands[1]));
}
-\f
+
/* Set up AIX/Darwin/64-bit Linux quad floating point routines. */
static void
@@ -11344,7 +11344,7 @@ rs6000_emit_dot_insn (rtx dst, rtx src, int dot, rtx ccreg)
}
}
-\f
+
/* A validation routine: say whether CODE, a condition code, and MODE
match. The other alternatives either don't make sense or should
never be generated. */
@@ -11373,7 +11373,7 @@ validate_condition_mode (enum rtx_code code, machine_mode mode)
gcc_assert (mode != CCEQmode || code == EQ || code == NE);
}
-\f
+
/* Return whether MASK (a CONST_INT) is a valid mask for any rlwinm,
rldicl, rldicr, or rldic instruction in mode MODE. If so, if E is
not zero, store there the bit offset (counted from the right) where
@@ -11871,7 +11871,7 @@ rs6000_emit_2insn_and (machine_mode mode, rtx *operands, bool expand, int dot)
rs6000_emit_dot_insn (operands[0], tmp, dot, dot ? operands[3] : 0);
}
}
-\f
+
/* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
for lfq and stfq insns iff the registers are hard registers. */
@@ -11968,7 +11968,7 @@ mems_ok_for_quad_peep (rtx mem1, rtx mem2)
instructions. */
return 1;
}
-\f
+
/* Implement TARGET_SECONDARY_RELOAD_NEEDED_MODE. For SDmode values we
need to use DDmode, in all other cases we can use the same mode. */
static machine_mode
@@ -13471,7 +13471,7 @@ rs6000_debug_can_change_mode_class (machine_mode from,
return ret;
}
-\f
+
/* Return a string to do a move operation of 128 bits of data. */
const char *
@@ -13670,7 +13670,7 @@ rs6000_split_128bit_ok_p (rtx operands[])
return true;
}
-\f
+
/* Given a comparison operation, return the bit number in CCR to test. We
know this is a valid comparison.
@@ -13744,7 +13744,7 @@ ccr_bit (rtx op, int scc_p)
return -1;
}
}
-\f
+
/* Return the GOT register. */
rtx
@@ -13761,7 +13761,7 @@ rs6000_got_register (rtx value ATTRIBUTE_UNUSED)
return pic_offset_table_rtx;
}
-\f
+
#define INT_P(X) (CONST_INT_P (X) && GET_MODE (X) == VOIDmode)
/* Write out a function code label. */
@@ -14208,7 +14208,7 @@ print_operand (FILE *file, rtx x, int code)
? reg - 32
: reg - FIRST_ALTIVEC_REGNO + 32);
-#ifdef TARGET_REGNAMES
+#ifdef TARGET_REGNAMES
if (TARGET_REGNAMES)
fprintf (file, "%%vs%d", vsx_reg);
else
@@ -14387,7 +14387,7 @@ print_operand (FILE *file, rtx x, int code)
output_operand_lossage ("invalid %%xn code");
}
}
-\f
+
/* Print the address of an operand. */
void
@@ -14481,7 +14481,7 @@ print_operand_address (FILE *file, rtx x)
else
output_addr_const (file, x);
}
-\f
+
/* Implement TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA. */
bool
@@ -14521,7 +14521,7 @@ rs6000_output_addr_const_extra (FILE *file, rtx x)
}
return false;
}
-\f
+
/* Target hook for assembling integer objects. The PowerPC version has
to handle fixup entries for relocatable code if RELOCATABLE_NEEDS_FIXUP
is defined. It also needs to handle DI-mode objects on 64-bit
@@ -14899,7 +14899,7 @@ rs6000_pltseq_template (rtx *operands, int which)
return str;
}
#endif
-\f
+
#if defined (HAVE_GAS_HIDDEN) && !TARGET_MACHO
/* Emit an assembler directive to set symbol visibility for DECL to
VISIBILITY_TYPE. */
@@ -14933,7 +14933,7 @@ rs6000_assemble_visibility (tree decl, int vis)
default_assemble_visibility (decl, vis);
}
#endif
-\f
+
/* Write PATCH_AREA_SIZE NOPs into the asm outfile FILE around a function
entry. If RECORD_P is true and the target supports named sections,
the location of the NOPs will be recorded in a special object section
@@ -14954,7 +14954,7 @@ rs6000_print_patchable_function_entry (FILE *file,
if (!global_entry_needed_p || cfun->machine->global_entry_emitted)
default_print_patchable_function_entry (file, patch_area_size, record_p);
}
-\f
+
enum rtx_code
rs6000_reverse_condition (machine_mode mode, enum rtx_code code)
{
@@ -15228,7 +15228,7 @@ rs6000_generate_compare (rtx cmp, machine_mode mode)
return gen_rtx_fmt_ee (code, VOIDmode, compare_result, const0_rtx);
}
-\f
+
/* Return the diagnostic message string if the binary operation OP is
not permitted on TYPE1 and TYPE2, NULL otherwise. */
@@ -15263,7 +15263,7 @@ rs6000_invalid_binary_op (int op ATTRIBUTE_UNUSED,
return NULL;
}
-\f
+
/* Expand floating point conversion to/from __float128 and __ibm128. */
void
@@ -15500,7 +15500,7 @@ rs6000_expand_float128_convert (rtx dest, rtx src, bool unsigned_p)
return;
}
-\f
+
/* Emit RTL that sets a register to zero if OP1 and OP2 are equal. SCRATCH
can be used as that dest register. Return the dest register. */
@@ -17045,7 +17045,7 @@ rs6000_offload_options (void)
return xstrdup ("-foffload-abi=ilp32");
}
-\f
+
/* A quick summary of the various types of 'constant-pool tables'
under PowerPC:
@@ -17573,7 +17573,7 @@ output_toc (FILE *file, rtx x, int labelno, machine_mode mode)
putc ('\n', file);
}
-\f
+
/* Output an assembler pseudo-op to write an ASCII string of N characters
starting at P to FILE.
@@ -17640,7 +17640,7 @@ output_ascii (FILE *file, const char *p, int n)
if (to_close)
fputs (to_close, file);
}
-\f
+
/* Generate a unique section name for FILENAME for a section type
represented by SECTION_DESC. Output goes into BUF.
@@ -17694,7 +17694,7 @@ rs6000_gen_section_name (char **buf, const char *filename,
else
*p = '\0';
}
-\f
+
/* Emit profile function. */
void
@@ -17858,7 +17858,7 @@ output_function_profiler (FILE *file, int labelno)
}
}
-\f
+
/* The following variable value is the last issued insn. */
@@ -20107,7 +20107,7 @@ rs6000_sched_can_speculate_insn (rtx_insn *insn)
return true;
}
}
-\f
+
/* Length in units of the trampoline for entering a nested function. */
int
@@ -20197,7 +20197,7 @@ rs6000_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
}
}
-\f
+
/* Returns TRUE iff the target attribute indicated by ATTR_ID takes a plain
identifier as an argument, so the front end shouldn't look it up. */
@@ -20466,7 +20466,7 @@ rs6000_longcall_ref (rtx call_ref, rtx arg)
return force_reg (Pmode, call_ref);
}
-\f
+
#ifndef TARGET_USE_MS_BITFIELD_LAYOUT
#define TARGET_USE_MS_BITFIELD_LAYOUT 0
#endif
@@ -20514,7 +20514,7 @@ rs6000_ms_bitfield_layout_p (const_tree record_type)
!lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (record_type)))
|| lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (record_type));
}
-\f
+
#ifdef USING_ELFOS_H
/* A get_unnamed_section callback, used for switching to toc_section. */
@@ -20590,7 +20590,7 @@ rs6000_elf_select_rtx_section (machine_mode mode, rtx x,
else
return default_elf_select_rtx_section (mode, x, align);
}
-\f
+
/* For a SYMBOL_REF, set generic flags and then perform some
target-specific processing.
@@ -20677,7 +20677,7 @@ rs6000_elf_in_small_data_p (const_tree decl)
}
#endif /* USING_ELFOS_H */
-\f
+
/* Implement TARGET_USE_BLOCKS_FOR_CONSTANT_P. */
static bool
@@ -20693,7 +20693,7 @@ rs6000_use_blocks_for_decl_p (const_tree decl)
{
return !DECL_THREAD_LOCAL_P (decl);
}
-\f
+
/* Return a REG that occurs in ADDR with coefficient 1.
ADDR can be effectively incremented by incrementing REG.
@@ -20931,7 +20931,7 @@ rs6000_darwin_file_start (void)
darwin_file_start ();
/* Determine the argument to -mcpu=. Default to G3 if not specified. */
-
+
if (rs6000_default_cpu != 0 && rs6000_default_cpu[0] != '\0')
cpu_id = rs6000_default_cpu;
@@ -22211,7 +22211,7 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code,
return false;
}
/* fall through */
-
+
case ASHIFTRT:
case LSHIFTRT:
case ROTATE:
@@ -22783,7 +22783,7 @@ rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p)
for (i = 0, xprev = x1, eprev = e0; i < passes - 2;
++i, xprev = xnext, eprev = enext) {
-
+
/* enext = eprev * eprev */
enext = gen_reg_rtx (mode);
emit_insn (gen_mul (enext, eprev, eprev));
@@ -23050,7 +23050,7 @@ rs6000_emit_parity (rtx dst, rtx src)
vperm 9,10,11,12
- places the desired result in vr9. However, in LE mode the
+ places the desired result in vr9. However, in LE mode the
vector contents will be
vr10 = 00000003 00000002 00000001 00000000
@@ -23267,7 +23267,7 @@ altivec_expand_vec_perm_const (rtx target, rtx op0, rtx op1,
one_vec = true;
break;
}
-
+
/* Look for splat patterns. */
if (one_vec)
{
@@ -23669,7 +23669,7 @@ rs6000_function_value (const_tree valtype,
int n_elts;
/* Special handling for structs in darwin64. */
- if (TARGET_MACHO
+ if (TARGET_MACHO
&& rs6000_darwin64_struct_check_p (TYPE_MODE (valtype), valtype))
{
CUMULATIVE_ARGS valcum;
@@ -24149,7 +24149,7 @@ rs6000_asan_shadow_offset (void)
return (unsigned HOST_WIDE_INT) 1 << (TARGET_64BIT ? 41 : 29);
}
#endif
-\f
+
/* Mask options that we want to support inside of attribute((target)) and
#pragma GCC target operations. Note, we do not include things like
64/32-bit, endianness, hard/soft floating point, etc. that would have
@@ -24481,7 +24481,7 @@ rs6000_debug_target_options (tree args, const char *prefix)
return;
}
-\f
+
/* Hook to validate attribute((target("..."))). */
static bool
@@ -24508,7 +24508,7 @@ rs6000_valid_attribute_p (tree fndecl,
IDENTIFIER_POINTER (tname));
else
fprintf (stderr, "function: unknown\n");
-
+
fprintf (stderr, "args:");
rs6000_debug_target_options (args, " ");
fprintf (stderr, "\n");
@@ -24576,7 +24576,7 @@ rs6000_valid_attribute_p (tree fndecl,
return ret;
}
-\f
+
/* Hook to validate the current #pragma GCC target and set the state, and
update the macros based on what was changed. If ARGS is NULL, then
POP_TARGET is used to reset the options. */
@@ -24662,7 +24662,7 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
return true;
}
-\f
+
/* Remember the last target of rs6000_set_current_function. */
static GTY(()) tree rs6000_previous_fndecl;
@@ -24759,7 +24759,7 @@ rs6000_set_current_function (tree fndecl)
rs6000_previous_fndecl = fndecl;
}
-\f
+
/* Save the current options */
static void
@@ -24777,7 +24777,7 @@ static void
rs6000_function_specific_restore (struct gcc_options *opts,
struct gcc_options */* opts_set */,
struct cl_target_option *ptr)
-
+
{
opts->x_rs6000_isa_flags = ptr->x_rs6000_isa_flags;
opts->x_rs6000_isa_flags_explicit = ptr->x_rs6000_isa_flags_explicit;
@@ -24954,7 +24954,7 @@ rs6000_disable_incompatible_switches (void)
return ignore_masks;
}
-\f
+
/* Helper function for printing the function name when debugging. */
static const char *
@@ -25514,7 +25514,7 @@ rs6000_can_inline_p (tree caller, tree callee)
return ret;
}
-\f
+
/* Allocate a stack temp and fixup the address so it meets the particular
memory requirements (either offetable or REG+REG addressing). */
@@ -25621,7 +25621,7 @@ rs6000_aix_precompute_tls_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
}
#endif
-\f
+
/* Return TRUE iff the sequence ending in LAST sets the static chain. */
static bool
@@ -26170,7 +26170,7 @@ rs6000_pcrel_p ()
&& TARGET_CMODEL == CMODEL_MEDIUM);
}
-\f
+
/* Given an address (ADDR), a mode (MODE), and what the format of the
non-prefixed address (NON_PREFIXED_FORMAT) is, return the instruction format
for the address. */
@@ -26438,7 +26438,7 @@ is_lfs_stfs_insn (rtx_insn *insn)
rtx set = XVECEXP (pattern, 0, 0);
if (GET_CODE (set) != SET)
return false;
-
+
rtx clobber = XVECEXP (pattern, 0, 1);
if (GET_CODE (clobber) != CLOBBER)
return false;
@@ -26541,7 +26541,7 @@ reg_to_non_prefixed (rtx reg, machine_mode mode)
return NON_PREFIXED_D;
}
-\f
+
/* Whether a load instruction is a prefixed instruction. This is called from
the prefixed attribute processing. */
@@ -26756,7 +26756,7 @@ rs6000_adjust_insn_length (rtx_insn *insn, int length)
return length;
}
-\f
+
#ifdef HAVE_GAS_HIDDEN
# define USE_HIDDEN_LINKONCE 1
#else
@@ -26854,7 +26854,7 @@ rs6000_set_up_by_prologue (struct hard_reg_set_container *set)
remove_from_hard_reg_set (&set->set, Pmode, TOC_REGNUM);
}
-\f
+
/* Helper function for rs6000_split_logical to emit a logical instruction after
spliting the operation to single GPR registers.
@@ -27531,7 +27531,7 @@ rs6000_split_multireg_move (rtx dst, rtx src)
emit_insn (restore_basereg);
}
}
-\f
+
/* Return true if the peephole2 can combine a load involving a combination of
an addis instruction and a load with an offset that can be fused together on
a power8. */
@@ -27901,7 +27901,7 @@ emit_fusion_gpr_load (rtx target, rtx mem)
return "";
}
-\f
+
/* This is not inside an #ifdef RS6000_GLIBC_ATOMIC_FENV because gengtype
ignores it then. */
static GTY(()) tree atomic_hold_decl;
@@ -28218,7 +28218,7 @@ rs6000_starting_frame_offset (void)
return 0;
return RS6000_STARTING_FRAME_OFFSET;
}
-\f
+
/* On 64-bit Linux and Freebsd systems, possibly switch the long double library
function names from <foo>l to <foo>f128 if the default long double type is
@@ -28485,7 +28485,7 @@ rs6000_output_addr_vec_elt (FILE *file, int value)
fprintf (file, "\n");
}
-\f
+
/* Copy an integer constant to the vector constant structure. */
static void
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index b4df22b6030..9784623641c 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -625,7 +625,7 @@ extern unsigned char rs6000_recip_bits[];
} \
} \
while (0)
-\f
+
/* Target machine storage layout. */
/* Define this if most significant bit is lowest numbered
@@ -761,7 +761,7 @@ enum data_align { align_abi, align_opt, align_both };
/* Nonzero if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 0
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -1049,7 +1049,7 @@ enum data_align { align_abi, align_opt, align_both };
/* Base register for access to thread local storage variables. */
#define TLS_REGNUM ((TARGET_64BIT) ? 13 : 2)
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -1458,7 +1458,7 @@ enum rs6000_pltseq_enum {
&& TARGET_ALTIVEC && TARGET_ALTIVEC_ABI) \
|| (IN_RANGE ((N), FP_ARG_MIN_REG, FP_ARG_MAX_REG) \
&& TARGET_HARD_FLOAT))
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -1546,11 +1546,11 @@ typedef struct rs6000_args
&& TARGET_AIX \
&& (REGNO) == 2))
-\f
+
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE rs6000_trampoline_size ()
-\f
+
/* Definitions for __builtin_return_address and __builtin_frame_address.
__builtin_return_address (0) should give link register (LR_REGNO), enable
this. */
@@ -1573,7 +1573,7 @@ typedef struct rs6000_args
#define RETURN_ADDR_RTX(COUNT, FRAME) \
(rs6000_return_addr (COUNT, FRAME))
-\f
+
/* Definitions for register eliminations.
We have two registers that can be eliminated on the RS/6000. First, the
@@ -1602,7 +1602,7 @@ typedef struct rs6000_args
its replacement, at the start of a routine. */
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = rs6000_initial_elimination_offset(FROM, TO))
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_PRE_DECREMENT 1
@@ -1651,7 +1651,7 @@ typedef struct rs6000_args
((!(STRICT) && !HARD_REGISTER_P (X)) \
|| REGNO_OK_FOR_BASE_P (REGNO (X)))
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
@@ -1672,9 +1672,9 @@ typedef struct rs6000_args
((((unsigned HOST_WIDE_INT) (n)) & GET_MODE_MASK (mode)) == \
((((unsigned HOST_WIDE_INT)GET_MODE_MASK (mode)) + 1) >> 1))
-\f
+
#define FIND_BASE_TERM rs6000_find_base_term
-\f
+
/* The register number of the register used to address a table of
static data addresses in memory. In some cases this register is
defined by a processor's "application binary interface" (ABI).
@@ -1706,7 +1706,7 @@ typedef struct rs6000_args
generating position independent code. */
/* #define LEGITIMATE_PIC_OPERAND_P (X) */
-\f
+
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
@@ -1744,7 +1744,7 @@ typedef struct rs6000_args
/* Define if loading short immediate values into registers sign extends. */
#define SHORT_IMMEDIATES_SIGN_EXTEND 1
-\f
+
/* The cntlzw and cntlzd instructions return 32 and 64 for input of zero. */
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
((VALUE) = GET_MODE_BITSIZE (MODE), 2)
@@ -1821,7 +1821,7 @@ extern scalar_int_mode rs6000_pmode;
/* Given a condition code and a mode, return the inverse condition. */
#define REVERSE_CONDITION(CODE, MODE) rs6000_reverse_condition (MODE, CODE)
-\f
+
/* Target cpu costs. */
struct processor_costs {
@@ -1844,7 +1844,7 @@ struct processor_costs {
};
extern const struct processor_costs *rs6000_cost;
-\f
+
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
diff --git a/gcc/config/rs6000/si2vmx.h b/gcc/config/rs6000/si2vmx.h
index 7cffd9ebf40..983e01ed404 100644
--- a/gcc/config/rs6000/si2vmx.h
+++ b/gcc/config/rs6000/si2vmx.h
@@ -3,7 +3,7 @@
This file is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 3 of the License, or (at your option)
+ Software Foundation; either version 3 of the License, or (at your option)
any later version.
This file is distributed in the hope that it will be useful, but WITHOUT
@@ -30,7 +30,7 @@
/* Specify a default halt action for spu_hcmpeq and spu_hcmpgt intrinsics.
- * Users can override the action by defining it prior to including this
+ * Users can override the action by defining it prior to including this
* header file.
*/
#ifndef SPU_HALT_ACTION
@@ -38,7 +38,7 @@
#endif
/* Specify a default stop action for the spu_stop intrinsic.
- * Users can override the action by defining it prior to including this
+ * Users can override the action by defining it prior to including this
* header file.
*/
#ifndef SPU_STOP_ACTION
@@ -47,7 +47,7 @@
/* Specify a default action for unsupported intrinsic.
- * Users can override the action by defining it prior to including this
+ * Users can override the action by defining it prior to including this
* header file.
*/
#ifndef SPU_UNSUPPORTED_ACTION
@@ -55,7 +55,7 @@
#endif
-/* Casting intrinsics - from scalar to quadword
+/* Casting intrinsics - from scalar to quadword
*/
static __inline qword si_from_uchar(unsigned char c) {
@@ -274,7 +274,7 @@ static __inline qword si_absdb(qword a, qword b)
return ((qword)(dc));
}
-/* Add intrinsics
+/* Add intrinsics
*/
#define si_a(_a, _b) ((qword)(vec_add((vec_uint4)(_a), (vec_uint4)(_b))))
@@ -282,14 +282,14 @@ static __inline qword si_absdb(qword a, qword b)
static __inline qword si_ai(qword a, int b)
{
- return ((qword)(vec_add((vec_int4)(a),
+ return ((qword)(vec_add((vec_int4)(a),
vec_splat((vec_int4)(si_from_int(b)), 0))));
}
static __inline qword si_ahi(qword a, short b)
{
- return ((qword)(vec_add((vec_short8)(a),
+ return ((qword)(vec_add((vec_short8)(a),
vec_splat((vec_short8)(si_from_short(b)), 1))));
}
@@ -325,13 +325,13 @@ static __inline qword si_dfa(qword a, qword b)
static __inline qword si_andbi(qword a, signed char b)
{
- return ((qword)(vec_and((vec_char16)(a),
+ return ((qword)(vec_and((vec_char16)(a),
vec_splat((vec_char16)(si_from_char(b)), 3))));
}
static __inline qword si_andhi(qword a, signed short b)
{
- return ((qword)(vec_and((vec_short8)(a),
+ return ((qword)(vec_and((vec_short8)(a),
vec_splat((vec_short8)(si_from_short(b)), 1))));
}
@@ -373,8 +373,8 @@ static __inline qword si_andi(qword a, signed int b)
static __inline qword si_fcmeq(qword a, qword b)
{
vec_float4 msb = (vec_float4)((vec_uint4){0x80000000, 0x80000000, 0x80000000, 0x80000000});
-
- return ((qword)(vec_cmpeq(vec_andc((vec_float4)(a), msb),
+
+ return ((qword)(vec_cmpeq(vec_andc((vec_float4)(a), msb),
vec_andc((vec_float4)(b), msb))));
}
@@ -408,11 +408,11 @@ static __inline qword si_dfcmeq(qword a, qword b)
biteq = (vec_uint4) vec_cmpeq((vec_uint4)aabs,(vec_uint4)babs);
biteq = vec_and(biteq,(vec_uint4)vec_slo((vec_uchar16)biteq,x.v));
- /*
+ /*
B) Check if a is NaN, store in high word
-
+
B1) If the high word is greater than max_exp (indicates a NaN)
- B2) If the low word is greater than 0
+ B2) If the low word is greater than 0
*/
a_gt = (vec_uint4)vec_cmpgt(aabs,nan_mask);
@@ -435,7 +435,7 @@ static __inline qword si_dfcmeq(qword a, qword b)
static __inline qword si_fcmgt(qword a, qword b)
{
vec_float4 msb = (vec_float4)((vec_uint4){0x80000000, 0x80000000, 0x80000000, 0x80000000});
-
+
return ((qword)(vec_cmpgt(vec_andc((vec_float4)(a), msb),
vec_andc((vec_float4)(b), msb))));
}
@@ -454,7 +454,7 @@ static __inline qword si_dfcmgt(qword a, qword b)
/* Shift 4 bytes */
x.i[3] = 4 << 3;
- // absolute value of a,b
+ // absolute value of a,b
vec_uint4 aabs = vec_and((vec_uint4)a, sign_mask);
vec_uint4 babs = vec_and((vec_uint4)b, sign_mask);
@@ -470,7 +470,7 @@ static __inline qword si_dfcmgt(qword a, qword b)
b_nan = vec_or(b_nan, vec_and((vec_uint4)vec_slo((vec_uchar16)b_nan,x.v),b_inf));
b_nan = (vec_uint4)vec_perm((vec_uchar16)b_nan, (vec_uchar16)b_nan, splat_hi);
- // A) Check if the exponents are different
+ // A) Check if the exponents are different
vec_uint4 gt_hi = (vec_uint4)vec_cmpgt(aabs,babs);
// B) Check if high word equal, and low word greater
@@ -478,7 +478,7 @@ static __inline qword si_dfcmgt(qword a, qword b)
vec_uint4 eq = (vec_uint4)vec_cmpeq(aabs, babs);
vec_uint4 eqgt = vec_and(eq,vec_slo(gt_lo,x.v));
- // If either A or B is true, return true (unless NaNs detected)
+ // If either A or B is true, return true (unless NaNs detected)
vec_uint4 r = vec_or(gt_hi, eqgt);
// splat the high words of the comparison step
@@ -513,19 +513,19 @@ static __inline qword si_fceq(qword a, qword b)
static __inline qword si_ceqbi(qword a, signed char b)
{
- return ((qword)(vec_cmpeq((vec_char16)(a),
+ return ((qword)(vec_cmpeq((vec_char16)(a),
vec_splat((vec_char16)(si_from_char(b)), 3))));
}
static __inline qword si_ceqhi(qword a, signed short b)
{
- return ((qword)(vec_cmpeq((vec_short8)(a),
+ return ((qword)(vec_cmpeq((vec_short8)(a),
vec_splat((vec_short8)(si_from_short(b)), 1))));
}
static __inline qword si_ceqi(qword a, signed int b)
{
- return ((qword)(vec_cmpeq((vec_int4)(a),
+ return ((qword)(vec_cmpeq((vec_int4)(a),
vec_splat((vec_int4)(si_from_int(b)), 0))));
}
@@ -560,11 +560,11 @@ static __inline qword si_dfceq(qword a, qword b)
aabs = vec_and((vec_uint4)a,sign_mask);
babs = vec_and((vec_uint4)b,sign_mask);
- /*
+ /*
B) Check if a is NaN, store in high word
-
+
B1) If the high word is greater than max_exp (indicates a NaN)
- B2) If the low word is greater than 0
+ B2) If the low word is greater than 0
*/
a_gt = (vec_uint4)vec_cmpgt(aabs,nan_mask);
@@ -583,7 +583,7 @@ static __inline qword si_dfceq(qword a, qword b)
result = vec_andc(result, anan);
/* Promote high words to 64 bits and return */
- return ((qword)(vec_perm((vec_uchar16)result, (vec_uchar16)result, hihi_promote)));
+ return ((qword)(vec_perm((vec_uchar16)result, (vec_uchar16)result, hihi_promote)));
}
@@ -639,7 +639,7 @@ static __inline qword si_dfcgt(qword a, qword b)
/* Shift 4 bytes */
x.i[3] = 4 << 3;
- // absolute value of a,b
+ // absolute value of a,b
vec_uint4 aabs = vec_and((vec_uint4)a, sign_mask);
vec_uint4 babs = vec_and((vec_uint4)b, sign_mask);
@@ -680,7 +680,7 @@ static __inline qword si_dfcgt(qword a, qword b)
// pick the one we want
vec_int4 bval=(vec_int4)vec_sel((vec_uchar16)babs, (vec_uchar16)bneg, (vec_uchar16)bsel);
- // A) Check if the exponents are different
+ // A) Check if the exponents are different
vec_uint4 gt_hi = (vec_uint4)vec_cmpgt(aval,bval);
// B) Check if high word equal, and low word greater
@@ -688,7 +688,7 @@ static __inline qword si_dfcgt(qword a, qword b)
vec_uint4 eq = (vec_uint4)vec_cmpeq(aval, bval);
vec_uint4 eqgt = vec_and(eq,vec_slo(gt_lo,x.v));
- // If either A or B is true, return true (unless NaNs detected)
+ // If either A or B is true, return true (unless NaNs detected)
vec_uint4 r = vec_or(gt_hi, eqgt);
// splat the high words of the comparison step
@@ -700,25 +700,25 @@ static __inline qword si_dfcgt(qword a, qword b)
static __inline qword si_cgtbi(qword a, signed char b)
{
- return ((qword)(vec_cmpgt((vec_char16)(a),
+ return ((qword)(vec_cmpgt((vec_char16)(a),
vec_splat((vec_char16)(si_from_char(b)), 3))));
}
static __inline qword si_cgthi(qword a, signed short b)
{
- return ((qword)(vec_cmpgt((vec_short8)(a),
+ return ((qword)(vec_cmpgt((vec_short8)(a),
vec_splat((vec_short8)(si_from_short(b)), 1))));
}
static __inline qword si_cgti(qword a, signed int b)
{
- return ((qword)(vec_cmpgt((vec_int4)(a),
+ return ((qword)(vec_cmpgt((vec_int4)(a),
vec_splat((vec_int4)(si_from_int(b)), 0))));
}
static __inline qword si_clgtbi(qword a, unsigned char b)
{
- return ((qword)(vec_cmpgt((vec_uchar16)(a),
+ return ((qword)(vec_cmpgt((vec_uchar16)(a),
vec_splat((vec_uchar16)(si_from_uchar(b)), 3))));
}
@@ -730,7 +730,7 @@ static __inline qword si_clgthi(qword a, unsigned short b)
static __inline qword si_clgti(qword a, unsigned int b)
{
- return ((qword)(vec_cmpgt((vec_uint4)(a),
+ return ((qword)(vec_cmpgt((vec_uint4)(a),
vec_splat((vec_uint4)(si_from_uint(b)), 0))));
}
@@ -742,7 +742,7 @@ static __inline qword si_dftsv(qword a, char b)
vec_uint4 sign = (vec_uint4)vec_sra((vec_int4)(a), (vec_uint4)vec_splat(((vec_uint4)si_from_int(31)), 0));
sign = (vec_uint4)vec_perm((vec_uchar16)sign,(vec_uchar16)sign,splat_hi);
vec_uint4 aabs = vec_and((vec_uint4)a,sign_mask);
-
+
union {
vec_uchar16 v;
int i[4];
@@ -750,7 +750,7 @@ static __inline qword si_dftsv(qword a, char b)
/* Shift 4 bytes */
x.i[3] = 4 << 3;
-
+
/* Nan or +inf or -inf */
if (b & 0x70)
{
@@ -761,21 +761,21 @@ static __inline qword si_dftsv(qword a, char b)
{
vec_uint4 a_nan = (vec_uint4)vec_cmpgt(aabs, nan_mask);
a_nan = vec_or(a_nan, vec_and((vec_uint4)vec_slo((vec_uchar16)a_nan,x.v),a_inf));
- a_nan = (vec_uint4)vec_perm((vec_uchar16)a_nan, (vec_uchar16)a_nan, splat_hi);
+ a_nan = (vec_uint4)vec_perm((vec_uchar16)a_nan, (vec_uchar16)a_nan, splat_hi);
result = vec_or(result, a_nan);
}
- /* inf */
+ /* inf */
if (b & 0x30)
{
a_inf = vec_and((vec_uint4)vec_slo((vec_uchar16)a_inf,x.v), a_inf);
- a_inf = (vec_uint4)vec_perm((vec_uchar16)a_inf, (vec_uchar16)a_inf, splat_hi);
+ a_inf = (vec_uint4)vec_perm((vec_uchar16)a_inf, (vec_uchar16)a_inf, splat_hi);
/* +inf */
if (b & 0x20)
result = vec_or(vec_andc(a_inf, sign), result);
/* -inf */
if (b & 0x10)
result = vec_or(vec_and(a_inf, sign), result);
- }
+ }
}
/* 0 or denorm */
if (b & 0xF)
@@ -860,7 +860,7 @@ static __inline qword si_clz(qword a)
cnt = vec_add(cnt, vec_and(tmp1, vec_cmpeq(cnt, eight)));
cnt = vec_add(cnt, vec_and(tmp2, vec_cmpeq(cnt, sixteen)));
cnt = vec_add(cnt, vec_and(tmp3, vec_cmpeq(cnt, twentyfour)));
-
+
return (qword)((vec_sr((vec_uint4)(cnt), (vec_uint4)(twentyfour))));
}
@@ -901,7 +901,7 @@ static __inline qword si_xsbh(qword a)
vec_char16 av;
av = (vec_char16)(a);
- return ((qword)(vec_unpackh(vec_perm(av, av, ((vec_uchar16){1, 3, 5, 7, 9,11,13,15,
+ return ((qword)(vec_unpackh(vec_perm(av, av, ((vec_uchar16){1, 3, 5, 7, 9,11,13,15,
0, 0, 0, 0, 0, 0, 0, 0})))));
}
@@ -910,9 +910,9 @@ static __inline qword si_xshw(qword a)
vec_short8 av;
av = (vec_short8)(a);
- return ((qword)(vec_unpackh(vec_perm(av, av, ((vec_uchar16){2, 3, 6, 7,
+ return ((qword)(vec_unpackh(vec_perm(av, av, ((vec_uchar16){2, 3, 6, 7,
10,11,14,15,
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
0, 0, 0, 0})))));
}
@@ -921,10 +921,10 @@ static __inline qword si_xswd(qword a)
vec_int4 av;
av = (vec_int4)(a);
- return ((qword)(vec_perm(av, vec_sra(av, ((vec_uint4){31,31,31,31})),
- ((vec_uchar16){20, 21, 22, 23,
- 4, 5, 6, 7,
- 28, 29, 30, 31,
+ return ((qword)(vec_perm(av, vec_sra(av, ((vec_uint4){31,31,31,31})),
+ ((vec_uchar16){20, 21, 22, 23,
+ 4, 5, 6, 7,
+ 28, 29, 30, 31,
12, 13, 14, 15}))));
}
@@ -984,7 +984,7 @@ static __inline qword si_gb(qword a)
}
-/* Compare and halt
+/* Compare and halt
*/
static __inline void si_heq(qword a, qword b)
{
@@ -1066,8 +1066,8 @@ static __inline void si_hlgti(qword a, unsigned int b)
*/
static __inline qword si_mpya(qword a, qword b, qword c)
{
- return ((qword)(vec_msum(vec_and((vec_short8)(a),
- ((vec_short8){0, -1, 0, -1, 0, -1, 0, -1})),
+ return ((qword)(vec_msum(vec_and((vec_short8)(a),
+ ((vec_short8){0, -1, 0, -1, 0, -1, 0, -1})),
(vec_short8)(b), (vec_int4)(c))));
}
@@ -1116,7 +1116,7 @@ static __inline qword si_fsmh(qword a)
in = (vec_uchar16)(a);
mask = (vec_short8)(vec_splat(in, 3));
- return ((qword)(vec_sra(vec_sl(mask, ((vec_ushort8){0, 1, 2, 3, 4, 5, 6, 7})),
+ return ((qword)(vec_sra(vec_sl(mask, ((vec_ushort8){0, 1, 2, 3, 4, 5, 6, 7})),
vec_splat_u16(15))));
}
@@ -1155,7 +1155,7 @@ static __inline qword si_mpyhhau(qword a, qword b, qword c)
*/
static __inline qword si_fms(qword a, qword b, qword c)
{
- return ((qword)(vec_madd((vec_float4)(a), (vec_float4)(b),
+ return ((qword)(vec_madd((vec_float4)(a), (vec_float4)(b),
vec_sub(((vec_float4){0.0f}), (vec_float4)(c)))));
}
@@ -1231,13 +1231,13 @@ static __inline qword si_mpyu(qword a, qword b)
static __inline qword si_mpyi(qword a, short b)
{
- return ((qword)(vec_mulo((vec_short8)(a),
+ return ((qword)(vec_mulo((vec_short8)(a),
vec_splat((vec_short8)(si_from_short(b)), 1))));
}
static __inline qword si_mpyui(qword a, unsigned short b)
{
- return ((qword)(vec_mulo((vec_ushort8)(a),
+ return ((qword)(vec_mulo((vec_ushort8)(a),
vec_splat((vec_ushort8)(si_from_ushort(b)), 1))));
}
@@ -1313,19 +1313,19 @@ static __inline qword si_or(qword a, qword b)
static __inline qword si_orbi(qword a, unsigned char b)
{
- return ((qword)(vec_or((vec_uchar16)(a),
+ return ((qword)(vec_or((vec_uchar16)(a),
vec_splat((vec_uchar16)(si_from_uchar(b)), 3))));
}
static __inline qword si_orhi(qword a, unsigned short b)
{
- return ((qword)(vec_or((vec_ushort8)(a),
+ return ((qword)(vec_or((vec_ushort8)(a),
vec_splat((vec_ushort8)(si_from_ushort(b)), 1))));
}
static __inline qword si_ori(qword a, unsigned int b)
{
- return ((qword)(vec_or((vec_uint4)(a),
+ return ((qword)(vec_or((vec_uint4)(a),
vec_splat((vec_uint4)(si_from_uint(b)), 0))));
}
@@ -1384,13 +1384,13 @@ static __inline qword si_rot(qword a, qword b)
static __inline qword si_rothi(qword a, int b)
{
- return ((qword)(vec_rl((vec_ushort8)(a),
+ return ((qword)(vec_rl((vec_ushort8)(a),
vec_splat((vec_ushort8)(si_from_int(b)), 1))));
}
static __inline qword si_roti(qword a, int b)
{
- return ((qword)(vec_rl((vec_uint4)(a),
+ return ((qword)(vec_rl((vec_uint4)(a),
vec_splat((vec_uint4)(si_from_int(b)), 0))));
}
@@ -1526,7 +1526,7 @@ static __inline qword si_rotqbyi(qword a, int count)
vec_uchar16 v;
int i[4];
} left, right;
-
+
count <<= 3;
left.i[3] = count;
right.i[3] = 0 - count;
@@ -1536,7 +1536,7 @@ static __inline qword si_rotqbyi(qword a, int count)
static __inline qword si_rotqby(qword a, qword count)
{
vec_uchar16 left, right;
-
+
left = vec_sl(vec_splat((vec_uchar16)(count), 3), vec_splat_u8(3));
right = vec_sub(vec_splat_u8(0), left);
return ((qword)(vec_or(vec_slo((vec_uchar16)(a), left), vec_sro((vec_uchar16)(a), right))));
@@ -1560,7 +1560,7 @@ static __inline qword si_rotqbii(qword a, int count)
{
vec_uchar16 x, y;
vec_uchar16 result;
-
+
x = vec_splat((vec_uchar16)(si_from_int(count & 7)), 3);
y = (vec_uchar16)(vec_sr((vec_uint4)vec_sro((vec_uchar16)(a), ((vec_uchar16)((vec_uint4){0,0,0,120}))),
(vec_uint4)vec_sub(vec_splat_u8(8), x)));
@@ -1572,11 +1572,11 @@ static __inline qword si_rotqbi(qword a, qword count)
{
vec_uchar16 x, y;
vec_uchar16 result;
-
+
x = vec_and(vec_splat((vec_uchar16)(count), 3), vec_splat_u8(7));
y = (vec_uchar16)(vec_sr((vec_uint4)vec_sro((vec_uchar16)(a), ((vec_uchar16)((vec_uint4){0,0,0,120}))),
(vec_uint4)vec_sub(vec_splat_u8(8), x)));
-
+
result = vec_or(vec_sll((qword)(a), x), y);
return ((qword)(result));
}
@@ -1652,10 +1652,10 @@ static __inline qword si_shufb(qword a, qword b, qword pattern)
{
vec_uchar16 pat;
- pat = vec_sel(((vec_uchar16){0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15}),
+ pat = vec_sel(((vec_uchar16){0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15}),
vec_sr((vec_uchar16)(pattern), vec_splat_u8(3)),
vec_sra((vec_uchar16)(pattern), vec_splat_u8(7)));
- return ((qword)(vec_perm(vec_perm(a, b, pattern),
+ return ((qword)(vec_perm(vec_perm(a, b, pattern),
((vec_uchar16){0, 0, 0, 0, 0, 0, 0, 0,
0xFF, 0xFF, 0xFF, 0xFF, 0x80, 0x80, 0x80, 0x80}),
pat)));
@@ -1831,7 +1831,7 @@ static __inline qword si_sumb(qword a, qword b)
{
vec_uint4 zero = (vec_uint4){0};
vec_ushort8 sum_a, sum_b;
-
+
sum_a = (vec_ushort8)vec_sum4s((vec_uchar16)(a), zero);
sum_b = (vec_ushort8)vec_sum4s((vec_uchar16)(b), zero);
@@ -1848,19 +1848,19 @@ static __inline qword si_xor(qword a, qword b)
static __inline qword si_xorbi(qword a, unsigned char b)
{
- return ((qword)(vec_xor((vec_uchar16)(a),
+ return ((qword)(vec_xor((vec_uchar16)(a),
vec_splat((vec_uchar16)(si_from_uchar(b)), 3))));
}
static __inline qword si_xorhi(qword a, unsigned short b)
{
- return ((qword)(vec_xor((vec_ushort8)(a),
+ return ((qword)(vec_xor((vec_ushort8)(a),
vec_splat((vec_ushort8)(si_from_ushort(b)), 1))));
}
static __inline qword si_xori(qword a, unsigned int b)
{
- return ((qword)(vec_xor((vec_uint4)(a),
+ return ((qword)(vec_xor((vec_uint4)(a),
vec_splat((vec_uint4)(si_from_uint(b)), 0))));
}
@@ -2038,7 +2038,7 @@ static __inline void si_stqr(qword a, unsigned int imm)
static __inline void si_stqx(qword a, qword b, qword c)
{
- vec_st((vec_uchar16)(a),
+ vec_st((vec_uchar16)(a),
si_to_uint((qword)(vec_add((vec_uint4)(b), (vec_uint4)(c)))),
(vector unsigned char *)(0));
}
diff --git a/gcc/config/rs6000/spu2vmx.h b/gcc/config/rs6000/spu2vmx.h
index 74d14ea2d15..3b6b4c3c318 100644
--- a/gcc/config/rs6000/spu2vmx.h
+++ b/gcc/config/rs6000/spu2vmx.h
@@ -3,7 +3,7 @@
This file is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 3 of the License, or (at your option)
+ Software Foundation; either version 3 of the License, or (at your option)
any later version.
This file is distributed in the hope that it will be useful, but WITHOUT
@@ -202,7 +202,7 @@ static __inline vec_int4 spu_and(vec_int4 a, signed int b)
* =======
*/
#define spu_avg(_a, _b) vec_avg(_a, _b)
-
+
/* spu_bisled
* spu_bisled_d
@@ -1070,12 +1070,12 @@ static __inline vec_float4 spu_nand(vec_float4 a, vec_float4 b)
static __inline vec_ullong2 spu_nand(vec_ullong2 a, vec_ullong2 b)
{
- return ((vec_ullong2)(si_nand((qword)(a), (qword)(b))));
+ return ((vec_ullong2)(si_nand((qword)(a), (qword)(b))));
}
static __inline vec_llong2 spu_nand(vec_llong2 a, vec_llong2 b)
{
- return ((vec_llong2)(si_nand((qword)(a), (qword)(b))));
+ return ((vec_llong2)(si_nand((qword)(a), (qword)(b))));
}
static __inline vec_double2 spu_nand(vec_double2 a, vec_double2 b)
@@ -1653,7 +1653,7 @@ static __inline vec_double2 spu_rlmaskqwbytebc(vec_double2 a, int count)
static __inline vec_uchar16 spu_rlqwbyte(vec_uchar16 a, int count)
{
return ((vec_uchar16)(si_rotqby((qword)(a), si_from_int(count))));
-}
+}
static __inline vec_char16 spu_rlqwbyte(vec_char16 a, int count)
{
@@ -1663,7 +1663,7 @@ static __inline vec_char16 spu_rlqwbyte(vec_char16 a, int count)
static __inline vec_ushort8 spu_rlqwbyte(vec_ushort8 a, int count)
{
return ((vec_ushort8)(si_rotqby((qword)(a), si_from_int(count))));
-}
+}
static __inline vec_short8 spu_rlqwbyte(vec_short8 a, int count)
{
@@ -2304,7 +2304,7 @@ static __inline vec_int4 spu_subx(vec_int4 a, vec_int4 b, vec_int4 c)
static __inline vec_ushort8 spu_sumb(vec_uchar16 a, vec_uchar16 b)
{
return ((vec_ushort8)(si_sumb((qword)(a), (qword)(b))));
-}
+}
/* spu_sync
diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index c8b7eb63317..15680f9b7d9 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -513,7 +513,7 @@ extern int fixuplabelno;
assemble_name (FILE, NAME)
/* This is the end of what might become sysv4dbx.h. */
-\f
+
#define TARGET_OS_SYSV_CPP_BUILTINS() \
do \
{ \
diff --git a/gcc/config/rs6000/vec_types.h b/gcc/config/rs6000/vec_types.h
index 520e3327231..ef429ef4dcc 100644
--- a/gcc/config/rs6000/vec_types.h
+++ b/gcc/config/rs6000/vec_types.h
@@ -3,7 +3,7 @@
This file is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 3 of the License, or (at your option)
+ Software Foundation; either version 3 of the License, or (at your option)
any later version.
This file is distributed in the hope that it will be useful, but WITHOUT
@@ -20,7 +20,7 @@
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-/* Single token vector data types for the PowerPC SIMD/Vector Multi-media
+/* Single token vector data types for the PowerPC SIMD/Vector Multi-media
eXtension */
#ifndef _VEC_TYPES_H_
diff --git a/gcc/config/rs6000/xcoff.h b/gcc/config/rs6000/xcoff.h
index cd0f99cb9c6..496b99ab8cb 100644
--- a/gcc/config/rs6000/xcoff.h
+++ b/gcc/config/rs6000/xcoff.h
@@ -28,11 +28,11 @@
#define OBJECT_FORMAT_COFF
/* Define the magic numbers that we recognize as COFF.
-
+
AIX 4.3 adds U803XTOCMAGIC (0757) for 64-bit objects and AIX V5 adds
U64_TOCMAGIC (0767), but collect2.cc does not include files in the
correct order to conditionally define the symbolic name in this macro.
-
+
The AIX linker accepts import/export files as object files,
so accept "#!" (0x2321) magic number. */
#define MY_ISCOFF(magic) \
@@ -233,7 +233,7 @@
/* This is how we tell the assembler that two symbols have the same value. */
#define SET_ASM_OP "\t.set "
-/* This is how we tell the assembler to equate two values.
+/* This is how we tell the assembler to equate two values.
The semantic of AIX assembler's .set do not correspond to middle-end expectations.
We output aliases as alternative symbols in the front of the definition
via DECLARE_FUNCTION_NAME and DECLARE_OBJECT_NAME.
diff --git a/gcc/config/rtems.h b/gcc/config/rtems.h
index 8641ea15271..bef97305319 100644
--- a/gcc/config/rtems.h
+++ b/gcc/config/rtems.h
@@ -1,4 +1,4 @@
-/* Configuration common to all targets running RTEMS.
+/* Configuration common to all targets running RTEMS.
Copyright (C) 2000-2023 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/rx/rx.cc b/gcc/config/rx/rx.cc
index 412a3a354b0..fcb546e37f8 100644
--- a/gcc/config/rx/rx.cc
+++ b/gcc/config/rx/rx.cc
@@ -58,7 +58,7 @@
static unsigned int rx_gp_base_regnum_val = INVALID_REGNUM;
static unsigned int rx_pid_base_regnum_val = INVALID_REGNUM;
static unsigned int rx_num_interrupt_regs;
-\f
+
static unsigned int
rx_gp_base_regnum (void)
{
@@ -101,7 +101,7 @@ static void rx_print_operand (FILE *, rtx, int);
static unsigned int flags_from_mode (machine_mode mode);
static unsigned int flags_from_code (enum rtx_code code);
-\f
+
/* Return true if OP is a reference to an object in a PID data area. */
enum pid_type
@@ -156,7 +156,7 @@ rx_legitimize_address (rtx x,
if (GET_CODE (x) == PLUS
&& GET_CODE (XEXP (x, 0)) == PLUS
- && REG_P (XEXP (XEXP (x, 0), 0))
+ && REG_P (XEXP (XEXP (x, 0), 0))
&& REG_P (XEXP (x, 1)))
return force_reg (SImode, x);
@@ -231,7 +231,7 @@ rx_is_legitimate_address (machine_mode mode, rtx x,
switch (GET_MODE_SIZE (mode))
{
- default:
+ default:
case 4: factor = 4; break;
case 2: factor = 2; break;
case 1: factor = 1; break;
@@ -298,7 +298,7 @@ rx_is_restricted_memory_address (rtx mem, machine_mode mode)
case PLUS:
{
rtx base, index;
-
+
/* Only allow REG+INT addressing. */
base = XEXP (mem, 0);
index = XEXP (mem, 1);
@@ -381,7 +381,7 @@ rx_mode_dependent_address_p (const_rtx addr, addr_space_t as ATTRIBUTE_UNUSED)
return true;
}
}
-\f
+
/* A C compound statement to output to stdio stream FILE the
assembler syntax for an instruction operand that is a memory
reference whose address is ADDR. */
@@ -687,7 +687,7 @@ rx_print_operand (FILE * file, rtx op, int letter)
fprintf (file, "#");
/* Trickery to avoid problems with shifting 32 bits at a time. */
v = v >> 16;
- v = v >> 16;
+ v = v >> 16;
rx_print_integer (file, v);
break;
}
@@ -1001,14 +1001,14 @@ rx_gen_move_template (rtx * operands, bool is_movu)
{
gcc_assert (GET_MODE (src) != DImode);
gcc_assert (GET_MODE (src) != DFmode);
-
+
src_template = "(%A1 - __pid_base)[%P1]";
}
else if (MEM_P (src) && rx_small_data_operand (XEXP (src, 0)))
{
gcc_assert (GET_MODE (src) != DImode);
gcc_assert (GET_MODE (src) != DFmode);
-
+
src_template = "%%gp(%A1)[%G1]";
}
else
@@ -1018,7 +1018,7 @@ rx_gen_move_template (rtx * operands, bool is_movu)
{
gcc_assert (GET_MODE (dest) != DImode);
gcc_assert (GET_MODE (dest) != DFmode);
-
+
dst_template = "%%gp(%A0)[%G0]";
}
else
@@ -1038,7 +1038,7 @@ rx_gen_move_template (rtx * operands, bool is_movu)
extension, src_template, dst_template);
return out_template;
}
-\f
+
/* Return VALUE rounded up to the next ALIGNMENT boundary. */
static inline unsigned int
@@ -1150,7 +1150,7 @@ rx_function_value (const_tree ret_type,
&& ! VECTOR_MODE_P (mode)
)
return gen_rtx_REG (SImode, FUNC_RETURN_REGNUM);
-
+
return gen_rtx_REG (mode, FUNC_RETURN_REGNUM);
}
@@ -1240,7 +1240,7 @@ is_naked_func (const_tree decl)
{
return has_func_attr (decl, "naked");
}
-\f
+
static bool use_fixed_regs = false;
static void
@@ -1278,7 +1278,7 @@ rx_conditional_register_usage (void)
/* This is for fast interrupt handlers. Any register in
the range r10 to r13 (inclusive) that is currently
- marked as fixed is now a viable, call-used register. */
+ marked as fixed is now a viable, call-used register. */
for (r = 10; r <= 13; r++)
if (fixed_regs[r])
{
@@ -1362,7 +1362,7 @@ rx_set_current_function (tree fndecl)
current_is_fast_interrupt
= fndecl ? is_fast_interrupt_func (fndecl) : false;
-
+
if (prev_was_fast_interrupt != current_is_fast_interrupt)
{
use_fixed_regs = current_is_fast_interrupt;
@@ -1389,7 +1389,7 @@ rx_set_current_function (tree fndecl)
rx_previous_fndecl = fndecl;
}
-\f
+
/* Typical stack layout should looks like this after the function's prologue:
| |
@@ -1789,7 +1789,7 @@ rx_expand_prologue (void)
break;
}
}
-
+
/* We have assumed that there are at least two registers pushed... */
gcc_assert (acc_high != 0);
@@ -1939,7 +1939,7 @@ rx_emit_stack_popm (rtx * operands, bool is_popm)
gcc_assert (CONST_INT_P (operands[0]));
stack_adjust = INTVAL (operands[0]);
-
+
gcc_assert (GET_CODE (operands[1]) == PARALLEL);
last_reg = XVECLEN (operands[1], 0) - (is_popm ? 2 : 3);
@@ -1987,13 +1987,13 @@ gen_rx_rtsd_vector (unsigned int adjust, unsigned int low, unsigned int high)
return vector;
}
-
+
/* Generate a PARALLEL which will satisfy the rx_load_multiple_vector predicate. */
static rtx
gen_rx_popm_vector (unsigned int low, unsigned int high)
{
- unsigned int i;
+ unsigned int i;
unsigned int count = (high - low) + 2;
rtx vector;
@@ -2350,7 +2350,7 @@ rx_select_section (tree decl,
return default_elf_select_section (decl, reloc, align);
}
-\f
+
enum rx_builtin
{
RX_BUILTIN_BRK,
@@ -2669,7 +2669,7 @@ rx_expand_builtin (tree exp,
return NULL_RTX;
}
-\f
+
/* Place an element into a constructor or destructor section.
Like default_ctor_section_asm_out_constructor in varasm.cc
except that it uses .init_array (or .fini_array) and it
@@ -2710,7 +2710,7 @@ rx_elf_asm_destructor (rtx symbol, int priority)
{
rx_elf_asm_cdtor (symbol, priority, /* is_ctor= */false);
}
-\f
+
/* Check "fast_interrupt", "interrupt" and "naked" attributes. */
static tree
@@ -2865,7 +2865,7 @@ rx_option_override (void)
}
}
-\f
+
static bool
rx_allocate_stack_slots_for_args (void)
{
@@ -2878,7 +2878,7 @@ rx_func_attr_inlinable (const_tree decl)
{
return ! is_fast_interrupt_func (decl)
&& ! is_interrupt_func (decl)
- && ! is_naked_func (decl);
+ && ! is_naked_func (decl);
}
static bool
@@ -2925,7 +2925,7 @@ rx_is_ms_bitfield_layout (const_tree record_type ATTRIBUTE_UNUSED)
/* The packed attribute overrides the MS behavior. */
return ! TYPE_PACKED (record_type);
}
-\f
+
/* Returns true if X a legitimate constant for an immediate
operand on the RX. X is already known to satisfy CONSTANT_P. */
@@ -2962,7 +2962,7 @@ rx_is_legitimate_constant (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
gcc_unreachable ();
}
break;
-
+
case LABEL_REF:
case SYMBOL_REF:
return true;
@@ -3002,7 +3002,7 @@ rx_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED,
&& ((INTVAL (b) > 128) || INTVAL (b) < -127))
/* Try to discourage REG + <large OFF> when optimizing for size. */
return COSTS_N_INSNS (2);
-
+
return COSTS_N_INSNS (1);
}
@@ -3072,7 +3072,7 @@ rx_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
return to == FRAME_POINTER_REGNUM
|| ( to == STACK_POINTER_REGNUM && ! frame_pointer_needed);
}
-\f
+
static void
rx_trampoline_template (FILE * file)
@@ -3155,7 +3155,7 @@ rx_trampoline_init (rtx tramp, tree fndecl, rtx chain)
emit_move_insn (adjust_address (tramp, SImode, 6 + 2), fnaddr);
}
}
-\f
+
static int
rx_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t regclass ATTRIBUTE_UNUSED,
@@ -3315,7 +3315,7 @@ rx_match_ccmode (rtx insn, machine_mode cc_mode)
return true;
}
-\f
+
static int
rx_max_skip_for_label (rtx_insn *lab)
@@ -3422,7 +3422,7 @@ rx_adjust_insn_length (rtx_insn *insn, int current_length)
zero = false;
factor = 2;
break;
-
+
case CODE_FOR_plussi3_zero_extendqi:
case CODE_FOR_andsi3_zero_extendqi:
case CODE_FOR_iorsi3_zero_extendqi:
@@ -3437,7 +3437,7 @@ rx_adjust_insn_length (rtx_insn *insn, int current_length)
zero = true;
factor = 1;
break;
-
+
case CODE_FOR_plussi3_sign_extendqi:
case CODE_FOR_andsi3_sign_extendqi:
case CODE_FOR_iorsi3_sign_extendqi:
@@ -3452,7 +3452,7 @@ rx_adjust_insn_length (rtx_insn *insn, int current_length)
zero = false;
factor = 1;
break;
- }
+ }
/* We are expecting: (SET (REG) (<OP> (REG) (<EXTEND> (MEM)))). */
extend = single_set (insn);
@@ -3467,7 +3467,7 @@ rx_adjust_insn_length (rtx_insn *insn, int current_length)
gcc_assert ((zero && (GET_CODE (extend) == ZERO_EXTEND))
|| (! zero && (GET_CODE (extend) == SIGN_EXTEND)));
-
+
mem = XEXP (extend, 0);
gcc_checking_assert (MEM_P (mem));
if (REG_P (XEXP (mem, 0)))
@@ -3648,7 +3648,7 @@ rx_modes_tieable_p (machine_mode mode1, machine_mode mode2)
== (GET_MODE_CLASS (mode2) == MODE_FLOAT
|| GET_MODE_CLASS (mode2) == MODE_COMPLEX_FLOAT));
}
-\f
+
#undef TARGET_NARROW_VOLATILE_BITFIELD
#define TARGET_NARROW_VOLATILE_BITFIELD rx_narrow_volatile_bitfield
diff --git a/gcc/config/rx/rx.h b/gcc/config/rx/rx.h
index 77f84039cb1..2a8fe7722c5 100644
--- a/gcc/config/rx/rx.h
+++ b/gcc/config/rx/rx.h
@@ -17,7 +17,7 @@
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -120,7 +120,7 @@
#undef LINK_SPEC
#define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
-\f
+
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
@@ -179,7 +179,7 @@
#define STORE_FLAG_VALUE 1
#define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
#define SHORT_IMMEDIATES_SIGN_EXTEND 1
-\f
+
enum reg_class
{
NO_REGS, /* No registers in set. */
@@ -301,7 +301,7 @@ enum reg_class
( (REG_P (X) \
|| (GET_CODE (X) == SUBREG \
&& REG_P (SUBREG_REG (X))))))
-\f
+
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
((COUNT) == 0 \
@@ -317,16 +317,16 @@ typedef unsigned int CUMULATIVE_ARGS;
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
(CUM) = 0
-\f
+
#define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
#define TRAMPOLINE_ALIGNMENT 32
-\f
+
#define NO_PROFILE_COUNTERS 1
#define PROFILE_BEFORE_PROLOGUE 1
#define FUNCTION_PROFILER(FILE, LABELNO) \
fprintf (FILE, "\tbsr\t__mcount\n");
-\f
+
#define REGISTER_NAMES \
{ \
@@ -613,13 +613,13 @@ typedef unsigned int CUMULATIVE_ARGS;
/* For PIC put jump tables into the text section so that the offsets that
they contain are always computed between two same-section symbols. */
#define JUMP_TABLES_IN_TEXT_SECTION (TARGET_PID || flag_pic)
-\f
+
/* This is a version of REG_P that also returns TRUE for SUBREGs. */
#define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
/* Like REG_P except that this macro is true for SET expressions. */
#define SET_P(rtl) (GET_CODE (rtl) == SET)
-\f
+
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
@@ -627,7 +627,7 @@ typedef unsigned int CUMULATIVE_ARGS;
#define INCOMING_FRAME_SP_OFFSET 4
#define ARG_POINTER_CFA_OFFSET(FNDECL) 4
-\f
+
#define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
/* This macro is used to decide when RX FPU instructions can be used. */
diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 42177c204f6..d0577d71261 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -4072,7 +4072,7 @@ tls_symbolic_operand (rtx op)
return 0;
return SYMBOL_REF_TLS_MODEL (op);
}
-\f
+
/* Split DImode access register reference REG (on 64-bit) into its constituent
low and high parts, and store them into LO and HI. Note that gen_lowpart/
gen_highpart cannot be used as they assume all registers are word-sized,
diff --git a/gcc/config/sh/elf.h b/gcc/config/sh/elf.h
index 8530c15192f..323d3a94f3c 100644
--- a/gcc/config/sh/elf.h
+++ b/gcc/config/sh/elf.h
@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see
#undef WCHAR_TYPE
#define WCHAR_TYPE SH_ELF_WCHAR_TYPE
-
+
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32
diff --git a/gcc/config/sh/embed-elf.h b/gcc/config/sh/embed-elf.h
index 21e51dd0bb9..fa0cf34b810 100644
--- a/gcc/config/sh/embed-elf.h
+++ b/gcc/config/sh/embed-elf.h
@@ -1,4 +1,4 @@
-/* Definitions of target machine for GNU compiler for Renesas / SuperH SH
+/* Definitions of target machine for GNU compiler for Renesas / SuperH SH
non-Linux embedded targets.
Copyright (C) 2002-2022 Free Software Foundation, Inc.
Contributed by J"orn Rennecke <joern.rennecke@superh.com>
diff --git a/gcc/config/sh/netbsd-elf.h b/gcc/config/sh/netbsd-elf.h
index f18e6b08f0c..8e6542d337d 100644
--- a/gcc/config/sh/netbsd-elf.h
+++ b/gcc/config/sh/netbsd-elf.h
@@ -62,7 +62,7 @@ along with GCC; see the file COPYING3. If not see
/* Define because we use the label and we do not need them. */
#define NO_PROFILE_COUNTERS 1
-
+
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(STREAM,LABELNO) \
do \
diff --git a/gcc/config/sh/sh.cc b/gcc/config/sh/sh.cc
index 1aec70a23d8..3718b99ea6e 100644
--- a/gcc/config/sh/sh.cc
+++ b/gcc/config/sh/sh.cc
@@ -327,7 +327,7 @@ static unsigned int sh_hard_regno_nregs (unsigned int, machine_mode);
static bool sh_hard_regno_mode_ok (unsigned int, machine_mode);
static bool sh_modes_tieable_p (machine_mode, machine_mode);
static bool sh_can_change_mode_class (machine_mode, machine_mode, reg_class_t);
-\f
+
static const struct attribute_spec sh_attribute_table[] =
{
/* { name, min_len, max_len, decl_req, type_req, fn_type_req,
@@ -350,7 +350,7 @@ static const struct attribute_spec sh_attribute_table[] =
sh2a_handle_function_vector_handler_attribute, NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE sh_attribute_table
@@ -376,7 +376,7 @@ static const struct attribute_spec sh_attribute_table[] =
#define TARGET_PRINT_OPERAND_PUNCT_VALID_P sh_print_operand_punct_valid_p
#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA sh_asm_output_addr_const_extra
-
+
#undef TARGET_ASM_FUNCTION_EPILOGUE
#define TARGET_ASM_FUNCTION_EPILOGUE sh_output_function_epilogue
@@ -665,7 +665,7 @@ static const struct attribute_spec sh_attribute_table[] =
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Information on the currently selected atomic model.
This is initialized in sh_option_override. */
@@ -810,7 +810,7 @@ register_sh_passes (void)
PASS_POS_INSERT_BEFORE, "sched2", 1);
}
-/* Implement TARGET_OPTION_OVERRIDE macro. Validate and override
+/* Implement TARGET_OPTION_OVERRIDE macro. Validate and override
various options, and do some machine dependent initialization. */
static void
sh_option_override (void)
@@ -1008,7 +1008,7 @@ sh_override_options_after_change (void)
fetched as a pair from a longword boundary. For size use 16 bit
alignment to get more compact code.
Aligning all jumps increases the code size, even if it might
- result in slightly faster code. Thus, it is set to the smallest
+ result in slightly faster code. Thus, it is set to the smallest
alignment possible if not specified by the user. */
if (flag_align_loops && !str_align_loops)
str_align_loops = optimize_size ? "2" : "4";
@@ -1044,7 +1044,7 @@ sh_override_options_after_change (void)
}
}
}
-\f
+
/* Print the operand address in x to the stream. */
static void
sh_print_operand_address (FILE *stream, machine_mode /*mode*/, rtx x)
@@ -1560,7 +1560,7 @@ sh_asm_output_addr_const_extra (FILE *file, rtx x)
else
return false;
}
-\f
+
/* Encode symbol attributes of a SYMBOL_REF into its
SYMBOL_REF_FLAGS. */
static void
@@ -2261,7 +2261,7 @@ sh_eval_treg_value (rtx op)
t = 1;
else
return -1;
-
+
return t ^ (cmpval == cmpop);
}
@@ -2468,7 +2468,7 @@ sh_emit_compare_and_set (rtx *operands, machine_mode mode)
else
emit_move_insn (operands[0], get_t_reg_rtx ());
}
-\f
+
/* Functions to output assembly code. */
/* Return a sequence of instructions to perform DI or DF move.
@@ -2539,7 +2539,7 @@ output_movedouble (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
We punt for now, since this is likely very rare. */
gcc_assert (!REG_P (XEXP (inside, 1)));
break;
-
+
case LABEL_REF:
return "mov.l %1,%0" "\n"
" mov.l %1+4,%T0";
@@ -2809,7 +2809,7 @@ output_ieee_ccmpeq (rtx_insn *insn, rtx *operands)
" fcmp/eq %1,%0",
insn, operands);
}
-\f
+
/* Output the start of the assembler file. */
static void
sh_file_start (void)
@@ -2833,7 +2833,7 @@ sh_file_start (void)
if (TARGET_LITTLE_ENDIAN)
fputs ("\t.little\n", asm_out_file);
}
-\f
+
/* Implementation of TARGET_ASM_INTEGER for SH. Pointers to functions
need to be output as pointers to function descriptors for
FDPIC. */
@@ -2851,7 +2851,7 @@ sh_assemble_integer (rtx value, unsigned int size, int aligned_p)
}
return default_assemble_integer (value, size, aligned_p);
}
-\f
+
/* Check if PAT includes UNSPEC_CALLER unspec pattern. */
static bool
unspec_caller_rtx_p (rtx pat)
@@ -2904,7 +2904,7 @@ sh_cannot_copy_insn_p (rtx_insn *insn)
return false;
}
-\f
+
/* Number of instructions used to make an arithmetic right shift by N. */
static const char ashiftrt_insns[] =
{ 0,1,2,3,4,5,8,8,8,8,8,8,8,8,8,8,2,3,4,5,8,8,8,8,8,8,8,8,8,8,8,2};
@@ -3012,7 +3012,7 @@ bool
sh_ashlsi_clobbers_t_reg_p (rtx shift_amount)
{
gcc_assert (CONST_INT_P (shift_amount));
-
+
const int shift_amount_i = INTVAL (shift_amount) & 31;
/* Special case for shift count of 31: use and-rotl sequence. */
@@ -3032,7 +3032,7 @@ sh_lshrsi_clobbers_t_reg_p (rtx shift_amount)
/* For right shifts the constant might be negative. */
const int shift_amount_i = std::abs (INTVAL (shift_amount)) & 31;
-
+
/* Special case for shift count of 31: use shll-movt sequence. */
if (shift_amount_i == 31)
return true;
@@ -3042,7 +3042,7 @@ sh_lshrsi_clobbers_t_reg_p (rtx shift_amount)
}
/* Return true if it is potentially beneficial to use a dynamic shift
- instruction (shad / shar) instead of a combination of 1/2/8/16
+ instruction (shad / shar) instead of a combination of 1/2/8/16
shift instructions for the specified shift count.
If dynamic shifts are not available, always return false. */
bool
@@ -3236,7 +3236,7 @@ sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
/* The lower-subreg pass decides whether to split multi-word regs
into individual regs by looking at the cost for a SET of certain
modes with the following patterns:
- (set (reg) (reg))
+ (set (reg) (reg))
(set (reg) (const_int 0))
On machines that support vector-move operations a multi-word move
is the same cost as individual reg move. On SH there is no
@@ -3329,8 +3329,8 @@ sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
|| GET_MODE (XEXP (x, 0)) == HImode))
{
/* Handle SH2A's movu.b and movu.w insn. */
- *total = sh_address_cost (XEXP (XEXP (x, 0), 0),
- GET_MODE (XEXP (x, 0)),
+ *total = sh_address_cost (XEXP (XEXP (x, 0), 0),
+ GET_MODE (XEXP (x, 0)),
MEM_ADDR_SPACE (XEXP (x, 0)), true);
return true;
}
@@ -3344,7 +3344,7 @@ sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
rtx xx = XVECEXP (x, 0, i);
if (GET_CODE (xx) == SET && MEM_P (XEXP (xx, 0)))
{
- *total = sh_address_cost (XEXP (XEXP (xx, 0), 0),
+ *total = sh_address_cost (XEXP (XEXP (xx, 0), 0),
GET_MODE (XEXP (xx, 0)),
MEM_ADDR_SPACE (XEXP (xx, 0)), true);
return true;
@@ -3571,7 +3571,7 @@ sh_max_mov_insn_displacement (machine_mode mode, bool consider_sh2a)
const int mov_insn_sz = mov_insn_size (mode, consider_sh2a);
const int mode_sz = GET_MODE_SIZE (mode);
int r = 15 * mov_insn_sz * disp_scale;
-
+
/* If the mov insn will be split into multiple loads/stores, the
maximum possible displacement is a bit smaller. */
if (mode_sz > mov_insn_sz)
@@ -3641,7 +3641,7 @@ sh_address_cost (rtx x, machine_mode mode,
return 3;
}
- /* 'reg + reg' addressing. Account a slightly higher cost because of
+ /* 'reg + reg' addressing. Account a slightly higher cost because of
increased pressure on R0. */
if (GET_CODE (x) == PLUS && ! CONSTANT_P (XEXP (x, 1)))
return 3;
@@ -5221,7 +5221,7 @@ find_barrier (int num_mova, rtx_insn *mova, rtx_insn *from)
from = PREV_INSN (from);
/* Don't emit a constant table int the middle of global pointer setting,
- since that that would move the addressing base GOT into another table.
+ since that that would move the addressing base GOT into another table.
We need the first mov instruction before the _GLOBAL_OFFSET_TABLE_
in the pool anyway, so just move up the whole constant pool.
@@ -6055,7 +6055,7 @@ sh_reorg (void)
later insn. */
/* ??? We shouldn't have to use FOUNDINSN here.
- This dates back to when we used LOG_LINKS to find
+ This dates back to when we used LOG_LINKS to find
the most recent insn which sets the register. */
if (foundinsn
@@ -6642,7 +6642,7 @@ output_jump_label_table (void)
return "";
}
-\f
+
/* A full frame looks like:
arg-5
@@ -6755,7 +6755,7 @@ output_stack_adjust (int size, rtx reg, int epilogue_p,
if (temp < 0)
{
rtx adj_reg, tmp_reg, mem;
-
+
/* If we reached here, the most likely case is the (sibcall)
epilogue. Put a special push/pop sequence for such case as
the last resort. This looks lengthy but would not be problem
@@ -6766,7 +6766,7 @@ output_stack_adjust (int size, rtx reg, int epilogue_p,
r5 have been reserved as fixed registers or assigned
as global registers, and they change during an
interrupt. There are possible ways to handle this:
-
+
- If we are adjusting the frame pointer (r14), we can do
with a single temp register and an ordinary push / pop
on the stack.
@@ -7264,7 +7264,7 @@ sh_expand_epilogue (bool sibcall_p)
/* For an ISR with RESBANK attribute assigned, don't pop PR
register. */
if (TEST_HARD_REG_BIT (live_regs_mask, PR_REG)
- && !sh_cfun_resbank_handler_p ())
+ && !sh_cfun_resbank_handler_p ())
{
if (!frame_pointer_needed)
emit_insn (gen_blockage ());
@@ -7324,7 +7324,7 @@ sh_expand_epilogue (bool sibcall_p)
fpscr_deferred = true;
/* For an ISR with RESBANK attribute assigned, don't pop
following registers, R0-R14, MACH, MACL and GBR. */
- else if (j != PR_REG && TEST_HARD_REG_BIT (live_regs_mask, j)
+ else if (j != PR_REG && TEST_HARD_REG_BIT (live_regs_mask, j)
&& ! (sh_cfun_resbank_handler_p ()
&& ((j >= FIRST_GENERAL_REG
&& j < LAST_GENERAL_REG)
@@ -8304,7 +8304,7 @@ sh_fix_range (const char *const_str)
str = comma + 1;
}
}
-\f
+
/* Insert any deferred function attributes from earlier pragmas. */
static void
sh_insert_attributes (tree node, tree *attributes)
@@ -8671,7 +8671,7 @@ sh_check_pch_target_flags (int old_flags)
return _("created and used with different endianness");
return NULL;
}
-\f
+
/* Predicates used by the templates. */
/* Returns true if OP is MACL, MACH or PR. The input must be a REG rtx.
@@ -8718,7 +8718,7 @@ tls_symbolic_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED)
return TLS_MODEL_NONE;
return SYMBOL_REF_TLS_MODEL (op);
}
-\f
+
/* Return the destination address of a branch. */
static int
branch_dest (rtx branch)
@@ -8730,7 +8730,7 @@ branch_dest (rtx branch)
return INSN_ADDRESSES (INSN_UID (XEXP (dest, 0)));
}
-\f
+
/* Return nonzero if REG is not used after INSN.
We assume REG is a reload reg, and therefore does
not live past labels. It may live past calls or jumps though. */
@@ -8820,7 +8820,7 @@ reg_unused_after (rtx reg, rtx_insn *insn)
}
return true;
}
-\f
+
static GTY(()) rtx t_reg_rtx;
rtx
@@ -8865,7 +8865,7 @@ emit_fpu_switch (rtx scratch, int index)
emit_insn (gen_lds_fpscr (src));
}
-\f
+
static rtx get_free_reg (HARD_REG_SET);
/* This function returns a register to use to load the address to load
@@ -8999,7 +8999,7 @@ sh_insn_length_adjustment (rtx_insn *insn)
}
return 0;
}
-\f
+
/* Return TRUE for a valid displacement for the REG+disp addressing
with MODE. */
bool
@@ -9075,7 +9075,7 @@ sh_legitimate_address_p (machine_mode mode, rtx x, bool strict)
return false;
}
-\f
+
/* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol
isn't protected by a PIC unspec. */
bool
@@ -9185,7 +9185,7 @@ legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED, rtx reg)
In some cases it is possible that a requested offset might seem unaligned
or inappropriate for the mode size, like offset = 2 and mode size = 4.
This is compensated by adjusting the base address so that the effective
- address of the displacement move insn will be aligned.
+ address of the displacement move insn will be aligned.
This is not the best possible way of rebasing the base address, as it
does not look at other present displacement addressings around it.
@@ -9436,7 +9436,7 @@ mark_constant_pool_use (rtx x)
return lab;
}
-\f
+
/* Return true if it's possible to redirect BRANCH1 to the destination
of an unconditional jump BRANCH2. We only want to do this if the
resulting branch will have a short displacement. */
@@ -10036,7 +10036,7 @@ sh_ms_bitfield_layout_p (const_tree record_type ATTRIBUTE_UNUSED)
{
return TARGET_HITACHI || sh_attr_renesas_p (record_type);
}
-\f
+
/*
On the SH1..SH4, the trampoline looks like
2 0002 D202 mov.l l2,r2
@@ -10156,7 +10156,7 @@ sh_expand_sym_label2reg (rtx reg, rtx sym, rtx lab, bool sibcall_p)
else
emit_insn (gen_symPLT_label2reg (reg, sym, lab));
}
-\f
+
/* Machine specific built-in functions. */
struct builtin_description
@@ -10401,7 +10401,7 @@ sh_vector_mode_supported_p (machine_mode mode ATTRIBUTE_UNUSED)
bool
sh_frame_pointer_required (void)
{
-/* If needed override this in other tm.h files to cope with various OS
+/* If needed override this in other tm.h files to cope with various OS
lossage requiring a frame pointer. */
if (SUBTARGET_FRAME_POINTER_REQUIRED)
return true;
@@ -11375,14 +11375,14 @@ sh_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
<= sh_max_mov_insn_displacement (mode, false))
return R0_REGS;
- /* When reload is trying to address a QImode or HImode subreg on the stack,
+ /* When reload is trying to address a QImode or HImode subreg on the stack,
force any subreg byte into R0_REGS, as this is going to become a
displacement address.
We could restrict this to SUBREG_BYTE (x) > 0, but if the actual reg
is on the stack, the memref to it might already require a displacement
and that has to be added to the final address. At this point we don't
know the cumulative displacement so we assume the worst case. */
- if ((mode == QImode || mode == HImode) && rclass != R0_REGS
+ if ((mode == QImode || mode == HImode) && rclass != R0_REGS
&& GET_CODE (x) == SUBREG && true_regnum (x) == -1)
return R0_REGS;
@@ -11421,7 +11421,7 @@ sh_legitimize_address_displacement (rtx *offset1, rtx *offset2,
*offset2 = adj.mov_disp;
return true;
}
-
+
return false;
}
@@ -11571,7 +11571,7 @@ base_reg_disp::base_reg_disp (rtx br, disp_t d)
: reg_ (br), disp_ (d)
{
}
-
+
inline bool
base_reg_disp::is_reg (void) const
{
@@ -11915,7 +11915,7 @@ sh_is_logical_t_store_expr (rtx op, rtx_insn* insn)
op_is_t_count++;
}
}
-
+
return op_is_t_count == 2;
}
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 3f60e15d79a..145eb927d46 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -39,7 +39,7 @@ extern int code_for_indirect_jump_scratch;
#define SUBTARGET_FRAME_POINTER_REQUIRED 0
#endif
-\f
+
/* Nonzero if this is an ELF target - compile time only */
#define TARGET_ELF 0
@@ -293,7 +293,7 @@ extern int code_for_indirect_jump_scratch;
#else
#define IS_LITTLE_ENDIAN_OPTION "%{!mb:"
#endif
-
+
#if TARGET_CPU_DEFAULT & MASK_HARD_SH2A
#define UNSUPPORTED_SH2A IS_LITTLE_ENDIAN_OPTION \
"%{m2a*|!m1:%{!m2*:%{!m3*:%{!m4*:%eSH2a does not support little-endian}}}}}"
@@ -394,7 +394,7 @@ extern const sh_atomic_model& selected_atomic_model (void);
#define SUBTARGET_OVERRIDE_OPTIONS (void) 0
-\f
+
/* Target machine storage layout. */
#define TARGET_BIG_ENDIAN (!TARGET_LITTLE_ENDIAN)
@@ -516,7 +516,7 @@ extern const sh_atomic_model& selected_atomic_model (void);
: JUMP_P (A_INSN) || CALL_P (A_INSN) \
? 1 \
: CACHE_LOG)
-\f
+
/* Standard register usage. */
/* Register allocation for the Renesas calling convention:
@@ -856,7 +856,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
target hook. */
#define DEFAULT_PCC_STRUCT_RETURN 0
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -1027,7 +1027,7 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS R0_REGS
#define BASE_REG_CLASS GENERAL_REGS
-\f
+
/* Defines for sh.md and constraints.md. */
#define CONST_OK_FOR_I08(VALUE) (((HOST_WIDE_INT)(VALUE))>= -128 \
@@ -1046,7 +1046,7 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
Otherwise we will need at most one register per word. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define the number of registers that can hold parameters.
@@ -1123,7 +1123,7 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
&& (unsigned) (REGNO) >= (unsigned) FIRST_FP_PARM_REG \
&& (unsigned) (REGNO) < (unsigned) (FIRST_FP_PARM_REG \
+ NPARM_REGS (SFmode))))
-\f
+
#ifdef __cplusplus
/* Define a data type for recording info about an argument list
@@ -1263,7 +1263,7 @@ extern bool current_function_interrupt;
value is saved in REG, or a MEM representing a location in
the stack. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, PR_REG)
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT TARGET_SH1
#define HAVE_PRE_DECREMENT TARGET_SH1
@@ -1405,7 +1405,7 @@ extern bool current_function_interrupt;
#define INDEX_REGISTER_RTX_P(X) MAYBE_INDEX_REGISTER_RTX_P(X, false)
#endif
-\f
+
/* A C compound statement that attempts to replace X, which is an address
that needs reloading, with a valid memory address for an operand of
mode MODE. WIN is a C statement label elsewhere in the code. */
@@ -1414,7 +1414,7 @@ extern bool current_function_interrupt;
if (sh_legitimize_reload_address (&(X), (MODE), (OPNUM), (TYPE))) \
goto WIN; \
} while (0)
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE ((! optimize || TARGET_BIGTABLE) ? SImode : HImode)
@@ -1500,7 +1500,7 @@ extern bool current_function_interrupt;
return X << (Y & 31);
else
return X >> (-Y) & 31);
-
+
The dynamic shift library routines in lib1funcs.S do not use the sign bit
like the hardware dynamic shifts and truncate the shift count to 31.
We define SHIFT_COUNT_TRUNCATED to 0 and express the implied shift count
@@ -1546,7 +1546,7 @@ extern bool current_function_interrupt;
&& GET_CODE (PATTERN (X)) != CLOBBER \
&& get_attr_is_sfunc (X)))
-\f
+
/* Position Independent Code. */
/* We can't directly access anything that contains a symbol,
@@ -1560,7 +1560,7 @@ extern bool current_function_interrupt;
#define SYMBOLIC_CONST_P(X) \
((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \
&& nonpic_symbol_mentioned_p (X))
-\f
+
/* Compute extra cost of moving data between one register class
and another. */
@@ -1582,7 +1582,7 @@ extern bool current_function_interrupt;
/* A C expression for the cost of a branch instruction. A value of 1
is the default; other values are interpreted relative to that. */
#define BRANCH_COST(speed_p, predictable_p) sh_branch_cost
-\f
+
/* Assembler output control. */
/* A C string constant describing how to begin a comment in the target
@@ -1726,7 +1726,7 @@ extern bool current_function_interrupt;
else \
asm_fprintf ((STREAM), "\t.word\t%LL%d\n", (VALUE)); \
} while (0)
-\f
+
/* A C statement to be executed just prior to the output of
assembler code for INSN, to modify the extracted operands so
they will be output differently.
@@ -1779,13 +1779,13 @@ extern tree sh_deferred_function_attributes;
extern tree *sh_deferred_function_attributes_tail;
-\f
+
/* Instructions with unfilled delay slots take up an
extra two bytes for the nop in the delay slot.
sh-dsp parallel processing insns are four bytes long. */
#define ADJUST_INSN_LENGTH(X, LENGTH) \
(LENGTH) += sh_insn_length_adjustment (X);
-\f
+
/* Define this macro if it is advisable to hold scalars in registers
in a wider mode than that declared by the program. In such cases,
the value is constrained to be within the bounds of the declared
diff --git a/gcc/config/sh/sh_treg_combine.cc b/gcc/config/sh/sh_treg_combine.cc
index ab7dc5d4985..d436abb06cc 100644
--- a/gcc/config/sh/sh_treg_combine.cc
+++ b/gcc/config/sh/sh_treg_combine.cc
@@ -634,7 +634,7 @@ sh_treg_combine::sh_treg_combine (gcc::context* ctx, bool split_insns,
m_split_insns (split_insns),
m_ccreg (NULL_RTX)
{
- // Overwrite default name in pass_data base class.
+ // Overwrite default name in pass_data base class.
this->name = name;
}
diff --git a/gcc/config/sh/vxworks.h b/gcc/config/sh/vxworks.h
index ae31a63b767..657504aec4f 100644
--- a/gcc/config/sh/vxworks.h
+++ b/gcc/config/sh/vxworks.h
@@ -1,8 +1,8 @@
/* Definitions of target machine for GCC,
- for SuperH with targeting the VXWorks run time environment.
+ for SuperH with targeting the VXWorks run time environment.
Copyright (C) 2003-2022 Free Software Foundation, Inc.
Contributed by CodeSourcery, LLC.
-
+
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
diff --git a/gcc/config/sol2.cc b/gcc/config/sol2.cc
index 78b780a41c0..1d93e04421a 100644
--- a/gcc/config/sol2.cc
+++ b/gcc/config/sol2.cc
@@ -226,7 +226,7 @@ solaris_elf_asm_comdat_section (const char *name, unsigned int flags, tree decl)
directive since Sun as treats undeclared sections as @progbits,
which conflicts with .bss* sections which are @nobits. */
targetm.asm_out.named_section (section, flags & ~SECTION_LINKONCE, decl);
-
+
/* Sun as separates declaration of a group section and of the group
itself, using the .group directive and the #comdat flag. */
fprintf (asm_out_file, "\t.group\t%s," SECTION_NAME_FORMAT ",#comdat\n",
diff --git a/gcc/config/sol2.h b/gcc/config/sol2.h
index 05dbaffa8ea..ceecb4f4848 100644
--- a/gcc/config/sol2.h
+++ b/gcc/config/sol2.h
@@ -452,7 +452,7 @@ along with GCC; see the file COPYING3. If not see
/* collect2.cc can only parse GNU nm -n output. Solaris nm needs -png to
produce the same format. */
#define NM_FLAGS "-png"
-\f
+
#define STDC_0_IN_SYSTEM_HEADERS 1
/* Support Solaris-specific format checking for cmn_err. */
diff --git a/gcc/config/sparc/freebsd.h b/gcc/config/sparc/freebsd.h
index 73850a31f58..b1ea78faefa 100644
--- a/gcc/config/sparc/freebsd.h
+++ b/gcc/config/sparc/freebsd.h
@@ -55,7 +55,7 @@ along with GCC; see the file COPYING3. If not see
/************************[ Target stuff ]***********************************/
-/* Define the actual types of some ANSI-mandated types.
+/* Define the actual types of some ANSI-mandated types.
Needs to agree with <machine/ansi.h>. GCC defaults come from c-decl.cc,
c-common.cc, and config/<arch>/<arch>.h. */
@@ -111,7 +111,7 @@ along with GCC; see the file COPYING3. If not see
/* DWARF bits. */
-/* Follow Irix 6 and not the Dwarf2 draft in using 64-bit offsets.
+/* Follow Irix 6 and not the Dwarf2 draft in using 64-bit offsets.
Obviously the Dwarf2 folks havn't tried to actually build systems
with their spec. On a 64-bit system, only 64-bit relocs become
RELATIVE relocations. */
diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h
index 6a809e9092d..8e32cd38e87 100644
--- a/gcc/config/sparc/linux.h
+++ b/gcc/config/sparc/linux.h
@@ -56,13 +56,13 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
-
+
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
-
+
#undef WCHAR_TYPE
#define WCHAR_TYPE "int"
-
+
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32
@@ -112,21 +112,21 @@ do { \
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
-\f
+
/* Define for support of TFmode long double.
SPARC ABI says that long double is 4 words. */
#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
#undef DITF_CONVERSION_LIBFUNCS
#define DITF_CONVERSION_LIBFUNCS 1
-\f
+
#ifdef HAVE_AS_TLS
#undef TARGET_SUN_TLS
#undef TARGET_GNU_TLS
#define TARGET_SUN_TLS 0
#define TARGET_GNU_TLS 1
#endif
-\f
+
/* We use GNU ld so undefine this so that attribute((init_priority)) works. */
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
index d08a2ef96fe..26be09828c2 100644
--- a/gcc/config/sparc/linux64.h
+++ b/gcc/config/sparc/linux64.h
@@ -254,7 +254,7 @@ do { \
/* DWARF bits. */
-/* Follow Irix 6 and not the Dwarf2 draft in using 64-bit offsets.
+/* Follow Irix 6 and not the Dwarf2 draft in using 64-bit offsets.
Obviously the Dwarf2 folks haven't tried to actually build systems
with their spec. On a 64-bit system, only 64-bit relocs become
RELATIVE relocations. */
@@ -263,14 +263,14 @@ do { \
#undef DITF_CONVERSION_LIBFUNCS
#define DITF_CONVERSION_LIBFUNCS 1
-\f
+
#ifdef HAVE_AS_TLS
#undef TARGET_SUN_TLS
#undef TARGET_GNU_TLS
#define TARGET_SUN_TLS 0
#define TARGET_GNU_TLS 1
#endif
-\f
+
/* We use GNU ld so undefine this so that attribute((init_priority)) works. */
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h
index a91f64c5942..98f6c605285 100644
--- a/gcc/config/sparc/sol2.h
+++ b/gcc/config/sparc/sol2.h
@@ -49,7 +49,7 @@ along with GCC; see the file COPYING3. If not see
((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
#endif
-\f
+
/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */
@@ -325,7 +325,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
/* -fsanitize=address is currently only supported for 32-bit. */
#define ASAN_REJECT_SPEC \
DEF_ARCH64_SPEC("%e-fsanitize=address is not supported in this configuration")
-\f
+
/* Register the Solaris-specific #pragma directives. */
#define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas ()
@@ -433,7 +433,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#undef DTORS_SECTION_ASM_OP
#endif
-\f
+
/* Define for support of TFmode long double.
SPARC ABI says that long double is 4 words. */
diff --git a/gcc/config/sparc/sp-elf.h b/gcc/config/sparc/sp-elf.h
index 53f03b951db..2a206743982 100644
--- a/gcc/config/sparc/sp-elf.h
+++ b/gcc/config/sparc/sp-elf.h
@@ -38,7 +38,7 @@ along with GCC; see the file COPYING3. If not see
/* Don't set the target flags, this is done by the linker script */
#undef LIB_SPEC
#define LIB_SPEC ""
-\f
+
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
@@ -54,7 +54,7 @@ along with GCC; see the file COPYING3. If not see
/* We use GNU ld so undefine this so that attribute((init_priority)) works. */
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
-\f
+
/* ??? Inherited from sol2.h. Probably wrong. */
#undef WCHAR_TYPE
#define WCHAR_TYPE "long int"
diff --git a/gcc/config/sparc/sp64-elf.h b/gcc/config/sparc/sp64-elf.h
index dc918c6ae24..1919f584441 100644
--- a/gcc/config/sparc/sp64-elf.h
+++ b/gcc/config/sparc/sp64-elf.h
@@ -49,7 +49,7 @@ along with GCC; see the file COPYING3. If not see
/* Use the default (for now). */
#undef LIB_SPEC
-\f
+
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
@@ -61,7 +61,7 @@ along with GCC; see the file COPYING3. If not see
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf ((LABEL), "*.L%s%ld", (PREFIX), (long)(NUM))
-\f
+
/* ??? This should be 32 bits for v9 but what can we do? */
#undef WCHAR_TYPE
#define WCHAR_TYPE "short unsigned int"
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 4ddd00c81e1..68049ef8d43 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -99,7 +99,7 @@ extern int register_ok_for_ldd (rtx);
extern int memory_ok_for_ldd (rtx);
extern int v9_regcmp_p (enum rtx_code);
/* Function used for V8+ code generation. Returns 1 if the high
- 32 bits of REG are 0 before INSN. */
+ 32 bits of REG are 0 before INSN. */
extern int sparc_check_64 (rtx, rtx_insn *);
extern rtx gen_df_reg (rtx, int);
extern void sparc_expand_compare_and_swap (rtx op[]);
diff --git a/gcc/config/sparc/sparc.cc b/gcc/config/sparc/sparc.cc
index 10c0f52d3d9..c4f23b6ca34 100644
--- a/gcc/config/sparc/sparc.cc
+++ b/gcc/config/sparc/sparc.cc
@@ -717,7 +717,7 @@ static bool sparc_vectorize_vec_perm_const (machine_mode, machine_mode,
const vec_perm_indices &);
static bool sparc_can_follow_jump (const rtx_insn *, const rtx_insn *);
static HARD_REG_SET sparc_zero_call_used_regs (HARD_REG_SET);
-\f
+
#ifdef SUBTARGET_ATTRIBUTE_TABLE
/* Table of valid machine attributes. */
static const struct attribute_spec sparc_attribute_table[] =
@@ -728,7 +728,7 @@ static const struct attribute_spec sparc_attribute_table[] =
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
#endif
-\f
+
char sparc_hard_reg_printed[8];
/* Initialize the GCC target structure. */
@@ -2173,7 +2173,7 @@ sparc_option_override (void)
|| sparc_cpu == PROCESSOR_M8)
? 128 : (sparc_cpu == PROCESSOR_NIAGARA7
? 256 : 512)));
-
+
/* Disable save slot sharing for call-clobbered registers by default.
The IRA sharing algorithm works on single registers only and this
@@ -2192,7 +2192,7 @@ sparc_option_override (void)
/* Set up function hooks. */
init_machine_status = sparc_init_machine_status;
}
-\f
+
/* Miscellaneous utilities. */
/* Nonzero if CODE, a comparison, is suitable for use in v9 conditional move
@@ -3684,7 +3684,7 @@ gen_df_reg (rtx reg, int low)
regno += (TARGET_ARCH64 && SPARC_INT_REG_P (regno)) ? 1 : 2;
return gen_rtx_REG (DFmode, regno);
}
-\f
+
/* Generate a call to FUNC with OPERANDS. Operand 0 is the return value.
Unlike normal calls, TFmode operands are passed by reference. It is
assumed that no more than 3 operands are required. */
@@ -3974,7 +3974,7 @@ emit_tfmode_cvt (enum rtx_code code, rtx *operands)
else
emit_soft_tfmode_cvt (code, operands);
}
-\f
+
/* Return nonzero if a branch/jump/call instruction will be emitting
nop into its delay slot. */
@@ -4232,7 +4232,7 @@ eligible_for_sibcall_delay (rtx_insn *trial)
return eligible_for_restore_insn (trial, false);
}
-\f
+
/* Determine if it's legal to put X into the constant pool. This
is not possible if X contains the address of a symbol that is
not constant (TLS) or not known at final link time (PIC). */
@@ -4273,7 +4273,7 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
gcc_unreachable ();
}
}
-\f
+
/* Global Offset Table support. */
static GTY(()) rtx got_symbol_rtx = NULL_RTX;
static GTY(()) rtx got_register_rtx = NULL_RTX;
@@ -5154,7 +5154,7 @@ sparc_emit_call_insn (rtx pat, rtx addr)
crtl->uses_pic_offset_table = 1;
}
}
-\f
+
/* Return 1 if RTX is a MEM which is known to be aligned to at
least a DESIRED byte boundary. */
@@ -5235,7 +5235,7 @@ mem_min_alignment (rtx mem, int desired)
return 0;
}
-\f
+
/* Vectors to keep interesting information about registers where it can easily
be got. We used to use the actual mode value as the bit number, but there
are more than 32 modes now. Instead we use two tables: one indexed by
@@ -5439,7 +5439,7 @@ sparc_init_modes (void)
sparc_regno_reg_class[i] = NO_REGS;
}
}
-\f
+
/* Return whether REGNO, a global or FP register, must be saved/restored. */
static inline bool
@@ -6568,7 +6568,7 @@ output_sibcall (rtx_insn *insn, rtx call_operand)
return "";
}
-\f
+
/* Functions for handling argument passing.
For 32-bit, the first 6 args are normally in registers and the rest are
@@ -8006,7 +8006,7 @@ sparc_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
return build_va_arg_indirect_ref (addr);
}
-\f
+
/* Implement the TARGET_VECTOR_MODE_SUPPORTED_P target hook.
Specify whether the vector mode is supported by the hardware. */
@@ -8015,7 +8015,7 @@ sparc_vector_mode_supported_p (machine_mode mode)
{
return TARGET_VIS && VECTOR_MODE_P (mode) ? true : false;
}
-\f
+
/* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook. */
static machine_mode
@@ -8036,7 +8036,7 @@ sparc_preferred_simd_mode (scalar_mode mode)
return word_mode;
}
-\f
+
\f/* Implement TARGET_CAN_FOLLOW_JUMP. */
static bool
@@ -8951,7 +8951,7 @@ epilogue_renumber (rtx *where, int test)
}
return 0;
}
-\f
+
/* Leaf functions and non-leaf functions have different needs. */
static const int reg_leaf_alloc_order[] = REG_LEAF_ALLOC_ORDER;
@@ -9283,7 +9283,7 @@ memory_ok_for_ldd (rtx op)
return 1;
}
-\f
+
/* Implement TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
static bool
@@ -9764,7 +9764,7 @@ sparc_print_operand_address (FILE *file, machine_mode /*mode*/, rtx x)
output_addr_const (file, addr);
}
}
-\f
+
/* Target hook for assembling integer objects. The sparc version has
special handling for aligned DI-mode objects. */
@@ -9789,7 +9789,7 @@ sparc_assemble_integer (rtx x, unsigned int size, int aligned_p)
}
return default_assemble_integer (x, size, aligned_p);
}
-\f
+
/* Return the value of a code used in the .proc pseudo-op that says
what kind of result this function returns. For non-C types, we pick
the closest C type. */
@@ -9931,7 +9931,7 @@ sparc_type_code (tree type)
return qualifiers;
}
-\f
+
/* Nested function support. */
/* Emit RTL insns to initialize the variable parts of a trampoline.
@@ -10074,7 +10074,7 @@ sparc_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
else
sparc32_initialize_trampoline (m_tramp, fnaddr, cxt);
}
-\f
+
/* Adjust the cost of a scheduling dependency. Return the new cost of
a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
@@ -10136,7 +10136,7 @@ supersparc_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
if (insn_type == TYPE_IALU || insn_type == TYPE_SHIFT)
return 0;
}
-
+
return cost;
}
@@ -10378,7 +10378,7 @@ sparc_branch_cost (bool speed_p, bool predictable_p)
return cost;
}
}
-
+
static int
set_extends (rtx_insn *insn)
{
@@ -10637,7 +10637,7 @@ output_v8plus_shift (rtx_insn *insn, rtx *operands, const char *opcode)
return
strcat (asm_code, "\t%3, %2, %3\n\tsrlx\t%3, 32, %H0\n\tmov\t%3, %L0");
}
-\f
+
/* Output rtl to increment the profiler label LABELNO
for profiling a function entry. */
@@ -10659,7 +10659,7 @@ sparc_profile_hook (int labelno)
emit_library_call (fun, LCT_NORMAL, VOIDmode, lab, Pmode);
}
}
-\f
+
#ifdef TARGET_SOLARIS
/* Solaris implementation of TARGET_ASM_NAMED_SECTION. */
@@ -10730,7 +10730,7 @@ sparc_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
&& flag_pic
&& !targetm.binds_local_p (decl)));
}
-\f
+
/* libfunc renaming. */
static void
@@ -10826,7 +10826,7 @@ sparc_init_libfuncs (void)
}
}
}
-\f
+
/* SPARC builtins. */
enum sparc_builtins
{
@@ -11000,7 +11000,7 @@ enum sparc_builtins
SPARC_BUILTIN_FPCMPUR16SHL,
SPARC_BUILTIN_FPCMPUR32SHL,
SPARC_BUILTIN_LAST_FPCMPSHL = SPARC_BUILTIN_FPCMPUR32SHL,
-
+
SPARC_BUILTIN_MAX
};
@@ -11547,7 +11547,7 @@ sparc_vis_init_builtins (void)
def_builtin_const ("__builtin_vis_fpcmpugt32", CODE_FOR_fpcmpugt32si_vis,
SPARC_BUILTIN_FPCMPUGT32, di_ftype_v2si_v2si);
}
-
+
def_builtin_const ("__builtin_vis_fpmax8", CODE_FOR_maxv8qi3,
SPARC_BUILTIN_FPMAX8, v8qi_ftype_v8qi_v8qi);
def_builtin_const ("__builtin_vis_fpmax16", CODE_FOR_maxv4hi3,
@@ -11602,7 +11602,7 @@ sparc_vis_init_builtins (void)
tree di_ftype_v2si_v2si_si = build_function_type_list (intDI_type_node,
v2si, v2si,
intSI_type_node, 0);
-
+
def_builtin_const ("__builtin_vis_fpcmple8shl", CODE_FOR_fpcmple8dishl,
SPARC_BUILTIN_FPCMPLE8SHL, di_ftype_v8qi_v8qi_si);
def_builtin_const ("__builtin_vis_fpcmpgt8shl", CODE_FOR_fpcmpgt8dishl,
@@ -11672,7 +11672,7 @@ sparc_vis_init_builtins (void)
tree si_ftype_v2si_v2si_si = build_function_type_list (intSI_type_node,
v2si, v2si,
intSI_type_node, 0);
-
+
def_builtin_const ("__builtin_vis_fpcmple8shl", CODE_FOR_fpcmple8sishl,
SPARC_BUILTIN_FPCMPLE8SHL, si_ftype_v8qi_v8qi_si);
def_builtin_const ("__builtin_vis_fpcmpgt8shl", CODE_FOR_fpcmpgt8sishl,
@@ -12057,7 +12057,7 @@ sparc_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED,
return NULL_TREE;
}
-\f
+
/* ??? This duplicates information provided to the compiler by the
??? scheduler description. Some day, teach genautomata to output
??? the latencies and then CSE will just use that. */
@@ -12585,7 +12585,7 @@ sparc_init_machine_status (void)
{
return ggc_cleared_alloc<machine_function> ();
}
-\f
+
/* Implement the TARGET_ASAN_SHADOW_OFFSET hook. */
static unsigned HOST_WIDE_INT
@@ -12593,7 +12593,7 @@ sparc_asan_shadow_offset (void)
{
return TARGET_ARCH64 ? (HOST_WIDE_INT_1 << 43) : (HOST_WIDE_INT_1 << 29);
}
-\f
+
/* This is called from dwarf2out.cc via TARGET_ASM_OUTPUT_DWARF_DTPREL.
We need to emit DTP-relative relocations. */
@@ -12989,7 +12989,7 @@ sparc_expand_vec_perm_bmask (machine_mode vmode, rtx sel)
t_1 = force_reg (SImode, GEN_INT (0x01010101));
/* sel = { A*2, A*2+1, B*2, B*2+1, ... } */
break;
-
+
case E_V8QImode:
/* input = xAxBxCxDxExFxGxH */
sel = expand_simple_binop (DImode, AND, sel,
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 155e1da7ad7..08cc98e29a5 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -101,7 +101,7 @@ along with GCC; see the file COPYING3. If not see
/* This is call-clobbered in the normal ABI, but is reserved in the
home grown (aka upward compatible) embedded ABI. */
#define EMBMEDANY_BASE_REG "%g4"
-\f
+
/* Values of TARGET_CPU_DEFAULT, set via -D in the Makefile,
and specified by the user via --with-cpu=foo.
This specifies the cpu implementation, not the architecture size. */
@@ -411,14 +411,14 @@ along with GCC; see the file COPYING3. If not see
to list libc again after the second libgcc. */
#define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L} %G %{!nolibc:%L}"
-\f
+
#define PTRDIFF_TYPE (TARGET_ARCH64 ? "long int" : "int")
#define SIZE_TYPE (TARGET_ARCH64 ? "long unsigned int" : "unsigned int")
/* ??? This should be 32 bits for v9 but what can we do? */
#define WCHAR_TYPE "short unsigned int"
#define WCHAR_TYPE_SIZE 16
-\f
+
/* Mask of all CPU selection flags. */
#define MASK_ISA \
(MASK_SPARCLITE + MASK_SPARCLET + MASK_LEON + MASK_LEON3 \
@@ -429,7 +429,7 @@ along with GCC; see the file COPYING3. If not see
(MASK_FPU + MASK_HARD_QUAD + MASK_VIS + MASK_VIS2 + MASK_VIS3 \
+ MASK_VIS4 + MASK_CBCOND + MASK_FMAF + MASK_FSMULD \
+ MASK_POPC + MASK_SUBXC)
-
+
/* TARGET_HARD_MUL: Use 32-bit hardware multiply instructions but not %y. */
#define TARGET_HARD_MUL \
(TARGET_SPARCLITE || TARGET_SPARCLET \
@@ -460,7 +460,7 @@ along with GCC; see the file COPYING3. If not see
{"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
{"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
-\f
+
/* target machine storage layout */
/* Define this if most significant bit is lowest numbered
@@ -585,7 +585,7 @@ along with GCC; see the file COPYING3. If not see
because the linker fails to align the text section enough!
Put them in the data section. This macro is only used in this file. */
#define MAX_TEXT_ALIGN 32
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -800,7 +800,7 @@ along with GCC; see the file COPYING3. If not see
v9: Functions which return large structures get the address to place the
wanted value from an invisible first argument. */
#define STRUCT_VALUE_OFFSET 64
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -1016,7 +1016,7 @@ extern char sparc_leaf_regs[];
#define CLASS_MAX_NREGS(CLASS, MODE) \
(FP_REG_CLASS_P (CLASS) ? (GET_MODE_SIZE (MODE) + 3) / 4 \
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -1105,7 +1105,7 @@ extern char sparc_leaf_regs[];
#define FUNCTION_ARG_REGNO_P(N) \
(((N) >= 8 && (N) <= 13) \
|| (TARGET_ARCH64 && TARGET_FPU && (N) >= 32 && (N) <= 63))
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -1133,7 +1133,7 @@ struct sparc_args {
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
init_cumulative_args (& (CUM), (FNTYPE), (LIBNAME), (FNDECL));
-\f
+
/* Generate the special assembly code needed to tell the assembler whatever
it might need to know about the return value of a function.
@@ -1179,7 +1179,7 @@ do { \
} \
} \
} while (0)
-\f
+
/* Emit rtl for profiling. */
#define PROFILE_HOOK(LABEL) sparc_profile_hook (LABEL)
@@ -1188,7 +1188,7 @@ do { \
/* Set the name of the mcount function for the system. */
#define MCOUNT_FUNCTION "*mcount"
-\f
+
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers. */
@@ -1199,7 +1199,7 @@ do { \
/* Alignment required for trampolines, in bits. */
#define TRAMPOLINE_ALIGNMENT 128
-\f
+
/* Generate RTL to flush the register windows so as to make arbitrary frames
available. */
#define SETUP_FRAME_ADDRESSES() \
@@ -1309,7 +1309,7 @@ do { \
fputc (')', FILE); \
} while (0)
#endif
-\f
+
/* Addressing modes, and classification of registers for them. */
/* Macros to check register numbers against specific register classes. */
@@ -1336,7 +1336,7 @@ do { \
(TARGET_V9 \
&& (((unsigned) (REGNO) - 96 < (unsigned)4) \
|| ((unsigned) reg_renumber[REGNO] - 96 < (unsigned)4)))
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
@@ -1351,7 +1351,7 @@ do { \
addresses which require two reload registers. */
#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
-\f
+
/* Should gcc use [%reg+%lo(xx)+offset] addresses? */
#ifdef HAVE_AS_OFFSETABLE_LO10
@@ -1359,7 +1359,7 @@ do { \
#else
#define USE_AS_OFFSETABLE_LO10 0
#endif
-\f
+
/* Try a machine-dependent way of reloading an illegitimate address
operand. If we find one, push the reload and jump to WIN. This
macro is used in only one place: `find_reloads_address' in reload.cc. */
@@ -1371,7 +1371,7 @@ do { \
if (win) \
goto WIN; \
} while (0)
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
/* If we ever implement any of the full models (such as CM_FULLANY),
@@ -1464,7 +1464,7 @@ do { \
is the default; other values are interpreted relative to that. */
#define BRANCH_COST(SPEED_P, PREDICTABLE_P) \
(sparc_branch_cost (SPEED_P, PREDICTABLE_P))
-\f
+
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
diff --git a/gcc/config/sparc/sysv4.h b/gcc/config/sparc/sysv4.h
index e70a07881fa..6ed55906603 100644
--- a/gcc/config/sparc/sysv4.h
+++ b/gcc/config/sparc/sysv4.h
@@ -90,7 +90,7 @@ do { ASM_OUTPUT_ALIGN ((FILE), Pmode == SImode ? 2 : 3); \
#define FINI_SECTION_ASM_OP "\t.section\t\".fini\""
/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
-
+
Note that we want to give these sections the SHF_WRITE attribute
because these sections will actually contain data (i.e. tables of
addresses of functions in the current root executable or shared library
@@ -103,7 +103,7 @@ do { ASM_OUTPUT_ALIGN ((FILE), Pmode == SImode ? 2 : 3); \
use the `-z text' option when building a shared library, you will get
errors unless the .ctors and .dtors sections are marked as writable
via the SHF_WRITE attribute.) */
-
+
#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP "\t.section\t\".ctors\",#alloc,#write"
#undef DTORS_SECTION_ASM_OP
diff --git a/gcc/config/stormy16/stormy16-protos.h b/gcc/config/stormy16/stormy16-protos.h
index cff6c6d6be8..ad5d3a025a8 100644
--- a/gcc/config/stormy16/stormy16-protos.h
+++ b/gcc/config/stormy16/stormy16-protos.h
@@ -55,13 +55,13 @@ extern void xstormy16_expand_andqi3 (rtx *);
extern void xstormy16_split_cbranch (machine_mode, rtx, rtx, rtx);
extern int short_memory_operand (rtx, machine_mode);
extern bool nonimmediate_nonstack_operand (rtx, machine_mode);
-extern enum reg_class xstormy16_secondary_reload_class
+extern enum reg_class xstormy16_secondary_reload_class
(enum reg_class, machine_mode, rtx);
extern void xstormy16_split_move (machine_mode, rtx, rtx);
extern void xstormy16_expand_move (machine_mode, rtx, rtx);
-extern void xstormy16_expand_arith (machine_mode, enum rtx_code,
+extern void xstormy16_expand_arith (machine_mode, enum rtx_code,
rtx, rtx, rtx);
-extern const char * xstormy16_output_shift (machine_mode, enum rtx_code,
+extern const char * xstormy16_output_shift (machine_mode, enum rtx_code,
rtx, rtx, rtx);
extern bool xstormy16_below100_symbol (rtx, machine_mode);
extern bool xstormy16_splittable_below100_operand (rtx, machine_mode);
diff --git a/gcc/config/stormy16/stormy16.cc b/gcc/config/stormy16/stormy16.cc
index fabf09ab9a0..2e2b659e02e 100644
--- a/gcc/config/stormy16/stormy16.cc
+++ b/gcc/config/stormy16/stormy16.cc
@@ -421,7 +421,7 @@ xstormy16_output_cbranch_si (rtx op, const char *label, int reversed,
return string;
}
-\f
+
/* Many machines have some registers that cannot be copied directly to or from
memory or even from other types of registers. An example is the `MQ'
register, which on most machines, can only be copied to or from general
@@ -899,7 +899,7 @@ xstormy16_expand_move (machine_mode mode, rtx dest, rtx src)
emit_insn (gen_rtx_SET (dest, src));
}
-\f
+
/* Stack Layout:
The stack is laid out as follows:
@@ -1214,7 +1214,7 @@ xstormy16_function_profiler (void)
{
sorry ("%<function_profiler%> support");
}
-\f
+
/* Update CUM to advance past argument ARG. Once this is done,
the variable CUM is suitable for analyzing the *following*
argument with `TARGET_FUNCTION_ARG', etc.
@@ -1674,7 +1674,7 @@ xstormy16_asm_out_constructor (rtx symbol, int priority)
assemble_align (POINTER_SIZE);
assemble_integer (symbol, POINTER_SIZE / BITS_PER_UNIT, POINTER_SIZE, 1);
}
-\f
+
/* Worker function for TARGET_PRINT_OPERAND_ADDRESS.
Print a memory address as an operand to reference that memory location. */
@@ -1857,7 +1857,7 @@ xstormy16_print_operand (FILE *file, rtx x, int code)
return;
}
-\f
+
/* Expander for the `casesi' pattern.
INDEX is the index of the switch statement.
LOWER_BOUND is a CONST_INT that is the value of INDEX corresponding
@@ -1912,7 +1912,7 @@ xstormy16_output_addr_vec (FILE *file, rtx label ATTRIBUTE_UNUSED, rtx table)
fputc ('\n', file);
}
}
-\f
+
/* Expander for the `call' patterns.
RETVAL is the RTL for the return register or NULL for void functions.
DEST is the function to call, expressed as a MEM.
@@ -1952,7 +1952,7 @@ xstormy16_expand_call (rtx retval, rtx dest, rtx counter)
gen_rtx_USE (VOIDmode, temp)));
emit_call_insn (call);
}
-\f
+
/* Expanders for multiword computational operations. */
/* Expander for arithmetic operations; emit insns to compute
@@ -2174,7 +2174,7 @@ xstormy16_output_shift (machine_mode mode, enum rtx_code code,
}
return r;
}
-\f
+
/* Attribute handling. */
/* Return nonzero if the function is an interrupt function. */
@@ -2264,7 +2264,7 @@ xstormy16_handle_below100_attribute (tree *node,
return NULL_TREE;
}
-\f
+
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS xstormy16_init_builtins
#undef TARGET_EXPAND_BUILTIN
@@ -2390,7 +2390,7 @@ xstormy16_expand_builtin (tree exp, rtx target,
return retval;
}
-\f
+
/* Look for combinations of insns that can be converted to BN or BP
opcodes. This is, unfortunately, too complex to do with MD
patterns. */
@@ -2623,7 +2623,7 @@ xstormy16_reorg (void)
combine_bnp (insn);
}
}
-\f
+
/* Worker function for TARGET_RETURN_IN_MEMORY. */
static bool
@@ -2656,7 +2656,7 @@ xstormy16_push_rounding (poly_int64 bytes)
{
return (bytes + 1) & ~1;
}
-\f
+
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
#undef TARGET_ASM_ALIGNED_SI_OP
diff --git a/gcc/config/stormy16/stormy16.h b/gcc/config/stormy16/stormy16.h
index 73fcdff5604..fee0f2f0cbb 100644
--- a/gcc/config/stormy16/stormy16.h
+++ b/gcc/config/stormy16/stormy16.h
@@ -18,7 +18,7 @@
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
/* Driver configuration. */
#undef ASM_SPEC
@@ -43,7 +43,7 @@
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
-\f
+
/* Run-time target specifications. */
#define TARGET_CPU_CPP_BUILTINS() \
@@ -54,7 +54,7 @@
builtin_assert ("cpu=xstormy16"); \
} \
while (0)
-\f
+
/* Storage Layout. */
#define BITS_BIG_ENDIAN 1
@@ -90,7 +90,7 @@
#define STRICT_ALIGNMENT 1
#define PCC_BITFIELD_TYPE_MATTERS 1
-\f
+
/* Layout of Source Language Data Types. */
#define INT_TYPE_SIZE 16
@@ -119,7 +119,7 @@
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32
-\f
+
/* Register Basics. */
#define FIRST_PSEUDO_REGISTER 19
@@ -130,12 +130,12 @@
#define CALL_USED_REGISTERS \
{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1 }
-\f
+
/* Order of allocation of registers. */
#define REG_ALLOC_ORDER { 7, 6, 5, 4, 3, 2, 1, 0, 9, 8, 10, 11, 12, 13, 14, 15, 16 }
-\f
+
/* Register Classes. */
enum reg_class
@@ -205,7 +205,7 @@ enum reg_class
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
xstormy16_secondary_reload_class (CLASS, MODE, X)
-\f
+
/* Basic Stack Layout. */
/* We want to use post-increment instructions to push things on the stack,
@@ -229,7 +229,7 @@ enum reg_class
#define INCOMING_FRAME_SP_OFFSET (xstormy16_interrupt_function_p () ? -6 : -4)
#define DEFAULT_INCOMING_FRAME_SP_OFFSET -4
-\f
+
/* Register That Address the Stack Frame. */
#define STATIC_CHAIN_REGNUM 1
@@ -239,7 +239,7 @@ enum reg_class
#define FRAME_POINTER_REGNUM 17
#define ARG_POINTER_REGNUM 18
-\f
+
/* Eliminating the Frame Pointer and the Arg Pointer. */
#define ELIMINABLE_REGS \
@@ -253,12 +253,12 @@ enum reg_class
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = xstormy16_initial_elimination_offset (FROM, TO)
-\f
+
/* Passing Function Arguments on the Stack. */
#define PUSH_ROUNDING(BYTES) xstormy16_push_rounding (BYTES)
-\f
+
/* Function Arguments in Registers. */
#define NUM_ARGUMENT_REGISTERS 6
@@ -280,33 +280,33 @@ enum reg_class
((REGNO) >= FIRST_ARGUMENT_REGISTER \
&& (REGNO) < FIRST_ARGUMENT_REGISTER + NUM_ARGUMENT_REGISTERS)
-\f
+
/* How Scalar Function Values are Returned. */
/* The number of the hard register that is used to return a scalar value from a
function call. */
#define RETURN_VALUE_REGNUM FIRST_ARGUMENT_REGISTER
-\f
+
/* Function Entry and Exit. */
#define EPILOGUE_USES(REGNO) \
xstormy16_epilogue_uses (REGNO)
-\f
+
/* Generating Code for Profiling. */
/* This declaration must be present, but it can be an abort if profiling is
not implemented. */
-
+
#define FUNCTION_PROFILER(FILE, LABELNO) xstormy16_function_profiler ()
-\f
+
/* Trampolines for Nested Functions. */
#define TRAMPOLINE_SIZE 8
#define TRAMPOLINE_ALIGNMENT 16
-\f
+
/* Addressing Modes. */
@@ -316,7 +316,7 @@ enum reg_class
#define MAX_REGS_PER_ADDRESS 1
-\f
+
/* Describing Relative Costs of Operations. */
#define BRANCH_COST(speed_p, predictable_p) 5
@@ -325,7 +325,7 @@ enum reg_class
#define NO_FUNCTION_CSE 1
-\f
+
/* Dividing the output into sections. */
#define TEXT_SECTION_ASM_OP ".text"
@@ -348,7 +348,7 @@ enum reg_class
#define TARGET_ASM_INIT_SECTIONS xstormy16_asm_init_sections
#define JUMP_TABLES_IN_TEXT_SECTION 1
-\f
+
/* The Overall Framework of an Assembler File. */
#define ASM_COMMENT_START ";"
@@ -356,7 +356,7 @@ enum reg_class
#define ASM_APP_ON "#APP\n"
#define ASM_APP_OFF "#NO_APP\n"
-\f
+
/* Output of Data. */
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '|')
@@ -366,7 +366,7 @@ enum reg_class
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
xstormy16_asm_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0)
-\f
+
/* Output and Generation of Labels. */
#define SYMBOL_FLAG_XSTORMY16_BELOW100 (SYMBOL_FLAG_MACH_DEP << 0)
@@ -394,7 +394,7 @@ enum reg_class
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.globl "
-\f
+
/* Output of Assembler Instructions. */
#define REGISTER_NAMES \
@@ -416,7 +416,7 @@ enum reg_class
#define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
fprintf (STREAM, "\tpop %d\n", REGNO)
-\f
+
/* Output of dispatch tables. */
/* This port does not use the ASM_OUTPUT_ADDR_VEC_ELT macro, because
@@ -429,7 +429,7 @@ enum reg_class
/* Alignment for ADDR_VECs is the same as for code. */
#define ADDR_VEC_ALIGN(ADDR_VEC) 1
-\f
+
/* Assembler Commands for Exception Regions. */
#define DWARF2_UNWIND_INFO 0
@@ -440,13 +440,13 @@ enum reg_class
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
fprintf ((STREAM), "\t.p2align %d\n", (POWER))
-\f
+
/* Macros Affecting all Debug Formats. */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
-\f
+
/* Macros for Dwarf Output. */
/* Define this macro if addresses in Dwarf 2 debugging info should not
@@ -460,7 +460,7 @@ enum reg_class
pointers. */
#define DWARF2_ADDR_SIZE 4
-\f
+
/* Miscellaneous Parameters. */
#define CASE_VECTOR_MODE SImode
diff --git a/gcc/config/v850/v850-c.cc b/gcc/config/v850/v850-c.cc
index 55b783a5afc..ae8fc78fab1 100644
--- a/gcc/config/v850/v850-c.cc
+++ b/gcc/config/v850/v850-c.cc
@@ -33,11 +33,11 @@ along with GCC; see the file COPYING3. If not see
#ifndef streq
#define streq(a,b) (strcmp (a, b) == 0)
#endif
-\f
+
static int pop_data_area (v850_data_area);
static int push_data_area (v850_data_area);
static void mark_current_function_as_interrupt (void);
-\f
+
/* Push a data area onto the stack. */
static int
@@ -90,7 +90,7 @@ static void
mark_current_function_as_interrupt (void)
{
tree name;
-
+
if (current_function_decl == NULL_TREE)
{
warning (0, "cannot set interrupt attribute: no current function");
@@ -104,12 +104,12 @@ mark_current_function_as_interrupt (void)
warning (0, "cannot set interrupt attribute: no such identifier");
return;
}
-
+
decl_attributes (¤t_function_decl,
tree_cons (name, NULL_TREE, NULL_TREE), 0);
}
-\f
+
/* Support for GHS pragmata. */
void
@@ -125,9 +125,9 @@ ghs_pragma_section (cpp_reader * pfile ATTRIBUTE_UNUSED)
tree sect_ident;
const char *sect, *alias;
enum GHS_section_kind kind;
-
+
type = pragma_lex (&x);
-
+
if (type == CPP_EOF && !repeat)
goto reset;
else if (type == CPP_NAME)
@@ -138,20 +138,20 @@ ghs_pragma_section (cpp_reader * pfile ATTRIBUTE_UNUSED)
else
goto bad;
repeat = 0;
-
+
if (pragma_lex (&x) != CPP_EQ)
goto bad;
if (pragma_lex (&x) != CPP_NAME)
goto bad;
-
+
alias = IDENTIFIER_POINTER (x);
-
+
type = pragma_lex (&x);
if (type == CPP_COMMA)
repeat = 1;
else if (type != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs section");
-
+
if (streq (sect, "data")) kind = GHS_SECTION_KIND_DATA;
else if (streq (sect, "text")) kind = GHS_SECTION_KIND_TEXT;
else if (streq (sect, "rodata")) kind = GHS_SECTION_KIND_RODATA;
@@ -170,7 +170,7 @@ ghs_pragma_section (cpp_reader * pfile ATTRIBUTE_UNUSED)
warning (0, "unrecognized section name %qE", sect_ident);
return;
}
-
+
if (streq (alias, "default"))
GHS_current_section_names [kind] = NULL;
else
@@ -188,7 +188,7 @@ ghs_pragma_section (cpp_reader * pfile ATTRIBUTE_UNUSED)
/* #pragma ghs section \n: Reset all section names back to their defaults. */
{
int i;
-
+
for (i = COUNT_OF_GHS_SECTION_KINDS; i--;)
GHS_current_section_names [i] = NULL;
}
@@ -198,10 +198,10 @@ void
ghs_pragma_interrupt (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs interrupt");
-
+
mark_current_function_as_interrupt ();
}
@@ -209,10 +209,10 @@ void
ghs_pragma_starttda (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs starttda");
-
+
push_data_area (DATA_AREA_TDA);
}
@@ -220,10 +220,10 @@ void
ghs_pragma_startsda (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs startsda");
-
+
push_data_area (DATA_AREA_SDA);
}
@@ -231,10 +231,10 @@ void
ghs_pragma_startzda (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs startzda");
-
+
push_data_area (DATA_AREA_ZDA);
}
@@ -242,10 +242,10 @@ void
ghs_pragma_endtda (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs endtda");
-
+
pop_data_area (DATA_AREA_TDA);
}
@@ -253,10 +253,10 @@ void
ghs_pragma_endsda (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs endsda");
-
+
pop_data_area (DATA_AREA_SDA);
}
@@ -264,9 +264,9 @@ void
ghs_pragma_endzda (cpp_reader * pfile ATTRIBUTE_UNUSED)
{
tree x;
-
+
if (pragma_lex (&x) != CPP_EOF)
warning (OPT_Wpragmas, "junk at end of %<#pragma%> ghs endzda");
-
+
pop_data_area (DATA_AREA_ZDA);
}
diff --git a/gcc/config/v850/v850.cc b/gcc/config/v850/v850.cc
index 7143a2e1482..05d4e003296 100644
--- a/gcc/config/v850/v850.cc
+++ b/gcc/config/v850/v850.cc
@@ -60,7 +60,7 @@ static void v850_print_operand_address (FILE *, machine_mode, rtx);
const char * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
const char * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
-/* Track the current data area set by the data area pragma (which
+/* Track the current data area set by the data area pragma (which
can be nested). Tested by check_default_data_area. */
data_area_stack_element * data_area_stack = NULL;
@@ -76,7 +76,7 @@ static GTY(()) section * rozdata_section;
static GTY(()) section * tdata_section;
static GTY(()) section * zdata_section;
static GTY(()) section * zbss_section;
-\f
+
/* We use this to wrap all emitted insns in the prologue. */
static rtx
F (rtx x)
@@ -193,7 +193,7 @@ v850_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
size = arg.promoted_size_in_bytes ();
if (size < 1)
size = 1;
-
+
if (!TARGET_GCC_ABI)
align = UNITS_PER_WORD;
else if (arg.type)
@@ -271,7 +271,7 @@ const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
fatal_insn ("const_double_split got a bad insn:", x);
}
-\f
+
/* Return the cost of the rtx R with code CODE. */
static int
@@ -370,7 +370,7 @@ v850_rtx_costs (rtx x, machine_mode mode, int outer_code,
return false;
}
}
-\f
+
/* Print operand X using operand code CODE to assembly language output file
FILE. */
@@ -449,7 +449,7 @@ v850_print_operand (FILE * file, rtx x, int code)
case CONST_INT:
fprintf (file, "%d", (INTVAL (x) >= 0) ? 0 : -1);
break;
-
+
case CONST_DOUBLE:
const_double_split (x, &high, &low);
fprintf (file, "%ld", (long) high);
@@ -465,7 +465,7 @@ v850_print_operand (FILE * file, rtx x, int code)
case CONST_INT:
fprintf (file, "%ld", (long) INTVAL (x));
break;
-
+
case CONST_DOUBLE:
const_double_split (x, &high, &low);
fprintf (file, "%ld", (long) low);
@@ -483,12 +483,12 @@ v850_print_operand (FILE * file, rtx x, int code)
break;
case 'O':
gcc_assert (special_symbolref_operand (x, VOIDmode));
-
+
if (GET_CODE (x) == CONST)
x = XEXP (XEXP (x, 0), 0);
else
gcc_assert (GET_CODE (x) == SYMBOL_REF);
-
+
if (SYMBOL_REF_ZDA_P (x))
fprintf (file, "zdaoff");
else if (SYMBOL_REF_SDA_P (x))
@@ -504,12 +504,12 @@ v850_print_operand (FILE * file, rtx x, int code)
break;
case 'Q':
gcc_assert (special_symbolref_operand (x, VOIDmode));
-
+
if (GET_CODE (x) == CONST)
x = XEXP (XEXP (x, 0), 0);
else
gcc_assert (GET_CODE (x) == SYMBOL_REF);
-
+
if (SYMBOL_REF_ZDA_P (x))
fprintf (file, "r0");
else if (SYMBOL_REF_SDA_P (x))
@@ -534,7 +534,7 @@ v850_print_operand (FILE * file, rtx x, int code)
fprintf (file, "[r0]");
}
break;
-
+
case CONST_INT:
{
unsigned HOST_WIDE_INT v = INTVAL (x);
@@ -542,7 +542,7 @@ v850_print_operand (FILE * file, rtx x, int code)
/* Trickery to avoid problems with shifting
32-bits at a time on a 32-bit host. */
v = v >> 16;
- v = v >> 16;
+ v = v >> 16;
fprintf (file, HOST_WIDE_INT_PRINT_HEX, v);
break;
}
@@ -622,7 +622,7 @@ v850_print_operand (FILE * file, rtx x, int code)
case CONST_DOUBLE:
fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
break;
-
+
case CONST_INT:
case SYMBOL_REF:
case CONST:
@@ -638,7 +638,7 @@ v850_print_operand (FILE * file, rtx x, int code)
}
}
-\f
+
/* Output assembly language output for the address ADDR to FILE. */
static void
@@ -756,7 +756,7 @@ v850_print_operand_punct_valid_p (unsigned char code)
output_addr_const will normally barf at this, but it is OK to omit
the truncate and just emit the difference of the two labels. The
.hword directive will automatically handle the truncation for us.
-
+
Returns true if rtx was handled, false otherwise. */
static bool
@@ -784,7 +784,7 @@ v850_output_addr_const_extra (FILE * file, rtx x)
output_addr_const (file, x);
return true;
}
-\f
+
/* Return appropriate code to load up a 1, 2, or 4 integer/floating
point value. */
@@ -852,7 +852,7 @@ output_move_single (rtx * operands)
|| GET_CODE (src) == SYMBOL_REF
|| GET_CODE (src) == CONST)
{
- if (TARGET_V850E_UP)
+ if (TARGET_V850E_UP)
return "mov hilo(%1),%0";
else
return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
@@ -1018,7 +1018,7 @@ ep_memory_offset (machine_mode mode, int unsignedp ATTRIBUTE_UNUSED)
case E_SFmode:
max_offset = (1 << 8);
break;
-
+
default:
break;
}
@@ -1083,7 +1083,7 @@ ep_memory_operand (rtx op, machine_mode mode, int unsigned_load)
return FALSE;
}
-\f
+
/* Substitute memory references involving a pointer, to use the ep pointer,
taking care to save and preserve the ep. */
@@ -1190,7 +1190,7 @@ Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, end
emit_insn_before (gen_rtx_SET (*p_ep, *p_r1), last_insn);
}
-\f
+
/* TARGET_MACHINE_DEPENDENT_REORG. On the 850, we use it to implement
the -mep mode to copy heavily used pointers to ep to use the implicit
addressing. */
@@ -1472,7 +1472,7 @@ compute_register_save_size (long * p_reg_saved)
registers that need to be saved. To detect this we note that the
helper functions always push at least register r29 (provided
that the function is not an interrupt handler). */
-
+
if (TARGET_PROLOG_FUNCTION
&& (i == 2 || ((i >= 20) && (i < 30))))
{
@@ -1510,7 +1510,7 @@ compute_register_save_size (long * p_reg_saved)
}
}
}
-
+
if (p_reg_saved)
*p_reg_saved = reg_saved;
@@ -1640,7 +1640,7 @@ expand_prologue (void)
emit_insn (gen_save_interrupt ());
actual_fsize -= INTERRUPT_FIXED_SAVE_SIZE;
-
+
if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0)
actual_fsize -= INTERRUPT_ALL_SAVE_SIZE;
@@ -1724,7 +1724,7 @@ expand_prologue (void)
rtx insn = emit_insn (save_all);
INSN_CODE (insn) = code;
actual_fsize -= alloc_stack;
-
+
}
else
save_all = NULL_RTX;
@@ -1753,13 +1753,13 @@ expand_prologue (void)
init_stack_alloc = compute_register_save_size (NULL);
else
init_stack_alloc = actual_fsize;
-
+
/* Save registers at the beginning of the stack frame. */
offset = init_stack_alloc - 4;
-
+
if (init_stack_alloc)
increment_stack (- (signed) init_stack_alloc, true);
-
+
/* Save the return pointer first. */
if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
{
@@ -1770,7 +1770,7 @@ expand_prologue (void)
save_regs[--num_save]));
offset -= 4;
}
-
+
for (i = 0; i < num_save; i++)
{
F (emit_move_insn (gen_rtx_MEM (SImode,
@@ -1793,7 +1793,7 @@ expand_prologue (void)
if (frame_pointer_needed)
F (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
}
-\f
+
void
expand_epilogue (void)
@@ -1865,7 +1865,7 @@ expand_epilogue (void)
}
code = recog (restore_all, NULL, NULL);
-
+
if (code >= 0)
{
rtx insn;
@@ -1967,10 +1967,10 @@ v850_get_data_area (tree decl)
{
if (lookup_attribute ("sda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
return DATA_AREA_SDA;
-
+
if (lookup_attribute ("tda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
return DATA_AREA_TDA;
-
+
if (lookup_attribute ("zda", DECL_ATTRIBUTES (decl)) != NULL_TREE)
return DATA_AREA_ZDA;
@@ -1983,7 +1983,7 @@ static void
v850_set_data_area (tree decl, v850_data_area data_area)
{
tree name;
-
+
switch (data_area)
{
case DATA_AREA_SDA: name = get_identifier ("sda"); break;
@@ -1996,7 +1996,7 @@ v850_set_data_area (tree decl, v850_data_area data_area)
DECL_ATTRIBUTES (decl) = tree_cons
(name, NULL, DECL_ATTRIBUTES (decl));
}
-\f
+
/* Handle an "interrupt" attribute; arguments as in
struct attribute_spec.handler. */
static tree
@@ -2036,7 +2036,7 @@ v850_handle_data_area_attribute (tree *node, tree name,
data_area = DATA_AREA_ZDA;
else
gcc_unreachable ();
-
+
switch (TREE_CODE (decl))
{
case VAR_DECL:
@@ -2059,7 +2059,7 @@ v850_handle_data_area_attribute (tree *node, tree name,
*no_add_attrs = true;
}
break;
-
+
default:
break;
}
@@ -2067,7 +2067,7 @@ v850_handle_data_area_attribute (tree *node, tree name,
return NULL_TREE;
}
-\f
+
/* Return nonzero if FUNC is an interrupt function as specified
by the "interrupt" attribute. */
@@ -2101,7 +2101,7 @@ v850_interrupt_function_p (tree func)
return ret;
}
-\f
+
static void
v850_encode_data_area (tree decl, rtx symbol)
{
@@ -2113,7 +2113,7 @@ v850_encode_data_area (tree decl, rtx symbol)
if (DECL_SECTION_NAME (decl))
{
const char *name = DECL_SECTION_NAME (decl);
-
+
if (streq (name, ".zdata") || streq (name, ".zbss"))
v850_set_data_area (decl, DATA_AREA_ZDA);
@@ -2140,7 +2140,7 @@ v850_encode_data_area (tree decl, rtx symbol)
else if (size <= small_memory_max [(int) SMALL_MEMORY_ZDA])
v850_set_data_area (decl, DATA_AREA_ZDA);
}
-
+
if (v850_get_data_area (decl) == DATA_AREA_NORMAL)
return;
}
@@ -2182,7 +2182,7 @@ construct_restore_jr (rtx op)
unsigned long int last;
int i;
static char buff [256]; /* XXX */
-
+
if (count <= 2)
{
error ("bogus JR construction: %d", count);
@@ -2194,7 +2194,7 @@ construct_restore_jr (rtx op)
gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
-
+
stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
/* Each pop will remove 4 bytes from the stack.... */
@@ -2212,12 +2212,12 @@ construct_restore_jr (rtx op)
for (i = 2; i < count; i++)
{
rtx vector_element = XVECEXP (op, 0, i);
-
+
gcc_assert (GET_CODE (vector_element) == SET);
gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
SImode));
-
+
mask |= 1 << REGNO (SET_DEST (vector_element));
}
@@ -2239,7 +2239,7 @@ construct_restore_jr (rtx op)
{
gcc_assert (!stack_bytes);
gcc_assert (mask & (1 << 29));
-
+
last = 29;
}
@@ -2247,16 +2247,16 @@ construct_restore_jr (rtx op)
We ignore this here, and generate a JR anyway. We will
be popping more registers than is strictly necessary, but
it does save code space. */
-
+
if (TARGET_LONG_CALLS)
{
char name[40];
-
+
if (first == last)
sprintf (name, "__return_%s", reg_names [first]);
else
sprintf (name, "__return_%s_%s", reg_names [first], reg_names [last]);
-
+
sprintf (buff, "movhi hi(%s), r0, r6\n\tmovea lo(%s), r6, r6\n\tjmp r6",
name, name);
}
@@ -2267,7 +2267,7 @@ construct_restore_jr (rtx op)
else
sprintf (buff, "jr __return_%s_%s", reg_names [first], reg_names [last]);
}
-
+
return buff;
}
@@ -2287,8 +2287,8 @@ construct_save_jarl (rtx op)
unsigned long int last;
int i;
static char buff [255]; /* XXX */
-
- if (count <= (TARGET_LONG_CALLS ? 3 : 2))
+
+ if (count <= (TARGET_LONG_CALLS ? 3 : 2))
{
error ("bogus JARL construction: %d", count);
return NULL;
@@ -2299,7 +2299,7 @@ construct_save_jarl (rtx op)
gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) == REG);
gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
-
+
/* Work out how many bytes to push onto the stack after storing the
registers. */
stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
@@ -2319,16 +2319,16 @@ construct_save_jarl (rtx op)
for (i = 1; i < count - (TARGET_LONG_CALLS ? 3 : 2); i++)
{
rtx vector_element = XVECEXP (op, 0, i);
-
+
gcc_assert (GET_CODE (vector_element) == SET);
gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
SImode));
-
+
mask |= 1 << REGNO (SET_SRC (vector_element));
}
- /* Scan for the first register to push. */
+ /* Scan for the first register to push. */
for (first = 0; first < 32; first++)
{
if (mask & (1 << first))
@@ -2346,7 +2346,7 @@ construct_save_jarl (rtx op)
{
gcc_assert (!stack_bytes);
gcc_assert (mask & (1 << 29));
-
+
last = 29;
}
@@ -2354,16 +2354,16 @@ construct_save_jarl (rtx op)
We ignore this here, and generate a JARL anyway. We will
be pushing more registers than is strictly necessary, but
it does save code space. */
-
+
if (TARGET_LONG_CALLS)
{
char name[40];
-
+
if (first == last)
sprintf (name, "__save_%s", reg_names [first]);
else
sprintf (name, "__save_%s_%s", reg_names [first], reg_names [last]);
-
+
if (TARGET_V850E3V5_UP)
sprintf (buff, "mov hilo(%s), r11\n\tjarl [r11], r10", name);
else
@@ -2404,12 +2404,12 @@ v850_output_aligned_bss (FILE * file,
case DATA_AREA_TDA:
switch_to_section (tdata_section);
break;
-
+
default:
switch_to_section (bss_section);
break;
}
-
+
ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
#ifdef ASM_DECLARE_OBJECT_NAME
last_assemble_variable_decl = decl;
@@ -2448,13 +2448,13 @@ v850_output_common (FILE * file,
case DATA_AREA_TDA:
fprintf (file, "%s", TCOMMON_ASM_OP);
break;
-
+
default:
fprintf (file, "%s", COMMON_ASM_OP);
break;
}
}
-
+
assemble_name (file, name);
fprintf (file, ",%u,%u\n", size, align / BITS_PER_UNIT);
}
@@ -2470,7 +2470,7 @@ v850_output_local (FILE * file,
fprintf (file, "%s", LOCAL_ASM_OP);
assemble_name (file, name);
fprintf (file, "\n");
-
+
ASM_OUTPUT_ALIGNED_DECL_COMMON (file, decl, name, size, align);
}
@@ -2488,7 +2488,7 @@ v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
/* Initialize the default names of the v850 specific sections,
if this has not been done before. */
-
+
if (GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA] == NULL)
{
GHS_default_section_names [(int) GHS_SECTION_KIND_SDATA]
@@ -2499,14 +2499,14 @@ v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
GHS_default_section_names [(int) GHS_SECTION_KIND_TDATA]
= ".tdata";
-
+
GHS_default_section_names [(int) GHS_SECTION_KIND_ZDATA]
= ".zdata";
GHS_default_section_names [(int) GHS_SECTION_KIND_ROZDATA]
= ".rozdata";
}
-
+
if (current_function_decl == NULL_TREE
&& (TREE_CODE (decl) == VAR_DECL
|| TREE_CODE (decl) == CONST_DECL
@@ -2526,23 +2526,23 @@ v850_insert_attributes (tree decl, tree * attr_ptr ATTRIBUTE_UNUSED )
{
default:
gcc_unreachable ();
-
+
case DATA_AREA_SDA:
kind = ((TREE_READONLY (decl))
? GHS_SECTION_KIND_ROSDATA
: GHS_SECTION_KIND_SDATA);
break;
-
+
case DATA_AREA_TDA:
kind = GHS_SECTION_KIND_TDATA;
break;
-
+
case DATA_AREA_ZDA:
kind = ((TREE_READONLY (decl))
? GHS_SECTION_KIND_ROZDATA
: GHS_SECTION_KIND_ZDATA);
break;
-
+
case DATA_AREA_NORMAL: /* default data area */
if (TREE_READONLY (decl))
kind = GHS_SECTION_KIND_RODATA;
@@ -2585,7 +2585,7 @@ construct_dispose_instruction (rtx op)
int i;
static char buff[ 120 ]; /* XXX */
int use_callt = 0;
-
+
if (count <= 2)
{
error ("bogus DISPOSE construction: %d", count);
@@ -2597,7 +2597,7 @@ construct_dispose_instruction (rtx op)
gcc_assert (GET_CODE (XVECEXP (op, 0, 1)) == SET);
gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS);
gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1)) == CONST_INT);
-
+
stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1));
/* Each pop will remove 4 bytes from the stack.... */
@@ -2617,7 +2617,7 @@ construct_dispose_instruction (rtx op)
for (i = 2; i < count; i++)
{
rtx vector_element = XVECEXP (op, 0, i);
-
+
gcc_assert (GET_CODE (vector_element) == SET);
gcc_assert (GET_CODE (SET_DEST (vector_element)) == REG);
gcc_assert (register_is_ok_for_epilogue (SET_DEST (vector_element),
@@ -2642,7 +2642,7 @@ construct_dispose_instruction (rtx op)
for (i = 20; i < 32; i++)
if (mask & (1 << i))
break;
-
+
if (i == 31)
sprintf (buff, "callt ctoff(__callt_return_r31c)");
else
@@ -2654,31 +2654,31 @@ construct_dispose_instruction (rtx op)
{
static char regs [100]; /* XXX */
int done_one;
-
+
/* Generate the DISPOSE instruction. Note we could just issue the
bit mask as a number as the assembler can cope with this, but for
the sake of our readers we turn it into a textual description. */
regs[0] = 0;
done_one = 0;
-
+
for (i = 20; i < 32; i++)
{
if (mask & (1 << i))
{
int first;
-
+
if (done_one)
strcat (regs, ", ");
else
done_one = 1;
-
+
first = i;
strcat (regs, reg_names[ first ]);
-
+
for (i++; i < 32; i++)
if ((mask & (1 << i)) == 0)
break;
-
+
if (i > first + 1)
{
strcat (regs, " - ");
@@ -2686,10 +2686,10 @@ construct_dispose_instruction (rtx op)
}
}
}
-
+
sprintf (buff, "dispose %d {%s}, r31", stack_bytes / 4, regs);
}
-
+
return buff;
}
@@ -2706,7 +2706,7 @@ construct_prepare_instruction (rtx op)
int i;
static char buff[ 120 ]; /* XXX */
int use_callt = 0;
-
+
if (XVECLEN (op, 0) <= 1)
{
error ("bogus PREPEARE construction: %d", XVECLEN (op, 0));
@@ -2718,7 +2718,7 @@ construct_prepare_instruction (rtx op)
gcc_assert (GET_CODE (XVECEXP (op, 0, 0)) == SET);
gcc_assert (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) == PLUS);
gcc_assert (GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1)) == CONST_INT);
-
+
stack_bytes = INTVAL (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 1));
@@ -2736,10 +2736,10 @@ construct_prepare_instruction (rtx op)
for (i = 1; i < XVECLEN (op, 0); i++)
{
rtx vector_element = XVECEXP (op, 0, i);
-
+
if (GET_CODE (vector_element) == CLOBBER)
continue;
-
+
gcc_assert (GET_CODE (vector_element) == SET);
gcc_assert (GET_CODE (SET_SRC (vector_element)) == REG);
gcc_assert (register_is_ok_for_epilogue (SET_SRC (vector_element),
@@ -2762,7 +2762,7 @@ construct_prepare_instruction (rtx op)
sprintf (buff, "callt ctoff(__callt_save_r2_r%d)", (mask & (1 << 31)) ? 31 : 29 );
return buff;
}
-
+
for (i = 20; i < 32; i++)
if (mask & (1 << i))
break;
@@ -2778,31 +2778,31 @@ construct_prepare_instruction (rtx op)
static char regs [100]; /* XXX */
int done_one;
-
+
/* Generate the PREPARE instruction. Note we could just issue the
bit mask as a number as the assembler can cope with this, but for
- the sake of our readers we turn it into a textual description. */
+ the sake of our readers we turn it into a textual description. */
regs[0] = 0;
done_one = 0;
-
+
for (i = 20; i < 32; i++)
{
if (mask & (1 << i))
{
int first;
-
+
if (done_one)
strcat (regs, ", ");
else
done_one = 1;
-
+
first = i;
strcat (regs, reg_names[ first ]);
-
+
for (i++; i < 32; i++)
if ((mask & (1 << i)) == 0)
break;
-
+
if (i > first + 1)
{
strcat (regs, " - ");
@@ -2810,10 +2810,10 @@ construct_prepare_instruction (rtx op)
}
}
}
-
+
sprintf (buff, "prepare {%s}, %d", regs, (- stack_bytes) / 4);
}
-
+
return buff;
}
@@ -2828,7 +2828,7 @@ v850_return_addr (int count)
return get_hard_reg_initial_val (Pmode, LINK_POINTER_REGNUM);
}
-\f
+
/* Implement TARGET_ASM_INIT_SECTIONS. */
static void
@@ -2890,7 +2890,7 @@ v850_select_section (tree exp,
}
return readonly_data_section;
}
-\f
+
/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. */
static bool
@@ -2915,7 +2915,7 @@ v850_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
/* Worker function for TARGET_FUNCTION_VALUE. */
static rtx
-v850_function_value (const_tree valtype,
+v850_function_value (const_tree valtype,
const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
bool outgoing ATTRIBUTE_UNUSED)
{
@@ -2931,7 +2931,7 @@ v850_libcall_value (machine_mode mode,
return gen_rtx_REG (mode, RV_REGNUM);
}
-\f
+
/* Worker function for TARGET_CAN_ELIMINATE. */
static bool
@@ -2954,7 +2954,7 @@ v850_conditional_register_usage (void)
fixed_regs[5] = 0; call_used_regs[5] = 1;
}
}
-\f
+
/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
static void
@@ -3064,7 +3064,7 @@ v850_legitimate_address_p (machine_mode mode, rtx x, bool strict_p,
+ (GET_MODE_NUNITS (mode) * UNITS_PER_WORD))))
return true;
- return false;
+ return false;
}
static int
@@ -3111,7 +3111,7 @@ v850_adjust_insn_length (rtx_insn *insn, int length)
}
return length;
}
-\f
+
/* V850 specific attributes. */
static const struct attribute_spec v850_attribute_table[] =
@@ -3130,7 +3130,7 @@ static const struct attribute_spec v850_attribute_table[] =
v850_handle_data_area_attribute, NULL },
{ NULL, 0, 0, false, false, false, false, NULL, NULL }
};
-\f
+
static void
v850_option_override (void)
{
@@ -3146,7 +3146,7 @@ v850_option_override (void)
target_option_default_node = target_option_current_node
= build_target_option_node (&global_options, &global_options_set);
}
-\f
+
const char *
v850_gen_movdi (rtx * operands)
{
@@ -3177,7 +3177,7 @@ v850_gen_movdi (rtx * operands)
if (REGNO (operands[1]) & 1)
/* Use two store word instructions to synthesise a store double. */
return "st.w %1, %0 ; st.w %R1, %R0 ";
-
+
return "st.dw %1, %0";
}
@@ -3220,7 +3220,7 @@ v850_can_inline_p (tree caller, tree callee)
== (callee_opts->x_target_flags & ~safe_flags));
}
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_OPTION_OVERRIDE
diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h
index 80064c68f91..843beb11f59 100644
--- a/gcc/config/v850/v850.h
+++ b/gcc/config/v850/v850.h
@@ -63,7 +63,7 @@
#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
#undef MASK_DEFAULT
-#define MASK_DEFAULT MASK_V850E /* No practical difference. */
+#define MASK_DEFAULT MASK_V850E /* No practical difference. */
#undef SUBTARGET_ASM_SPEC
#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}"
#undef SUBTARGET_CPP_SPEC
@@ -72,7 +72,7 @@
#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2
#undef MASK_DEFAULT
-#define MASK_DEFAULT MASK_V850E2
+#define MASK_DEFAULT MASK_V850E2
#undef SUBTARGET_ASM_SPEC
#define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}"
#undef SUBTARGET_CPP_SPEC
@@ -99,7 +99,7 @@
#define TARGET_VERSION fprintf (stderr, " (Renesas V850E3V5)");
#endif
-#define TARGET_V850E3V5_UP ((TARGET_V850E3V5))
+#define TARGET_V850E3V5_UP ((TARGET_V850E3V5))
#define TARGET_V850E2V3_UP ((TARGET_V850E2V3) || TARGET_V850E3V5_UP)
#define TARGET_V850E2_UP ((TARGET_V850E2) || TARGET_V850E2V3_UP)
#define TARGET_V850E_UP ((TARGET_V850E) || TARGET_V850E2_UP)
@@ -127,7 +127,7 @@
#define EXTRA_SPECS \
{ "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
- { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
+ { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
/* Macro to decide when FPU instructions can be used. */
@@ -157,7 +157,7 @@
while(0)
#define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3 | MASK_V850E3V5)
-\f
+
/* Target machine storage layout */
/* Define this if most significant bit is lowest numbered
@@ -230,7 +230,7 @@
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -288,7 +288,7 @@
34, 35 \
}
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -308,7 +308,7 @@
For any two classes, it is very desirable that there be another
class that represents their union. */
-
+
enum reg_class
{
NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
@@ -353,7 +353,7 @@ enum reg_class
Since they use reg_renumber, they are safe only once reg_renumber
has been allocated, which happens in reginfo.cc during register
allocation. */
-
+
#define REGNO_OK_FOR_BASE_P(regno) \
(((regno) < FIRST_PSEUDO_REGISTER \
&& (regno) != CC_REGNUM \
@@ -380,7 +380,7 @@ enum reg_class
insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O)
#define CONST_OK_FOR_W(VALUE) \
insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_W)
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -412,7 +412,7 @@ enum reg_class
/* Register containing return address from latest function call. */
#define LINK_POINTER_REGNUM LP_REGNUM
-
+
/* On some machines the offset between the frame pointer and starting
offset of the automatic variables is not known until after register
allocation has been done (for example, because the saved registers
@@ -432,7 +432,7 @@ enum reg_class
Do not define this macro if it would be the same as
`FRAME_POINTER_REGNUM'. */
-#undef HARD_FRAME_POINTER_REGNUM
+#undef HARD_FRAME_POINTER_REGNUM
#define HARD_FRAME_POINTER_REGNUM 29
/* Base register for access to arguments of the function. */
@@ -491,7 +491,7 @@ enum reg_class
#define ACCUMULATE_OUTGOING_ARGS 1
#define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT)
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -542,7 +542,7 @@ struct cum_arg { int nbytes; };
/* Addressing modes, and classification of registers for them. */
-\f
+
/* 1 if X is an rtx for a constant that is a valid address. */
/* ??? This seems too exclusive. May get better code by accepting more
@@ -553,7 +553,7 @@ struct cum_arg { int nbytes; };
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 1
-\f
+
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
return the mode to be used for the comparison.
@@ -578,7 +578,7 @@ struct cum_arg { int nbytes; };
#define NO_FUNCTION_CSE 1
/* The four different data regions on the v850. */
-typedef enum
+typedef enum
{
DATA_AREA_NORMAL,
DATA_AREA_SDA,
@@ -617,7 +617,7 @@ typedef enum
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
-#undef ASM_OUTPUT_ALIGNED_BSS
+#undef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
@@ -634,7 +634,7 @@ typedef enum
#undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
v850_output_local (FILE, DECL, NAME, SIZE, ALIGN)
-
+
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.global "
@@ -767,26 +767,26 @@ typedef enum
can appear in the "ghs section" pragma. These names are used to index
into the GHS_default_section_names[] and GHS_current_section_names[]
that are defined in v850.cc, and so the ordering of each must remain
- consistent.
+ consistent.
- These arrays give the default and current names for each kind of
+ These arrays give the default and current names for each kind of
section defined by the GHS pragmas. The current names can be changed
- by the "ghs section" pragma. If the current names are null, use
+ by the "ghs section" pragma. If the current names are null, use
the default names. Note that the two arrays have different types.
For the *normal* section kinds (like .data, .text, etc.) we do not
want to explicitly force the name of these sections, but would rather
- let the linker (or at least the back end) choose the name of the
+ let the linker (or at least the back end) choose the name of the
section, UNLESS the user has forced a specific name for these section
kinds. To accomplish this set the name in ghs_default_section_names
to null. */
enum GHS_section_kind
-{
+{
GHS_SECTION_KIND_DEFAULT,
GHS_SECTION_KIND_TEXT,
- GHS_SECTION_KIND_DATA,
+ GHS_SECTION_KIND_DATA,
GHS_SECTION_KIND_RODATA,
GHS_SECTION_KIND_BSS,
GHS_SECTION_KIND_SDATA,
diff --git a/gcc/config/vax/vax.cc b/gcc/config/vax/vax.cc
index 28c1af59a99..d13c75ec476 100644
--- a/gcc/config/vax/vax.cc
+++ b/gcc/config/vax/vax.cc
@@ -68,7 +68,7 @@ static void vax_trampoline_init (rtx, tree, rtx);
static poly_int64 vax_return_pops_args (tree, tree, poly_int64);
static bool vax_mode_dependent_address_p (const_rtx, addr_space_t);
static HOST_WIDE_INT vax_starting_frame_offset (void);
-\f
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
@@ -142,7 +142,7 @@ static HOST_WIDE_INT vax_starting_frame_offset (void);
#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Set global variables as needed for the options enabled. */
static void
@@ -301,7 +301,7 @@ split_quadword_operands (rtx insn, enum rtx_code code, rtx * operands,
}
}
}
-\f
+
void
print_operand_address (FILE * file, rtx addr)
{
@@ -581,7 +581,7 @@ print_operand (FILE *file, rtx x, int code)
output_addr_const (file, x);
}
}
-\f
+
const char *
cond_name (rtx op)
{
@@ -1055,7 +1055,7 @@ vax_rtx_costs (rtx x, machine_mode mode, int outer_code,
}
return true;
}
-\f
+
/* With ELF we do not support GOT entries for external `symbol+offset'
references, so do not accept external symbol references if an offset
is to be added. Do not accept external symbol references at all if
@@ -1088,7 +1088,7 @@ vax_acceptable_pic_operand_p (rtx x ATTRIBUTE_UNUSED,
#endif
return true;
}
-\f
+
/* Given a comparison code (NE, EQ, etc.) and the operands of a COMPARE,
return the mode to be used for the comparison. As we have the same
interpretation of condition codes across all the instructions we just
@@ -1171,7 +1171,7 @@ vax_cc_modes_compatible (machine_mode m1, machine_mode m2)
}
}
}
-\f
+
/* Mark PSL as clobbered for compatibility with the CC0 representation. */
static rtx_insn *
@@ -1186,7 +1186,7 @@ vax_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
SET_HARD_REG_BIT (clobbered_regs, VAX_PSL_REGNUM);
return NULL;
}
-\f
+
/* Output code to add DELTA to the first argument, and then jump to FUNCTION.
Used for C++ multiple inheritance.
.mask ^m<r2,r3,r4,r5,r6,r7,r8,r9,r10,r11> #conservative entry mask
@@ -1211,7 +1211,7 @@ vax_output_mi_thunk (FILE * file,
fprintf (file, "+2\n");
assemble_end_function (thunk, fnname);
}
-\f
+
static rtx
vax_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
int incoming ATTRIBUTE_UNUSED)
diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h
index 12c51e53db6..d55496b69d1 100644
--- a/gcc/config/vax/vax.h
+++ b/gcc/config/vax/vax.h
@@ -61,7 +61,7 @@ along with GCC; see the file COPYING3. If not see
#define TARGET_DEFAULT (MASK_UNIX_ASM)
#endif
-\f
+
/* Target machine storage layout */
/* Define this if most significant bit is lowest numbered
@@ -112,7 +112,7 @@ along with GCC; see the file COPYING3. If not see
/* The table of an ADDR_DIFF_VEC must be contiguous with the case
opcode, it is part of the case instruction. */
#define ADDR_VEC_ALIGN(ADDR_VEC) 0
-\f
+
/* Standard register usage. */
/* Number of actual hardware registers.
@@ -159,7 +159,7 @@ along with GCC; see the file COPYING3. If not see
/* Register in which address to store a structure value
is passed to a function. */
#define VAX_STRUCT_VALUE_REGNUM 1
-\f
+
/* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants.
@@ -215,7 +215,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
#define INDEX_REG_CLASS ALL_REGS
#define BASE_REG_CLASS ALL_REGS
-\f
+
/* Stack layout; function entry, exit and calling. */
/* Define this if pushing a word on the stack
@@ -272,7 +272,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
On the VAX, no registers are used in this way. */
#define FUNCTION_ARG_REGNO_P(N) ((void) (N), 0)
-\f
+
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -346,7 +346,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
RETURN_ADDRESS_OFFSET)) \
: (rtx) 0)
-\f
+
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT 1
@@ -366,7 +366,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
#define REGNO_OK_FOR_BASE_P(regno) \
((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
-\f
+
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
@@ -407,7 +407,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#endif
-\f
+
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE HImode
@@ -465,13 +465,13 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
used to replace branches can be expensive. */
#define BRANCH_COST(speed_p, predictable_p) 0
-\f
+
/* Given a comparison code (NE, EQ, etc.) and the operands of a COMPARE,
return the mode to be used for the comparison. As we have the same
interpretation of condition codes across all the instructions we just
return the narrowest mode suitable for the comparison code requested. */
#define SELECT_CC_MODE(OP, X, Y) vax_select_cc_mode (OP, X, Y)
-\f
+
/* Control the assembler format that we output. */
/* A C string constant describing how to begin a comment in the target
diff --git a/gcc/config/visium/visium.h b/gcc/config/visium/visium.h
index 4b78611de62..de61a29e4ea 100644
--- a/gcc/config/visium/visium.h
+++ b/gcc/config/visium/visium.h
@@ -119,7 +119,7 @@
data area approach is no longer used, these pointers are no longer
supported.
- The macro and function pointers are described below.
+ The macro and function pointers are described below.
INIT_EXPANDERS:
@@ -1032,7 +1032,7 @@ struct visium_args
A difficulty is setting the correct instruction parity at run time.
- TRAMPOLINE_SIZE
+ TRAMPOLINE_SIZE
A C expression for the size in bytes of the trampoline, as an integer. */
#define TRAMPOLINE_SIZE (visium_cpu == PROCESSOR_GR6 ? 24 : 20)
diff --git a/gcc/config/vx-common.h b/gcc/config/vx-common.h
index 83580d0dec2..1bafe926eb6 100644
--- a/gcc/config/vx-common.h
+++ b/gcc/config/vx-common.h
@@ -1,4 +1,4 @@
-/* Target-independent configuration for VxWorks and VxWorks AE.
+/* Target-independent configuration for VxWorks and VxWorks AE.
Copyright (C) 2005-2023 Free Software Foundation, Inc.
Contributed by CodeSourcery, LLC.
diff --git a/gcc/config/vxworks.cc b/gcc/config/vxworks.cc
index 2246ecc7301..2555e69a319 100644
--- a/gcc/config/vxworks.cc
+++ b/gcc/config/vxworks.cc
@@ -72,9 +72,9 @@ static tree
vxworks_emutls_var_fields (tree type, tree *name)
{
tree field, next_field;
-
+
*name = get_identifier ("__tls_var");
-
+
field = build_decl (BUILTINS_LOCATION, FIELD_DECL,
get_identifier ("size"), unsigned_type_node);
DECL_CONTEXT (field) = type;
@@ -106,23 +106,23 @@ vxworks_emutls_var_init (tree var, tree decl, tree tmpl_addr)
{
vec<constructor_elt, va_gc> *v;
vec_alloc (v, 3);
-
+
tree type = TREE_TYPE (var);
tree field = TYPE_FIELDS (type);
-
+
constructor_elt elt = {field, fold_convert (TREE_TYPE (field), tmpl_addr)};
v->quick_push (elt);
-
+
field = DECL_CHAIN (field);
elt.index = field;
elt.value = build_int_cst (TREE_TYPE (field), 0);
v->quick_push (elt);
-
+
field = DECL_CHAIN (field);
elt.index = field;
elt.value = fold_convert (TREE_TYPE (field), DECL_SIZE_UNIT (decl));
v->quick_push (elt);
-
+
return build_constructor (type, v);
}
@@ -155,7 +155,7 @@ vxworks_override_options (void)
the toolchain user is expected to provide whatever linker level glue is
required to get things to operate properly. */
- targetm.have_ctors_dtors =
+ targetm.have_ctors_dtors =
TARGET_VXWORKS_HAVE_CTORS_DTORS || HAVE_INITFINI_ARRAY_SUPPORT;
/* PIC is only supported for RTPs. flags_pic might be < 0 here, in
diff --git a/gcc/config/vxworksae.h b/gcc/config/vxworksae.h
index 9e8f28e4911..bdfb8ecde32 100644
--- a/gcc/config/vxworksae.h
+++ b/gcc/config/vxworksae.h
@@ -45,7 +45,7 @@ along with GCC; see the file COPYING3. If not see
#undef VXWORKS_LINK_SPEC
#define VXWORKS_LINK_SPEC \
"-r %{v:-V}"
-
+
#undef VXWORKS_LIBGCC_SPEC
#define VXWORKS_LIBGCC_SPEC \
"-lgcc"
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index ae44199bc98..220c117c8f7 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -204,7 +204,7 @@ static bool xtensa_lra_p (void);
static rtx xtensa_delegitimize_address (rtx);
-\f
+
/* These hooks specify assembly directives for creating certain kinds
of integer object. */
@@ -373,7 +373,7 @@ static rtx xtensa_delegitimize_address (rtx);
struct gcc_target targetm = TARGET_INITIALIZER;
-\f
+
/* Functions to test Xtensa immediate operand validity. */
bool
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index a7c112b8753..7ba7ba4e9e0 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -65,7 +65,7 @@ along with GCC; see the file COPYING3. If not see
#define TARGET_HAS_NO_HW_DIVIDE
#endif
-\f
+
/* Target CPU builtins. */
#define TARGET_CPU_CPP_BUILTINS() \
do { \
diff --git a/gcc/convert.cc b/gcc/convert.cc
index fe85bcb3323..3b61fbf8451 100644
--- a/gcc/convert.cc
+++ b/gcc/convert.cc
@@ -159,7 +159,7 @@ convert_to_real_1 (tree type, tree expr, bool fold_p)
return expr;
return build2_loc (EXPR_LOCATION (expr), COMPOUND_EXPR, TREE_TYPE (t),
TREE_OPERAND (expr, 0), t);
- }
+ }
/* Disable until we figure out how to decide whether the functions are
present in runtime. */
@@ -449,7 +449,7 @@ do_narrow (location_t loc,
convert (typex, arg1));
return convert (type, expr);
}
-
+
return NULL_TREE;
}
@@ -487,7 +487,7 @@ convert_to_integer_1 (tree type, tree expr, bool dofold)
return expr;
return build2_loc (EXPR_LOCATION (expr), COMPOUND_EXPR, TREE_TYPE (t),
TREE_OPERAND (expr, 0), t);
- }
+ }
/* Convert e.g. (long)round(d) -> lround(d). */
/* If we're converting to char, we may encounter differing behavior
diff --git a/gcc/coretypes.h b/gcc/coretypes.h
index ca8837cef67..a4348e4b6b3 100644
--- a/gcc/coretypes.h
+++ b/gcc/coretypes.h
@@ -457,7 +457,7 @@ typedef unsigned char uchar;
#if !defined (USED_FOR_TARGET)
#include "insn-modes.h"
#include "signop.h"
-#include "wide-int.h"
+#include "wide-int.h"
#include "wide-int-print.h"
/* On targets that don't need polynomial offsets, target-specific code
diff --git a/gcc/coverage.cc b/gcc/coverage.cc
index 7ed3a5d4ceb..14035d27b83 100644
--- a/gcc/coverage.cc
+++ b/gcc/coverage.cc
@@ -131,7 +131,7 @@ static const char *const ctr_names[GCOV_COUNTERS] = {
/* Forward declarations. */
static tree build_var (tree, tree, int);
-\f
+
/* Return the type node for gcov_type. */
tree
@@ -150,7 +150,7 @@ get_gcov_unsigned_t (void)
scalar_int_mode mode = smallest_int_mode_for_size (32);
return lang_hooks.types.type_for_mode (mode, true);
}
-\f
+
inline hashval_t
counts_entry::hash (const counts_entry *entry)
{
@@ -377,7 +377,7 @@ get_coverage_counts (unsigned counter, unsigned cfg_checksum,
"use -Wno-error=coverage-mismatch to tolerate "
"the mismatch but performance may drop if the "
"function is hot\n");
-
+
if (!seen_error ()
&& !warned++)
{
@@ -429,7 +429,7 @@ coverage_counter_alloc (unsigned counter, unsigned num)
fn_b_ctrs[counter] = fn_n_ctrs[counter];
fn_n_ctrs[counter] += num;
-
+
fn_ctr_mask |= 1 << counter;
return 1;
}
@@ -444,7 +444,7 @@ tree_coverage_counter_ref (unsigned counter, unsigned no)
gcc_assert (no < fn_n_ctrs[counter] - fn_b_ctrs[counter]);
no += fn_b_ctrs[counter];
-
+
/* "no" here is an array index, scaled to bytes later. */
return build4 (ARRAY_REF, gcov_type_node, fn_v_ctrs[counter],
build_int_cst (integer_type_node, no), NULL, NULL);
@@ -466,7 +466,7 @@ tree_coverage_counter_addr (unsigned counter, unsigned no)
build_int_cst (integer_type_node, no),
NULL, NULL));
}
-\f
+
/* Generate a checksum for a string. CHKSUM is the current
checksum. */
@@ -614,7 +614,7 @@ coverage_compute_cfg_checksum (struct function *fn)
return chksum;
}
-\f
+
/* Begin output to the notes file for the current function.
Writes the function header. Returns nonzero if data should be output. */
@@ -727,7 +727,7 @@ coverage_end_function (unsigned lineno_checksum, unsigned cfg_checksum)
DECL_SIZE_UNIT (var) = TYPE_SIZE_UNIT (array_type);
varpool_node::finalize_decl (var);
}
-
+
fn_b_ctrs[i] = fn_n_ctrs[i] = 0;
fn_v_ctrs[i] = NULL_TREE;
}
@@ -789,18 +789,18 @@ build_fn_info_type (tree type, unsigned counters, tree gcov_info_type)
tree array_type;
gcc_assert (counters);
-
+
/* ctr_info::num */
field = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE,
get_gcov_unsigned_t ());
fields = field;
-
+
/* ctr_info::values */
field = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE,
build_pointer_type (get_gcov_type ()));
DECL_CHAIN (field) = fields;
fields = field;
-
+
finish_builtin_struct (ctr_info, "__gcov_ctr_info", fields, NULL_TREE);
/* key */
@@ -808,13 +808,13 @@ build_fn_info_type (tree type, unsigned counters, tree gcov_info_type)
build_pointer_type (build_qualified_type
(gcov_info_type, TYPE_QUAL_CONST)));
fields = field;
-
+
/* ident */
field = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE,
get_gcov_unsigned_t ());
DECL_CHAIN (field) = fields;
fields = field;
-
+
/* lineno_checksum */
field = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE,
get_gcov_unsigned_t ());
@@ -855,7 +855,7 @@ build_fn_info (const struct coverage_data *data, tree type, tree key)
CONSTRUCTOR_APPEND_ELT (v1, fields,
build1 (ADDR_EXPR, TREE_TYPE (fields), key));
fields = DECL_CHAIN (fields);
-
+
/* ident */
CONSTRUCTOR_APPEND_ELT (v1, fields,
build_int_cstu (get_gcov_unsigned_t (),
@@ -895,10 +895,10 @@ build_fn_info (const struct coverage_data *data, tree type, tree key)
if (var)
CONSTRUCTOR_APPEND_ELT (ctr, DECL_CHAIN (TYPE_FIELDS (ctr_type)),
build_fold_addr_expr (var));
-
+
CONSTRUCTOR_APPEND_ELT (v2, NULL, build_constructor (ctr_type, ctr));
}
-
+
CONSTRUCTOR_APPEND_ELT (v1, fields,
build_constructor (TREE_TYPE (fields), v2));
@@ -958,13 +958,13 @@ build_info_type (tree type, tree fn_info_ptr_type)
merge_fn_type);
DECL_CHAIN (field) = fields;
fields = field;
-
+
/* n_functions */
field = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE,
get_gcov_unsigned_t ());
DECL_CHAIN (field) = fields;
fields = field;
-
+
/* function_info pointer pointer */
fn_info_ptr_type = build_pointer_type
(build_qualified_type (fn_info_ptr_type, TYPE_QUAL_CONST));
@@ -1173,7 +1173,7 @@ coverage_obj_init (void)
for (ix = 0; ix != GCOV_COUNTERS; ix++)
if ((1u << ix) & prg_ctr_mask)
n_counters++;
-
+
/* Build the info and fn_info types. These are mutually recursive. */
gcov_info_type = lang_hooks.types.make_type (RECORD_TYPE);
gcov_fn_info_type = lang_hooks.types.make_type (RECORD_TYPE);
@@ -1182,7 +1182,7 @@ coverage_obj_init (void)
gcov_fn_info_ptr_type = build_pointer_type
(build_qualified_type (gcov_fn_info_type, TYPE_QUAL_CONST));
build_info_type (gcov_info_type, gcov_fn_info_ptr_type);
-
+
/* Build the gcov info var, this is referred to in its own
initializer. */
gcov_info_var = build_decl (BUILTINS_LOCATION,
@@ -1211,10 +1211,10 @@ coverage_obj_fn (vec<constructor_elt, va_gc> *ctor, tree fn,
{
tree init = build_fn_info (data, gcov_fn_info_type, gcov_info_var);
tree var = build_var (fn, gcov_fn_info_type, -1);
-
+
DECL_INITIAL (var) = init;
varpool_node::finalize_decl (var);
-
+
CONSTRUCTOR_APPEND_ELT (ctor, NULL,
build1 (ADDR_EXPR, gcov_fn_info_ptr_type, var));
return ctor;
@@ -1240,7 +1240,7 @@ coverage_obj_finish (vec<constructor_elt, va_gc> *ctor,
DECL_NAME (fn_info_ary) = get_identifier (name_buf);
DECL_INITIAL (fn_info_ary) = build_constructor (fn_info_ary_type, ctor);
varpool_node::finalize_decl (fn_info_ary);
-
+
DECL_INITIAL (gcov_info_var)
= build_info (TREE_TYPE (gcov_info_var), fn_info_ary, object_checksum);
varpool_node::finalize_decl (gcov_info_var);
@@ -1372,7 +1372,7 @@ coverage_finish (void)
{
vec<constructor_elt, va_gc> *fn_ctor = NULL;
struct coverage_data *fn;
-
+
for (fn = functions_head; fn; fn = fn->next)
{
fn_ctor = coverage_obj_fn (fn_ctor, fn->fn_decl, fn);
diff --git a/gcc/cp/call.cc b/gcc/cp/call.cc
index c25df174280..1ea00e35fe6 100644
--- a/gcc/cp/call.cc
+++ b/gcc/cp/call.cc
@@ -451,7 +451,7 @@ struct conversion_info {
/* The location of the argument. */
location_t loc;
};
-
+
struct rejection_reason {
enum rejection_reason_code code;
union {
@@ -1857,7 +1857,7 @@ reference_binding (tree rto, tree rfrom, tree expr, bool c_cast_p, int flags,
conv->rvaluedness_matches_p
= (TYPE_REF_IS_RVALUE (rto) == TYPE_REF_IS_RVALUE (rfrom));
else
- conv->rvaluedness_matches_p
+ conv->rvaluedness_matches_p
= (TYPE_REF_IS_RVALUE (rto) == !is_lvalue);
if ((gl_kind & clk_bitfield) != 0
@@ -2981,16 +2981,16 @@ add_builtin_candidate (struct z_candidate **candidates, enum tree_code code,
break;
if (TYPE_PTR_P (type1) && TYPE_PTR_P (type2))
break;
- if (TREE_CODE (type1) == ENUMERAL_TYPE
+ if (TREE_CODE (type1) == ENUMERAL_TYPE
&& TREE_CODE (type2) == ENUMERAL_TYPE)
break;
- if (TYPE_PTR_P (type1)
+ if (TYPE_PTR_P (type1)
&& null_ptr_cst_p (args[1]))
{
type2 = type1;
break;
}
- if (null_ptr_cst_p (args[0])
+ if (null_ptr_cst_p (args[0])
&& TYPE_PTR_P (type2))
{
type1 = type2;
@@ -3155,7 +3155,7 @@ add_builtin_candidate (struct z_candidate **candidates, enum tree_code code,
if (ARITHMETIC_TYPE_P (type1))
break;
return;
-
+
default:
gcc_unreachable ();
}
@@ -5316,7 +5316,7 @@ build_op_call (tree obj, vec<tree, va_gc> **args, tsubst_flags_t complain)
if (complain & tf_error)
{
auto_diagnostic_group d;
- error ("call of %<(%T) (%A)%> is ambiguous",
+ error ("call of %<(%T) (%A)%> is ambiguous",
TREE_TYPE (obj), build_tree_list_vec (*args));
print_z_candidates (location_of (TREE_TYPE (obj)), candidates);
}
@@ -7057,7 +7057,7 @@ build_new_op (const op_location_t &loc, enum tree_code code, int flags,
else
{
tree fnname = ovl_op_identifier (ismodop, ismodop ? code2 : code);
- const char *msg = (flag_permissive)
+ const char *msg = (flag_permissive)
? G_("no %<%D(int)%> declared for postfix %qs,"
" trying prefix operator instead")
: G_("no %<%D(int)%> declared for postfix %qs");
@@ -8743,7 +8743,7 @@ convert_like_internal (conversion *convs, tree expr, tree fn, int argnum,
else if (complain & tf_warning)
maybe_warn_array_conv (loc, convs, expr);
- /* If necessary, create a temporary.
+ /* If necessary, create a temporary.
VA_ARG_EXPR and CONSTRUCTOR expressions are special cases
that need temporaries, even when their types are reference
@@ -9231,7 +9231,7 @@ convert_for_arg_passing (tree type, tree val, tsubst_flags_t complain)
tree bitfield_type;
/* If VAL is a bitfield, then -- since it has already been converted
- to TYPE -- it cannot have a precision greater than TYPE.
+ to TYPE -- it cannot have a precision greater than TYPE.
If it has a smaller precision, we must widen it here. For
example, passing "int f:3;" to a function expecting an "int" will
@@ -9245,7 +9245,7 @@ convert_for_arg_passing (tree type, tree val, tsubst_flags_t complain)
if we call convert_bitfield_to_declared_type, the bitfield will
be converted to "long long". */
bitfield_type = is_bitfield_expr_with_lowered_type (val);
- if (bitfield_type
+ if (bitfield_type
&& TYPE_PRECISION (TREE_TYPE (val)) < TYPE_PRECISION (type))
val = convert_to_integer_nofold (TYPE_MAIN_VARIANT (bitfield_type), val);
@@ -9350,7 +9350,7 @@ get_function_version_dispatcher (tree fn)
return dispatcher_decl;
}
-/* fn is a function version dispatcher that is marked used. Mark all the
+/* fn is a function version dispatcher that is marked used. Mark all the
semantically identical function versions it will dispatch as used. */
void
@@ -10216,8 +10216,8 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain)
if (! flag_elide_constructors && !force_elide)
/* Do things the hard way. */;
- else if (cand->num_convs == 1
- && (DECL_COPY_CONSTRUCTOR_P (fn)
+ else if (cand->num_convs == 1
+ && (DECL_COPY_CONSTRUCTOR_P (fn)
|| DECL_MOVE_CONSTRUCTOR_P (fn))
/* It's unsafe to elide the constructor when handling
a noexcept-expression, it may evaluate to the wrong
@@ -12860,7 +12860,7 @@ joust (struct z_candidate *cand1, struct z_candidate *cand2, bool warn,
auto_diagnostic_group d;
if (warning (OPT_Wconversion, "choosing %qD over %qD", w->fn, l->fn)
&& warning (OPT_Wconversion, " for conversion from %qH to %qI",
- source, w->second_conv->type))
+ source, w->second_conv->type))
{
inform (input_location, " because conversion sequence "
"for the argument is better");
@@ -13057,7 +13057,7 @@ joust (struct z_candidate *cand1, struct z_candidate *cand2, bool warn,
tree f2 = TREE_TYPE (cand2->fn);
tree p1 = TYPE_ARG_TYPES (f1);
tree p2 = TYPE_ARG_TYPES (f2);
-
+
/* Check if cand1->fn and cand2->fn are versions of the same function. It
is possible that cand1->fn and cand2->fn are function versions but of
different functions. Check types to see if they are versions of the same
diff --git a/gcc/cp/class.cc b/gcc/cp/class.cc
index aebcb53739e..72c89f16d4c 100644
--- a/gcc/cp/class.cc
+++ b/gcc/cp/class.cc
@@ -40,7 +40,7 @@ along with GCC; see the file COPYING3. If not see
/* Id for dumping the class hierarchy. */
int class_dump_id;
-
+
/* The number of nested classes being processed. If we are not in the
scope of any class, this is zero. */
@@ -325,7 +325,7 @@ build_base_path (enum tree_code code,
error ("cannot convert from base class %qT to derived "
"class %qT because the base is virtual",
BINFO_TYPE (binfo), BINFO_TYPE (d_binfo));
- }
+ }
else
{
if (want_pointer)
@@ -692,7 +692,7 @@ is_empty_base_ref (tree expr)
&& !same_type_ignoring_top_level_qualifiers_p (fromtype, type)
&& DERIVED_FROM_P (type, fromtype));
}
-\f
+
tree
build_vfield_ref (tree datum, tree type)
{
@@ -1017,7 +1017,7 @@ modify_vtable_entry (tree t,
}
}
-\f
+
/* Add method METHOD to class TYPE. If VIA_USING indicates whether
METHOD is being injected via a using_decl. Returns true if the
method could be added to the method vec. */
@@ -1095,7 +1095,7 @@ add_method (tree type, tree method, bool via_using)
if ((DECL_CONV_FN_P (fn) || TREE_CODE (fn) == TEMPLATE_DECL)
&& !same_type_p (TREE_TYPE (fn_type), TREE_TYPE (method_type)))
continue;
-
+
/* For templates, the template parameters must be identical. */
if (TREE_CODE (fn) == TEMPLATE_DECL)
{
@@ -1184,7 +1184,7 @@ add_method (tree type, tree method, bool via_using)
if (!DECL_INHERITED_CTOR (fn))
/* Defer to the other function. */
return false;
-
+
tree basem = DECL_INHERITED_CTOR_BASE (method);
tree basef = DECL_INHERITED_CTOR_BASE (fn);
if (flag_new_inheriting_ctors)
@@ -1420,7 +1420,7 @@ handle_using_decl (tree using_decl, tree t)
else
alter_access (t, decl, access);
}
-\f
+
/* Data structure for find_abi_tags_r, below. */
struct abi_tag_data
@@ -1756,7 +1756,7 @@ accessible_nvdtor_p (tree t)
if (DECL_VINDEX (dtor))
return false; /* Virtual */
-
+
if (!TREE_PRIVATE (dtor) && !TREE_PROTECTED (dtor))
return true; /* Public */
@@ -2145,7 +2145,7 @@ fixup_attribute_variants (tree t)
fixup_may_alias (variants);
}
}
-\f
+
/* Set memoizing fields and bits of T (and its variants) for later
use. */
@@ -2702,7 +2702,7 @@ update_vtable_entry_for_fn (tree t, tree binfo, tree fn, tree* virtuals,
{
/* We convert via virtual base. Adjust the fixed
offset to be from there. */
- offset =
+ offset =
size_diffop (offset,
fold_convert (ssizetype,
BINFO_OFFSET (virtual_offset)));
@@ -3697,7 +3697,7 @@ check_field_decls (tree t, tree *access_decls,
case CONST_DECL:
DECL_NONLOCAL (field) = 1;
break;
-
+
case VAR_DECL:
if (TREE_CODE (t) == UNION_TYPE
&& cxx_dialect < cxx11)
@@ -3711,7 +3711,7 @@ check_field_decls (tree t, tree *access_decls,
"a member of a union", field);
}
goto data_member;
-
+
case FIELD_DECL:
if (TREE_CODE (t) == UNION_TYPE)
{
@@ -5666,7 +5666,7 @@ classtype_has_move_assign_or_move_ctor_p (tree t, bool user_p)
&& DECL_CONTEXT (*iter) == t
&& move_fn_p (*iter))
return true;
-
+
return false;
}
@@ -6089,7 +6089,7 @@ check_bases_and_members (tree t)
/* [dcl.init.aggr]
An aggregate is an array or a class with no user-provided
- constructors ... and no virtual functions.
+ constructors ... and no virtual functions.
Again, other conditions for being an aggregate are checked
elsewhere. */
@@ -6135,7 +6135,7 @@ check_bases_and_members (tree t)
vec<tree, va_gc> *accesses = BINFO_BASE_ACCESSES (binfo);
tree base_binfo;
unsigned i;
-
+
for (i = 0; BINFO_BASE_ITERATE (binfo, i, base_binfo); i++)
{
tree basetype = TREE_TYPE (base_binfo);
@@ -6148,7 +6148,7 @@ check_bases_and_members (tree t)
basetype);
}
}
-
+
/* If the class has no user-declared constructor, but does have
non-static const or reference data members that can never be
initialized, issue a warning. */
@@ -6294,7 +6294,7 @@ create_vtable_ptr (tree t, tree* virtuals_p)
stores cannot alias stores to void*! */
tree field;
- field = build_decl (input_location,
+ field = build_decl (input_location,
FIELD_DECL, get_vfield_name (t), vtbl_ptr_type_node);
DECL_VIRTUAL_P (field) = 1;
DECL_ARTIFICIAL (field) = 1;
@@ -7795,7 +7795,7 @@ finish_struct (tree t, tree attributes)
/* COMPLETE_TYPE_P is now true. */
maybe_warn_about_overly_private_class (t);
-
+
if (is_std_init_list (t))
{
/* People keep complaining that the compiler crashes on an invalid
@@ -7844,7 +7844,7 @@ finish_struct (tree t, tree attributes)
return t;
}
-\f
+
/* Hash table to avoid endless recursion when handling references. */
static hash_table<nofree_ptr_hash<tree_node> > *fixed_type_or_null_ref_ht;
@@ -8051,7 +8051,7 @@ resolves_to_fixed_type_p (tree instance, int* nonnull)
return cdtorp ? -1 : 1;
}
-\f
+
void
init_class_processing (void)
{
@@ -8344,7 +8344,7 @@ pop_lang_context (void)
{
current_lang_name = current_lang_base->pop ();
}
-\f
+
/* Type instantiation routines. */
/* Given an OVERLOAD and a TARGET_TYPE, return the function that
@@ -8353,7 +8353,7 @@ pop_lang_context (void)
control of FLAGS. Permit pointers to member function if FLAGS
permits. If TEMPLATE_ONLY, the name of the overloaded function was
a template-id, and EXPLICIT_TARGS are the explicitly provided
- template arguments.
+ template arguments.
If OVERLOAD is for one or more member functions, then ACCESS_PATH
is the base path used to reference those member functions. If
@@ -8834,7 +8834,7 @@ instantiate_type (tree lhstype, tree rhs, tsubst_flags_t complain)
}
return error_mark_node;
}
-\f
+
/* Return the name of the virtual function pointer field
(as an IDENTIFIER_NODE) for the given TYPE. Note that
this may have to look back through base types to find the
@@ -8882,7 +8882,7 @@ build_self_reference (void)
DECL_ARTIFICIAL (decl) = 1;
SET_DECL_SELF_REFERENCE_P (decl);
set_underlying_type (decl);
- set_instantiating_module (decl);
+ set_instantiating_module (decl);
if (processing_template_decl)
decl = push_template_decl (decl);
@@ -10243,7 +10243,7 @@ build_vcall_offset_vtbl_entries (tree binfo, vtbl_init_data* vid)
compute the indices -- but do not add to the vtable -- when
building the main vtable for a class. */
if (binfo == TYPE_BINFO (vid->derived)
- || (BINFO_VIRTUAL_P (binfo)
+ || (BINFO_VIRTUAL_P (binfo)
/* If BINFO is RTTI_BINFO, then (since BINFO does not
correspond to VID->DERIVED), we are building a primary
construction virtual table. Since this is a primary
diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index a65dbdc5b13..f4cf7f2b532 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -485,7 +485,7 @@ build_data_member_initialization (tree t, vec<constructor_elt, va_gc> **vec)
}
/* Subroutine of check_constexpr_ctor_body_1 and constexpr_fn_retval.
- In C++11 mode checks that the TYPE_DECLs in the BIND_EXPR_VARS of a
+ In C++11 mode checks that the TYPE_DECLs in the BIND_EXPR_VARS of a
BIND_EXPR conform to 7.1.5/3/4 on typedef and alias declarations. */
static bool
@@ -813,7 +813,7 @@ cx_check_missing_mem_inits (tree ctype, tree body, bool complain)
return false;
unsigned nelts = 0;
-
+
if (body)
{
if (TREE_CODE (body) != CONSTRUCTOR)
@@ -1892,7 +1892,7 @@ pop_cx_call_context (void)
call_stack.pop ();
}
-vec<tree>
+vec<tree>
cx_error_context (void)
{
vec<tree> r = vNULL;
@@ -2459,7 +2459,7 @@ cxx_eval_dynamic_cast_fn (const constexpr_ctx *ctx, tree call,
(refers) to the C subobject of the most derived object.
But it can also be an invalid case. */
-
+
/* Get the most derived object. */
obj = get_component_with_type (obj, mdtype, NULL_TREE);
if (obj == error_mark_node)
@@ -6068,7 +6068,7 @@ cxx_eval_store_expression (const constexpr_ctx *ctx, tree t,
vec_safe_reserve (CONSTRUCTOR_ELTS (ary_ctor), num_elts);
for (unsigned ix = 0; ix != num_elts; ix++)
{
- constructor_elt elt =
+ constructor_elt elt =
{
build_int_cst (size_type_node, ix),
extract_string_elt (string, chars_per_elt, ix)
@@ -7520,7 +7520,7 @@ cxx_eval_constant_expression (const constexpr_ctx *ctx, tree t,
case COMPONENT_REF:
if (is_overloaded_fn (t))
{
- /* We can only get here in checking mode via
+ /* We can only get here in checking mode via
build_non_dependent_expr, because any expression that
calls or takes the address of the function will have
pulled a FUNCTION_DECL out of the COMPONENT_REF. */
diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index 77e2a90f0f9..76f70eda307 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -4094,7 +4094,7 @@ coro_rewrite_function_body (location_t fn_start, tree fnbody, tree orig,
for (tree b = BLOCK_SUBBLOCKS (replace_blk); b; b = BLOCK_CHAIN (b))
BLOCK_SUPERCONTEXT (b) = replace_blk;
BIND_EXPR_BLOCK (first) = replace_blk;
- /* The top block has one child, so far, and we have now got a
+ /* The top block has one child, so far, and we have now got a
superblock. */
BLOCK_SUPERCONTEXT (replace_blk) = top_block;
BLOCK_SUBBLOCKS (top_block) = replace_blk;
diff --git a/gcc/cp/cp-gimplify.cc b/gcc/cp/cp-gimplify.cc
index 1e0b4f8c1cf..59d7345a520 100644
--- a/gcc/cp/cp-gimplify.cc
+++ b/gcc/cp/cp-gimplify.cc
@@ -1973,7 +1973,7 @@ cp_genericize (tree fndecl)
c_genericize (fndecl);
restore_bc_state (&save_state);
}
-\f
+
/* Build code to apply FN to each member of ARG1 and ARG2. FN may be
NULL if there is in fact nothing to do. ARG2 may be null if FN
actually only takes one argument. */
diff --git a/gcc/cp/cp-lang.cc b/gcc/cp/cp-lang.cc
index a3f29eda0d6..29198451bc4 100644
--- a/gcc/cp/cp-lang.cc
+++ b/gcc/cp/cp-lang.cc
@@ -204,7 +204,7 @@ fold_cplus_constants (const_tree c)
for (i = 0; i < vec_len; ++i)
{
tree elem = TREE_VEC_ELT (elems, i);
- TREE_VEC_ELT (folded_elems, i) =
+ TREE_VEC_ELT (folded_elems, i) =
(elem && !TYPE_P (elem)) ? cplus_expand_constant (elem) : elem;
}
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 1f4967c2ba0..a25281e2b19 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -127,7 +127,7 @@ operator == (const cp_expr &lhs, tree rhs)
return lhs.get_value () == rhs;
}
-\f
+
enum cp_tree_index
{
CPTI_WCHAR_DECL,
@@ -404,7 +404,7 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX];
#define fallback_dfloat64_type cp_global_trees[CPTI_FALLBACK_DFLOAT64_TYPE]
#define fallback_dfloat128_type cp_global_trees[CPTI_FALLBACK_DFLOAT128_TYPE]
-\f
+
#include "name-lookup.h"
/* Usage of TREE_LANG_FLAG_?:
@@ -685,7 +685,7 @@ template_info_decl_check (const_tree t, const char* f, int l, const char* fn)
#define THUNK_FUNCTION_CHECK(NODE) (NODE)
#endif /* ENABLE_TREE_CHECKING */
-\f
+
/* Language-dependent contents of an identifier. */
struct GTY(()) lang_identifier {
@@ -889,7 +889,7 @@ class ovl_iterator {
{
return OVL_EXPORT_P (get_using ());
}
-
+
bool hidden_p () const
{
return TREE_CODE (ovl) == OVERLOAD && OVL_HIDDEN_P (ovl);
@@ -1766,7 +1766,7 @@ check_constraint_info (tree t)
it for unscoped enums. */
#define DECL_MODULE_EXPORT_P(NODE) TREE_LANG_FLAG_3 (NODE)
-\f
+
/* The list of local parameters introduced by this requires-expression,
in the form of a chain of PARM_DECLs. */
#define REQUIRES_EXPR_PARMS(NODE) \
@@ -1832,7 +1832,7 @@ union GTY((desc ("cp_tree_node_structure (&%h)"),
userdef_literal;
};
-\f
+
struct GTY(()) cp_omp_declare_target_attr {
bool attr_syntax;
int device_type;
@@ -2738,7 +2738,7 @@ struct GTY(()) lang_type {
with a hash_set only filled in when abi_version_crosses (17). */
#define CLASSTYPE_NON_POD_AGGREGATE(NODE) \
(LANG_TYPE_CLASS_CHECK (NODE)->non_pod_aggregate)
-\f
+
/* Additional macros for inheritance information. */
/* Nonzero means that this class is on a path leading to a new vtable. */
@@ -2775,7 +2775,7 @@ struct GTY(()) lang_type {
/* Nonzero if this BINFO is a primary base class. */
#define BINFO_PRIMARY_P(NODE) BINFO_FLAG_5(NODE)
-\f
+
/* A vec<tree_pair_s> of the vcall indices associated with the class
NODE. The PURPOSE of each element is a FUNCTION_DECL for a virtual
function. The VALUE is the index into the virtual table where the
@@ -2812,7 +2812,7 @@ struct GTY(()) lang_type {
/* Whether or not this entry is for a lost primary virtual base. */
#define BV_LOST_PRIMARY(NODE) (TREE_LANG_FLAG_0 (NODE))
-\f
+
/* For FUNCTION_TYPE or METHOD_TYPE, a list of the exceptions that
this type can raise. Each TREE_VALUE is a _TYPE. The TREE_VALUE
will be NULL_TREE to indicate a throw specification of `()', or
@@ -2836,7 +2836,7 @@ struct GTY(()) lang_type {
/* The binding level associated with the namespace. */
#define NAMESPACE_LEVEL(NODE) \
(LANG_DECL_NS_CHECK (NODE)->level)
-\f
+
/* Discriminator values for lang_decl. */
enum lang_decl_selector
@@ -5745,7 +5745,7 @@ extern GTY(()) vec<tree, va_gc> *static_decls;
/* An array of vtable-needing types that have no key function, or have
an emitted key function. */
extern GTY(()) vec<tree, va_gc> *keyed_classes;
-\f
+
/* Here's where we control how name mangling takes place. */
/* Cannot use '$' up front, because this confuses gdb
@@ -5820,7 +5820,7 @@ extern GTY(()) vec<tree, va_gc> *keyed_classes;
#endif /* !defined(NO_DOLLAR_IN_LABEL) || !defined(NO_DOT_IN_LABEL) */
-\f
+
/* Nonzero if we're done parsing and into end-of-file activities.
Two if we're done with front-end processing. */
@@ -7258,7 +7258,7 @@ extern void lazy_load_binding (unsigned mod, tree ns, tree id,
binding_slot *bslot);
extern void lazy_load_pendings (tree decl);
extern module_state *preprocess_module (module_state *, location_t,
- bool in_purview,
+ bool in_purview,
bool is_import, bool export_p,
cpp_reader *reader);
extern void preprocessed_module (cpp_reader *reader);
@@ -8596,7 +8596,7 @@ set_contract_semantic (tree t, contract_semantic semantic)
}
/* Inline bodies. */
-
+
inline tree
ovl_first (tree node)
{
diff --git a/gcc/cp/cvt.cc b/gcc/cp/cvt.cc
index 434d306961f..d1f13eb9d1b 100644
--- a/gcc/cp/cvt.cc
+++ b/gcc/cp/cvt.cc
@@ -61,7 +61,7 @@ static void diagnose_ref_binding (location_t, tree, tree, tree);
C++: in multiple-inheritance, converting between pointers may involve
adjusting them by a delta stored within the class definition. */
-\f
+
/* Subroutines of `convert'. */
/* if converting pointer to pointer
@@ -574,7 +574,7 @@ force_rvalue (tree expr, tsubst_flags_t complain)
return expr;
}
-\f
+
/* If EXPR and ORIG are INTEGER_CSTs, return a version of EXPR that has
TREE_OVERFLOW set only if it is set in ORIG. Otherwise, return EXPR
unchanged. */
@@ -828,7 +828,7 @@ ocp_convert (tree type, tree expr, int convtype, int flags,
&& TREE_CODE (val) == INTEGER_CST
&& ENUM_UNDERLYING_TYPE (type)
&& !int_fits_type_p (val, ENUM_UNDERLYING_TYPE (type)))
- warning_at (loc, OPT_Wconversion,
+ warning_at (loc, OPT_Wconversion,
"the result of the conversion is unspecified because "
"%qE is outside the range of type %qT",
expr, type);
@@ -1967,7 +1967,7 @@ type_promotes_to (tree type)
whose underlying type is fixed (10.2) can be converted to a
prvalue of its underlying type. Moreover, if integral promotion
can be applied to its underlying type, a prvalue of an unscoped
- enumeration type whose underlying type is fixed can also be
+ enumeration type whose underlying type is fixed can also be
converted to a prvalue of the promoted underlying type. */
return type_promotes_to (prom);
}
diff --git a/gcc/cp/cxx-pretty-print.cc b/gcc/cp/cxx-pretty-print.cc
index 8ca1b8f234a..799b0c7ad09 100644
--- a/gcc/cp/cxx-pretty-print.cc
+++ b/gcc/cp/cxx-pretty-print.cc
@@ -39,7 +39,7 @@ static void pp_cxx_unary_left_fold_expression (cxx_pretty_printer *, tree);
static void pp_cxx_unary_right_fold_expression (cxx_pretty_printer *, tree);
static void pp_cxx_binary_fold_expression (cxx_pretty_printer *, tree);
static void pp_cxx_concept_definition (cxx_pretty_printer *, tree);
-\f
+
static inline void
pp_cxx_nonconsecutive_character (cxx_pretty_printer *pp, int c)
@@ -411,22 +411,22 @@ pp_cxx_userdef_literal (cxx_pretty_printer *pp, tree t)
:: operator-function-id
:: qualifier-id
( expression )
- id-expression
+ id-expression
GNU Extensions:
__builtin_va_arg ( assignment-expression , type-id )
__builtin_offsetof ( type-id, offsetof-expression )
__builtin_addressof ( expression )
- __has_nothrow_assign ( type-id )
+ __has_nothrow_assign ( type-id )
__has_nothrow_constructor ( type-id )
__has_nothrow_copy ( type-id )
- __has_trivial_assign ( type-id )
+ __has_trivial_assign ( type-id )
__has_trivial_constructor ( type-id )
__has_trivial_copy ( type-id )
__has_unique_object_representations ( type-id )
__has_trivial_destructor ( type-id )
- __has_virtual_destructor ( type-id )
+ __has_virtual_destructor ( type-id )
__is_abstract ( type-id )
__is_base_of ( type-id , type-id )
__is_class ( type-id )
@@ -868,7 +868,7 @@ cxx_pretty_printer::unary_expression (tree t)
pp_cxx_left_paren (this);
type_id (TREE_OPERAND (t, 0));
pp_cxx_right_paren (this);
- break;
+ break;
case NOEXCEPT_EXPR:
pp_cxx_ws_string (this, "noexcept");
@@ -1667,7 +1667,7 @@ cxx_pretty_printer::direct_declarator (tree t)
/* A function parameter pack or non-type template
parameter pack. */
pp_cxx_ws_string (this, "...");
-
+
id_expression (DECL_NAME (t));
}
abstract_declarator (TREE_TYPE (t));
@@ -2904,7 +2904,7 @@ pp_cxx_constraint (cxx_pretty_printer *pp, tree t)
}
}
-\f
+
typedef c_pretty_print_fn pp_fun;
/* Initialization of a C++ pretty-printer object. */
diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 66e7d9ff50e..22963fedf42 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -227,7 +227,7 @@ struct GTY((for_user)) named_label_entry {
};
#define named_labels cp_function_chain->x_named_labels
-\f
+
/* The number of function bodies which we are currently processing.
(Zero if we are at namespace scope, one inside the body of a
function, two inside the body of a function in a local class, etc.) */
@@ -242,7 +242,7 @@ bool flag_noexcept_type;
deprecated items. */
enum deprecated_states deprecated_state = DEPRECATED_NORMAL;
-\f
+
/* A list of VAR_DECLs whose type was incomplete at the time the
variable was declared. */
@@ -253,7 +253,7 @@ struct GTY(()) incomplete_var {
static GTY(()) vec<incomplete_var, va_gc> *incomplete_vars;
-\f
+
/* Returns the kind of template specialization we are currently
processing, given that it's declaration contained N_CLASS_SCOPES
explicit scope qualifications. */
@@ -370,7 +370,7 @@ check_label_used (tree label)
/* Avoid crashing later. */
define_label (location, DECL_NAME (label));
}
- else
+ else
warn_for_unused_label (label);
}
}
@@ -875,7 +875,7 @@ wrapup_namespace_globals ()
}
return 0;
}
-\f
+
/* In C++, you don't have to write `struct S' to refer to `S'; you
can just use `S'. We accomplish this by creating a TYPE_DECL as
if the user had written `typedef struct S S'. Create and return
@@ -947,7 +947,7 @@ determine_local_discriminator (tree decl)
}
}
-\f
+
/* Returns true if functions FN1 and FN2 have equivalent trailing
requires clauses. */
@@ -1640,7 +1640,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)
if (! TREE_PUBLIC (newdecl))
{
warning_at (newdecl_loc,
- OPT_Wshadow,
+ OPT_Wshadow,
fndecl_built_in_p (olddecl)
? G_("shadowing built-in function %q#D")
: G_("shadowing library function %q#D"), olddecl);
@@ -1766,7 +1766,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)
"new declaration %q#D ambiguates built-in "
"declaration %q#D", newdecl, olddecl);
else
- warning (OPT_Wshadow,
+ warning (OPT_Wshadow,
fndecl_built_in_p (olddecl)
? G_("shadowing built-in function %q#D")
: G_("shadowing library function %q#D"), olddecl);
@@ -1778,7 +1778,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)
/* Replace the old RTL to avoid problems with inlining. */
COPY_DECL_RTL (newdecl, olddecl);
}
- else
+ else
{
/* Even if the types match, prefer the new declarations type
for built-ins which have not been explicitly declared,
@@ -2058,7 +2058,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)
versions of G++ silently ignore the linkage-specification
for this example:
- namespace N {
+ namespace N {
extern int i;
extern "C" int i;
}
@@ -2476,7 +2476,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)
= TYPE_NEXT_VARIANT (TYPE_NEXT_VARIANT (t));
break;
}
- }
+ }
else
for (tree t = TYPE_MAIN_VARIANT (remove); ;
t = TYPE_NEXT_VARIANT (t))
@@ -3228,7 +3228,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)
return olddecl;
}
-\f
+
/* Return zero if the declaration NEWDECL is valid
when the declaration OLDDECL (assumed to be for the same name)
has already been seen.
@@ -3449,7 +3449,7 @@ redeclaration_error_message (tree newdecl, tree olddecl)
return NULL;
}
}
-\f
+
/* Hash and equality functions for the named_label table. */
@@ -3488,7 +3488,7 @@ lookup_label_1 (tree id, bool making_local_p)
named_label_entry **slot
= named_labels->find_slot_with_hash (id, hash, INSERT);
named_label_entry *old = *slot;
-
+
if (old && old->label_decl)
{
if (!making_local_p)
@@ -4118,7 +4118,7 @@ finish_case_label (location_t loc, tree low_value, tree high_value)
return r;
}
-\f
+
struct typename_info {
tree scope;
tree name;
@@ -4315,7 +4315,7 @@ make_typename_type (tree context, tree name, enum tag_types tag_type,
return build_typename_type (context, name, fullname, tag_type);
want_template = TREE_CODE (fullname) == TEMPLATE_ID_EXPR;
-
+
if (!t)
{
if (complain & tf_error)
@@ -4328,7 +4328,7 @@ make_typename_type (tree context, tree name, enum tag_types tag_type,
}
return error_mark_node;
}
-
+
/* Pull out the template from an injected-class-name (or multiple). */
if (want_template)
t = maybe_get_template_decl_from_type_decl (t);
@@ -4382,7 +4382,7 @@ make_typename_type (tree context, tree name, enum tag_types tag_type,
return error_mark_node;
t = TYPE_NAME (t);
}
-
+
if (DECL_ARTIFICIAL (t) || !(complain & tf_keep_type_decl))
t = TREE_TYPE (t);
@@ -4472,7 +4472,7 @@ make_unbound_class_template_raw (tree context, tree name, tree parm_list)
return t;
}
-\f
+
/* Push the declarations of builtin types into the global namespace.
RID_INDEX is the index of the builtin type in the array
@@ -5042,7 +5042,7 @@ cp_make_fname_decl (location_t loc, tree id, int type_dep)
name = "top level";
else if (type_dep == 0)
{
- /* __FUNCTION__ */
+ /* __FUNCTION__ */
name = fname_as_string (type_dep);
release_name = true;
}
@@ -5266,7 +5266,7 @@ push_throw_library_fn (tree name, tree type)
tree fn = push_library_fn (name, type, NULL_TREE, ECF_NORETURN | ECF_COLD);
return fn;
}
-\f
+
/* When we call finish_struct for an anonymous union, we create
default copy constructors and such. But, an anonymous union
shouldn't have such things; this function undoes the damage to the
@@ -5632,7 +5632,7 @@ shadow_tag (cp_decl_specifier_seq *declspecs)
return t;
}
-\f
+
/* Decode a "typename", such as "int **", returning a ..._TYPE node. */
tree
@@ -5744,7 +5744,7 @@ start_decl (const cp_declarator *declarator,
DECL_INITIAL (decl) = error_mark_node;
}
alias = lookup_attribute ("alias", DECL_ATTRIBUTES (decl)) != 0;
-
+
if (alias && TREE_CODE (decl) == FUNCTION_DECL)
record_key_method_defined (decl);
@@ -5985,7 +5985,7 @@ start_decl_1 (tree decl, bool initialized)
(Scalars are always complete types, so there is nothing to
check.) This code just sets COMPLETE_P; errors (if necessary)
are issued below. */
- if ((initialized || aggregate_definition_p)
+ if ((initialized || aggregate_definition_p)
&& !complete_p
&& COMPLETE_TYPE_P (complete_type (type)))
{
@@ -6522,7 +6522,7 @@ check_for_uninitialized_const_var (tree decl, bool constexpr_context_p,
return true;
}
-\f
+
/* Structure holding the current initializer being processed by reshape_init.
CUR is a pointer to the current element being processed, END is a pointer
after the last element present in the initializer. */
@@ -7955,7 +7955,7 @@ value_dependent_init_p (tree init)
else
/* It must be a simple expression, e.g., int i = 3; */
return value_dependent_expression_p (init);
-
+
return false;
}
@@ -9207,7 +9207,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int count)
eltscnt = tree_to_uhwi (tsize);
if (count != eltscnt)
goto cnt_mismatch;
- int save_read = DECL_READ_P (decl);
+ int save_read = DECL_READ_P (decl);
for (unsigned i = 0; i < count; ++i)
{
location_t sloc = input_location;
@@ -9375,14 +9375,14 @@ get_atexit_fn_ptr_type (void)
if (!atexit_fn_ptr_type_node)
{
tree arg_type;
- if (flag_use_cxa_atexit
+ if (flag_use_cxa_atexit
&& !targetm.cxx.use_atexit_for_cxa_atexit ())
/* The parameter to "__cxa_atexit" is "void (*)(void *)". */
arg_type = ptr_type_node;
else
/* The parameter to "atexit" is "void (*)(void)". */
arg_type = NULL_TREE;
-
+
fn_type = build_function_type_list (void_type_node,
arg_type, NULL_TREE);
atexit_fn_ptr_type_node = build_pointer_type (fn_type);
@@ -9640,10 +9640,10 @@ register_dtor_fn (tree decl)
that any access checks will be done relative to the current
scope, rather than the scope of the anonymous function. */
build_cleanup (decl);
-
+
/* Now start the function. */
cleanup = start_cleanup_fn ();
-
+
/* Now, recompute the cleanup. It may contain SAVE_EXPRs that refer
to the original function, rather than the anonymous one. That
will make the back end think that nested functions are in use,
@@ -9651,7 +9651,7 @@ register_dtor_fn (tree decl)
push_deferring_access_checks (dk_no_check);
fcall = build_cleanup (decl);
pop_deferring_access_checks ();
-
+
/* Create the body of the anonymous function. */
compound_stmt = begin_compound_stmt (BCS_FN_BODY);
finish_expr_stmt (fcall);
@@ -9900,7 +9900,7 @@ expand_static_init (tree decl, tree init)
static_aggregates = tree_cons (init, decl, static_aggregates);
}
-\f
+
/* Make TYPE a complete type based on INITIAL_VALUE.
Return 0 if successful, 1 if INITIAL_VALUE can't be deciphered,
2 if there was no information (in which case assume 0 if DO_DEFAULT),
@@ -9987,7 +9987,7 @@ cp_complete_array_type_or_error (tree *ptype, tree initial_value,
}
return failure;
}
-\f
+
/* Return zero if something is declared to be a member of type
CTYPE when in the context of CUR_TYPE. STRING is the error
message to print in that case. Otherwise, quietly return 1. */
@@ -10005,7 +10005,7 @@ member_function_or_else (tree ctype, tree cur_type, enum overload_flags flags)
}
return 1;
}
-\f
+
/* Subroutine of `grokdeclarator'. */
/* Generate errors possibly applicable for a given set of specifiers.
@@ -11010,7 +11010,7 @@ build_ptrmemfunc_type (tree type)
DECL_NONADDRESSABLE_P (field) = 1;
fields = field;
- field = build_decl (input_location, FIELD_DECL, delta_identifier,
+ field = build_decl (input_location, FIELD_DECL, delta_identifier,
delta_type_node);
DECL_NONADDRESSABLE_P (field) = 1;
DECL_CHAIN (field) = fields;
@@ -11340,10 +11340,10 @@ compute_array_index_type_loc (location_t name_loc, tree name, tree size,
else if (warn_vla > 0)
{
if (name)
- warning_at (name_loc, OPT_Wvla,
+ warning_at (name_loc, OPT_Wvla,
"variable length array %qD is used", name);
else
- warning (OPT_Wvla,
+ warning (OPT_Wvla,
"variable length array is used");
}
@@ -11982,10 +11982,10 @@ grokdeclarator (const cp_declarator *declarator,
return error_mark_node;
if (at_function_scope_p ())
{
- /* [dcl.meaning]
+ /* [dcl.meaning]
A declarator-id shall not be qualified except
- for ...
+ for ...
None of the cases are permitted in block
scope. */
@@ -11995,7 +11995,7 @@ grokdeclarator (const cp_declarator *declarator,
else if (TYPE_P (qualifying_scope))
error ("invalid use of qualified-name %<%T::%D%>",
qualifying_scope, decl);
- else
+ else
error ("invalid use of qualified-name %<%D::%D%>",
qualifying_scope, decl);
return error_mark_node;
@@ -13779,7 +13779,7 @@ grokdeclarator (const cp_declarator *declarator,
if ((rqual || memfn_quals) && TREE_CODE (type) == FUNCTION_TYPE)
{
type = apply_memfn_quals (type, memfn_quals, rqual);
-
+
/* We have now dealt with these qualifiers. */
memfn_quals = TYPE_UNQUALIFIED;
rqual = REF_QUAL_NONE;
@@ -14556,11 +14556,11 @@ grokdeclarator (const cp_declarator *declarator,
&& pedantic)
{
if (storage_class == sc_static)
- pedwarn (declspecs->locations[ds_storage_class], OPT_Wpedantic,
+ pedwarn (declspecs->locations[ds_storage_class], OPT_Wpedantic,
"%<static%> specifier invalid for function %qs "
"declared out of global scope", name);
else
- pedwarn (declspecs->locations[ds_inline], OPT_Wpedantic,
+ pedwarn (declspecs->locations[ds_inline], OPT_Wpedantic,
"%<inline%> specifier invalid for function %qs "
"declared out of global scope", name);
}
@@ -14682,7 +14682,7 @@ grokdeclarator (const cp_declarator *declarator,
}
if (storage_class == sc_extern && pedantic)
{
- pedwarn (input_location, OPT_Wpedantic,
+ pedwarn (input_location, OPT_Wpedantic,
"cannot explicitly declare member %q#D to have "
"extern linkage", decl);
storage_class = sc_none;
@@ -14795,7 +14795,7 @@ grokdeclarator (const cp_declarator *declarator,
return decl;
}
}
-\f
+
/* Subroutine of start_function. Ensure that each of the parameter
types (as listed in PARMS) is complete, as is required for a
function definition. */
@@ -15154,7 +15154,7 @@ grokparms (tree parmlist, tree *parms)
return result;
}
-\f
+
/* D is a constructor or overloaded `operator='.
Let T be the class in which D is declared. Then, this function
@@ -15355,7 +15355,7 @@ grok_special_member_properties (tree decl)
}
else if (IDENTIFIER_CONV_OP_P (DECL_NAME (decl)))
TYPE_HAS_CONVERSION (class_type) = true;
-
+
/* Destructors are handled in check_methods. */
}
@@ -15539,7 +15539,7 @@ grok_op_properties (tree decl, bool complain)
"enumerated type", decl);
return false;
}
-
+
tree type = non_reference (TREE_VALUE (arg));
if (type == error_mark_node)
return false;
@@ -15715,7 +15715,7 @@ grok_op_properties (tree decl, bool complain)
|| operator_code == COMPOUND_EXPR)
warning_at (loc, OPT_Weffc__,
"user-defined %qD always evaluates both arguments", decl);
-
+
/* More Effective C++ rule 6. */
if (operator_code == POSTINCREMENT_EXPR
|| operator_code == POSTDECREMENT_EXPR
@@ -15756,7 +15756,7 @@ grok_op_properties (tree decl, bool complain)
return true;
}
-\f
+
/* Return a string giving the keyword associate with CODE. */
static const char *
@@ -15932,7 +15932,7 @@ lookup_and_check_tag (enum tag_types tag_code, tree name,
if (TREE_CODE (decl) != TYPE_DECL)
/* Found not-a-type. */
return NULL_TREE;
-
+
/* Look for invalid nested type:
class C {
class C {};
@@ -16373,7 +16373,7 @@ xref_basetypes (tree ref, tree base_list)
}
}
-\f
+
/* Copies the enum-related properties from type SRC to type DST.
Used with the underlying type of an enum and the enum itself. */
static void
@@ -16399,7 +16399,7 @@ copy_type_enum (tree dst, tree src)
}
/* Begin compiling the definition of an enumeration type.
- NAME is its name,
+ NAME is its name,
if ENUMTYPE is not NULL_TREE then the type has alredy been found.
@@ -16554,7 +16554,7 @@ start_enum (tree name, tree enumtype, tree underlying_type,
ENUM_UNDERLYING_TYPE (enumtype) = underlying_type;
else
{
- error ("underlying type %qT of %qT must be an integral type",
+ error ("underlying type %qT of %qT must be an integral type",
underlying_type, enumtype);
ENUM_UNDERLYING_TYPE (enumtype) = integer_type_node;
}
@@ -16584,7 +16584,7 @@ finish_enum_value_list (tree enumtype)
tree minnode, maxnode;
tree t;
- bool fixed_underlying_type_p
+ bool fixed_underlying_type_p
= ENUM_UNDERLYING_TYPE (enumtype) != NULL_TREE;
/* We built up the VALUES in reverse order. */
@@ -17000,7 +17000,7 @@ incremented enumerator value is too large for %<long%>"));
type = value ? TREE_TYPE (value) : NULL_TREE;
decl = build_decl (loc, CONST_DECL, name, type);
-
+
DECL_CONTEXT (decl) = enumtype;
TREE_CONSTANT (decl) = 1;
TREE_READONLY (decl) = 1;
@@ -17123,7 +17123,7 @@ cxx_simulate_record_decl (location_t loc, const char *name,
return type;
}
-\f
+
/* We're defining DECL. Make sure that its type is OK. */
static void
@@ -17658,7 +17658,7 @@ start_function (cp_decl_specifier_seq *declspecs,
return start_preparsed_function (decl1, attrs, /*flags=*/SF_DEFAULT);
}
-\f
+
/* Returns true iff an EH_SPEC_BLOCK should be created in the body of
FN. */
@@ -17760,7 +17760,7 @@ store_parm_decls (tree current_function_parms)
current_eh_spec_block = begin_eh_spec_block ();
}
-\f
+
/* Set the return value of the [cd]tor if the ABI wants that. */
void
@@ -18276,7 +18276,7 @@ finish_function (bool inline_p)
/* Possibly warn about unused parameters. */
if (warn_unused_parameter
- && !processing_template_decl
+ && !processing_template_decl
&& !DECL_CLONED_FUNCTION_P (fndecl))
do_warn_unused_parameter (fndecl);
@@ -18330,7 +18330,7 @@ finish_function (bool inline_p)
return fndecl;
}
-\f
+
/* Create the FUNCTION_DECL for a function definition.
DECLSPECS and DECLARATOR are the parts of the declaration;
they describe the return type and the name of the function,
@@ -18420,7 +18420,7 @@ grokmethod (cp_decl_specifier_seq *declspecs,
DECL_IN_AGGR_P (fndecl) = 1;
return fndecl;
}
-\f
+
/* VAR is a VAR_DECL. If its type is incomplete, remember VAR so that
we can lay it out later, when and if its type becomes complete.
@@ -18602,7 +18602,7 @@ cxx_maybe_build_cleanup (tree decl, tsubst_flags_t complain)
return cleanup;
}
-\f
+
/* Return the FUNCTION_TYPE that corresponds to MEMFNTYPE, which can be a
FUNCTION_DECL, METHOD_TYPE, FUNCTION_TYPE, pointer or reference to
METHOD_TYPE or FUNCTION_TYPE, or pointer to member function. */
diff --git a/gcc/cp/decl2.cc b/gcc/cp/decl2.cc
index 00ed64d1691..6e77b768085 100644
--- a/gcc/cp/decl2.cc
+++ b/gcc/cp/decl2.cc
@@ -53,7 +53,7 @@ along with GCC; see the file COPYING3. If not see
/* Id for dumping the raw trees. */
int raw_dump_id;
-
+
extern cpp_reader *parse_in;
static tree start_objects (bool, unsigned, bool);
@@ -177,7 +177,7 @@ int at_eof;
later generation, rather than emitting them right away. */
bool defer_mangling_aliases = true;
-\f
+
/* Return a member function type (a METHOD_TYPE), given FNTYPE (a
FUNCTION_TYPE), CTYPE (class type), and QUALS (the cv-qualifiers
@@ -1280,7 +1280,7 @@ grokbitfield (const cp_declarator *declarator,
return value;
}
-\f
+
/* Returns true iff ATTR is an attribute which needs to be applied at
instantiation time rather than template definition time. */
@@ -1768,7 +1768,7 @@ cplus_decl_attributes (tree *decl, tree attributes, int flags)
TREE_UNAVAILABLE (tmpl) = true;
}
}
-\f
+
/* Walks through the namespace- or function-scope anonymous union
OBJECT, with the indicated TYPE, building appropriate VAR_DECLs.
Returns one of the fields for use in the mangled name. */
@@ -1905,7 +1905,7 @@ finish_anon_union (tree anon_union_decl)
pushdecl (anon_union_decl);
cp_finish_decl (anon_union_decl, NULL_TREE, false, NULL_TREE, 0);
}
-\f
+
/* Auxiliary functions to make type signatures for
`operator new' and `operator delete' correspond to
what compiler will be expecting. */
@@ -1930,7 +1930,7 @@ coerce_new_type (tree type, location_t loc)
if (TREE_PURPOSE (args))
{
/* [basic.stc.dynamic.allocation]
-
+
The first parameter shall not have an associated default
argument. */
error_at (loc, "the first parameter of %<operator new%> cannot "
@@ -2027,7 +2027,7 @@ coerce_delete_type (tree decl, location_t loc)
TREE_TYPE (decl) = type;
}
-\f
+
/* DECL is a VAR_DECL for a vtable: walk through the entries in the vtable
and mark them as needed. */
@@ -2761,7 +2761,7 @@ determine_visibility (tree decl)
if (DECL_VISIBILITY_SPECIFIED (fn))
{
DECL_VISIBILITY (decl) = DECL_VISIBILITY (fn);
- DECL_VISIBILITY_SPECIFIED (decl) =
+ DECL_VISIBILITY_SPECIFIED (decl) =
DECL_VISIBILITY_SPECIFIED (fn);
}
else
@@ -2841,7 +2841,7 @@ determine_visibility (tree decl)
? TYPE_ATTRIBUTES (TREE_TYPE (decl))
: DECL_ATTRIBUTES (decl));
tree attr = lookup_attribute ("visibility", attribs);
-
+
if (args != error_mark_node)
{
tree pattern = DECL_TEMPLATE_RESULT (TI_TEMPLATE (tinfo));
@@ -4032,7 +4032,7 @@ finish_partial_init_fini_fn (tree body)
to refer to a temporary variable that does not have its
DECL_CONTEXT() properly set. */
-static tree
+static tree
fix_temporary_vars_context_r (tree *node,
int * /*unused*/,
void *ctx)
@@ -4066,7 +4066,7 @@ one_static_initialization_or_destruction (bool initp, tree decl, tree init)
/* Make sure temporary variables in the initialiser all have
their DECL_CONTEXT() set to a value different from NULL_TREE.
This can happen when global variables initializers are built.
- In that case, the DECL_CONTEXT() of the global variables _AND_ of all
+ In that case, the DECL_CONTEXT() of the global variables _AND_ of all
the temporary variables that might have been generated in the
accompanying initializers is NULL_TREE, meaning the variables have been
declared in the global namespace.
@@ -4127,7 +4127,7 @@ one_static_initialization_or_destruction (bool initp, tree decl, tree init)
guard,
/*noconvert=*/true,
tf_warning_or_error);
- guard_cond = cp_build_binary_op (input_location, EQ_EXPR, guard_cond,
+ guard_cond = cp_build_binary_op (input_location, EQ_EXPR, guard_cond,
integer_zero_node,
tf_warning_or_error);
}
@@ -4392,8 +4392,8 @@ cpp_check (tree t, cpp_operation op)
/* Collect source file references recursively, starting from NAMESPC. */
-static void
-collect_source_refs (tree namespc)
+static void
+collect_source_refs (tree namespc)
{
/* Iterate over names in this name space. */
for (tree t = NAMESPACE_LEVEL (namespc)->names; t; t = TREE_CHAIN (t))
@@ -5187,7 +5187,7 @@ c_parse_final_cleanups (void)
if (static_init_fini_fns[true])
for (auto iter : *static_init_fini_fns[true])
iter.second = nreverse (iter.second);
-
+
/* Then, do the Objective-C stuff. This is where all the
Objective-C module stuff gets generated (symtab,
class/protocol/selector lists etc). This must be done after C++
diff --git a/gcc/cp/error.cc b/gcc/cp/error.cc
index e7f60335cc0..a1636e1d5ae 100644
--- a/gcc/cp/error.cc
+++ b/gcc/cp/error.cc
@@ -756,7 +756,7 @@ dump_typename (cxx_pretty_printer *pp, tree t, int flags)
const char *
class_key_or_enum_as_string (tree t)
{
- if (TREE_CODE (t) == ENUMERAL_TYPE)
+ if (TREE_CODE (t) == ENUMERAL_TYPE)
{
if (SCOPED_ENUM_P (t))
return "enum class";
@@ -818,7 +818,7 @@ dump_aggr_type (cxx_pretty_printer *pp, tree t, int flags)
&& TYPE_LANG_SPECIFIC (t) && CLASSTYPE_TEMPLATE_INFO (t)
&& (TREE_CODE (CLASSTYPE_TI_TEMPLATE (t)) != TEMPLATE_DECL
|| PRIMARY_TEMPLATE_P (CLASSTYPE_TI_TEMPLATE (t)));
-
+
if (! (flags & TFF_UNQUALIFIED_NAME))
dump_scope (pp, CP_DECL_CONTEXT (decl), flags | TFF_SCOPE);
flags &= ~TFF_UNQUALIFIED_NAME;
@@ -1161,7 +1161,7 @@ dump_simple_decl (cxx_pretty_printer *pp, tree t, tree type, int flags)
dump_scope (pp, CP_DECL_CONTEXT (t), flags);
flags &= ~TFF_UNQUALIFIED_NAME;
if ((flags & TFF_DECL_SPECIFIERS)
- && DECL_TEMPLATE_PARM_P (t)
+ && DECL_TEMPLATE_PARM_P (t)
&& TEMPLATE_PARM_PARAMETER_PACK (DECL_INITIAL (t)))
pp_string (pp, "...");
if (DECL_NAME (t))
@@ -2094,7 +2094,7 @@ dump_template_parms (cxx_pretty_printer *pp, tree info,
&& (!ARGUMENT_PACK_P (arg)
|| TREE_VEC_LENGTH (ARGUMENT_PACK_ARGS (arg)) > 0))
pp_separate_with_comma (pp);
-
+
if (!arg)
pp_string (pp, M_("<template parameter error>"));
else
@@ -2139,7 +2139,7 @@ dump_call_expr_args (cxx_pretty_printer *pp, tree t, int flags, bool skipfirst)
{
tree arg;
call_expr_arg_iterator iter;
-
+
pp_cxx_left_paren (pp);
FOR_EACH_CALL_EXPR_ARG (arg, iter, t)
{
@@ -2165,7 +2165,7 @@ dump_aggr_init_expr_args (cxx_pretty_printer *pp, tree t, int flags,
{
tree arg;
aggr_init_expr_arg_iterator iter;
-
+
pp_cxx_left_paren (pp);
FOR_EACH_AGGR_INIT_EXPR_ARG (arg, iter, t)
{
@@ -3796,7 +3796,7 @@ print_instantiation_partial_context (diagnostic_context *context,
t = t0;
if (template_backtrace_limit
- && n_total > template_backtrace_limit)
+ && n_total > template_backtrace_limit)
{
int skip = n_total - template_backtrace_limit;
int head = template_backtrace_limit / 2;
@@ -3807,7 +3807,7 @@ print_instantiation_partial_context (diagnostic_context *context,
skip = 2;
head = (template_backtrace_limit - 1) / 2;
}
-
+
for (n = 0; n < head; n++)
{
gcc_assert (t != NULL);
@@ -3833,14 +3833,14 @@ print_instantiation_partial_context (diagnostic_context *context,
"contexts, use -ftemplate-backtrace-limit=0 to "
"disable ]\n"),
"locus", xloc.file, xloc.line, skip);
-
+
do {
loc = t->locus;
t = t->next;
} while (t != NULL && --skip > 0);
}
}
-
+
while (t != NULL)
{
while (t->next != NULL && t->locus == t->next->locus)
@@ -3867,7 +3867,7 @@ maybe_print_instantiation_context (diagnostic_context *context)
record_last_problematic_instantiation ();
print_instantiation_full_context (context);
}
-\f
+
/* Report what constexpr call(s) we're trying to expand, if any. */
void
@@ -3892,7 +3892,7 @@ maybe_print_constexpr_context (diagnostic_context *context)
pp_newline (context->printer);
}
}
-\f
+
static void
print_location (diagnostic_context *context, location_t loc)
@@ -4518,7 +4518,7 @@ cp_printer (pretty_printer *pp, text_info *text, const char *spec,
#undef next_lang
#undef next_int
}
-\f
+
/* Warn about the use of C++0x features when appropriate. */
void
maybe_warn_cpp0x (cpp0x_warn_str str, location_t loc/*=input_location*/)
diff --git a/gcc/cp/except.cc b/gcc/cp/except.cc
index 2677a9b7678..808fb9af7d0 100644
--- a/gcc/cp/except.cc
+++ b/gcc/cp/except.cc
@@ -358,7 +358,7 @@ initialize_handler_parm (tree decl, tree exp)
LOOKUP_ONLYCONVERTING|DIRECT_BIND);
}
-\f
+
/* Routine to see if exception handling is turned on.
DO_WARN is nonzero if we want to inform the user that exception
handling is turned off.
@@ -846,7 +846,7 @@ is_admissible_throw_operand_or_catch_parameter (tree t, bool is_throw)
tree type = TREE_TYPE (t);
/* C++11 [except.handle] The exception-declaration shall not denote
- an incomplete type, an abstract class type, or an rvalue reference
+ an incomplete type, an abstract class type, or an rvalue reference
type. */
/* 15.1/4 [...] The type of the throw-expression shall not be an
diff --git a/gcc/cp/g++spec.cc b/gcc/cp/g++spec.cc
index f95d7965355..0370e0c1cc7 100644
--- a/gcc/cp/g++spec.cc
+++ b/gcc/cp/g++spec.cc
@@ -200,7 +200,7 @@ lang_specific_driver (struct cl_decoded_option **in_decoded_options,
|| strcmp (arg, "objective-c++") == 0
|| strcmp (arg, "objective-c++-cpp-output") == 0))
library = 1;
-
+
saw_speclang = 1;
break;
diff --git a/gcc/cp/init.cc b/gcc/cp/init.cc
index b49a7ca9169..36fd5b178e5 100644
--- a/gcc/cp/init.cc
+++ b/gcc/cp/init.cc
@@ -397,7 +397,7 @@ build_value_init_noctor (tree type, tsubst_flags_t complain)
{
gcc_assert (!TYPE_HAS_COMPLEX_DFLT (type)
|| errorcount != 0);
-
+
if (TREE_CODE (type) != UNION_TYPE)
{
tree field;
@@ -571,7 +571,7 @@ get_nsdmi (tree member, bool in_ctor, tsubst_flags_t complain)
tree init;
tree save_ccp = current_class_ptr;
tree save_ccr = current_class_ref;
-
+
if (DECL_LANG_SPECIFIC (member) && DECL_TEMPLATE_INFO (member))
{
init = DECL_INITIAL (DECL_TI_TEMPLATE (member));
@@ -2622,9 +2622,9 @@ decl_constant_value (tree decl)
{
return decl_constant_value (decl, /*unshare_p=*/true);
}
-\f
+
/* Common subroutines of build_new and build_vec_delete. */
-\f
+
/* Build and return a NEW_EXPR. If NELTS is non-NULL, TYPE[NELTS] is
the type of the object being allocated; otherwise, it's just TYPE.
INIT is the initializer, if any. USE_GLOBAL_NEW is true if the
@@ -2981,7 +2981,7 @@ maybe_wrap_new_for_constexpr (tree alloc_call, tree elt_type, tree cookie_size)
if (current_function_decl != NULL_TREE
&& !DECL_DECLARED_CONSTEXPR_P (current_function_decl))
return alloc_call;
-
+
tree call_expr = extract_call_expr (alloc_call);
if (call_expr == error_mark_node)
return alloc_call;
@@ -4032,7 +4032,7 @@ build_new (location_t loc, vec<tree, va_gc> **placement, tree type,
return rval;
}
-\f
+
static tree
build_vec_delete_1 (location_t loc, tree base, tree maxindex, tree type,
special_function_kind auto_delete_vec,
@@ -4091,7 +4091,7 @@ build_vec_delete_1 (location_t loc, tree base, tree maxindex, tree type,
/* This size won't actually be used. */
size_exp = size_one_node;
goto no_destructor;
- }
+ }
size_exp = size_in_bytes (type);
diff --git a/gcc/cp/lambda.cc b/gcc/cp/lambda.cc
index c7a9268251b..cc09e17d909 100644
--- a/gcc/cp/lambda.cc
+++ b/gcc/cp/lambda.cc
@@ -219,7 +219,7 @@ lambda_capture_field_type (tree expr, bool explicit_init_p,
else if (explicit_init_p)
{
tree auto_node = make_auto ();
-
+
type = auto_node;
if (by_reference_p)
/* Add the reference now, so deduction doesn't lose
@@ -1527,7 +1527,7 @@ compare_lambda_template_head (tree tmpl_a, tree tmpl_b)
// synthetic ones.
int len_a = TREE_VEC_LENGTH (inner_a);
int len_b = TREE_VEC_LENGTH (inner_b);
-
+
for (int ix = 0, len = MAX (len_a, len_b); ix != len; ix++)
{
tree parm_a = NULL_TREE;
@@ -1540,7 +1540,7 @@ compare_lambda_template_head (tree tmpl_a, tree tmpl_b)
if (DECL_VIRTUAL_P (parm_a))
parm_a = NULL_TREE;
}
-
+
tree parm_b = NULL_TREE;
if (ix < len_b)
{
@@ -1571,7 +1571,7 @@ compare_lambda_template_head (tree tmpl_a, tree tmpl_b)
if (!same_type_p (TREE_TYPE (parm_a), TREE_TYPE (parm_b)))
return false;
}
- else
+ else
{
if (TEMPLATE_TYPE_PARAMETER_PACK (TREE_TYPE (parm_a))
!= TEMPLATE_TYPE_PARAMETER_PACK (TREE_TYPE (parm_b)))
diff --git a/gcc/cp/lex.cc b/gcc/cp/lex.cc
index 22d1ab92add..12c4321c3da 100644
--- a/gcc/cp/lex.cc
+++ b/gcc/cp/lex.cc
@@ -75,14 +75,14 @@ struct impl_files
};
static struct impl_files *impl_file_chain;
-\f
+
void
cxx_finish (void)
{
c_common_finish ();
}
-ovl_op_info_t ovl_op_info[2][OVL_OP_MAX] =
+ovl_op_info_t ovl_op_info[2][OVL_OP_MAX] =
{
{
{NULL_TREE, NULL, NULL, ERROR_MARK, OVL_OP_ERROR_MARK, 0},
@@ -293,7 +293,7 @@ init_cp_pragma (void)
c_register_pragma ("GCC", "interface", handle_pragma_interface);
c_register_pragma ("GCC", "implementation", handle_pragma_implementation);
}
-\f
+
/* TRUE if a code represents a statement. */
bool statement_code_p[MAX_TREE_CODES];
@@ -346,7 +346,7 @@ cxx_init (void)
input_location = saved_loc;
return true;
}
-\f
+
/* Return nonzero if S is not considered part of an
INTERFACE/IMPLEMENTATION pair. Otherwise, return 0. */
@@ -462,7 +462,7 @@ struct module_token_filter
state = module_end;
goto header_unit;
}
-
+
if (type == CPP_PADDING || type == CPP_COMMENT)
break;
@@ -1076,7 +1076,7 @@ maybe_add_lang_type_raw (tree t)
{
if (!RECORD_OR_UNION_CODE_P (TREE_CODE (t)))
return false;
-
+
auto *lt = (struct lang_type *) (ggc_internal_cleared_alloc
(sizeof (struct lang_type)));
TYPE_LANG_SPECIFIC (t) = lt;
diff --git a/gcc/cp/logic.cc b/gcc/cp/logic.cc
index e432c577497..a975e74bb45 100644
--- a/gcc/cp/logic.cc
+++ b/gcc/cp/logic.cc
@@ -113,7 +113,7 @@ struct clause
return std::make_pair (iter, false);
}
- /* Inserts T before ITER in the list of terms. If T has
+ /* Inserts T before ITER in the list of terms. If T has
already is an atomic constraint that already appears in
the clause, no action is taken, and the current iterator
is returned. Returns a pair of an iterator to the inserted
diff --git a/gcc/cp/mangle.cc b/gcc/cp/mangle.cc
index 5789adcf680..b76d13aa7a7 100644
--- a/gcc/cp/mangle.cc
+++ b/gcc/cp/mangle.cc
@@ -1396,7 +1396,7 @@ find_decomp_unqualified_name (tree decl, size_t *len)
::= <special-name>
::= [<module-name>] <source-name>
::= [<module-name>] <unnamed-type-name>
- ::= <local-source-name>
+ ::= <local-source-name>
<local-source-name> ::= L <source-name> <discriminator> */
@@ -2199,7 +2199,7 @@ write_local_name (tree function, const tree local_entity,
C++0x extensions
<type> ::= RR <type> # rvalue reference-to
- <type> ::= Dt <expression> # decltype of an id-expression or
+ <type> ::= Dt <expression> # decltype of an id-expression or
# class member access
<type> ::= DT <expression> # decltype of an expression
<type> ::= Dn # decltype of nullptr
@@ -3537,7 +3537,7 @@ write_expression (tree expr)
return;
}
else
- write_string (name);
+ write_string (name);
switch (code)
{
@@ -3564,7 +3564,7 @@ write_expression (tree expr)
case CAST_EXPR:
write_type (TREE_TYPE (expr));
- if (list_length (TREE_OPERAND (expr, 0)) == 1)
+ if (list_length (TREE_OPERAND (expr, 0)) == 1)
write_expression (TREE_VALUE (TREE_OPERAND (expr, 0)));
else
{
@@ -4608,7 +4608,7 @@ mangle_template_parm_object (tree expr)
write_char ('E');
return finish_mangling_get_identifier ();
}
-\f
+
/* Given a CLASS_TYPE, such as a record for std::bad_exception this
function generates a mangled name for the vtable map variable of
the class type. For example, if the class type is
diff --git a/gcc/cp/mapper-client.cc b/gcc/cp/mapper-client.cc
index 8e331c0e896..bc9c219afa4 100644
--- a/gcc/cp/mapper-client.cc
+++ b/gcc/cp/mapper-client.cc
@@ -265,7 +265,7 @@ module_client::open_module_client (location_t loc, const char *o,
c = new module_client (fd, fd);
}
}
-
+
}
break;
}
@@ -291,7 +291,7 @@ module_client::open_module_client (location_t loc, const char *o,
line = l;
errmsg = "reading";
}
-
+
close (fd);
}
}
diff --git a/gcc/cp/method.cc b/gcc/cp/method.cc
index 7b4d5a59823..3bca86ccab0 100644
--- a/gcc/cp/method.cc
+++ b/gcc/cp/method.cc
@@ -44,7 +44,7 @@ init_method (void)
{
init_mangle ();
}
-\f
+
/* Return a this or result adjusting thunk to FUNCTION. THIS_ADJUSTING
indicates whether it is a this or result adjusting thunk.
FIXED_OFFSET and VIRTUAL_OFFSET indicate how to do the adjustment
@@ -382,7 +382,7 @@ use_thunk (tree thunk_fndecl, bool emit_p)
pop_from_top_level ();
}
-\f
+
/* Code for synthesizing methods which have default semantics defined. */
/* True iff CTYPE has a trivial SFK. */
diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
index 7133009dba5..8b275e4cc0c 100644
--- a/gcc/cp/module.cc
+++ b/gcc/cp/module.cc
@@ -461,7 +461,7 @@ public:
bytes ()
:parent (), bit_val (0), bit_pos (0)
{}
- ~bytes ()
+ ~bytes ()
{
}
@@ -617,7 +617,7 @@ class bytes_out : public bytes {
public:
allocator *memory; /* Obtainer of memory. */
-
+
public:
bytes_out (allocator *memory)
: parent (), memory (memory)
@@ -648,7 +648,7 @@ public:
if (unsigned pad = pos & (boundary - 1))
write (boundary - pad);
}
-
+
public:
char *write (unsigned count, bool exact = false)
{
@@ -1203,7 +1203,7 @@ protected:
uint32_t entry; /* 0 */
uint32_t phoff; /* 0 */
uint32_t shoff; /* Section Header Offset in file */
- uint32_t flags;
+ uint32_t flags;
uint16_t ehsize; /* ELROND Header SIZE -- sizeof (header) */
uint16_t phentsize; /* 0 */
uint16_t phnum; /* 0 */
@@ -1677,7 +1677,7 @@ elf_in::read (data *data, unsigned pos, unsigned length)
}
#endif
grow (*data, length);
-#if MAPPED_READING
+#if MAPPED_READING
data->buffer = hdr.buffer + pos;
#else
if (::read (fd, data->buffer, data->size) != ssize_t (length))
@@ -2278,7 +2278,7 @@ public:
EK_USING, /* A using declaration (at namespace scope). */
EK_NAMESPACE, /* A namespace. */
EK_REDIRECT, /* Redirect to a template_decl. */
- EK_EXPLICIT_HWM,
+ EK_EXPLICIT_HWM,
EK_BINDING = EK_EXPLICIT_HWM, /* Implicitly encoded. */
EK_FOR_BINDING, /* A decl being inserted for a binding. */
EK_INNER_DECL, /* A decl defined outside of its imported
@@ -2290,7 +2290,7 @@ public:
private:
/* Placement of bit fields in discriminator. */
- enum disc_bits
+ enum disc_bits
{
DB_ZERO_BIT, /* Set to disambiguate identifier from flags */
DB_SPECIAL_BIT, /* First dep slot is special. */
@@ -2358,7 +2358,7 @@ private:
gcc_checking_assert (I < 2 || !is_binding ());
return bool ((discriminator >> I) & 1);
}
-
+
public:
bool is_binding () const
{
@@ -2570,7 +2570,7 @@ public:
void add_partial_entities (vec<tree, va_gc> *);
void add_class_entities (vec<tree, va_gc> *);
- public:
+ public:
void find_dependencies (module_state *);
bool finalize_dependencies ();
vec<depset *> connect ();
@@ -2588,7 +2588,7 @@ public:
result.create (size);
stack.create (50);
}
- ~tarjan ()
+ ~tarjan ()
{
gcc_assert (!stack.length ());
stack.release ();
@@ -2616,7 +2616,7 @@ const char *
depset::entity_kind_name () const
{
/* Same order as entity_kind. */
- static const char *const names[] =
+ static const char *const names[] =
{"decl", "specialization", "partial", "using",
"namespace", "redirect", "binding"};
entity_kind kind = get_entity_kind ();
@@ -2778,7 +2778,7 @@ enum merge_kind
MK_local_friend, /* Found by CTX, index. */
MK_indirect_lwm = MK_enum,
-
+
/* Template specialization kinds below. These are all found via
primary template and specialization args. */
MK_template_mask = 0x10, /* A template specialization. */
@@ -2907,7 +2907,7 @@ public:
public:
/* Serialize various definitions. */
bool read_definition (tree decl);
-
+
private:
bool is_matching_decl (tree existing, tree decl, bool is_typedef);
static bool install_implicit_member (tree decl);
@@ -3007,7 +3007,7 @@ public:
void end ();
public:
- enum tags
+ enum tags
{
tag_backref = -1, /* Upper bound on the backrefs. */
tag_value = 0, /* Write by value. */
@@ -3293,7 +3293,7 @@ struct ord_loc_traits
static bool is_deleted (value_type &) { return false; }
static void mark_deleted (value_type &) { gcc_unreachable (); }
-
+
static void remove (value_type &) {}
};
/* Table keyed by ord_loc_info, used for noting. */
@@ -3351,7 +3351,7 @@ struct macro_loc_traits
static bool is_deleted (value_type &) { return false; }
static void mark_deleted (value_type &) { gcc_unreachable (); }
-
+
static void remove (value_type &) {}
};
/* Table keyed by line_map_macro, used for noting. */
@@ -3987,7 +3987,7 @@ get_clone_target (tree decl)
if (TREE_CODE (decl) == TEMPLATE_DECL)
{
tree res_orig = DECL_CLONED_FUNCTION (DECL_TEMPLATE_RESULT (decl));
-
+
target = DECL_TI_TEMPLATE (res_orig);
}
else
@@ -4674,7 +4674,7 @@ set_cmi_repo (const char *r)
size_t len = strlen (r);
cmi_repo = XNEWVEC (char, len + 1);
memcpy (cmi_repo, r, len + 1);
-
+
if (len > 1 && IS_DIR_SEPARATOR (cmi_repo[len-1]))
len--;
if (len == 1 && cmi_repo[0] == '.')
@@ -5618,7 +5618,7 @@ trees_in::core_bools (tree t)
RB (t->function_decl.disregard_inline_limits);
RB (t->function_decl.pure_flag);
RB (t->function_decl.looping_const_or_pure_flag);
-
+
RB (t->function_decl.has_debug_args_flag);
RB (t->function_decl.versioned_function);
@@ -6336,7 +6336,7 @@ trees_out::core_vals (tree t)
WT (((lang_tree_node *)t)->overload.function);
WT (t->common.chain);
break;
-
+
case PTRMEM_CST:
WT (((lang_tree_node *)t)->ptrmem.member);
break;
@@ -6396,7 +6396,7 @@ trees_out::core_vals (tree t)
/* TEMPLATE_PARM_DESCENDANTS (AKA TREE_CHAIN) is an internal
cache, do not stream. */
break;
-
+
case TRAIT_EXPR:
WT (((lang_tree_node *)t)->trait_expression.type1);
WT (((lang_tree_node *)t)->trait_expression.type2);
@@ -6662,7 +6662,7 @@ trees_in::core_vals (tree t)
RU (t->label_decl.label_decl_uid);
RU (t->label_decl.eh_landing_pad_nr);
break;
-
+
case FUNCTION_DECL:
{
unsigned bltin = u ();
@@ -7393,7 +7393,7 @@ bool
trees_in::add_indirects (tree decl)
{
unsigned count = 0;
-
+
tree inner = decl;
if (TREE_CODE (inner) == TEMPLATE_DECL)
{
@@ -7581,7 +7581,7 @@ void
trees_out::install_entity (tree decl, depset *dep)
{
gcc_checking_assert (streaming_p ());
-
+
/* Write the entity index, so we can insert it as soon as we
know this is new. */
u (dep ? dep->cluster + 1 : 0);
@@ -7949,7 +7949,7 @@ trees_in::decl_value ()
unsigned saved_unused = unused;
unused = 0;
-
+
merge_kind mk = merge_kind (mk_u);
tree decl = start ();
@@ -7967,7 +7967,7 @@ trees_in::decl_value ()
if (!tree_node_bools (decl))
decl = NULL_TREE;
}
-
+
/* Insert into map. */
tag = insert (decl);
if (decl)
@@ -9177,7 +9177,7 @@ trees_out::tree_node (tree t)
if (streaming_p ())
{
/* We know the ordering of the 4 id tags. */
- static const char *const kinds[] =
+ static const char *const kinds[] =
{"", "conv_op ", "anon ", "lambda "};
dump (dumper::TREE)
&& dump ("Written:%d %sidentifier:%N", tag,
@@ -11085,7 +11085,7 @@ trees_in::key_mergeable (int tag, merge_kind mk, tree decl, tree inner,
existing = check_mergeable_decl
(mk, inner, existing, key);
-
+
if (!existing && DECL_ALIAS_TEMPLATE_P (decl))
{} // FIXME: Insert into specialization
// tables, we'll need the arguments for that!
@@ -11664,7 +11664,7 @@ trees_in::read_function_def (tree decl, tree maybe_template)
{
// FIXME:QOI Check matching defn
}
-
+
return true;
}
@@ -12216,7 +12216,7 @@ trees_in::read_class_def (tree defn, tree maybe_template)
friend_decls; friend_decls = TREE_CHAIN (friend_decls))
{
tree f = TREE_VALUE (friend_decls);
-
+
DECL_BEFRIENDING_CLASSES (f)
= tree_cons (NULL_TREE, type, DECL_BEFRIENDING_CLASSES (f));
dump () && dump ("Class %N befriending %C:%N",
@@ -12313,7 +12313,7 @@ trees_in::read_enum_def (tree defn, tree maybe_template)
if (DECL_NAME (known_decl) != DECL_NAME (new_decl))
break;
-
+
new_decl = maybe_duplicate (new_decl);
if (!cp_tree_equal (DECL_INITIAL (known_decl),
@@ -13420,7 +13420,7 @@ binding_cmp (const void *a_, const void *b_)
a_export = DECL_MODULE_EXPORT_P (TREE_CODE (a_ent) == CONST_DECL
? TYPE_NAME (TREE_TYPE (a_ent))
: STRIP_TEMPLATE (a_ent));
-
+
bool b_using = b->get_entity_kind () == depset::EK_USING;
bool b_export;
if (b_using)
@@ -13565,7 +13565,7 @@ depset_cmp (const void *a_, const void *b_)
if (a_kind != b_kind)
/* Different entity kinds, order by that. */
return a_kind < b_kind ? -1 : +1;
-
+
tree a_decl = a->get_entity ();
tree b_decl = b->get_entity ();
if (a_kind == depset::EK_USING)
@@ -13797,7 +13797,7 @@ loc_spans::init (const line_maps *lmaps, const line_map_ordinary *map)
interval.ordinary.first, interval.ordinary.second,
interval.macro.first, interval.macro.second);
spans->quick_push (interval);
-
+
/* Start an interval for the main file. */
interval.ordinary.first = interval.ordinary.second;
interval.macro.second = interval.macro.first;
@@ -14094,7 +14094,7 @@ module_state::mangle (bool include_partition)
{
if (parent)
parent->mangle (include_partition);
- if (include_partition || !is_partition ())
+ if (include_partition || !is_partition ())
{
// Partitions are significant for global initializer
// functions
@@ -15173,7 +15173,7 @@ module_state::write_namespaces (elf_out *to, vec<depset *> spaces,
dump () && dump ("Writing namespace:%u %N%s%s%s%s",
b->cluster, ns,
- flags & 1 ? ", public" : "",
+ flags & 1 ? ", public" : "",
flags & 2 ? ", inline" : "",
flags & 4 ? ", purview" : "",
flags & 8 ? ", export" : "");
@@ -15225,7 +15225,7 @@ module_state::read_namespaces (unsigned num)
dump () && dump ("Read namespace:%u %P%s%s%s%s",
entity_index, parent, id,
- flags & 1 ? ", public" : "",
+ flags & 1 ? ", public" : "",
flags & 2 ? ", inline" : "",
flags & 4 ? ", purview" : "",
flags & 8 ? ", export" : "");
@@ -15782,7 +15782,7 @@ module_state::note_location (location_t loc)
}
added = true;
}
- }
+ }
}
else if (IS_ORDINARY_LOC (loc))
{
@@ -16136,7 +16136,7 @@ module_state::write_prepare_maps (module_state_config *cfg, bool has_partitions)
unsigned offset = 0, range_bits = 0;
ord_loc_info *base = nullptr;
for (auto iter = begin; iter != end; ++iter)
- {
+ {
if (base && iter->src == base->src)
{
if (base->offset + base->span +
@@ -16490,7 +16490,7 @@ module_state::read_ordinary_maps (unsigned num_ord_locs, unsigned range_bits)
spans.close ();
filenames.release ();
-
+
dump.outdent ();
if (!sec.end (from ()))
return false;
@@ -17417,7 +17417,7 @@ module_state::write_inits (elf_out *to, depset::hash &table, unsigned *crc_ptr)
list = tls_aggregates;
}
-
+
sec.end (to, to->name (MOD_SNAME_PFX ".ini"), crc_ptr);
dump.outdent ();
@@ -17480,7 +17480,7 @@ module_state::read_inits (unsigned count)
post_load_processing ();
dump.outdent ();
if (!sec.end (from ()))
- return false;
+ return false;
return true;
}
@@ -18095,7 +18095,7 @@ module_state::write_begin (elf_out *to, cpp_reader *reader,
write_env (to);
}
-// Finish module writing after we've emitted all dynamic initializers.
+// Finish module writing after we've emitted all dynamic initializers.
void
module_state::write_end (elf_out *to, cpp_reader *reader,
@@ -18345,7 +18345,7 @@ module_state::read_language (bool outermost)
ok = false;
function_depth--;
-
+
announce (flag_module_lazy ? "lazy" : "imported");
loadedness = ML_LANGUAGE;
@@ -18395,7 +18395,7 @@ module_state::load_section (unsigned snum, binding_slot *mslot)
slurp->lru = ++lazy_lru;
slurp->current = old_current;
}
-
+
if (mslot && mslot->is_lazy ())
{
/* Oops, the section didn't set this slot. */
@@ -19063,7 +19063,7 @@ module_state::lazy_load (unsigned index, binding_slot *mslot)
dump () && dump ("Loading entity %M[%u] section:%u", this, index, snum);
bool ok = load_section (snum, mslot);
-
+
dump.pop (n);
return ok;
@@ -19546,7 +19546,7 @@ maybe_translate_include (cpp_reader *reader, line_maps *lmaps, location_t loc,
if (!(xlate > 0))
return nullptr;
-
+
/* Create the translation text. */
loc = ordinary_loc_of (lmaps, loc);
const line_map_ordinary *map
@@ -20417,7 +20417,7 @@ module_preprocess_options (cpp_reader *reader)
if (modules_p ())
{
auto *cb = cpp_get_callbacks (reader);
-
+
cb->translate_include = maybe_translate_include;
cb->user_deferred_macro = module_state::deferred_macro;
if (flag_header_unit)
diff --git a/gcc/cp/name-lookup.cc b/gcc/cp/name-lookup.cc
index dfa6fb40675..3bf2e96d9c4 100644
--- a/gcc/cp/name-lookup.cc
+++ b/gcc/cp/name-lookup.cc
@@ -109,7 +109,7 @@ create_local_binding (cp_binding_level *level, tree name)
binding->previous = IDENTIFIER_BINDING (name);
IDENTIFIER_BINDING (name) = binding;
-
+
return binding;
}
@@ -148,7 +148,7 @@ search_imported_binding_slot (tree *slot, unsigned ix)
if (TREE_CODE (*slot) != BINDING_VECTOR)
return NULL;
-
+
unsigned clusters = BINDING_VECTOR_NUM_CLUSTERS (*slot);
binding_cluster *cluster = BINDING_VECTOR_CLUSTER_BASE (*slot);
@@ -491,7 +491,7 @@ protected:
{
return LOOKUP_FOUND_P (scope);
}
-
+
void mark_seen (tree scope); /* Mark and add to scope vector. */
static void mark_found (tree scope)
{
@@ -1061,7 +1061,7 @@ name_lookup::search_qualified (tree scope, bool usings)
if (seen_p (scope))
found = found_p (scope);
- else
+ else
{
found = search_namespace (scope);
if (!found && usings)
@@ -1579,7 +1579,7 @@ name_lookup::adl_template_arg (tree arg)
{
tree args = ARGUMENT_PACK_ARGS (arg);
int i, len = TREE_VEC_LENGTH (args);
- for (i = 0; i < len; ++i)
+ for (i = 0; i < len; ++i)
adl_template_arg (TREE_VEC_ELT (args, i));
}
/* It's not a template template argument, but it is a type template
@@ -1595,7 +1595,7 @@ tree
name_lookup::search_adl (tree fns, vec<tree, va_gc> *args)
{
gcc_checking_assert (!vec_safe_length (scopes));
-
+
/* Gather each associated entity onto the lookup's scope list. */
unsigned ix;
tree arg;
@@ -1635,7 +1635,7 @@ name_lookup::search_adl (tree fns, vec<tree, va_gc> *args)
(10.2) is visible if there is an associated entity
attached to M with the same innermost enclosing
non-inline namespace as D.
- [basic.lookup.argdep]/4.4 */
+ [basic.lookup.argdep]/4.4 */
if (!inst_path)
/* Not 2nd phase. */
@@ -1787,7 +1787,7 @@ fields_linear_search (tree klass, tree name, bool want_type)
if (DECL_NAME (decl) != name)
continue;
-
+
if (TREE_CODE (decl) == USING_DECL)
{
decl = strip_using_decl (decl);
@@ -2069,7 +2069,7 @@ member_name_cmp (const void *a_p, const void *b_p)
some erroneous cases get though. */
gcc_assert (errorcount);
}
-
+
/* Using source location would be the best thing here, but we can
get identically-located decls in the following circumstances:
@@ -2531,7 +2531,7 @@ strip_using_decl (tree decl)
/* We have found a type introduced by a using
declaration at class scope that refers to a dependent
type.
-
+
using typename :: [opt] nested-name-specifier unqualified-id ;
*/
decl = make_typename_type (USING_DECL_SCOPE (decl),
@@ -3604,7 +3604,7 @@ check_module_override (tree decl, tree mvec, bool hiding,
return match;
-
+
}
/* Record DECL as belonging to the current lexical scope. Check for
@@ -4178,7 +4178,7 @@ push_local_binding (tree id, tree decl, bool is_using)
add_decl_to_level (b, decl);
}
-\f
+
/* true means unconditionally make a BLOCK for the next level pushed. */
static bool keep_next_level_flag;
@@ -4665,7 +4665,7 @@ print_binding_stack (void)
fprintf (stderr, "global:\n");
print_binding_level (NAMESPACE_LEVEL (global_namespace));
}
-\f
+
/* Push a definition of struct, union or enum tag named ID. into
binding_level B. DECL is a TYPE_DECL for the type. DECL has
already been pushed into its binding level. This is bookkeeping to
@@ -4924,7 +4924,7 @@ do_nonmember_using_decl (name_lookup &lookup, bool fn_scope_p,
else if (insert_p)
// FIXME:what if we're newly exporting lookup.value
value = lookup.value;
-
+
/* Now the type binding. */
if (lookup.type && lookup.type != type)
{
@@ -5156,7 +5156,7 @@ pop_inner_scope (tree outer, tree inner)
inner = CP_DECL_CONTEXT (TREE_CODE (inner) == NAMESPACE_DECL ? inner : TYPE_NAME (inner));
}
}
-\f
+
/* Do a pushlevel for class declarations. */
void
@@ -5769,7 +5769,7 @@ do_class_using_decl (tree scope, tree name)
return lookup_using_decl (scope, lookup);
}
-\f
+
/* Return the binding for NAME in NS in the current TU. If NS is
NULL, look in global_namespace. We will not find declarations
from imports. Users of this who, having found nothing, push a new
@@ -5882,7 +5882,7 @@ set_decl_namespace (tree decl, tree scope, bool friendp)
return;
}
-
+
/* We handle these in check_explicit_instantiation_namespace. */
if (processing_explicit_instantiation)
return;
@@ -7076,7 +7076,7 @@ consider_binding_level (tree name, best_match <tree, const char *> &bm,
order. So, iterate over the namespace hash, inserting
visible names into a vector. Then sort the vector. Then
determine spelling distance. */
-
+
tree ns = lvl->this_entity;
auto_vec<tree> vec;
@@ -7131,7 +7131,7 @@ consider_binding_level (tree name, best_match <tree, const char *> &bm,
else
maybe_add_fuzzy_binding (vec, binding, kind);
}
-
+
vec.qsort ([] (const void *a_, const void *b_)
{
return strcmp (IDENTIFIER_POINTER (*(const tree *)a_),
@@ -7146,7 +7146,7 @@ consider_binding_level (tree name, best_match <tree, const char *> &bm,
/* Ignore internal names with spaces in them. */
if (strchr (str, ' '))
continue;
-
+
/* Don't suggest names that are reserved for use by the
implementation, unless NAME began with an underscore. */
if (!consider_implementation_names
@@ -7675,7 +7675,7 @@ lookup_elaborated_type (tree name, TAG_how how)
if (how != TAG_how::HIDDEN_FRIEND)
/* No longer hidden. */
STAT_TYPE_HIDDEN_P (*slot) = false;
-
+
return type;
}
else if (tree decl = MAYBE_STAT_DECL (bind))
@@ -8008,7 +8008,7 @@ pushtag (tree name, tree type, TAG_how how)
return type;
}
-\f
+
/* Subroutines for reverting temporarily to top-level for instantiation
of templates and such. We actually need to clear out the class- and
local-value slots of all identifiers, so that only the global values
@@ -8652,7 +8652,7 @@ pop_namespace (void)
create that namespace and add it to the container's binding-vector. */
tree
-add_imported_namespace (tree ctx, tree name, location_t loc, unsigned import,
+add_imported_namespace (tree ctx, tree name, location_t loc, unsigned import,
bool inline_p, bool visible_p)
{
// FIXME: Something is not correct about the VISIBLE_P handling. We
@@ -8756,7 +8756,7 @@ cp_emit_debug_info_for_using (tree t, tree context)
if (TREE_CODE (fn) == TEMPLATE_DECL)
/* FIXME: Handle TEMPLATE_DECLs. */
continue;
-
+
/* Ignore this FUNCTION_DECL if it refers to a builtin declaration
of a builtin function. */
if (TREE_CODE (fn) == FUNCTION_DECL
diff --git a/gcc/cp/name-lookup.h b/gcc/cp/name-lookup.h
index 9e3b69865a6..cb9e08a1085 100644
--- a/gcc/cp/name-lookup.h
+++ b/gcc/cp/name-lookup.h
@@ -23,7 +23,7 @@ along with GCC; see the file COPYING3. If not see
#include "c-family/c-common.h"
-\f
+
/* The datatype used to implement C++ scope. */
struct cp_binding_level;
@@ -183,7 +183,7 @@ extern void pop_local_binding (tree, tree);
extern void pop_bindings_and_leave_scope (void);
extern tree constructor_name (tree);
extern bool constructor_name_p (tree, tree);
-\f
+
/* The kinds of scopes we recognize. */
enum scope_kind {
sk_block = 0, /* An ordinary block scope. This enumerator must
@@ -348,7 +348,7 @@ extern void pop_scope (tree);
extern tree push_inner_scope (tree);
extern void pop_inner_scope (tree, tree);
extern void push_binding_level (cp_binding_level *);
-\f
+
extern bool handle_namespace_attrs (tree, tree);
extern void pushlevel_class (void);
extern void poplevel_class (void);
@@ -357,9 +357,9 @@ extern void poplevel_class (void);
don't accidentally mix integers. */
enum class LOOK_where
{
- BLOCK = 1 << 0, /* Consider block scopes. */
- CLASS = 1 << 1, /* Consider class scopes. */
- NAMESPACE = 1 << 2, /* Consider namespace scopes. */
+ BLOCK = 1 << 0, /* Consider block scopes. */
+ CLASS = 1 << 1, /* Consider class scopes. */
+ NAMESPACE = 1 << 2, /* Consider namespace scopes. */
ALL = BLOCK | CLASS | NAMESPACE,
BLOCK_NAMESPACE = BLOCK | NAMESPACE,
diff --git a/gcc/cp/optimize.cc b/gcc/cp/optimize.cc
index 5c134fd2fed..569d559985b 100644
--- a/gcc/cp/optimize.cc
+++ b/gcc/cp/optimize.cc
@@ -481,7 +481,7 @@ maybe_clone_body (tree fn)
clone = fns[idx];
if (!clone)
- continue;
+ continue;
/* Update CLONE's source position information to match FN's. */
DECL_SOURCE_LOCATION (clone) = DECL_SOURCE_LOCATION (fn);
diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index 8b1658decba..115cd8821df 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -49,7 +49,7 @@ along with GCC; see the file COPYING3. If not see
#include "contracts.h"
#include "bitmap.h"
-\f
+
/* The lexer. */
/* The cp_lexer_* routines mediate between the lexer proper (in libcpp
@@ -1588,7 +1588,7 @@ cp_ensure_no_oacc_routine (cp_parser *parser)
parser->oacc_routine = NULL;
}
}
-\f
+
/* Decl-specifiers. */
/* Set *DECL_SPECS to represent an empty decl-specifier-seq. */
@@ -26901,7 +26901,7 @@ cp_parser_class_head (cp_parser* parser,
/* If this type was already complete, and we see another definition,
that's an error. Likewise if the type is already being defined:
- this can happen, eg, when it's defined from within an expression
+ this can happen, eg, when it's defined from within an expression
(c++/84605). */
if (type != error_mark_node
&& (COMPLETE_TYPE_P (type) || TYPE_BEING_DEFINED (type)))
@@ -31779,7 +31779,7 @@ cp_parser_constructor_declarator_p (cp_parser *parser, cp_parser_flags flags,
use a qualified name.
Parse with an empty set of declaration specifiers since we're
- trying to match a decl-specifier-seq of the first parameter.
+ trying to match a decl-specifier-seq of the first parameter.
This must be non-null so that cp_parser_simple_type_specifier
will recognize a constrained placeholder type such as:
'C<int> auto' where C is a type concept. */
@@ -32583,7 +32583,7 @@ cp_parser_functional_cast (cp_parser* parser, tree type)
parser->lexer);
cast = build_functional_cast (combined_loc, type, expression_list,
tf_warning_or_error);
-
+
/* [expr.const]/1: In an integral constant expression "only type
conversions to integral or enumeration type can be used". */
if (TREE_CODE (type) == TYPE_DECL)
@@ -35040,7 +35040,7 @@ cp_parser_allow_gnu_extensions_p (cp_parser* parser)
{
return parser->allow_gnu_extensions_p;
}
-\f
+
/* Objective-C++ Productions */
@@ -37033,7 +37033,7 @@ cp_parser_objc_at_dynamic_declaration (cp_parser *parser)
objc_add_dynamic_declaration (loc, list);
}
-\f
+
/* OpenMP 2.5 / 3.0 / 3.1 / 4.0 / 4.5 / 5.0 parsing routines. */
/* Returns name of the next clause.
@@ -48587,7 +48587,7 @@ cp_parser_omp_construct (cp_parser *parser, cp_token *pragma_tok, bool *if_p)
protected_set_expr_location (stmt, pragma_tok->location);
}
-\f
+
/* Transactional Memory parsing routines. */
/* Parse a transaction attribute.
@@ -48883,7 +48883,7 @@ cp_parser_transaction_cancel (cp_parser *parser)
return stmt;
}
-\f
+
/* Special handling for the first token or line in the file. The first
thing in the file might be #pragma GCC pch_preprocess, which loads a
@@ -49378,7 +49378,7 @@ pragma_lex (tree *value, location_t *loc)
return ret;
}
-\f
+
/* External interface. */
/* Parse one entire translation unit. */
diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index cbe5898b553..195597f2e45 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -4128,7 +4128,7 @@ make_pack_expansion (tree arg, tsubst_flags_t complain)
class initializer. In this case, the TREE_PURPOSE will be a
_TYPE node (representing the base class expansion we're
initializing) and the TREE_VALUE will be a TREE_LIST
- containing the initialization arguments.
+ containing the initialization arguments.
The resulting expansion looks somewhat different from most
expansions. Rather than returning just one _EXPANSION, we
@@ -4173,7 +4173,7 @@ make_pack_expansion (tree arg, tsubst_flags_t complain)
{
/* Determine which parameter packs will be expanded in this
argument. */
- cp_walk_tree (&TREE_VALUE (value), &find_parameter_packs_r,
+ cp_walk_tree (&TREE_VALUE (value), &find_parameter_packs_r,
&ppd, ppd.visited);
}
}
@@ -10400,7 +10400,7 @@ corresponding_template_parameter (tree parms, tree parm)
return corresponding_template_parameter (parms, level, index);
}
-\f
+
struct pair_fn_data
{
tree_fn_t fn;
@@ -12119,7 +12119,7 @@ instantiate_class_template (tree type)
if (PACK_EXPANSION_P (BINFO_TYPE (pbase_binfo)))
{
- expanded_bases =
+ expanded_bases =
tsubst_pack_expansion (BINFO_TYPE (pbase_binfo),
args, tf_error, NULL_TREE);
if (expanded_bases == error_mark_node)
@@ -12135,7 +12135,7 @@ instantiate_class_template (tree type)
base = TREE_VEC_ELT (expanded_bases, idx);
else
/* Substitute to figure out the base class. */
- base = tsubst (BINFO_TYPE (pbase_binfo), args, tf_error,
+ base = tsubst (BINFO_TYPE (pbase_binfo), args, tf_error,
NULL_TREE);
if (base == error_mark_node)
@@ -12403,7 +12403,7 @@ instantiate_class_template (tree type)
/* friend class C<T>; */
friend_type = tsubst (friend_type, args,
tf_warning_or_error, NULL_TREE);
-
+
/* Otherwise it's
friend class C;
@@ -13345,7 +13345,7 @@ tsubst_pack_expansion (tree t, tree args, tsubst_flags_t complain,
if (arg_pack)
{
- int my_len =
+ int my_len =
TREE_VEC_LENGTH (ARGUMENT_PACK_ARGS (arg_pack));
/* Don't bother trying to do a partial substitution with
@@ -14807,7 +14807,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain)
return the local specialization (which will be a single
parm). */
tree spec = retrieve_local_specialization (t);
- if (spec
+ if (spec
&& TREE_CODE (spec) == PARM_DECL
&& TREE_CODE (TREE_TYPE (spec)) != TYPE_PACK_EXPANSION)
RETURN (spec);
@@ -15687,7 +15687,7 @@ tsubst_exception_specification (tree fntype,
spec = tsubst (TREE_VALUE (specs), args, complain, in_decl);
if (spec == error_mark_node)
return spec;
- new_specs = add_exception_specifier (new_specs, spec,
+ new_specs = add_exception_specifier (new_specs, spec,
complain);
}
@@ -18377,7 +18377,7 @@ tsubst_omp_for_iterator (tree t, int i, tree declv, tree &orig_declv,
TREE_VEC_ELT (rhs, 1) = RECUR (TREE_VEC_ELT (rhs, 1));
TREE_VEC_ELT (rhs, 2) = RECUR (TREE_VEC_ELT (rhs, 2));
cond = build2 (TREE_CODE (cond), TREE_TYPE (cond),
- lhs, rhs);
+ lhs, rhs);
}
else
cond = RECUR (cond);
@@ -23985,7 +23985,7 @@ unify_pack_expansion (tree tparms, tree targs, tree packed_parms,
int idx, level;
template_parm_level_and_index (TREE_PURPOSE (pack), &level, &idx);
- TREE_VEC_ELT (TREE_TYPE (pack), i - start) =
+ TREE_VEC_ELT (TREE_TYPE (pack), i - start) =
TMPL_ARG (targs, level, idx);
}
}
@@ -24044,7 +24044,7 @@ unify_pack_expansion (tree tparms, tree targs, tree packed_parms,
TMPL_ARG (targs, level, idx) = result;
}
else if (ARGUMENT_PACK_INCOMPLETE_P (old_pack)
- && (ARGUMENT_PACK_ARGS (old_pack)
+ && (ARGUMENT_PACK_ARGS (old_pack)
== ARGUMENT_PACK_EXPLICIT_ARGS (old_pack)))
{
/* We only had the explicitly-provided arguments before, but
@@ -25025,7 +25025,7 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict,
}
}
#undef RECUR_AND_CHECK_FAILURE
-\f
+
/* Note that DECL can be defined in this translation unit, if
required. */
@@ -27218,7 +27218,7 @@ tsubst_initializer_list (tree t, tree argvec)
else
{
tree tmp;
- decl = tsubst_copy (TREE_PURPOSE (t), argvec,
+ decl = tsubst_copy (TREE_PURPOSE (t), argvec,
tf_warning_or_error, NULL_TREE);
decl = expand_member_init (decl);
diff --git a/gcc/cp/ptree.cc b/gcc/cp/ptree.cc
index 53ce06ccd2d..7a4c50d5102 100644
--- a/gcc/cp/ptree.cc
+++ b/gcc/cp/ptree.cc
@@ -123,7 +123,7 @@ cxx_print_decl (FILE *file, tree node, int indent)
(void *) DECL_PENDING_INLINE_INFO (node));
need_indent = false;
}
-
+
if (VAR_OR_FUNCTION_DECL_P (node)
&& DECL_TEMPLATE_INFO (node))
print_node (file, "template-info", DECL_TEMPLATE_INFO (node),
diff --git a/gcc/cp/rtti.cc b/gcc/cp/rtti.cc
index c2cf78d1c09..1cb91344e4c 100644
--- a/gcc/cp/rtti.cc
+++ b/gcc/cp/rtti.cc
@@ -140,7 +140,7 @@ static void create_tinfo_types (void);
static bool typeinfo_in_lib_p (tree);
static int doing_runtime = 0;
-\f
+
/* Create the internal versions of the ABI types. */
void
@@ -225,7 +225,7 @@ throw_bad_typeid (void)
return build_cxx_call (fn, 0, NULL, tf_warning_or_error);
}
-\f
+
/* const type_info*. */
inline tree
@@ -1454,7 +1454,7 @@ get_tinfo_desc (unsigned ix)
NULL_TREE, integer_type_node);
DECL_CHAIN (fld_flg) = fields;
fields = fld_flg;
-
+
tree fld_cnt = build_decl (BUILTINS_LOCATION, FIELD_DECL,
NULL_TREE, integer_type_node);
DECL_CHAIN (fld_cnt) = fields;
@@ -1568,7 +1568,7 @@ emit_support_tinfo_1 (tree bltn)
comdat_linkage for details.) Since we want these objects
to have external linkage so that copies do not have to be
emitted in code outside the runtime library, we make them
- non-COMDAT here.
+ non-COMDAT here.
It might also not be necessary to follow this detail of the
ABI. */
diff --git a/gcc/cp/search.cc b/gcc/cp/search.cc
index 0dbb3be1ee7..71665a9e866 100644
--- a/gcc/cp/search.cc
+++ b/gcc/cp/search.cc
@@ -51,7 +51,7 @@ static tree dfs_access_in_type (tree, void *);
static access_kind access_in_type (tree, tree);
static tree dfs_get_pure_virtuals (tree, void *);
-\f
+
/* Data for lookup_base and its workers. */
struct lookup_base_data_s
@@ -1189,14 +1189,14 @@ lookup_member (tree xbasetype, tree name, int protect, bool want_type,
/* [class.access]
In the case of overloaded function names, access control is
- applied to the function selected by overloaded resolution.
+ applied to the function selected by overloaded resolution.
We cannot check here, even if RVAL is only a single non-static
member function, since we do not know what the "this" pointer
will be. For:
class A { protected: void f(); };
- class B : public A {
+ class B : public A {
void g(A *p) {
f(); // OK
p->f(); // Not OK.
@@ -1429,7 +1429,7 @@ adjust_result_of_qualified_name_lookup (tree decl,
return decl;
}
-\f
+
/* Walk the class hierarchy within BINFO, in a depth-first traversal.
PRE_FN is called in preorder, while POST_FN is called in postorder.
If PRE_FN returns DFS_SKIP_BASES, child binfos will not be
@@ -2254,7 +2254,7 @@ get_pure_virtuals (tree type)
pure virtuals in the base class. */
dfs_walk_once (TYPE_BINFO (type), NULL, dfs_get_pure_virtuals, type);
}
-\f
+
/* Debug info for C++ classes can get very large; try to avoid
emitting it everywhere.
@@ -2331,7 +2331,7 @@ note_debug_info_needed (tree type)
dfs_walk_all (TYPE_BINFO (type), dfs_debug_mark, NULL, 0);
}
-\f
+
/* Helper for lookup_conversions_r. TO_TYPE is the type converted to
by a conversion op in base BINFO. VIRTUAL_DEPTH is nonzero if
BINFO is morally virtual, and VIRTUALNESS is nonzero if virtual
@@ -2561,7 +2561,7 @@ lookup_conversions (tree type)
lookup_conversions_r (TYPE_BINFO (type), 0, 0, NULL_TREE, NULL_TREE, &convs);
tree list = NULL_TREE;
-
+
/* Flatten the list-of-lists */
for (; convs; convs = TREE_CHAIN (convs))
{
diff --git a/gcc/cp/semantics.cc b/gcc/cp/semantics.cc
index ef5bf2430b1..126b1369c5a 100644
--- a/gcc/cp/semantics.cc
+++ b/gcc/cp/semantics.cc
@@ -2690,7 +2690,7 @@ perform_koenig_lookup (cp_expr fn_expr, vec<tree, va_gc> *args,
if (fn && template_id && fn != error_mark_node)
fn = build2 (TEMPLATE_ID_EXPR, unknown_type_node, fn, tmpl_args);
-
+
return cp_expr (fn, loc);
}
@@ -4963,7 +4963,7 @@ finalize_nrv (tree *tp, tree var, tree result)
data.result = result;
cp_walk_tree (tp, finalize_nrv_r, &data, 0);
}
-\f
+
/* Create CP_OMP_CLAUSE_INFO for clause C. Returns true if it is invalid. */
bool
@@ -9096,7 +9096,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort)
&& OMP_CLAUSE_CODE (c) != OMP_CLAUSE_SHARED
&& DECL_P (t))
bitmap_clear_bit (&aligned_head, DECL_UID (t));
-
+
if (VAR_P (t) && CP_DECL_THREAD_LOCAL_P (t))
share_name = "threadprivate";
else switch (cxx_omp_predetermined_sharing_1 (t))
@@ -11119,7 +11119,7 @@ finish_omp_cancellation_point (tree clauses)
tree stmt = finish_call_expr (fn, &vec, false, false, tf_warning_or_error);
finish_expr_stmt (stmt);
}
-\f
+
/* Begin a __transaction_atomic or __transaction_relaxed statement.
If PCOMPOUND is non-null, this is for a function-transaction-block, and we
should create an extra compound stmt. */
@@ -11199,12 +11199,12 @@ build_transaction_expr (location_t loc, tree expr, int flags, tree noex)
SET_EXPR_LOCATION (ret, loc);
return ret;
}
-\f
+
void
init_cp_semantics (void)
{
}
-\f
+
/* Build a STATIC_ASSERT for a static assertion with the condition
CONDITION and the message text MESSAGE. LOCATION is the location
@@ -11294,7 +11294,7 @@ finish_static_assert (tree condition, tree message, location_t location,
}
}
}
-\f
+
/* Implements the C++0x decltype keyword. Returns the type of EXPR,
suitable for use as a type-specifier.
@@ -11546,7 +11546,7 @@ pointer_interconvertible_base_of_p (tree base, tree derived)
if (!NON_UNION_CLASS_TYPE_P (base)
|| !NON_UNION_CLASS_TYPE_P (derived))
return false;
-
+
if (same_type_p (base, derived))
return true;
@@ -12281,7 +12281,7 @@ float_const_decimal64_p (void)
return 0;
}
-\f
+
/* Return true if T designates the implied `this' parameter. */
bool
diff --git a/gcc/cp/tree.cc b/gcc/cp/tree.cc
index faf01616f87..271beeb069d 100644
--- a/gcc/cp/tree.cc
+++ b/gcc/cp/tree.cc
@@ -1000,7 +1000,7 @@ rvalue (tree expr)
return expr;
}
-\f
+
struct cplus_array_info
{
tree type;
@@ -1103,14 +1103,14 @@ build_cplus_array_type (tree elt_type, tree index_type, int dependent)
if (cplus_array_htab == NULL)
cplus_array_htab = hash_table<cplus_array_hasher>::create_ggc (61);
-
+
hash = TYPE_UID (elt_type);
if (index_type)
hash ^= TYPE_UID (index_type);
cai.type = elt_type;
cai.domain = index_type;
- tree *e = cplus_array_htab->find_slot_with_hash (&cai, hash, INSERT);
+ tree *e = cplus_array_htab->find_slot_with_hash (&cai, hash, INSERT);
if (*e)
/* We have found the type: we're done. */
return (tree) *e;
@@ -1300,7 +1300,7 @@ cp_build_reference_type_for_mode (tree to_type, machine_mode mode, bool rval)
if (TYPE_STRUCTURAL_EQUALITY_P (to_type))
SET_TYPE_STRUCTURAL_EQUALITY (t);
else if (TYPE_CANONICAL (to_type) != to_type)
- TYPE_CANONICAL (t)
+ TYPE_CANONICAL (t)
= cp_build_reference_type_for_mode (TYPE_CANONICAL (to_type), mode, rval);
else
TYPE_CANONICAL (t) = t;
@@ -1345,7 +1345,7 @@ c_build_qualified_type (tree type, int type_quals, tree /* orig_qual_type */,
return cp_build_qualified_type (type, type_quals);
}
-\f
+
/* Make a variant of TYPE, qualified with the TYPE_QUALS. Handles
arrays correctly. In particular, if TYPE is an array of T's, and
TYPE_QUALS is non-empty, returns an array of qualified T's.
@@ -2150,7 +2150,7 @@ copy_binfo (tree binfo, tree type, tree t, tree *igo_prev, int virt)
return new_binfo;
}
-\f
+
/* Hashing of lists so that we don't make duplicates.
The entry point is `list_hash_canon'. */
@@ -2254,7 +2254,7 @@ hash_tree_chain (tree value, tree chain)
{
return hash_tree_cons (NULL_TREE, value, chain);
}
-\f
+
void
debug_binfo (tree elem)
{
@@ -2457,7 +2457,7 @@ ovl_iterator::reveal_node (tree overload, tree node)
return overload;
}
-/* NODE is on the overloads of OVL. Remove it.
+/* NODE is on the overloads of OVL. Remove it.
The removed node is unaltered and may continue to be iterated
from (i.e. it is safe to remove a node from an overload one is
currently iterating over). */
@@ -2569,7 +2569,7 @@ lookup_maybe_add (tree fns, tree lookup, bool deduping)
overloaded functions. Returns 2 if the function is actually
overloaded, i.e., if it is impossible to know the type of the
function without performing overload resolution. */
-
+
int
is_overloaded_fn (tree x)
{
@@ -2680,7 +2680,7 @@ ovl_scope (tree ovl)
return CP_DECL_CONTEXT (ovl);
}
-\f
+
#define PRINT_RING_SIZE 4
static const char *
@@ -2740,7 +2740,7 @@ cxx_printable_name_translate (tree decl, int v)
{
return cxx_printable_name_internal (decl, v, true);
}
-\f
+
/* Return the canonical version of exception-specification RAISES for a C++17
function type, for use in type comparison and building TYPE_CANONICAL. */
@@ -5404,7 +5404,7 @@ cp_build_type_attribute_variant (tree type, tree attributes)
/* Making a new main variant of a class type is broken. */
gcc_assert (!CLASS_TYPE_P (type) || new_type == type);
-
+
return new_type;
}
@@ -5554,7 +5554,7 @@ cp_walk_subtrees (tree *tp, int *walk_subtrees_p, walk_tree_fn func,
WALK_SUBTREE (PACK_EXPANSION_EXTRA_ARGS (*tp));
*walk_subtrees_p = 0;
break;
-
+
case EXPR_PACK_EXPANSION:
WALK_SUBTREE (TREE_OPERAND (*tp, 0));
WALK_SUBTREE (PACK_EXPANSION_EXTRA_ARGS (*tp));
@@ -5605,7 +5605,7 @@ cp_walk_subtrees (tree *tp, int *walk_subtrees_p, walk_tree_fn func,
--cp_unevaluated_operand;
*walk_subtrees_p = 0;
break;
-
+
case REQUIRES_EXPR:
{
cp_unevaluated u;
@@ -5892,7 +5892,7 @@ decl_storage_duration (tree decl)
return dk_thread;
return dk_static;
}
-\f
+
/* EXP is an expression that we want to pre-evaluate. Returns (in
*INITP) an expression that will perform the pre-evaluation. The
value returned by this function is a side-effect free expression
@@ -6012,7 +6012,7 @@ stabilize_aggr_init (tree call, tree *initp)
*initp = inits;
}
-/* Like stabilize_expr, but for an initialization.
+/* Like stabilize_expr, but for an initialization.
If the initialization is for an object of class type, this function
takes care not to introduce additional temporaries.
@@ -6276,7 +6276,7 @@ maybe_adjust_arg_pos_for_attribute (const_tree fndecl)
return n > 0 ? n - 1 : 0;
}
-\f
+
/* Release memory we no longer need after parsing. */
void
cp_tree_c_finish_parsing ()
@@ -6285,7 +6285,7 @@ cp_tree_c_finish_parsing ()
invalidate_class_lookup_cache ();
deleted_copy_types = NULL;
}
-\f
+
#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007)
/* Complain that some language-specific thing hanging off a tree
node has been accessed improperly. */
diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc
index 69b1268cfec..5a2f8245a1a 100644
--- a/gcc/cp/typeck.cc
+++ b/gcc/cp/typeck.cc
@@ -49,7 +49,7 @@ static tree convert_for_assignment (tree, tree, impl_conv_rhs, tree, int,
tsubst_flags_t, int);
static tree cp_pointer_int_sum (location_t, enum tree_code, tree, tree,
tsubst_flags_t);
-static tree rationalize_conditional_expr (enum tree_code, tree,
+static tree rationalize_conditional_expr (enum tree_code, tree,
tsubst_flags_t);
static bool comp_ptr_ttypes_real (tree, tree, int);
static bool comp_except_types (tree, tree, bool);
@@ -131,7 +131,7 @@ complete_type (tree type)
else if (CLASS_TYPE_P (type))
{
if (modules_p ())
- /* TYPE could be a class member we've not loaded the definition of. */
+ /* TYPE could be a class member we've not loaded the definition of. */
lazy_load_pendings (TYPE_NAME (TYPE_MAIN_VARIANT (type)));
if (CLASSTYPE_TEMPLATE_INSTANTIATION (type))
@@ -169,7 +169,7 @@ complete_type_or_else (tree type, tree value)
return complete_type_or_maybe_complain (type, value, tf_warning_or_error);
}
-\f
+
/* Return the common type of two parameter lists.
We assume that comptypes has already been done and returned 1;
if that isn't so, this may crash.
@@ -740,7 +740,7 @@ composite_pointer_type_r (const op_location_t &location,
tree
composite_pointer_type (const op_location_t &location,
tree t1, tree t2, tree arg1, tree arg2,
- composite_pointer_operation operation,
+ composite_pointer_operation operation,
tsubst_flags_t complain)
{
tree class1;
@@ -781,7 +781,7 @@ composite_pointer_type (const op_location_t &location,
switch (operation)
{
case CPO_COMPARISON:
- pedwarn (location, OPT_Wpedantic,
+ pedwarn (location, OPT_Wpedantic,
"ISO C++ forbids comparison between pointer "
"of type %<void *%> and pointer-to-function");
break;
@@ -1096,7 +1096,7 @@ strip_array_domain (tree type)
}
/* Wrapper around cp_common_type that is used by c-common.cc and other
- front end optimizations that remove promotions.
+ front end optimizations that remove promotions.
Return the common type for two arithmetic types T1 and T2 under the
usual arithmetic conversions. The default conversions have already
@@ -1118,7 +1118,7 @@ common_type (tree t1, tree t2)
/* Return the common type of two pointer types T1 and T2. This is the
type for the result of most arithmetic operations if the operands
have the given two types.
-
+
We assume that comp_target_types has already been done and returned
nonzero; if that isn't so, this may crash. */
@@ -1133,7 +1133,7 @@ common_pointer_type (tree t1, tree t2)
error_mark_node, error_mark_node,
CPO_CONVERSION, tf_warning_or_error);
}
-\f
+
/* Compare two exception specifier types for exactness or subsetness, if
allowed. Returns false for mismatch, true for match (same, or
derived and !exact).
@@ -1701,22 +1701,22 @@ comptypes (tree t1, tree t2, int strict)
if (flag_checking && param_use_canonical_types)
{
bool result = structural_comptypes (t1, t2, strict);
-
+
if (result && TYPE_CANONICAL (t1) != TYPE_CANONICAL (t2))
/* The two types are structurally equivalent, but their
canonical types were different. This is a failure of the
canonical type propagation code.*/
- internal_error
+ internal_error
("canonical types differ for identical types %qT and %qT",
t1, t2);
else if (!result && TYPE_CANONICAL (t1) == TYPE_CANONICAL (t2))
/* Two types are structurally different, but the canonical
types are the same. This means we were over-eager in
assigning canonical types. */
- internal_error
+ internal_error
("same canonical type node for different types %qT and %qT",
t1, t2);
-
+
return result;
}
if (!flag_checking && param_use_canonical_types)
@@ -1994,7 +1994,7 @@ comp_cv_qual_signature (tree type1, tree type2)
else
return 0;
}
-\f
+
/* Subroutines of `comptypes'. */
/* Return true if two parameter type lists PARMS1 and PARMS2 are
@@ -2024,7 +2024,7 @@ compparms (const_tree parms1, const_tree parms2)
return true;
}
-\f
+
/* Process a sizeof or alignof expression where the operand is a type.
STD_ALIGNOF indicates whether an alignof has C++11 (minimum alignment)
or GNU (preferred alignment) semantics; it is ignored if OP is
@@ -2069,7 +2069,7 @@ cxx_sizeof_or_alignof_type (location_t loc, tree type, enum tree_code op,
constant expression in that case. And, if we do try to
compute the value, we'll likely end up with SAVE_EXPRs, which
the template substitution machinery does not expect to see. */
- || (processing_template_decl
+ || (processing_template_decl
&& COMPLETE_TYPE_P (type)
&& TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST))
{
@@ -2090,7 +2090,7 @@ cxx_sizeof_or_alignof_type (location_t loc, tree type, enum tree_code op,
types whose size cannot be taken. This routine should be used only
in some other routine that has already produced a diagnostic about
using the size of such a type. */
-tree
+tree
cxx_sizeof_nowarn (tree type)
{
if (TREE_CODE (type) == FUNCTION_TYPE
@@ -2286,10 +2286,10 @@ cxx_alignas_expr (tree e)
if (e == NULL_TREE || e == error_mark_node
|| (!TYPE_P (e) && !require_potential_rvalue_constant_expression (e)))
return e;
-
+
if (TYPE_P (e))
/* [dcl.align]/3:
-
+
When the alignment-specifier is of the form
alignas(type-id), it shall have the same effect as
alignas(alignof(type-id)). */
@@ -2298,7 +2298,7 @@ cxx_alignas_expr (tree e)
e, ALIGNOF_EXPR,
/*std_alignof=*/true,
/*complain=*/true);
-
+
/* If we reach this point, it means the alignas expression if of
the form "alignas(assignment-expression)", so we should follow
what is stated by [dcl.align]/2. */
@@ -2320,11 +2320,11 @@ cxx_alignas_expr (tree e)
error ("%<alignas%> argument has non-integral type %qT", TREE_TYPE (e));
return error_mark_node;
}
-
+
return cxx_constant_value (e);
}
-\f
+
/* EXPR is being used in a context that is not a function call.
Enforce:
@@ -2405,7 +2405,7 @@ is_bitfield_expr_with_lowered_type (const_tree exp)
case COMPONENT_REF:
{
tree field;
-
+
field = TREE_OPERAND (exp, 1);
if (TREE_CODE (field) != FIELD_DECL || !DECL_BIT_FIELD_TYPE (field))
return NULL_TREE;
@@ -3109,7 +3109,7 @@ lookup_destructor (tree object, tree scope, tree dtor_name,
object_type, dtor_type);
return error_mark_node;
}
-
+
}
else if (!DERIVED_FROM_P (dtor_type, TYPE_MAIN_VARIANT (object_type)))
{
@@ -3391,7 +3391,7 @@ finish_class_member_access_expr (cp_expr object, tree name, bool template_p,
&& identifier_p (name)
&& (expr = objc_maybe_build_component_ref (object, name)))
return expr;
-
+
/* [expr.ref]
The type of the first expression shall be "class object" (of a
@@ -3444,7 +3444,7 @@ finish_class_member_access_expr (cp_expr object, tree name, bool template_p,
return error_mark_node;
}
}
-
+
if (TREE_CODE (name) == TEMPLATE_ID_EXPR)
{
is_template_id = true;
@@ -3477,7 +3477,7 @@ finish_class_member_access_expr (cp_expr object, tree name, bool template_p,
name, scope);
return error_mark_node;
}
-
+
if (TREE_SIDE_EFFECTS (object))
val = build2 (COMPOUND_EXPR, TREE_TYPE (val), object, val);
return val;
@@ -3716,7 +3716,7 @@ build_dependent_operator_type (tree lookups, tree_code code, bool is_assign)
Must also handle REFERENCE_TYPEs for C++. */
tree
-build_x_indirect_ref (location_t loc, tree expr, ref_operator errorstring,
+build_x_indirect_ref (location_t loc, tree expr, ref_operator errorstring,
tree lookups, tsubst_flags_t complain)
{
tree orig_expr = expr;
@@ -3928,7 +3928,7 @@ cp_build_indirect_ref (location_t loc, tree ptr, ref_operator errorstring,
If INDEX is of some user-defined type, it must be converted to
integer type. Otherwise, to make a compatible PLUS_EXPR, it
will inherit the type of the array, which will be some pointer type.
-
+
LOC is the location to use in building the array reference. */
tree
@@ -4105,7 +4105,7 @@ build_array_ref (location_t loc, tree array, tree idx)
{
return cp_build_array_ref (loc, array, idx, tf_warning_or_error);
}
-\f
+
/* Resolve a pointer to member function. INSTANCE is the object
instance to use, if the member points to a virtual member.
@@ -4276,7 +4276,7 @@ get_member_function_from_ptrfunc (tree *instance_ptrptr, tree function,
/* Used by the C-common bits. */
tree
-build_function_call (location_t /*loc*/,
+build_function_call (location_t /*loc*/,
tree function, tree params)
{
return cp_build_function_call (function, params, tf_warning_or_error);
@@ -4371,7 +4371,7 @@ cp_build_function_call_vec (tree function, vec<tree, va_gc> **params,
if (DECL_MAIN_P (function))
{
if (complain & tf_error)
- pedwarn (input_location, OPT_Wpedantic,
+ pedwarn (input_location, OPT_Wpedantic,
"ISO C++ forbids calling %<::main%> from within program");
else
return error_mark_node;
@@ -4414,7 +4414,7 @@ cp_build_function_call_vec (tree function, vec<tree, va_gc> **params,
else if (DECL_P (original))
error_at (input_location,
"%qD cannot be used as a function", original);
- else
+ else
error_at (input_location,
"expression cannot be used as a function");
}
@@ -4458,7 +4458,7 @@ cp_build_function_call_vec (tree function, vec<tree, va_gc> **params,
return ret;
}
-\f
+
/* Subroutine of convert_arguments.
Print an error message about a wrong number of arguments. */
@@ -4497,7 +4497,7 @@ error_args_num (location_t loc, tree fndecl, bool too_many_p)
{
if (c_dialect_objc () && objc_message_selector ())
error_at (loc,
- too_many_p
+ too_many_p
? G_("too many arguments to method %q#D")
: G_("too few arguments to method %q#D"),
objc_message_selector ());
@@ -4676,7 +4676,7 @@ convert_arguments (tree typelist, vec<tree, va_gc> **values, tree fndecl,
return (int) i;
}
-\f
+
/* Build a binary-operation expression, after performing default
conversions on the operands. CODE is the kind of expression to
build. ARG1 and ARG2 are the arguments. ARG1_CODE and ARG2_CODE
@@ -5282,15 +5282,15 @@ cp_build_binary_op (const op_location_t &location,
if ((null_node_p (orig_op0) || null_node_p (orig_op1))
/* It's reasonable to use pointer values as operands of &&
and ||, so NULL is no exception. */
- && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR
+ && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR
&& ( /* Both are NULL (or 0) and the operation was not a
comparison or a pointer subtraction. */
- (null_ptr_cst_p (orig_op0) && null_ptr_cst_p (orig_op1)
- && code != EQ_EXPR && code != NE_EXPR && code != MINUS_EXPR)
+ (null_ptr_cst_p (orig_op0) && null_ptr_cst_p (orig_op1)
+ && code != EQ_EXPR && code != NE_EXPR && code != MINUS_EXPR)
/* Or if one of OP0 or OP1 is neither a pointer nor NULL. */
|| (!null_ptr_cst_p (orig_op0)
&& !TYPE_PTR_OR_PTRMEM_P (type0))
- || (!null_ptr_cst_p (orig_op1)
+ || (!null_ptr_cst_p (orig_op1)
&& !TYPE_PTR_OR_PTRMEM_P (type1)))
&& (complain & tf_warning))
{
@@ -5808,7 +5808,7 @@ cp_build_binary_op (const op_location_t &location,
complain);
op1 = cp_convert (TREE_TYPE (op0), integer_one_node, complain);
}
- else
+ else
{
op0 = build_ptrmemfunc_access_expr (op0, pfn_identifier);
op1 = cp_convert (TREE_TYPE (op0), op1, complain);
@@ -5832,7 +5832,7 @@ cp_build_binary_op (const op_location_t &location,
tree delta0;
tree delta1;
- type = composite_pointer_type (location, type0, type1, op0, op1,
+ type = composite_pointer_type (location, type0, type1, op0, op1,
CPO_COMPARISON, complain);
if (!same_type_p (TREE_TYPE (op0), type))
@@ -5864,7 +5864,7 @@ cp_build_binary_op (const op_location_t &location,
(op0.pfn == op1.pfn
&& ((op0.delta == op1.delta)
- || (!op0.pfn && op0.delta & 1 == 0
+ || (!op0.pfn && op0.delta & 1 == 0
&& op1.delta & 1 == 0))
The reason for the `!op0.pfn' bit is that a NULL
@@ -5872,7 +5872,7 @@ cp_build_binary_op (const op_location_t &location,
LSB of the DELTA field is 0. */
e1 = cp_build_binary_op (location, BIT_AND_EXPR,
- delta0,
+ delta0,
integer_one_node,
complain);
e1 = cp_build_binary_op (location,
@@ -5909,7 +5909,7 @@ cp_build_binary_op (const op_location_t &location,
The reason for the `!op0.pfn' bit is that a NULL
pointer-to-member is any member with a zero PFN; the
DELTA field is unspecified. */
-
+
e1 = cp_build_binary_op (location,
EQ_EXPR, delta0, delta1, complain);
e2 = cp_build_binary_op (location,
@@ -6648,7 +6648,7 @@ build_x_shufflevector (location_t loc, vec<tree, va_gc> *args,
}
return exp;
}
-\f
+
/* Return a tree for the sum or difference (RESULTCODE says which)
of pointer PTROP and integer INTOP. */
@@ -6780,7 +6780,7 @@ pointer_diff (location_t loc, tree op0, tree op1, tree ptrtype,
cp_convert (inttype, op1, complain));
return cp_convert (restype, result, complain);
}
-\f
+
/* Construct and perhaps optimize a tree representation
for a unary operation. CODE, a tree_code, specifies the operation
and XARG is the operand. */
@@ -7467,7 +7467,7 @@ cp_build_unary_op (enum tree_code code, tree xarg, bool noconvert,
/* Report something read-only. */
if (CP_TYPE_CONST_P (TREE_TYPE (arg))
- || TREE_READONLY (arg))
+ || TREE_READONLY (arg))
{
if (complain & tf_error)
cxx_readonly_error (location, arg,
@@ -7515,7 +7515,7 @@ cp_build_unary_op (enum tree_code code, tree xarg, bool noconvert,
else
return error_mark_node;
}
- else if (!TYPE_PTROB_P (argtype))
+ else if (!TYPE_PTROB_P (argtype))
{
if (complain & tf_error)
pedwarn (location, OPT_Wpointer_arith,
@@ -7547,8 +7547,8 @@ cp_build_unary_op (enum tree_code code, tree xarg, bool noconvert,
need to ask Objective-C to build the increment or decrement
expression for it. */
if (objc_is_property_ref (arg))
- return objc_build_incr_expr_for_property_ref (input_location, code,
- arg, inc);
+ return objc_build_incr_expr_for_property_ref (input_location, code,
+ arg, inc);
/* Complain about anything else that is not a true lvalue. */
if (!lvalue_or_else (arg, ((code == PREINCREMENT_EXPR
@@ -7741,7 +7741,7 @@ unary_complex_lvalue (enum tree_code code, tree arg)
/* Don't let anything else be handled specially. */
return NULL_TREE;
}
-\f
+
/* Mark EXP saying that we need to be able to take the
address of it; it should not be allocated in a register.
Value is true if successful. ARRAY_REF_P is true if this
@@ -7832,11 +7832,11 @@ cxx_mark_addressable (tree exp, bool array_ref_p)
return true;
}
}
-\f
+
/* Build and return a conditional expression IFEXP ? OP1 : OP2. */
tree
-build_x_conditional_expr (location_t loc, tree ifexp, tree op1, tree op2,
+build_x_conditional_expr (location_t loc, tree ifexp, tree op1, tree op2,
tsubst_flags_t complain)
{
tree orig_ifexp = ifexp;
@@ -7869,7 +7869,7 @@ build_x_conditional_expr (location_t loc, tree ifexp, tree op1, tree op2,
}
return expr;
}
-\f
+
/* Given a list of expressions, return a compound expression
that performs them all and returns the value of the last of them. */
@@ -8048,7 +8048,7 @@ cp_build_compound_expr (tree lhs, tree rhs, tsubst_flags_t complain)
"no context to resolve type of %qE", rhs);
return error_mark_node;
}
-
+
tree ret = build2 (COMPOUND_EXPR, TREE_TYPE (rhs), lhs, rhs);
if (eptype)
ret = build1 (EXCESS_PRECISION_EXPR, eptype, ret);
@@ -8073,7 +8073,7 @@ check_for_casting_away_constness (location_t loc, tree src_type,
WARN_CAST_QUAL, we still want to issue a warning. */
if (cast == CAST_EXPR && !warn_cast_qual)
return false;
-
+
if (!casts_away_constness (src_type, dest_type, complain))
return false;
@@ -9174,7 +9174,7 @@ cp_build_c_cast (location_t loc, tree type, tree expr,
&& TYPE_PRECISION (type) > TYPE_PRECISION (TREE_TYPE (value))
/* Don't warn about converting any constant. */
&& !TREE_CONSTANT (value))
- warning_at (loc, OPT_Wint_to_pointer_cast,
+ warning_at (loc, OPT_Wint_to_pointer_cast,
"cast to pointer from integer of different size");
/* A C-style cast can be a const_cast. */
@@ -9284,7 +9284,7 @@ maybe_warn_self_move (location_t loc, tree lhs, tree rhs)
tree
build_modify_expr (location_t location,
tree lhs, tree /*lhs_origtype*/,
- enum tree_code modifycode,
+ enum tree_code modifycode,
location_t /*rhs_location*/, tree rhs,
tree /*rhs_origtype*/)
{
@@ -9762,10 +9762,10 @@ build_x_modify_expr (location_t loc, tree lhs, enum tree_code modifycode,
/* Helper function for get_delta_difference which assumes FROM is a base
class of TO. Returns a delta for the conversion of pointer-to-member
- of FROM to pointer-to-member of TO. If the conversion is invalid and
+ of FROM to pointer-to-member of TO. If the conversion is invalid and
tf_error is not set in COMPLAIN returns error_mark_node, otherwise
returns zero. If FROM is not a base class of TO, returns NULL_TREE.
- If C_CAST_P is true, this conversion is taking place as part of a
+ If C_CAST_P is true, this conversion is taking place as part of a
C-style cast. */
static tree
@@ -9966,7 +9966,7 @@ build_ptrmemfunc (tree type, tree pfn, int force, bool c_cast_p,
if (same_type_p (to_type, pfn_type))
return pfn;
else if (integer_zerop (n) && TREE_CODE (pfn) != CONSTRUCTOR)
- return build_reinterpret_cast (input_location, to_type, pfn,
+ return build_reinterpret_cast (input_location, to_type, pfn,
complain);
}
@@ -10462,7 +10462,7 @@ convert_for_initialization (tree exp, tree type, tree rhs, int flags,
return convert_for_assignment (type, rhs, errtype, fndecl, parmnum,
complain, flags);
}
-\f
+
/* If RETVAL is the address of, or a reference to, a local variable or
temporary give an appropriate warning and return true. */
@@ -11271,7 +11271,7 @@ check_return_expr (tree retval, bool *no_warning)
return retval;
}
-\f
+
/* Returns nonzero if the pointer-type FROM can be converted to the
pointer-type TO via a qualification conversion. If CONSTP is -1,
then we return nonzero if the pointers are similar, and the
@@ -11657,7 +11657,7 @@ casts_away_constness_r (tree *t1, tree *t2, tsubst_flags_t complain)
}
/* Returns nonzero if casting from TYPE1 to TYPE2 casts away
- constness.
+ constness.
??? This function returns non-zero if casting away qualifiers not
just const. We would like to return to the caller exactly which
diff --git a/gcc/cp/typeck2.cc b/gcc/cp/typeck2.cc
index 26444720cb8..90ef8c32acc 100644
--- a/gcc/cp/typeck2.cc
+++ b/gcc/cp/typeck2.cc
@@ -71,11 +71,11 @@ binfo_or_else (tree base, tree type)
void
cxx_readonly_error (location_t loc, tree arg, enum lvalue_use errstring)
{
-
+
/* This macro is used to emit diagnostics to ensure that all format
strings are complete sentences, visible to gettext and checked at
compile time. */
-
+
#define ERROR_FOR_ASSIGNMENT(LOC, AS, ASM, IN, DE, ARG) \
do { \
switch (errstring) \
@@ -122,7 +122,7 @@ cxx_readonly_error (location_t loc, tree arg, enum lvalue_use errstring)
else
readonly_error (loc, arg, errstring);
}
-\f
+
/* If TYPE has abstract virtual functions, issue an error about trying
to create an object of that type. DECL is the object declared, or
NULL_TREE if the declaration is unavailable, in which case USE specifies
@@ -298,8 +298,8 @@ cxx_incomplete_type_diagnostic (location_t loc, const_tree value,
{
bool is_decl = false, complained = false;
- gcc_assert (diag_kind == DK_WARNING
- || diag_kind == DK_PEDWARN
+ gcc_assert (diag_kind == DK_WARNING
+ || diag_kind == DK_PEDWARN
|| diag_kind == DK_ERROR);
/* Avoid duplicate error message. */
@@ -445,7 +445,7 @@ cxx_incomplete_type_error (location_t loc, const_tree value, const_tree type)
cxx_incomplete_type_diagnostic (loc, value, type, DK_ERROR);
}
-\f
+
/* We've just initialized subobject SUB; also insert a TARGET_EXPR with an
EH-only cleanup for SUB. Because of EH region nesting issues, we need to
make the cleanup conditional on a flag that we will clear once the object is
@@ -932,7 +932,7 @@ store_init_value (tree decl, tree init, vec<tree, va_gc>** cleanups, int flags)
return NULL_TREE;
}
-\f
+
/* Give diagnostic about narrowing conversions within { }, or as part of
a converted constant expression. If CONST_ONLY, only check
constants. */
@@ -1493,7 +1493,7 @@ digest_nsdmi_init (tree decl, tree init, tsubst_flags_t complain)
return init;
}
-\f
+
/* Set of flags used within process_init_constructor to describe the
initializers. */
#define PICFLAG_ERRONEOUS 1
@@ -2108,7 +2108,7 @@ process_init_constructor (tree type, tree init, int nested, int flags,
}
return init;
}
-\f
+
/* Given a structure or union value DATUM, construct and return
the structure or union component which results from narrowing
that value to the base specified in BASETYPE. For example, given the
@@ -2212,7 +2212,7 @@ build_x_arrow (location_t loc, tree expr, tsubst_flags_t complain)
/* This provides a better instantiation backtrace in case of
error. */
if (fn && DECL_USE_TEMPLATE (fn))
- push_tinst_level_loc (fn,
+ push_tinst_level_loc (fn,
(current_instantiation () != actual_inst)
? DECL_SOURCE_LOCATION (fn)
: input_location);
@@ -2567,9 +2567,9 @@ build_functional_cast (location_t loc, tree exp, tree parms,
{
tree result = build_functional_cast_1 (loc, exp, parms, complain);
protected_set_expr_location (result, loc);
- return result;
+ return result;
}
-\f
+
/* Add new exception specifier SPEC, to the LIST we currently have.
If it's already in LIST then do nothing.
diff --git a/gcc/cp/vtable-class-hierarchy.cc b/gcc/cp/vtable-class-hierarchy.cc
index 1e180ea61dc..f820c4a6a77 100644
--- a/gcc/cp/vtable-class-hierarchy.cc
+++ b/gcc/cp/vtable-class-hierarchy.cc
@@ -762,7 +762,7 @@ insert_call_to_register_set (tree class_name,
vec<constructor_elt, va_gc> *array_elements;
vec_alloc (array_elements, num_args);
-
+
tree initial = NULL_TREE;
tree arg3 = NULL_TREE;
@@ -821,7 +821,7 @@ insert_call_to_register_pair (vec<tree> *vtbl_ptr_array, tree arg1,
else
call_expr = build_call_expr (vlt_register_pairs_fndecl, 4, arg1, arg2,
size_hint_arg, vtable_address);
-
+
append_to_statement_list (call_expr, &body);
num_calls_to_regpair++;
}
@@ -851,7 +851,7 @@ output_set_info (tree record_type, vec<tree> vtbl_ptr_array)
{
const char *vptr_name = "unknown";
int vptr_offset = 0;
-
+
if (TREE_CODE (vtbl_ptr_array[i]) == POINTER_PLUS_EXPR)
{
tree arg0 = TREE_OPERAND (vtbl_ptr_array[i], 0);
@@ -1124,7 +1124,7 @@ bool
vtv_register_class_hierarchy_information (tree init_routine_body)
{
bool registered_something = false;
-
+
init_functions ();
if (num_vtable_map_nodes == 0)
diff --git a/gcc/cprop.cc b/gcc/cprop.cc
index 5b203ecff20..47f95904da2 100644
--- a/gcc/cprop.cc
+++ b/gcc/cprop.cc
@@ -41,7 +41,7 @@ along with GCC; see the file COPYING3. If not see
#include "cfgloop.h"
#include "gcse.h"
-\f
+
/* An obstack for our working variables. */
static struct obstack cprop_obstack;
@@ -141,7 +141,7 @@ cprop_alloc (unsigned long size)
bytes_used += size;
return obstack_alloc (&cprop_obstack, size);
}
-\f
+
/* Return nonzero if register X is unchanged from INSN to the end
of INSN's basic block. */
@@ -474,7 +474,7 @@ compute_hash_table (struct hash_table_d *table)
compute_hash_table_work (table);
}
-\f
+
/* Expression tracking support. */
/* Lookup REGNO in the set TABLE. The result is a pointer to the
@@ -537,7 +537,7 @@ mark_oprs_set (rtx_insn *insn)
FOR_EACH_INSN_DEF (def, insn)
SET_REGNO_REG_SET (reg_set_bitmap, DF_REF_REGNO (def));
}
-\f
+
/* Compute copy/constant propagation working variables. */
/* Local properties of assignments. */
@@ -628,7 +628,7 @@ compute_local_properties (sbitmap *kill, sbitmap *comp,
}
}
}
-\f
+
/* Hash table support. */
/* Top level routine to do the dataflow analysis needed by copy/const
@@ -654,7 +654,7 @@ compute_cprop_data (void)
bitmap_set_bit (cprop_avin[bb->index], index);
}
}
-\f
+
/* Copy/constant propagation. */
/* Maximum number of register uses in an insn that we handle. */
@@ -1736,7 +1736,7 @@ bypass_conditional_jumps (void)
return changed;
}
-\f
+
/* Main function for the CPROP pass. */
static int
@@ -1906,7 +1906,7 @@ one_cprop_pass (void)
return changed;
}
-\f
+
/* All the passes implemented in this file. Each pass has its
own gate and execute function, and at the end of the file a
pass definition for passes.cc.
diff --git a/gcc/cse.cc b/gcc/cse.cc
index 8fbda4ecc86..6452d12749d 100644
--- a/gcc/cse.cc
+++ b/gcc/cse.cc
@@ -578,13 +578,13 @@ static void cse_change_cc_mode_insn (rtx_insn *, rtx);
static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
bool);
-\f
+
#undef RTL_HOOKS_GEN_LOWPART
#define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
-\f
+
/* Nonzero if X has the form (PLUS frame-pointer integer). */
static bool
@@ -712,7 +712,7 @@ notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
: rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
}
-\f
+
/* Initialize CSE_REG_INFO_TABLE. */
static void
@@ -1158,7 +1158,7 @@ insert_regs (rtx x, struct table_elt *classp, int modified)
else
return mention_regs (x);
}
-\f
+
/* Compute upper and lower anchors for CST. Also compute the offset of CST
from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
@@ -1331,7 +1331,7 @@ try_const_anchors (rtx src_const, machine_mode mode)
/* Return the older expression. */
return (upper_old > lower_old ? upper_exp : lower_exp);
}
-\f
+
/* Look in or update the hash table. */
/* Remove table element ELT from use in the table.
@@ -1696,7 +1696,7 @@ insert (rtx x, struct table_elt *classp, unsigned int hash,
COST (x, mode), approx_reg_cost (x));
}
-\f
+
/* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
CLASS2 into CLASS1. This is done when we have reached an insn which makes
the two classes equivalent.
@@ -1760,7 +1760,7 @@ merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
}
}
}
-\f
+
/* Flush the entire hash table. */
static void
@@ -1780,7 +1780,7 @@ flush_hash_table (void)
remove_from_table (p, i);
}
}
-\f
+
/* Check whether an anti dependence exists between X and EXP. MODE and
ADDR are as for canon_anti_dependence. */
@@ -1955,7 +1955,7 @@ invalidate_dest (rtx dest)
|| GET_CODE (dest) == ZERO_EXTRACT)
invalidate (XEXP (dest, 0), GET_MODE (dest));
}
-\f
+
/* Remove all expressions that refer to register REGNO,
since they are already invalid, and we are about to
mark that register valid again and don't want the old
@@ -2002,7 +2002,7 @@ remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset,
remove_from_table (p, i);
}
}
-\f
+
/* Recompute the hash codes of any valid entries in the hash table that
reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
@@ -2053,7 +2053,7 @@ rehash_using_reg (rtx x)
}
}
}
-\f
+
/* Remove from the hash table any expression that is a call-clobbered
register in INSN. Also update their TICK values. */
@@ -2111,7 +2111,7 @@ invalidate_for_call (rtx_insn *insn)
remove_from_table (p, hash);
}
}
-\f
+
/* Given an expression X of type CONST,
and ELT which is its table entry (or 0 if it
is not in the hash table),
@@ -2184,7 +2184,7 @@ use_related_value (rtx x, struct table_elt *elt)
/* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
return plus_constant (q->mode, q->exp, offset);
}
-\f
+
/* Hash a string. Just add its bytes up. */
static inline unsigned
@@ -2571,7 +2571,7 @@ safe_hash (rtx x, machine_mode mode)
int dummy_do_not_record;
return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
}
-\f
+
/* Return 1 iff X and Y would canonicalize into the same thing,
without actually constructing the canonicalization of either one.
If VALIDATE is nonzero,
@@ -2788,7 +2788,7 @@ exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
return 1;
}
-\f
+
/* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
the result if necessary. INSN is as for canon_reg. */
@@ -2879,7 +2879,7 @@ canon_reg (rtx x, rtx_insn *insn)
return x;
}
-\f
+
/* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
operation (EQ, NE, GT, etc.), follow it back through the hash table and
what values are being compared.
@@ -3078,7 +3078,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
delete visited;
return code;
}
-\f
+
/* If X is a nontrivial arithmetic operation on an argument for which
a constant value can be determined, return the result of operating
on that value, as a constant. Otherwise, return X, possibly with
@@ -3744,7 +3744,7 @@ fold_rtx (rtx x, rtx_insn *insn)
return new_rtx ? new_rtx : x;
}
-\f
+
/* Return a constant value currently equivalent to X.
Return 0 if we don't know one. */
@@ -3829,7 +3829,7 @@ equiv_constant (rtx x)
return 0;
}
-\f
+
/* Given INSN, a jump insn, TAKEN indicates if we are following the
"taken" branch.
@@ -4103,7 +4103,7 @@ record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0,
merge_equiv_classes (op0_elt, op1_elt);
}
-\f
+
/* CSE processing for one instruction.
Most "true" common subexpressions are mostly optimized away in GIMPLE,
@@ -4113,11 +4113,11 @@ record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0,
The main function is cse_insn, and between here and that function
a couple of helper functions is defined to keep the size of cse_insn
within reasonable proportions.
-
+
Data is shared between the main and helper functions via STRUCT SET,
that contains all data related for every set in the instruction that
is being processed.
-
+
Note that cse_main processes all sets in the instruction. Most
passes in GCC only process simple SET insns or single_set insns, but
CSE processes insns with multiple sets as well. */
@@ -4156,7 +4156,7 @@ struct set
/* Table entry for the destination address. */
struct table_elt *dest_addr_elt;
};
-\f
+
/* Special handling for (set REG0 REG1) where REG0 is the
"cheapest", cheaper than REG1. After cse, REG1 will probably not
be used in the sequel, so (if easily done) change this insn to
@@ -4167,7 +4167,7 @@ struct set
Do not make this change if REG1 is a hard register, because it will
then be used in the sequel and we may be changing a two-operand insn
into a three-operand insn.
-
+
This is the last transformation that cse_insn will try to do. */
static void
@@ -4325,7 +4325,7 @@ find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
return psets->length ();
}
-\f
+
/* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
static void
@@ -4512,7 +4512,7 @@ canonicalize_insn (rtx_insn *insn, vec<struct set> *psets)
apply_change_group ();
}
-\f
+
/* Main function of CSE.
First simplify sources and addresses of all assignments
in the instruction, using previously-computed equivalents values.
@@ -6091,7 +6091,7 @@ cse_insn (rtx_insn *insn)
done:;
}
-\f
+
/* Remove from the hash table all expressions that reference memory. */
static void
@@ -6151,7 +6151,7 @@ invalidate_from_clobbers (rtx_insn *insn)
}
}
}
-\f
+
/* Perform invalidation on the basis of everything about INSN.
This includes the places CLOBBERed, and anything that might
alias with something that is SET or CLOBBERed. */
@@ -6201,7 +6201,7 @@ invalidate_from_sets_and_clobbers (rtx_insn *insn)
}
}
}
-\f
+
static rtx cse_process_note (rtx);
/* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
@@ -6257,7 +6257,7 @@ cse_process_note (rtx x)
return simplify_replace_fn_rtx (x, NULL_RTX, cse_process_note_1, NULL);
}
-\f
+
/* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
DATA is a pointer to a struct cse_basic_block_data, that is used to
@@ -6399,7 +6399,7 @@ done:
data->path_size = path_size;
return path_size != 0;
}
-\f
+
/* Dump the path in DATA to file F. NSETS is the number of sets
in the path. */
@@ -6415,7 +6415,7 @@ cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
fflush (f);
}
-\f
+
/* Return true if BB has exception handling successor edges. */
static bool
@@ -6431,7 +6431,7 @@ have_eh_succ_edges (basic_block bb)
return false;
}
-\f
+
/* Scan to the end of the path described by DATA. Return an estimate of
the total number of SETs of all insns in the path. */
@@ -6466,7 +6466,7 @@ cse_prescan_path (struct cse_basic_block_data *data)
data->nsets = nsets;
}
-\f
+
/* Return true if the pattern of INSN uses a LABEL_REF for which
there isn't a REG_LABEL_OPERAND note. */
@@ -6625,7 +6625,7 @@ cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
free (qty_table);
}
-\f
+
/* Perform cse on the instructions of a function.
F is the first instruction.
NREGS is one plus the highest pseudo-reg number used in the instruction.
@@ -6727,7 +6727,7 @@ cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
else
return 0;
}
-\f
+
/* Count the number of times registers are used (not set) in X.
COUNTS is an array in which we accumulate the count, INCR is how much
we count each register usage.
@@ -6853,7 +6853,7 @@ count_reg_usage (rtx x, int *counts, rtx dest, int incr)
count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
}
}
-\f
+
/* Return true if X is a dead register. */
static inline int
@@ -7516,7 +7516,7 @@ cse_condition_code_reg (void)
}
}
}
-\f
+
/* Perform common subexpression elimination. Nonzero value from
`cse_main' means that jumps were simplified and some code may now
diff --git a/gcc/cselib.cc b/gcc/cselib.cc
index 4a9b8d9d48d..bf3cb4049ba 100644
--- a/gcc/cselib.cc
+++ b/gcc/cselib.cc
@@ -274,7 +274,7 @@ void (*cselib_discard_hook) (cselib_val *);
void (*cselib_record_sets_hook) (rtx_insn *insn, struct cselib_set *sets,
int n_sets);
-\f
+
/* Allocate a struct elt_list and fill in its two elements with the
arguments. */
@@ -2559,7 +2559,7 @@ cselib_invalidate_regno (unsigned int regno, machine_mode mode)
}
}
}
-\f
+
/* Invalidate any locations in the table which are changed because of a
store to MEM_RTX. If this is called because of a non-const call
instruction, MEM_RTX is (mem:BLK const0_rtx). */
diff --git a/gcc/data-streamer-out.cc b/gcc/data-streamer-out.cc
index cd25745b8dc..ce80aa26a4f 100644
--- a/gcc/data-streamer-out.cc
+++ b/gcc/data-streamer-out.cc
@@ -74,7 +74,7 @@ lto_append_block (struct lto_output_stream *obs)
/* Return index used to reference STRING of LEN characters in the string table
in OB. The string might or might not include a trailing '\0'.
- Then put the index onto the INDEX_STREAM.
+ Then put the index onto the INDEX_STREAM.
When PERSISTENT is set, the string S is supposed to not change during
duration of the OB and thus OB can keep pointer into it. */
@@ -124,7 +124,7 @@ streamer_string_index (struct output_block *ob, const char *s, unsigned int len,
/* Output STRING of LEN characters to the string table in OB. The
string might or might not include a trailing '\0'. Then put the
- index onto the INDEX_STREAM.
+ index onto the INDEX_STREAM.
When PERSISTENT is set, the string S is supposed to not change during
duration of the OB and thus OB can keep pointer into it. */
diff --git a/gcc/data-streamer.h b/gcc/data-streamer.h
index c91c5ab75e8..4eb90248600 100644
--- a/gcc/data-streamer.h
+++ b/gcc/data-streamer.h
@@ -177,7 +177,7 @@ bp_unpack_value (struct bitpack_d *bp, unsigned nbits)
switch to the next one. */
if (pos + nbits > BITS_PER_BITPACK_WORD)
{
- bp->word = val
+ bp->word = val
= streamer_read_uhwi ((class lto_input_block *)bp->stream);
bp->pos = nbits;
return val & mask;
diff --git a/gcc/ddg.cc b/gcc/ddg.cc
index 12b83463770..2e73367395d 100644
--- a/gcc/ddg.cc
+++ b/gcc/ddg.cc
@@ -43,7 +43,7 @@ static void create_ddg_dep_no_link (ddg_ptr, ddg_node_ptr, ddg_node_ptr,
static ddg_edge_ptr create_ddg_edge (ddg_node_ptr, ddg_node_ptr, dep_type,
dep_data_type, int, int);
static void add_edge_to_ddg (ddg_ptr g, ddg_edge_ptr);
-\f
+
/* Auxiliary variable for mem_read_insn_p/mem_write_insn_p. */
static bool mem_ref_p;
@@ -192,10 +192,10 @@ create_ddg_dep_from_intra_loop_link (ddg_ptr g, ddg_node_ptr src_node,
the kernel has only one def of the relevant register).
If the address that is being auto-inc or auto-dec in DEST_NODE
is used in SRC_NODE then do not remove the edge to make sure
- reg-moves will not be created for this address.
+ reg-moves will not be created for this address.
TODO: support the removal of all anti-deps edges, i.e. including those
whose register has multiple defs in the loop. */
- if (flag_modulo_sched_allow_regmoves
+ if (flag_modulo_sched_allow_regmoves
&& (t == ANTI_DEP && dt == REG_DEP)
&& !def_has_ccmode_p (dest_node->insn)
&& !autoinc_var_is_used_p (dest_node->insn, src_node->insn))
@@ -776,7 +776,7 @@ add_edge_to_ddg (ddg_ptr g ATTRIBUTE_UNUSED, ddg_edge_ptr e)
}
-\f
+
/* Algorithm for computing the recurrence_length of an scc. We assume at
for now that cycles in the data dependence graph contain a single backarc.
This simplifies the algorithm, and can be generalized later. */
@@ -1079,7 +1079,7 @@ free_ddg_all_sccs (ddg_all_sccs_ptr all_sccs)
free (all_sccs);
}
-\f
+
/* Given FROM - a bitmap of source nodes - and TO - a bitmap of destination
nodes - find all nodes that lie on paths from FROM to TO (not excluding
nodes from FROM and TO). Return nonzero if nodes exist. */
diff --git a/gcc/ddg.h b/gcc/ddg.h
index 0583fa1387c..185270f9a48 100644
--- a/gcc/ddg.h
+++ b/gcc/ddg.h
@@ -133,7 +133,7 @@ struct ddg
ddg_edge_ptr *backarcs;
};
-\f
+
/* Holds information on an SCC (Strongly Connected Component) of the DDG. */
struct ddg_scc
{
@@ -158,7 +158,7 @@ struct ddg_all_sccs
ddg_ptr ddg;
};
-\f
+
ddg_ptr create_ddg (basic_block, int closing_branch_deps);
void free_ddg (ddg_ptr);
diff --git a/gcc/df-core.cc b/gcc/df-core.cc
index e5ae9ab9348..b7f09cef0de 100644
--- a/gcc/df-core.cc
+++ b/gcc/df-core.cc
@@ -866,7 +866,7 @@ make_pass_df_finish (gcc::context *ctxt)
-\f
+
/*----------------------------------------------------------------------------
The general data flow analysis engine.
----------------------------------------------------------------------------*/
@@ -986,7 +986,7 @@ df_worklist_propagate_backward (struct dataflow *dataflow,
BBINDEX_TO_POSTORDER is array mapping back BB->index to postorder position.
PENDING will be freed.
- The worklists are bitmaps indexed by postorder positions.
+ The worklists are bitmaps indexed by postorder positions.
The function implements standard algorithm for dataflow solving with two
worklists (we are processing WORKLIST and storing new BBs to visit in
@@ -1507,7 +1507,7 @@ df_simple_dataflow (enum df_flow_dir dir,
}
-\f
+
/*----------------------------------------------------------------------------
Functions to support limited incremental change.
----------------------------------------------------------------------------*/
@@ -2050,7 +2050,7 @@ df_find_single_def_src (rtx reg)
return src;
}
-\f
+
/*----------------------------------------------------------------------------
Debugging and printing functions.
----------------------------------------------------------------------------*/
@@ -2459,7 +2459,7 @@ df_ref_debug (df_ref ref, FILE *file)
df_chain_dump (DF_REF_CHAIN (ref), file);
fprintf (file, "\n");
}
-\f
+
/* Functions for debugging from GDB. */
DEBUG_FUNCTION void
diff --git a/gcc/df-problems.cc b/gcc/df-problems.cc
index d2cfaf7f50f..ce9b4217526 100644
--- a/gcc/df-problems.cc
+++ b/gcc/df-problems.cc
@@ -100,7 +100,7 @@ df_print_bb_index (basic_block bb, FILE *file)
fprintf (file, ")\n");
}
-\f
+
/*----------------------------------------------------------------------------
REACHING DEFINITIONS
@@ -211,7 +211,7 @@ df_rd_alloc (bitmap all_blocks)
EXECUTE_IF_SET_IN_BITMAP (all_blocks, 0, bb_index, bi)
{
class df_rd_bb_info *bb_info = df_rd_get_bb_info (bb_index);
-
+
/* When bitmaps are already initialized, just clear them. */
if (bb_info->kill.obstack)
{
@@ -710,7 +710,7 @@ df_rd_add_problem (void)
}
-\f
+
/*----------------------------------------------------------------------------
LIVE REGISTERS
@@ -772,7 +772,7 @@ df_lr_alloc (bitmap all_blocks ATTRIBUTE_UNUSED)
EXECUTE_IF_SET_IN_BITMAP (df_lr->out_of_date_transfer_functions, 0, bb_index, bi)
{
class df_lr_bb_info *bb_info = df_lr_get_bb_info (bb_index);
-
+
/* When bitmaps are already initialized, just clear them. */
if (bb_info->use.obstack)
{
@@ -1295,7 +1295,7 @@ df_lr_verify_transfer_functions (void)
if (!df)
return;
- bitmap_initialize (&saved_def, &bitmap_default_obstack);
+ bitmap_initialize (&saved_def, &bitmap_default_obstack);
bitmap_initialize (&saved_use, &bitmap_default_obstack);
bitmap_initialize (&all_blocks, &bitmap_default_obstack);
@@ -1345,7 +1345,7 @@ df_lr_verify_transfer_functions (void)
}
-\f
+
/*----------------------------------------------------------------------------
LIVE AND MAY-INITIALIZED REGISTERS.
@@ -1426,7 +1426,7 @@ df_live_alloc (bitmap all_blocks ATTRIBUTE_UNUSED)
EXECUTE_IF_SET_IN_BITMAP (df_live->out_of_date_transfer_functions, 0, bb_index, bi)
{
class df_live_bb_info *bb_info = df_live_get_bb_info (bb_index);
-
+
/* When bitmaps are already initialized, just clear them. */
if (bb_info->kill.obstack)
{
@@ -1885,7 +1885,7 @@ df_live_verify_transfer_functions (void)
bitmap_clear (&saved_kill);
bitmap_clear (&all_blocks);
}
-\f
+
/*----------------------------------------------------------------------------
MUST-INITIALIZED REGISTERS.
----------------------------------------------------------------------------*/
@@ -2302,7 +2302,7 @@ df_mir_simulate_one_insn (basic_block bb ATTRIBUTE_UNUSED, rtx_insn *insn,
}
}
}
-\f
+
/*----------------------------------------------------------------------------
CREATE DEF_USE (DU) and / or USE_DEF (UD) CHAINS
@@ -2746,7 +2746,7 @@ df_chain_add_problem (unsigned int chain_flags)
#undef df_chain_problem_p
-\f
+
/*----------------------------------------------------------------------------
WORD LEVEL LIVE REGISTERS
@@ -2816,7 +2816,7 @@ df_word_lr_alloc (bitmap all_blocks ATTRIBUTE_UNUSED)
EXECUTE_IF_SET_IN_BITMAP (df_word_lr->out_of_date_transfer_functions, 0, bb_index, bi)
{
class df_word_lr_bb_info *bb_info = df_word_lr_get_bb_info (bb_index);
-
+
/* When bitmaps are already initialized, just clear them. */
if (bb_info->use.obstack)
{
@@ -3143,7 +3143,7 @@ df_word_lr_simulate_uses (rtx_insn *insn, bitmap live)
FOR_EACH_INSN_USE (use, insn)
df_word_lr_mark_ref (use, true, live);
}
-\f
+
/*----------------------------------------------------------------------------
This problem computes REG_DEAD and REG_UNUSED notes.
----------------------------------------------------------------------------*/
@@ -3786,7 +3786,7 @@ df_note_add_problem (void)
-\f
+
/*----------------------------------------------------------------------------
Functions for simulating the effects of single insns.
@@ -4024,7 +4024,7 @@ df_simulate_one_insn_forwards (basic_block bb, rtx_insn *insn, bitmap live)
}
df_simulate_fixup_sets (bb, live);
}
-\f
+
/* Used by the next two functions to encode information about the
memory references we found. */
#define MEMREF_NORMAL 1
@@ -4342,7 +4342,7 @@ can_move_insns_across (rtx_insn *from, rtx_insn *to,
return !fail;
}
-\f
+
/*----------------------------------------------------------------------------
MULTIPLE DEFINITIONS
diff --git a/gcc/df-scan.cc b/gcc/df-scan.cc
index 9515740728c..b0a5b4d002d 100644
--- a/gcc/df-scan.cc
+++ b/gcc/df-scan.cc
@@ -118,7 +118,7 @@ static const unsigned int copy_eq_uses = 0x4;
static const unsigned int copy_mw = 0x8;
static const unsigned int copy_all = copy_defs | copy_uses | copy_eq_uses
| copy_mw;
-\f
+
/*----------------------------------------------------------------------------
SCANNING DATAFLOW PROBLEM
@@ -438,7 +438,7 @@ df_scan_add_problem (void)
df_add_problem (&problem_SCAN);
}
-\f
+
/*----------------------------------------------------------------------------
Storage Allocation Utilities
----------------------------------------------------------------------------*/
@@ -551,7 +551,7 @@ df_grow_insn_info (void)
-\f
+
/*----------------------------------------------------------------------------
PUBLIC INTERFACES FOR SMALL GRAIN CHANGES TO SCANNING.
----------------------------------------------------------------------------*/
@@ -686,7 +686,7 @@ df_install_ref_incremental (df_ref ref)
}
-\f
+
/*----------------------------------------------------------------------------
UTILITIES TO CREATE AND DESTROY REFS AND CHAINS.
----------------------------------------------------------------------------*/
@@ -2020,7 +2020,7 @@ df_notes_rescan (rtx_insn *insn)
}
-\f
+
/*----------------------------------------------------------------------------
Hard core instruction scanning code. No external interfaces here,
just a lot of routines that look inside insns.
@@ -3459,7 +3459,7 @@ df_get_eh_block_artificial_uses (bitmap eh_block_artificial_uses)
}
-\f
+
/*----------------------------------------------------------------------------
Specialized hard register scanning functions.
----------------------------------------------------------------------------*/
@@ -3925,7 +3925,7 @@ df_compute_regs_ever_live (bool reset)
df->redo_entry_and_exit = false;
}
-\f
+
/*----------------------------------------------------------------------------
Dataflow ref information verification functions.
diff --git a/gcc/df.h b/gcc/df.h
index b2d1300f6d4..a9cf2421312 100644
--- a/gcc/df.h
+++ b/gcc/df.h
@@ -218,7 +218,7 @@ typedef void (*df_confluence_function_0) (basic_block);
Return true if BB input data has changed. */
typedef bool (*df_confluence_function_n) (edge);
-/* Transfer function for blocks.
+/* Transfer function for blocks.
Return true if BB output data has changed. */
typedef bool (*df_transfer_function) (int);
@@ -442,7 +442,7 @@ struct df_link
struct df_link *next;
};
-\f
+
enum df_chain_flags
{
/* Flags that control the building of chains. */
@@ -1092,7 +1092,7 @@ extern void df_set_regs_ever_live (unsigned int, bool);
extern void df_compute_regs_ever_live (bool);
extern void df_scan_verify (void);
-\f
+
/*----------------------------------------------------------------------------
Public functions access functions for the dataflow problems.
----------------------------------------------------------------------------*/
diff --git a/gcc/diagnostic.cc b/gcc/diagnostic.cc
index c90c14e993e..ec9ea3dfc5c 100644
--- a/gcc/diagnostic.cc
+++ b/gcc/diagnostic.cc
@@ -80,7 +80,7 @@ const char *progname;
/* A diagnostic_context surrogate for stderr. */
static diagnostic_context global_diagnostic_context;
diagnostic_context *global_dc = &global_diagnostic_context;
-\f
+
/* Return a malloc'd string containing MSG formatted a la printf. The
caller is responsible for freeing the memory. */
char *
@@ -107,7 +107,7 @@ file_name_as_prefix (diagnostic_context *context, const char *f)
}
-\f
+
/* Return the value of the getenv("COLUMNS") as an integer. If the
value is not set to a positive integer, use ioctl to get the
terminal width. If it fails, return INT_MAX. */
@@ -136,11 +136,11 @@ void
diagnostic_set_caret_max_width (diagnostic_context *context, int value)
{
/* One minus to account for the leading empty space. */
- value = value ? value - 1
+ value = value ? value - 1
: (isatty (fileno (pp_buffer (context->printer)->stream))
? get_terminal_width () - 1: INT_MAX);
-
- if (value <= 0)
+
+ if (value <= 0)
value = INT_MAX;
context->caret_max_width = value;
@@ -1552,7 +1552,7 @@ diagnostic_report_diagnostic (diagnostic_context *context,
|| diagnostic_kind_count (context, DK_SORRY) > 0)
&& !context->abort_on_error)
{
- expanded_location s
+ expanded_location s
= expand_location (diagnostic_location (diagnostic));
fnotice (stderr, "%s:%d: confused by earlier errors, bailing out\n",
s.file, s.line);
@@ -1667,7 +1667,7 @@ trim_filename (const char *name)
return p;
}
-\f
+
/* Standard error reporting routines in increasing order of severity.
All of these take arguments like printf. */
@@ -2161,7 +2161,7 @@ internal_error_no_backtrace (const char *gmsgid, ...)
gcc_unreachable ();
}
-\f
+
/* Special case error functions. Most are implemented in terms of the
above, or should be. */
diff --git a/gcc/diagnostic.h b/gcc/diagnostic.h
index e20f6edfc81..ee0770ed93a 100644
--- a/gcc/diagnostic.h
+++ b/gcc/diagnostic.h
@@ -583,7 +583,7 @@ static inline bool
diagnostic_same_line (const diagnostic_context *context,
expanded_location s1, expanded_location s2)
{
- return s2.column && s1.line == s2.line
+ return s2.column && s1.line == s2.line
&& context->caret_max_width - CARET_LINE_MARGIN > abs (s1.column - s2.column);
}
diff --git a/gcc/dojump.cc b/gcc/dojump.cc
index 564343e821e..60d2ea95512 100644
--- a/gcc/dojump.cc
+++ b/gcc/dojump.cc
@@ -119,7 +119,7 @@ restore_pending_stack_adjust (saved_pending_stack_adjust *save)
stack_pointer_delta = save->x_stack_pointer_delta;
}
}
-\f
+
/* Used internally by prefer_and_bit_test. */
static GTY(()) rtx and_reg;
@@ -629,7 +629,7 @@ do_jump (tree exp, rtx_code_label *if_false_label,
emit_label (drop_through_label);
}
}
-\f
+
/* Compare OP0 with OP1, word at a time, in mode MODE.
UNSIGNEDP says to do unsigned comparison.
Jump to IF_TRUE_LABEL if OP0 is greater, IF_FALSE_LABEL otherwise. */
@@ -724,7 +724,7 @@ do_jump_by_parts_greater (scalar_int_mode mode, tree treeop0, tree treeop1,
do_jump_by_parts_greater_rtx (mode, unsignedp, op0, op1, if_false_label,
if_true_label, prob);
}
-\f
+
/* Jump according to whether OP0 is 0. We assume that OP0 has an integer
mode, MODE, that is too wide for the available compare insns. Either
Either (but not both) of IF_TRUE_LABEL and IF_FALSE_LABEL may be NULL
@@ -834,7 +834,7 @@ do_jump_by_parts_equality (scalar_int_mode mode, tree treeop0, tree treeop1,
do_jump_by_parts_equality_rtx (mode, op0, op1, if_false_label,
if_true_label, prob);
}
-\f
+
/* Split a comparison into two others, the second of which has the other
"orderedness". The first is always ORDERED or UNORDERED if MODE
does not honor NaNs (which means that it can be skipped in that case;
diff --git a/gcc/dominance.cc b/gcc/dominance.cc
index 13d5498443b..56e8d0ac322 100644
--- a/gcc/dominance.cc
+++ b/gcc/dominance.cc
@@ -883,7 +883,7 @@ set_immediate_dominator (enum cdi_direction dir, basic_block bb,
/* Returns the list of basic blocks immediately dominated by BB, in the
direction DIR. */
-auto_vec<basic_block>
+auto_vec<basic_block>
get_dominated_by (enum cdi_direction dir, basic_block bb)
{
unsigned int dir_index = dom_convert_dir_to_idx (dir);
@@ -906,7 +906,7 @@ get_dominated_by (enum cdi_direction dir, basic_block bb)
direction DIR) by some block between N_REGION ones stored in REGION,
except for blocks in the REGION itself. */
-auto_vec<basic_block>
+auto_vec<basic_block>
get_dominated_by_region (enum cdi_direction dir, basic_block *region,
unsigned n_region)
{
@@ -933,7 +933,7 @@ get_dominated_by_region (enum cdi_direction dir, basic_block *region,
produce a vector containing all dominated blocks. The vector will be sorted
in preorder. */
-auto_vec<basic_block>
+auto_vec<basic_block>
get_dominated_to_depth (enum cdi_direction dir, basic_block bb, int depth)
{
auto_vec<basic_block> bbs;
@@ -965,7 +965,7 @@ get_dominated_to_depth (enum cdi_direction dir, basic_block bb, int depth)
/* Returns the list of basic blocks including BB dominated by BB, in the
direction DIR. The vector will be sorted in preorder. */
-auto_vec<basic_block>
+auto_vec<basic_block>
get_all_dominated_blocks (enum cdi_direction dir, basic_block bb)
{
return get_dominated_to_depth (dir, bb, 0);
diff --git a/gcc/double-int.cc b/gcc/double-int.cc
index 0212d137ce7..ef3aab32687 100644
--- a/gcc/double-int.cc
+++ b/gcc/double-int.cc
@@ -1061,7 +1061,7 @@ double_int::set_bit (unsigned bitpos) const
a.low |= HOST_WIDE_INT_1U << bitpos;
else
a.high |= HOST_WIDE_INT_1 << (bitpos - HOST_BITS_PER_WIDE_INT);
-
+
return a;
}
diff --git a/gcc/dse.cc b/gcc/dse.cc
index a2db8d1cc32..de92ee357d6 100644
--- a/gcc/dse.cc
+++ b/gcc/dse.cc
@@ -611,7 +611,7 @@ print_range (FILE *file, poly_int64 offset, poly_int64 width)
print_dec (offset + width, file, SIGNED);
fprintf (file, ")");
}
-\f
+
/*----------------------------------------------------------------------------
Zeroth step.
@@ -717,7 +717,7 @@ dse_step0 (void)
}
-\f
+
/*----------------------------------------------------------------------------
First step.
@@ -2872,7 +2872,7 @@ dse_step1 (void)
rtx_group_table->empty ();
}
-\f
+
/*----------------------------------------------------------------------------
Second step.
@@ -2970,7 +2970,7 @@ dse_step2 (void)
}
-\f
+
/*----------------------------------------------------------------------------
Third step.
@@ -3319,7 +3319,7 @@ dse_step3 ()
}
-\f
+
/*----------------------------------------------------------------------------
Fourth step.
@@ -3468,7 +3468,7 @@ dse_step4 (void)
}
-\f
+
/*----------------------------------------------------------------------------
Fifth step.
@@ -3587,7 +3587,7 @@ dse_step5 (void)
}
-\f
+
/*----------------------------------------------------------------------------
Sixth step.
@@ -3637,7 +3637,7 @@ dse_step6 (void)
}
}
}
-\f
+
/*----------------------------------------------------------------------------
Seventh step.
diff --git a/gcc/dumpfile.cc b/gcc/dumpfile.cc
index 51f68c8c6b4..e14f1524a7c 100644
--- a/gcc/dumpfile.cc
+++ b/gcc/dumpfile.cc
@@ -345,7 +345,7 @@ get_dump_file_name (struct dump_file_info *dfi, int part) const
{
/* (null), LANG, TREE, RTL, IPA. */
char suffix = " ltri"[dfi->dkind];
-
+
if (snprintf (dump_id, sizeof (dump_id), ".%03d%c", dfi->num, suffix) < 0)
dump_id[0] = '\0';
}
diff --git a/gcc/dwarf2asm.cc b/gcc/dwarf2asm.cc
index e66cd30c1fe..77848b91710 100644
--- a/gcc/dwarf2asm.cc
+++ b/gcc/dwarf2asm.cc
@@ -39,7 +39,7 @@ along with GCC; see the file COPYING3. If not see
#define XCOFF_DEBUGGING_INFO 0
#endif
-\f
+
/* Output an unaligned integer with the given value and size. Prefer not
to print a newline, since the caller may want to add a comment. */
@@ -418,7 +418,7 @@ dw2_asm_output_nstring (const char *str, size_t orig_len,
va_end (ap);
}
-\f
+
/* Return the size of an unsigned LEB128 quantity. */
@@ -907,7 +907,7 @@ dw2_asm_output_delta_sleb128 (const char *lab1 ATTRIBUTE_UNUSED,
va_end (ap);
}
#endif /* 0 */
-\f
+
static GTY(()) hash_map<const char *, tree> *indirect_pool;
static GTY(()) int dw2_const_labelno;
diff --git a/gcc/dwarf2cfi.cc b/gcc/dwarf2cfi.cc
index 1c70bd83f28..dc227c6bb53 100644
--- a/gcc/dwarf2cfi.cc
+++ b/gcc/dwarf2cfi.cc
@@ -56,7 +56,7 @@ along with GCC; see the file COPYING3. If not see
#ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET
#define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET
#endif
-\f
+
/* A collected description of an entire row of the abstract CFI table. */
struct GTY(()) dw_cfi_row
{
@@ -231,7 +231,7 @@ static bool any_cfis_emitted;
/* Short-hand for commonly used register numbers. */
static struct cfa_reg dw_stack_pointer_regnum;
static struct cfa_reg dw_frame_pointer_regnum;
-\f
+
/* Hook used by __throw. */
rtx
@@ -282,7 +282,7 @@ void init_one_dwarf_reg_size (int regno, machine_mode regmode,
const unsigned int dnum = DWARF_FRAME_REGNUM (regno);
const unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
const unsigned int dcol = DWARF_REG_TO_UNWIND_COLUMN (rnum);
-
+
poly_int64 slotoffset = dcol * GET_MODE_SIZE (slotmode);
poly_int64 regsize = GET_MODE_SIZE (regmode);
@@ -360,7 +360,7 @@ expand_builtin_init_dwarf_reg_sizes (tree address)
targetm.init_dwarf_reg_sizes_extra (address);
}
-\f
+
static dw_trace_info *
get_trace_info (rtx_insn *insn)
{
@@ -2615,7 +2615,7 @@ maybe_record_trace_start_abnormal (rtx_insn *start, rtx_insn *origin)
cur_row->cfa.offset += delta;
}
-
+
maybe_record_trace_start (start, origin);
cur_trace->end_true_args_size = save_args_size;
@@ -3011,7 +3011,7 @@ connect_traces (void)
start of the trace, we can wind up increasing the
size of the unwind info due to extra advance opcodes.
Instead, put the remember immediately before the next
- state change. We know there must be one, because the
+ state change. We know there must be one, because the
state at the beginning and head of the trace differ. */
add_cfi_insn = before_next_cfi_note (prev_ti->head);
cfi = new_cfi ();
@@ -3320,7 +3320,7 @@ execute_dwarf2_frame (void)
return 0;
}
-\f
+
/* Convert a DWARF call frame info. operation to its string name */
static const char *
@@ -3687,7 +3687,7 @@ debug_cfi_row (dw_cfi_row *row)
{
dump_cfi_row (stderr, row);
}
-\f
+
/* Save the result of dwarf2out_do_frame across PCH.
This variable is tri-state, with 0 unset, >0 true, <0 false. */
diff --git a/gcc/dwarf2out.cc b/gcc/dwarf2out.cc
index 61b711d4a52..e7f48f5b2eb 100644
--- a/gcc/dwarf2out.cc
+++ b/gcc/dwarf2out.cc
@@ -336,7 +336,7 @@ static unsigned int rnglist_idx;
#define LN_PROLOG_AS_LABEL "LASLTP"
#define LN_PROLOG_END_LABEL "LELTP"
#define DIE_LABEL_PREFIX "DW"
-\f
+
/* Match the base name of a file to the base name of a compilation unit. */
static int
@@ -437,7 +437,7 @@ should_emit_struct_debug (tree type, enum debug_info_usage usage)
return DUMP_GSTRUCT (type, usage, criterion, generic, false, false);
}
-\f
+
/* Switch [BACK] to eh_frame_section. If we don't have an eh_frame_section,
switch to the data section instead, and write out a synthetic start label
for collect2 the first time around. */
@@ -1332,7 +1332,7 @@ dwarf2out_switch_text_section (void)
if (cold_text_section != NULL)
set_cur_line_info_table (sect);
}
-\f
+
/* And now, the subset of the debugging information support code necessary
for emitting location expressions. */
@@ -1517,7 +1517,7 @@ dw_val_equal_p (dw_val_node *a, dw_val_node *b)
return a->v.val_file == b->v.val_file;
case dw_val_class_decl_ref:
return a->v.val_decl_ref == b->v.val_decl_ref;
-
+
case dw_val_class_const_double:
return (a->v.val_double.high == b->v.val_double.high
&& a->v.val_double.low == b->v.val_double.low);
@@ -2317,9 +2317,9 @@ output_loc_operands (dw_loc_descr_ref loc, int for_eh_or_skip)
unsigned r = val1->v.val_unsigned;
if (for_eh_or_skip >= 0)
r = DWARF2_FRAME_REG_OUT (r, for_eh_or_skip);
- gcc_assert (size_of_uleb128 (r)
+ gcc_assert (size_of_uleb128 (r)
== size_of_uleb128 (val1->v.val_unsigned));
- dw2_asm_output_data_uleb128 (r, NULL);
+ dw2_asm_output_data_uleb128 (r, NULL);
}
break;
case DW_OP_fbreg:
@@ -2330,9 +2330,9 @@ output_loc_operands (dw_loc_descr_ref loc, int for_eh_or_skip)
unsigned r = val1->v.val_unsigned;
if (for_eh_or_skip >= 0)
r = DWARF2_FRAME_REG_OUT (r, for_eh_or_skip);
- gcc_assert (size_of_uleb128 (r)
+ gcc_assert (size_of_uleb128 (r)
== size_of_uleb128 (val1->v.val_unsigned));
- dw2_asm_output_data_uleb128 (r, NULL);
+ dw2_asm_output_data_uleb128 (r, NULL);
dw2_asm_output_data_sleb128 (val2->v.val_int, NULL);
}
break;
@@ -2553,7 +2553,7 @@ output_loc_operands (dw_loc_descr_ref loc, int for_eh_or_skip)
}
}
-/* Output a sequence of location operations.
+/* Output a sequence of location operations.
The for_eh_or_skip parameter controls whether register numbers are
converted using DWARF2_FRAME_REG_OUT, which is needed in the case that
hard reg numbers have been processed via DWARF_FRAME_REGNUM (i.e. for unwind
@@ -2567,7 +2567,7 @@ output_loc_sequence (dw_loc_descr_ref loc, int for_eh_or_skip)
{
enum dwarf_location_atom opc = loc->dw_loc_opc;
/* Output the opcode. */
- if (for_eh_or_skip >= 0
+ if (for_eh_or_skip >= 0
&& opc >= DW_OP_breg0 && opc <= DW_OP_breg31)
{
unsigned r = (opc - DW_OP_breg0);
@@ -2575,7 +2575,7 @@ output_loc_sequence (dw_loc_descr_ref loc, int for_eh_or_skip)
gcc_assert (r <= 31);
opc = (enum dwarf_location_atom) (DW_OP_breg0 + r);
}
- else if (for_eh_or_skip >= 0
+ else if (for_eh_or_skip >= 0
&& opc >= DW_OP_reg0 && opc <= DW_OP_reg31)
{
unsigned r = (opc - DW_OP_reg0);
@@ -2656,13 +2656,13 @@ output_loc_operands_raw (dw_loc_descr_ref loc)
case DW_OP_regx:
{
unsigned r = DWARF2_FRAME_REG_OUT (val1->v.val_unsigned, 1);
- gcc_assert (size_of_uleb128 (r)
+ gcc_assert (size_of_uleb128 (r)
== size_of_uleb128 (val1->v.val_unsigned));
fputc (',', asm_out_file);
dw2_asm_output_data_uleb128_raw (r);
}
break;
-
+
case DW_OP_constu:
case DW_OP_plus_uconst:
case DW_OP_piece:
@@ -2717,7 +2717,7 @@ output_loc_operands_raw (dw_loc_descr_ref loc)
case DW_OP_bregx:
{
unsigned r = DWARF2_FRAME_REG_OUT (val1->v.val_unsigned, 1);
- gcc_assert (size_of_uleb128 (r)
+ gcc_assert (size_of_uleb128 (r)
== size_of_uleb128 (val1->v.val_unsigned));
fputc (',', asm_out_file);
dw2_asm_output_data_uleb128_raw (r);
@@ -2877,7 +2877,7 @@ build_cfa_aligned_loc (dw_cfa_location *cfa,
head = new_reg_loc_descr (dwarf_fp, offset);
return head;
}
-\f
+
/* And now, the support for symbolic debugging information. */
/* .debug_str support. */
@@ -3007,7 +3007,7 @@ const struct gcc_debug_hooks dwarf2_lineno_debug_hooks =
0, /* start_end_main_source_file */
TYPE_SYMTAB_IS_ADDRESS /* tree_type_symtab_field */
};
-\f
+
/* NOTE: In the comments in this file, many references are made to
"Debugging Information Entries". This term is abbreviated as `DIE'
throughout the remainder of this file. */
@@ -3630,7 +3630,7 @@ struct dw_loc_list_hasher : ggc_ptr_hash<cached_dw_loc_list>
{
typedef const_tree compare_type;
-
+
static hashval_t hash (cached_dw_loc_list *);
static bool equal (cached_dw_loc_list *, const_tree);
};
@@ -4288,7 +4288,7 @@ static char ranges_base_label[2 * MAX_ARTIFICIAL_LABEL_BYTES];
#define LINE_CODE_LABEL "LM"
#endif
-\f
+
/* Return the root of the DIE's built for the current compilation unit. */
static dw_die_ref
comp_unit_die (void)
@@ -4441,7 +4441,7 @@ dwarf_form_name (unsigned int form)
return "DW_FORM_<unknown>";
}
-\f
+
/* Determine the "ultimate origin" of a decl. The decl may be an inlined
instance of an inlined instance of a decl which is local to an inline
function, so we have to trace all of the way back through the origin chain
@@ -4486,7 +4486,7 @@ decl_class_context (tree decl)
return context;
}
-\f
+
/* Add an attribute/value pair to a DIE. */
static inline void
@@ -5823,7 +5823,7 @@ splice_child_die (dw_die_ref parent, dw_die_ref child)
}
/* Create and return a new die with TAG_VALUE as tag. */
-
+
dw_die_ref
new_die_raw (enum dwarf_tag tag_value)
{
@@ -5944,7 +5944,7 @@ equate_type_number_to_die (tree type, dw_die_ref type_die)
}
static dw_die_ref maybe_create_die_with_external_ref (tree);
-struct GTY(()) sym_off_pair
+struct GTY(()) sym_off_pair
{
const char * GTY((skip)) sym;
unsigned HOST_WIDE_INT off;
@@ -6578,7 +6578,7 @@ add_var_loc_to_decl (tree decl, rtx loc_note, const char *label, var_loc_view vi
}
return loc;
}
-\f
+
/* Keep track of the number of spaces used to indent the
output of the debugging routines that print the structure of
the DIE internal representation. */
@@ -7019,7 +7019,7 @@ check_die (dw_die_ref die)
&& a->dw_attr != DW_AT_GNU_all_call_sites);
}
}
-\f
+
#define CHECKSUM(FOO) md5_process_bytes (&(FOO), sizeof (FOO), ctx)
#define CHECKSUM_BLOCK(FOO, SIZE) md5_process_bytes ((FOO), (SIZE), ctx)
#define CHECKSUM_STRING(FOO) md5_process_bytes ((FOO), strlen (FOO), ctx)
@@ -9473,7 +9473,7 @@ optimize_abbrev_table (void)
abbrev_usage_count.release ();
sorted_abbrev_dies.release ();
}
-\f
+
/* Return the power-of-two number of bytes necessary to represent VALUE. */
static int
@@ -9884,7 +9884,7 @@ size_of_aranges (void)
size += 2 * DWARF2_ADDR_SIZE;
return size;
}
-\f
+
/* Select the encoding of an attribute value. */
static enum dwarf_form
@@ -11778,7 +11778,7 @@ output_aranges (void)
{
unsigned i;
unsigned long aranges_length = size_of_aranges ();
-
+
if (!XCOFF_DEBUGGING_INFO)
{
if (DWARF_INITIAL_LENGTH_SIZE - dwarf_offset_size == 4)
@@ -13032,7 +13032,7 @@ output_one_line_info_table (dw_line_info_table *table)
dw2_asm_output_data (1, DW_LNS_set_prologue_end,
"set prologue end");
break;
-
+
case LI_set_epilogue_begin:
dw2_asm_output_data (1, DW_LNS_set_epilogue_begin,
"set epilogue begin");
@@ -13183,7 +13183,7 @@ output_line_info (bool prologue_only)
/* Output the marker for the end of the line number info. */
ASM_OUTPUT_LABEL (asm_out_file, l2);
}
-\f
+
/* Return true if DW_AT_endianity should be emitted according to REVERSE. */
static inline bool
@@ -13641,7 +13641,7 @@ modified_type_die (tree type, int cv_quals, bool reverse,
struct array_descr_info info;
/* Only these cv-qualifiers are currently handled. */
const int cv_qual_mask = (TYPE_QUAL_CONST | TYPE_QUAL_VOLATILE
- | TYPE_QUAL_RESTRICT | TYPE_QUAL_ATOMIC |
+ | TYPE_QUAL_RESTRICT | TYPE_QUAL_ATOMIC |
ENCODE_QUAL_ADDR_SPACE(~0U));
const bool reverse_base_type
= need_endianity_attribute_p (reverse) && is_base_type (type);
@@ -17643,7 +17643,7 @@ dw_sra_loc_expr (tree decl, rtx loc)
if (GET_CODE (varloc) == EXPR_LIST)
varloc = XEXP (varloc, 0);
}
- do
+ do
{
if (GET_CODE (varloc) == CONST
|| GET_CODE (varloc) == SIGN_EXTEND
@@ -19936,7 +19936,7 @@ field_byte_offset (const_tree decl, struct vlr_context *ctx,
else
return loc_result->expr;
}
-\f
+
/* The following routines define various Dwarf attributes and any data
associated with them. */
@@ -21167,7 +21167,7 @@ compute_frame_pointer_to_fb_displacement (poly_int64 offset)
frame_pointer_fb_offset = -offset;
/* ??? AVR doesn't set up valid eliminations when there is no stack frame
- in which to eliminate. This is because it's stack pointer isn't
+ in which to eliminate. This is because it's stack pointer isn't
directly accessible as a register within the ISA. To work around
this, assume that while we cannot provide a proper value for
frame_pointer_fb_offset, we won't need one either. We can use
@@ -21256,7 +21256,7 @@ add_desc_attribute (dw_die_ref die, tree decl)
??? This is a temporary measure until after we're able to generate
regular DWARF for the complex Ada type system. */
-static void
+static void
add_gnat_descriptive_type_attribute (dw_die_ref die, tree type,
dw_die_ref context_die)
{
@@ -21980,7 +21980,7 @@ add_pure_or_virtual_attribute (dw_die_ref die, tree func_decl)
lookup_type_die (DECL_CONTEXT (func_decl)));
}
}
-\f
+
/* Add a DW_AT_linkage_name or DW_AT_MIPS_linkage_name attribute for the
given decl. This used to be a vendor extension until after DWARF 4
standardized it. */
@@ -22339,8 +22339,8 @@ add_calling_convention_attribute (dw_die_ref subr_die, tree decl)
/* DWARF 2 doesn't provide a way to identify a program's source-level
entry point. DW_AT_calling_convention attributes are only meant
to describe functions' calling conventions. However, lacking a
- better way to signal the Fortran main program, we used this for
- a long time, following existing custom. Now, DWARF 4 has
+ better way to signal the Fortran main program, we used this for
+ a long time, following existing custom. Now, DWARF 4 has
DW_AT_main_subprogram, which we add below, but some tools still
rely on the old way, which we thus keep. */
value = DW_CC_program;
@@ -22426,7 +22426,7 @@ decl_start_label (tree decl)
return fnname;
}
#endif
-\f
+
/* For variable-length arrays that have been previously generated, but
may be incomplete due to missing subscript info, fill the subscript
info. Return TRUE if this is one of those cases. */
@@ -22913,7 +22913,7 @@ gen_formal_parameter_die (tree node, tree origin, bool emit_name_p,
tree node_or_origin = node ? node : origin;
tree ultimate_origin;
dw_die_ref parm_die = NULL;
-
+
if (DECL_P (node_or_origin))
{
parm_die = lookup_decl_die (node);
@@ -23177,7 +23177,7 @@ gen_type_die_for_member (tree type, tree member, dw_die_ref context_die)
gen_variable_die (member, NULL_TREE, type_die);
}
}
-\f
+
/* Forward declare these functions, because they are mutually recursive
with their set_block_* pairing functions. */
static void set_decl_origin_self (tree);
@@ -23252,7 +23252,7 @@ set_decl_origin_self (tree decl)
}
}
}
-\f
+
/* Mark the early DIE for DECL as the abstract instance. */
static void
@@ -23837,9 +23837,9 @@ gen_subprogram_die (tree decl, dw_die_ref context_die)
{
if (dwarf_version >= 3 || !dwarf_strict)
{
- /* We should use ranges for non-contiguous code section
+ /* We should use ranges for non-contiguous code section
addresses. Use the actual code range for the initial
- section, since the HOT/COLD labels might precede an
+ section, since the HOT/COLD labels might precede an
alignment offset. */
bool range_list_added = false;
add_ranges_by_labels (subr_die, fde->dw_fde_begin,
@@ -23875,7 +23875,7 @@ gen_subprogram_die (tree decl, dw_die_ref context_die)
if (TREE_PUBLIC (decl))
add_AT_flag (seg_die, DW_AT_external, 1);
- if (decl_name != NULL
+ if (decl_name != NULL
&& IDENTIFIER_POINTER (decl_name) != NULL)
{
name = dwarf2_name (decl, 1);
@@ -23889,7 +23889,7 @@ gen_subprogram_die (tree decl, dw_die_ref context_die)
if (DECL_ARTIFICIAL (decl))
add_AT_flag (seg_die, DW_AT_artificial, 1);
- name = concat ("__second_sect_of_", name, NULL);
+ name = concat ("__second_sect_of_", name, NULL);
add_AT_low_high_pc (seg_die, fde->dw_fde_second_begin,
fde->dw_fde_second_end, false);
add_name_attribute (seg_die, name);
@@ -27169,7 +27169,7 @@ gen_decl_die (tree decl, tree origin, struct vlr_context *ctx,
return NULL;
}
-\f
+
/* Output initial debug information for global DECL. Called at the
end of the parsing process.
@@ -27848,7 +27848,7 @@ gen_scheduled_generic_parms_dies (void)
if (!generic_type_instances)
return;
-
+
FOR_EACH_VEC_ELT (*generic_type_instances, i, t)
if (COMPLETE_TYPE_P (t))
gen_generic_params_dies (t);
@@ -28615,7 +28615,7 @@ dwarf2out_source_line (unsigned int line, unsigned int column,
that second line number entry. */
/* Recall that this end-of-prologue indication is *not* the same thing
as the end_prologue debug hook. The NOTE_INSN_PROLOGUE_END note,
- to which the hook corresponds, follows the last insn that was
+ to which the hook corresponds, follows the last insn that was
emitted by gen_prologue. What we need is to precede the first insn
that had been emitted after NOTE_INSN_FUNCTION_BEG, i.e. the first
insn that corresponds to something the user wrote. These may be
@@ -28893,7 +28893,7 @@ output_macinfo_op (macinfo_entry *ref)
file_num = maybe_emit_file (fd);
dw2_asm_output_data (1, DW_MACINFO_start_file, "Start new file");
dw2_asm_output_data_uleb128 (ref->lineno,
- "Included from line number %lu",
+ "Included from line number %lu",
(unsigned long) ref->lineno);
dw2_asm_output_data_uleb128 (file_num, "file %s", ref->info);
break;
@@ -28920,7 +28920,7 @@ output_macinfo_op (macinfo_entry *ref)
dw2_asm_output_data (1, ref->code,
ref->code == DW_MACINFO_define
? "Define macro" : "Undefine macro");
- dw2_asm_output_data_uleb128 (ref->lineno, "At line number %lu",
+ dw2_asm_output_data_uleb128 (ref->lineno, "At line number %lu",
(unsigned long) ref->lineno);
dw2_asm_output_nstring (ref->info, -1, "The macro");
break;
@@ -31442,7 +31442,7 @@ resolve_addr (dw_die_ref die)
FOR_EACH_CHILD (die, c, resolve_addr (c));
}
-\f
+
/* Helper routines for optimize_location_lists.
This pass tries to share identical local lists in .debug_loc
section. */
@@ -31547,7 +31547,7 @@ hash_loc_operands (dw_loc_descr_ref loc, inchash::hash &hstate)
get_full_len (*val2->v.val_wide)
* HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR);
break;
- case dw_val_class_addr:
+ case dw_val_class_addr:
inchash::add_rtx (val2->v.val_addr, hstate);
break;
default:
@@ -32033,7 +32033,7 @@ optimize_location_lists (dw_die_ref die)
loc_list_hash_type htab (500);
optimize_location_lists_1 (die, &htab);
}
-\f
+
/* Traverse the limbo die list, and add parent/child links. The only
dies without parents that should be here are concrete instances of
inline functions, and the comp_unit_die. We can ignore the comp_unit_die.
diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc
index 61603c37230..5d29e30c677 100644
--- a/gcc/emit-rtl.cc
+++ b/gcc/emit-rtl.cc
@@ -205,7 +205,7 @@ static void copy_rtx_if_shared_1 (rtx *orig);
/* Probability of the conditional branch currently proceeded by try_split. */
profile_probability split_branch_probability;
-\f
+
/* Returns a hash code for X (which is a really a CONST_INT). */
hashval_t
@@ -623,7 +623,7 @@ rtx_to_double_int (const_rtx cst)
}
else
gcc_unreachable ();
-
+
return r;
}
#endif
@@ -1050,7 +1050,7 @@ gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
PAT_VAR_LOCATION_STATUS (x) = status;
return x;
}
-\f
+
/* Create an rtvec and stores within it the RTXen passed in the arguments. */
@@ -1115,7 +1115,7 @@ gen_rtvec_v (int n, rtx_insn **argp)
return rt_val;
}
-\f
+
/* Return the number of bytes between the start of an OUTER_MODE
in-memory value and the start of an INNER_MODE in-memory value,
given that the former is a lowpart of the latter. It may be a
@@ -1158,7 +1158,7 @@ subreg_memory_offset (const_rtx x)
return subreg_memory_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
}
-\f
+
/* Generate a REG rtx for a new pseudo register of mode MODE.
This pseudo is assigned the next sequential register number. */
@@ -1538,7 +1538,7 @@ maybe_set_max_label_num (rtx_code_label *x)
label_num = CODE_LABEL_NUMBER (x) + 1;
}
-\f
+
/* Return a value representing some low-order bits of X, where the number
of low-order bits is given by MODE. Note that no conversion is done
between floating-point and fixed-point values, rather, the bit
@@ -1623,7 +1623,7 @@ gen_lowpart_common (machine_mode mode, rtx x)
/* Otherwise, we can't do this. */
return 0;
}
-\f
+
rtx
gen_highpart (machine_mode mode, rtx x)
{
@@ -1721,7 +1721,7 @@ subreg_lowpart_p (const_rtx x)
GET_MODE (SUBREG_REG (x))),
SUBREG_BYTE (x));
}
-\f
+
/* Return subword OFFSET of operand OP.
The word number, OFFSET, is interpreted as the word number starting
at the low-order address. OFFSET 0 is the low-order word if not
@@ -1819,7 +1819,7 @@ operand_subword_force (rtx op, poly_uint64 offset, machine_mode mode)
return result;
}
-\f
+
mem_attrs::mem_attrs ()
: expr (NULL_TREE),
offset (0),
@@ -2252,7 +2252,7 @@ clear_mem_size (rtx mem)
attrs.size_known_p = false;
set_mem_attrs (mem, &attrs);
}
-\f
+
/* Return a memory reference like MEMREF, but with its mode changed to MODE
and its address changed to ADDR. (VOIDmode means don't change the mode.
NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
@@ -2647,7 +2647,7 @@ widen_memory_access (rtx memref, machine_mode mode, poly_int64 offset)
set_mem_attrs (new_rtx, &attrs);
return new_rtx;
}
-\f
+
/* A fake decl that is used as the MEM_EXPR of spill slots. */
static GTY(()) tree spill_slot_decl;
@@ -2704,7 +2704,7 @@ set_mem_attrs_for_spill (rtx mem)
set_mem_attrs (mem, &attrs);
MEM_NOTRAP_P (mem) = 1;
}
-\f
+
/* Return a newly created CODE_LABEL rtx with a unique label number. */
rtx_code_label *
@@ -2714,7 +2714,7 @@ gen_label_rtx (void)
gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
NULL, label_num++, NULL));
}
-\f
+
/* For procedure integration. */
/* Install new pointers to the first and last insns in the chain.
@@ -2758,7 +2758,7 @@ set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
cur_insn_uid++;
}
-\f
+
/* Go through all the RTL insn bodies and copy any invalid shared
structure. This routine should only be called once. */
@@ -3294,7 +3294,7 @@ set_used_flags (rtx x)
{
mark_used_flags (x, 1);
}
-\f
+
/* Copy X if necessary so that it won't be altered by changes in OTHER.
Return X or the rtx for the pseudo reg the value of X was copied into.
OTHER must be valid as a SET_DEST. */
@@ -3331,7 +3331,7 @@ make_safe_from (rtx x, rtx other)
}
return x;
}
-\f
+
/* Emission of insns (adding them to the doubly-linked list). */
/* Return the last insn emitted, even if it is in a sequence now pushed. */
@@ -3418,7 +3418,7 @@ get_max_insn_count (void)
return n;
}
-\f
+
/* Return the next insn. If it is a SEQUENCE, return the first insn
of the sequence. */
@@ -3725,7 +3725,7 @@ prev_active_insn (rtx_insn *insn)
return insn;
}
-\f
+
/* Find a RTX_AUTOINC class rtx which matches DATA. */
static int
@@ -3766,7 +3766,7 @@ mark_label_nuses (rtx x)
}
}
-\f
+
/* Try splitting insns that can be split for better scheduling.
PAT is the pattern which might split.
TRIAL is the insn providing PAT.
@@ -3976,7 +3976,7 @@ try_split (rtx pat, rtx_insn *trial, int last)
? (after ? PREV_INSN (after) : get_last_insn ())
: NEXT_INSN (before);
}
-\f
+
/* Make and return an INSN rtx, initializing all its slots.
Store PATTERN in the pattern slots. */
@@ -4087,7 +4087,7 @@ make_note_raw (enum insn_note subtype)
memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
return note;
}
-\f
+
/* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
@@ -4261,7 +4261,7 @@ set_insn_deleted (rtx_insn *insn)
/* Unlink INSN from the insn chain.
This function knows how to handle sequences.
-
+
This function does not invalidate data flow information associated with
INSN (i.e. does not call df_insn_delete). That makes this function
usable for only disconnecting an insn from the chain, and re-emit it
@@ -4451,7 +4451,7 @@ reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
}
}
-\f
+
/* Emit insn(s) of given code and pattern
at a specified place within the doubly-linked list.
@@ -4586,7 +4586,7 @@ emit_label_before (rtx_code_label *label, rtx_insn *before)
add_insn_before (label, before, NULL);
return label;
}
-\f
+
/* Helper for emit_insn_after, handles lists of instructions
efficiently. */
@@ -4733,7 +4733,7 @@ emit_label_after (rtx_insn *label, rtx_insn *after)
add_insn_after (label, after, NULL);
return label;
}
-\f
+
/* Notes require a bit of special handling: Some notes need to have their
BLOCK_FOR_INSN set, others should never have it set, and some should
have it set or clear depending on the context. */
@@ -4796,7 +4796,7 @@ emit_note_before (enum insn_note subtype, rtx_insn *before)
add_insn_before (note, before, bb);
return note;
}
-\f
+
/* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
MAKE_RAW indicates how to turn PATTERN into a real insn. */
@@ -5026,7 +5026,7 @@ emit_debug_insn_before (rtx pattern, rtx_insn *before)
return emit_pattern_before (pattern, before, false, false,
make_debug_insn_raw);
}
-\f
+
/* Take X and emit it at the end of the doubly-linked
INSN list.
@@ -5427,7 +5427,7 @@ set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
return set_unique_reg_note (insn, kind, datum);
return NULL_RTX;
}
-\f
+
/* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
following barrier if the instruction needs one and if ALLOW_BARRIER_P
is true.
@@ -5461,7 +5461,7 @@ emit (rtx x, bool allow_barrier_p)
gcc_unreachable ();
}
}
-\f
+
/* Space for free sequence stack entries. */
static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
@@ -5588,7 +5588,7 @@ in_sequence_p (void)
{
return get_current_sequence ()->next != 0;
}
-\f
+
/* Put the various virtual registers into REGNO_REG_RTX. */
static void
@@ -5603,7 +5603,7 @@ init_virtual_regs (void)
= virtual_preferred_stack_boundary_rtx;
}
-\f
+
/* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
@@ -6410,7 +6410,7 @@ init_emit_once (void)
CODE_FOR_nothing,
/*reg_notes=*/NULL_RTX);
}
-\f
+
/* Produce exact duplicate of insn INSN after AFTER.
Care updating of libcall regions if present. */
@@ -6621,5 +6621,5 @@ rtl_data::init_stack_alignment ()
preferred_stack_boundary = STACK_BOUNDARY;
}
-\f
+
#include "gt-emit-rtl.h"
diff --git a/gcc/except.cc b/gcc/except.cc
index e728aa43b6a..2cbfc563cbd 100644
--- a/gcc/except.cc
+++ b/gcc/except.cc
@@ -159,7 +159,7 @@ static int sjlj_fc_data_ofs;
static int sjlj_fc_personality_ofs;
static int sjlj_fc_lsda_ofs;
static int sjlj_fc_jbuf_ofs;
-\f
+
struct GTY(()) call_site_record_d
{
@@ -208,7 +208,7 @@ action_record_hasher::equal (const action_record *entry,
}
typedef hash_table<action_record_hasher> action_hash_type;
-\f
+
static bool get_eh_region_and_lp_from_rtx (const_rtx, eh_region *,
eh_landing_pad *);
@@ -224,7 +224,7 @@ static int sjlj_size_of_call_site_table (void);
static void dw2_output_call_site_table (int, int);
static void sjlj_output_call_site_table (void);
-\f
+
void
init_eh (void)
{
@@ -356,7 +356,7 @@ init_eh_for_function (void)
vec_safe_push (cfun->eh->region_array, (eh_region)0);
vec_safe_push (cfun->eh->lp_array, (eh_landing_pad)0);
}
-\f
+
/* Routines to generate the exception tree somewhat directly.
These are used from tree-eh.cc when processing exception related
nodes during tree optimization. */
@@ -514,7 +514,7 @@ get_eh_region_from_lp_number (int i)
{
return get_eh_region_from_lp_number_fn (cfun, i);
}
-\f
+
/* Returns true if the current function has exception handling regions. */
bool
@@ -522,7 +522,7 @@ current_function_has_exception_handlers (void)
{
return cfun->eh->region_tree != NULL;
}
-\f
+
/* A subroutine of duplicate_eh_regions. Copy the eh_region tree at OLD.
Root it at OUTER, and apply LP_OFFSET to the lp numbers. */
@@ -669,7 +669,7 @@ eh_region_outermost (struct function *ifun, eh_region region_a,
return region_a;
}
-\f
+
void
add_type_for_runtime (tree type)
{
@@ -694,7 +694,7 @@ lookup_type_for_runtime (tree type)
return *type_to_runtime_map->get (type);
}
-\f
+
/* Represent an entry in @TTypes for either catch actions
or exception filter actions. */
struct ttypes_filter {
@@ -952,7 +952,7 @@ emit_to_new_bb_before (rtx_insn *seq, rtx_insn *insn)
bb->flags |= BB_SUPERBLOCK;
return bb;
}
-\f
+
/* A subroutine of dw2_build_landing_pads, also used for edge splitting
at the rtl level. Emit the code required by the target at a landing
pad for the given region. */
@@ -1027,7 +1027,7 @@ dw2_build_landing_pads (void)
}
}
-\f
+
static vec<int> sjlj_lp_call_site_index;
/* Process all active landing pads. Assign each one a compact dispatch
@@ -1558,7 +1558,7 @@ finish_eh_generation (void)
|| single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun))->insns.r)
commit_edge_insertions ();
}
-\f
+
/* This section handles removing dead code for flow. */
void
@@ -1681,7 +1681,7 @@ for_each_eh_label (void (*callback) (rtx))
}
}
}
-\f
+
/* Create the REG_EH_REGION note for INSN, given its ECF_FLAGS for a
call insn.
@@ -1968,7 +1968,7 @@ can_nonlocal_goto (const rtx_insn *insn)
}
return false;
}
-\f
+
/* Set TREE_NOTHROW and crtl->all_throwers_are_sibcalls. */
static unsigned int
@@ -2062,7 +2062,7 @@ make_pass_set_nothrow_function_flags (gcc::context *ctxt)
return new pass_set_nothrow_function_flags (ctxt);
}
-\f
+
/* Various hooks for unwind library. */
/* Expand the EH support builtin functions:
@@ -2323,7 +2323,7 @@ expand_builtin_extend_pointer (tree addr_tree)
return convert_modes (targetm.unwind_word_mode (), ptr_mode, addr, extend);
}
-\f
+
static int
add_action_record (action_hash_type *ar_hash, int filter, int next)
{
@@ -2750,7 +2750,7 @@ make_pass_convert_to_eh_region_ranges (gcc::context *ctxt)
{
return new pass_convert_to_eh_region_ranges (ctxt);
}
-\f
+
static void
push_uleb128 (vec<uchar, va_gc> **data_area, unsigned int value)
{
@@ -2784,7 +2784,7 @@ push_sleb128 (vec<uchar, va_gc> **data_area, int value)
while (more);
}
-\f
+
static int
dw2_size_of_call_site_table (int section)
{
@@ -3009,7 +3009,7 @@ output_ttype (tree type, int tt_format, int tt_format_size)
SECTION refers to the table associated with the hot part while value 1
refers to the table associated with the cold part. If the function has
not been partitioned, value 0 refers to the single exception table. */
-
+
static void
output_one_function_exception_table (int section)
{
@@ -3241,7 +3241,7 @@ get_eh_throw_stmt_table (struct function *fun)
{
return fun->eh->throw_stmt_table;
}
-\f
+
/* Determine if the function needs an EH personality function. */
enum eh_personality_kind
@@ -3274,7 +3274,7 @@ function_needs_eh_personality (struct function *fn)
return kind;
}
-\f
+
/* Dump EH information to OUT. */
void
@@ -3518,5 +3518,5 @@ verify_eh_tree (struct function *fun)
internal_error ("%qs failed", __func__);
}
}
-\f
+
#include "gt-except.h"
diff --git a/gcc/explow.cc b/gcc/explow.cc
index 83439b32abe..2ff917c7118 100644
--- a/gcc/explow.cc
+++ b/gcc/explow.cc
@@ -207,7 +207,7 @@ plus_constant (machine_mode mode, rtx x, poly_int64 c, bool inplace)
else
return x;
}
-\f
+
/* If X is a sum, return a new sum like X but lacking any constant terms.
Add all the removed constant terms into *CONSTPTR.
X itself is not altered. The result != X if and only if
@@ -247,7 +247,7 @@ eliminate_constant_term (rtx x, rtx *constptr)
return x;
}
-\f
+
/* Return a copy of X in which all memory references
and all constants that involve symbol refs
have been replaced with new temporary registers.
@@ -423,7 +423,7 @@ convert_memory_address_addr_space (scalar_int_mode to_mode, rtx x,
{
return convert_memory_address_addr_space_1 (to_mode, x, as, false, false);
}
-\f
+
/* Return something equivalent to X but valid as a memory address for something
of mode MODE in the named address space AS. When X is not itself valid,
@@ -608,7 +608,7 @@ use_anchored_address (rtx x)
return replace_equiv_address (x, plus_constant (mode, base, offset));
}
-\f
+
/* Copy the value or contents of X to a new temp reg and return that reg. */
rtx
@@ -777,7 +777,7 @@ copy_to_suggested_reg (rtx x, rtx target, machine_mode mode)
emit_move_insn (temp, x);
return temp;
}
-\f
+
/* Return the mode to use to pass or return a scalar of TYPE and MODE.
PUNSIGNEDP points to the signedness of the type and may be adjusted
to show what signedness to use on extension operations.
@@ -923,7 +923,7 @@ promote_ssa_mode (const_tree name, int *punsignedp)
}
-\f
+
/* Controls the behavior of {anti_,}adjust_stack. */
static bool suppress_reg_args_size;
@@ -1043,7 +1043,7 @@ round_push (rtx size)
return size;
}
-\f
+
/* Save the stack pointer for the purpose in SAVE_LEVEL. PSAVE is a pointer
to a previously-created save area. If no save area has been allocated,
this function will allocate one. If a save area is specified, it
@@ -1111,7 +1111,7 @@ emit_stack_restore (enum save_level save_level, rtx sa)
STACK_POINTER. This renders the HARD_FRAME_POINTER unusable for accessing
aligned variables, which is reflected in ix86_can_eliminate.
We normally still have the realigned STACK_POINTER that we can use.
- But if there is a stack restore still present at reload, it can trigger
+ But if there is a stack restore still present at reload, it can trigger
mark_not_eliminable for the STACK_POINTER, leaving no way to eliminate
FRAME_POINTER into a hard reg.
To prevent this situation, we force need_drap if we emit a stack
@@ -1185,7 +1185,7 @@ record_new_stack_level (void)
/* Record the new stack level for nonlocal gotos. */
if (cfun->nonlocal_goto_save_area)
update_nonlocal_goto_save_area ();
-
+
/* Record the new stack level for SJLJ exceptions. */
if (targetm_common.except_unwind_info (&global_options) == UI_SJLJ)
update_sjlj_context ();
@@ -1630,7 +1630,7 @@ get_dynamic_stack_base (poly_int64 offset, unsigned required_align, rtx base)
return target;
}
-\f
+
/* A front end may want to override GCC's stack checking by providing a
run-time routine to call to check the stack, so provide a mechanism for
calling that routine. */
@@ -1653,7 +1653,7 @@ set_stack_check_libfunc (const char *libfunc_name)
DECL_EXTERNAL (decl) = 1;
SET_SYMBOL_REF_DECL (stack_check_libfunc, decl);
}
-\f
+
/* Emit one stack probe at ADDRESS, an address within the stack. */
void
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 917360199ca..98f54e874e4 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -148,7 +148,7 @@ init_expmed_one_conv (struct init_expmed_rtl *all, scalar_int_mode to_mode,
if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT
&& pow2p_hwi (from_size))
from_size --;
-
+
/* Assume cost of zero-extend and sign-extend is the same. */
which = (to_size < from_size ? all->trunc : all->zext);
@@ -592,7 +592,7 @@ simple_mem_bitfield_p (rtx op0, poly_uint64 bitsize, poly_uint64 bitnum,
|| (multiple_p (bitnum, GET_MODE_ALIGNMENT (mode))
&& MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode))));
}
-\f
+
/* Try to use instruction INSV to store VALUE into a field of OP0.
If OP0_MODE is defined, it is the mode of OP0, otherwise OP0 is a
BLKmode MEM. VALUE_MODE is the mode of VALUE. BITSIZE and BITNUM
@@ -1195,7 +1195,7 @@ store_bit_field (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum,
fieldmode, value, reverse, true, undefined_p))
gcc_unreachable ();
}
-\f
+
/* Use shifts and boolean operations to store VALUE into a bit field of
width BITSIZE in OP0, starting at bit BITNUM. If OP0_MODE is defined,
it is the mode of OP0, otherwise OP0 is a BLKmode MEM. VALUE_MODE is
@@ -1344,7 +1344,7 @@ store_fixed_bit_field_1 (rtx op0, scalar_int_mode mode,
emit_move_insn (op0, temp);
}
}
-\f
+
/* Store a bit field that is split across multiple accessible memory objects.
OP0 is the REG, SUBREG or MEM rtx for the first of the objects.
@@ -1498,7 +1498,7 @@ store_split_bit_field (rtx op0, opt_scalar_int_mode op0_mode,
bitsdone += thissize;
}
}
-\f
+
/* A subroutine of extract_bit_field_1 that converts return value X
to either MODE or TMODE. MODE, TMODE and UNSIGNEDP are arguments
to extract_bit_field. */
@@ -1902,7 +1902,7 @@ extract_integral_bit_field (rtx op0, opt_scalar_int_mode op0_mode,
if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target))
target = gen_reg_rtx (mode);
- /* In case we're about to clobber a base register or something
+ /* In case we're about to clobber a base register or something
(see gcc.c-torture/execute/20040625-1.c). */
if (reg_mentioned_p (target, op0))
target = gen_reg_rtx (mode);
@@ -2147,7 +2147,7 @@ extract_bit_field (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum,
return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp,
target, mode, tmode, reverse, true, alt_rtl);
}
-\f
+
/* Use shifts and boolean operations to extract a field of BITSIZE bits
from bit BITNUM of OP0. If OP0_MODE is defined, it is the mode of OP0,
otherwise OP0 is a BLKmode MEM.
@@ -2276,7 +2276,7 @@ lshift_value (machine_mode mode, unsigned HOST_WIDE_INT value,
{
return immed_wide_int_const (wi::lshift (value, bitpos), mode);
}
-\f
+
/* Extract a bit field that is split across two words
and return an RTX for the result.
@@ -2374,7 +2374,7 @@ extract_split_bit_field (rtx op0, opt_scalar_int_mode op0_mode,
return expand_shift (RSHIFT_EXPR, word_mode, result,
BITS_PER_WORD - bitsize, NULL_RTX, 0);
}
-\f
+
/* Try to read the low bits of SRC as an rvalue of mode MODE, preserving
the bit pattern. SRC_MODE is the mode of SRC; if this is smaller than
MODE, fill the upper bits with zeros. Fail if the layout of either
@@ -2451,7 +2451,7 @@ extract_low_bits (machine_mode mode, machine_mode src_mode, rtx src)
src = gen_lowpart (mode, src);
return src;
}
-\f
+
/* Add INC into TARGET. */
void
@@ -2475,7 +2475,7 @@ expand_dec (rtx target, rtx dec)
if (value != target)
emit_move_insn (target, value);
}
-\f
+
/* Output a shift instruction for expression code CODE,
with SHIFTED being the rtx for the value to shift,
and AMOUNT the rtx for the amount to shift by.
@@ -2728,7 +2728,7 @@ expand_variable_shift (enum tree_code code, machine_mode mode, rtx shifted,
shifted, expand_normal (amount), target, unsignedp);
}
-\f
+
static void synth_mult (struct algorithm *, unsigned HOST_WIDE_INT,
const struct mult_cost *, machine_mode mode);
static rtx expand_mult_const (machine_mode, rtx, HOST_WIDE_INT, rtx,
@@ -3206,7 +3206,7 @@ synth_mult (struct algorithm *alg_out, unsigned HOST_WIDE_INT t,
memcpy (alg_out->log, best_alg->log,
alg_out->ops * sizeof *alg_out->log);
}
-\f
+
/* Find the cheapest way of multiplying a value of mode MODE by VAL.
Try three variations:
@@ -3678,7 +3678,7 @@ expand_widening_mult (machine_mode mode, rtx op0, rtx op1, rtx target,
return expand_binop (mode, this_optab, op0, op1, target,
unsignedp, OPTAB_LIB_WIDEN);
}
-\f
+
/* Choose a minimal N + 1 bit approximation to 1/D that can be used to
replace division by D, and put the least significant N bits of the result
in *MULTIPLIER_PTR and return the most significant bit.
@@ -4181,7 +4181,7 @@ expand_sdiv_pow2 (scalar_int_mode mode, rtx op0, HOST_WIDE_INT d)
emit_label (label);
return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0);
}
-\f
+
/* Emit the code to divide OP0 by OP1, putting the result in TARGET
if that is convenient, and returning where the result is.
You may request either the quotient or the remainder as the result;
@@ -4365,7 +4365,7 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
/* Only deduct something for a REM if the last divide done was
for a different constant. Then set the constant of the last
divide. */
- max_cost = (unsignedp
+ max_cost = (unsignedp
? udiv_cost (speed, compute_mode)
: sdiv_cost (speed, compute_mode));
if (rem_flag && ! (last_div_const != 0 && op1_is_constant
@@ -5350,7 +5350,7 @@ expand_divmod (int rem_flag, enum tree_code code, machine_mode mode,
return gen_lowpart (mode, rem_flag ? remainder : quotient);
}
-\f
+
/* Return a tree node with data type TYPE, describing the value of X.
Usually this is an VAR_DECL, if there is no obvious better choice.
X may be an expression, however we only support those expressions
@@ -5477,7 +5477,7 @@ make_tree (tree type, rtx x)
return t;
}
}
-\f
+
/* Compute the logical-and of OP0 and OP1, storing it in TARGET
and returning TARGET.
@@ -6360,7 +6360,7 @@ canonicalize_comparison (machine_mode mode, enum rtx_code *code, rtx *imm)
}
-\f
+
/* Perform possibly multi-word comparison and conditional jump to LABEL
if ARG1 OP ARG2 true where ARG1 and ARG2 are of mode MODE. This is
now a thin wrapper around do_compare_rtx_and_jump. */
diff --git a/gcc/expr.cc b/gcc/expr.cc
index 7fa2c114cb2..4e4955cc1d5 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -76,7 +76,7 @@ along with GCC; see the file COPYING3. If not see
int cse_not_expected;
static bool block_move_libcall_safe_for_call_parm (void);
-static bool emit_block_move_via_pattern (rtx, rtx, rtx, unsigned, unsigned,
+static bool emit_block_move_via_pattern (rtx, rtx, rtx, unsigned, unsigned,
HOST_WIDE_INT, unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT, bool);
@@ -101,7 +101,7 @@ static rtx const_vector_from_tree (tree);
static tree tree_expr_size (const_tree);
static void convert_mode_scalar (rtx, rtx, int);
-\f
+
/* This is run to set up which modes can be used
directly in memory and to initialize the block move optab. It is run
at the beginning of compilation and when the target is reinitialized. */
@@ -202,7 +202,7 @@ init_expr (void)
{
memset (&crtl->expr, 0, sizeof (crtl->expr));
}
-\f
+
/* Copy data from FROM to TO, where the machine modes are not the same.
Both modes may be integer, or both may be floating, or both may be
fixed-point.
@@ -948,7 +948,7 @@ convert_float_to_wider_int (machine_mode mode, machine_mode fmode, rtx x)
/* Variant of convert_modes for ABI parameter passing/return.
Return an rtx for a value that would result from converting X from
an integer mode IMODE to a narrower floating point mode MODE. */
-
+
rtx
convert_wider_int_to_float (machine_mode mode, machine_mode imode, rtx x)
{
@@ -957,7 +957,7 @@ convert_wider_int_to_float (machine_mode mode, machine_mode imode, rtx x)
rtx tmp = force_reg (tmp_mode, gen_lowpart (tmp_mode, x));
return gen_lowpart_SUBREG (mode, tmp);
}
-\f
+
/* Return the largest alignment we can use for doing a move (or store)
of MAX_PIECES. ALIGN is the largest alignment we could use. */
@@ -1943,7 +1943,7 @@ compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len,
return target;
}
-\f
+
/* Emit code to move a block Y to a block X. This may be done with
string-move instructions, with multiple scalar move instructions,
or with a library call.
@@ -2150,7 +2150,7 @@ block_move_libcall_safe_for_call_parm (void)
/* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
return true if successful.
-
+
X is the destination of the copy or move.
Y is the source of the copy or move.
SIZE is the size of the block to be moved.
@@ -2310,7 +2310,7 @@ emit_block_move_via_loop (rtx x, rtx y, rtx size,
profile_probability::guessed_always ()
.apply_scale (9, 10));
}
-\f
+
/* Expand a call to memcpy or memmove or memcmp, and return the result.
TAILCALL is true if this is a tail call. */
@@ -2445,7 +2445,7 @@ emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
return result;
}
-\f
+
/* Copy all or part of a value X into registers starting at REGNO.
The number of registers to be filled is NREGS. */
@@ -3447,7 +3447,7 @@ get_def_for_expr_class (tree name, enum tree_code_class tclass)
return def_stmt;
}
-\f
+
/* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
its length in bytes. */
@@ -3558,7 +3558,7 @@ set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
return expand_call (call_expr, NULL_RTX, false);
}
-\f
+
/* Expand a setmem pattern; return true if successful. */
bool
@@ -3643,7 +3643,7 @@ set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
return false;
}
-\f
+
/* Write to one of the components of the complex value CPLX. Write VAL to
the real part if IMAG_P is false, and the imaginary part if its true.
If UNDEFINED_P then the value in CPLX is currently undefined. */
@@ -3770,7 +3770,7 @@ read_complex_part (rtx cplx, bool imag_p)
return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
true, NULL_RTX, imode, imode, false, NULL);
}
-\f
+
/* A subroutine of emit_move_insn_1. Yet another lowpart generator.
NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
represented in NEW_MODE. If FORCE is true, this will never happen, as
@@ -4452,7 +4452,7 @@ compress_float_constant (rtx x, rtx y)
return NULL;
}
-\f
+
/* Pushing data onto the stack. */
/* Push a block of length SIZE (perhaps variable)
@@ -5228,7 +5228,7 @@ emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
return true;
}
-\f
+
/* Return X if X can be used as a subtarget in a sequence of arithmetic
operations. */
@@ -5680,7 +5680,7 @@ expand_assignment (tree to, tree from, bool nontemporal)
else if (GET_MODE (to_rtx) == VOIDmode)
to_rtx = adjust_address (to_rtx, BLKmode, 0);
}
-
+
if (offset != 0)
{
machine_mode address_mode;
@@ -6343,7 +6343,7 @@ store_expr (tree exp, rtx target, int call_param_p,
/* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
the same as that of TARGET, adjust the constant. This is needed, for
- example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
+ example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
only a word-sized value. */
if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
&& TREE_CODE (exp) != ERROR_MARK
@@ -6527,7 +6527,7 @@ store_expr (tree exp, rtx target, int call_param_p,
return NULL_RTX;
}
-\f
+
/* Return true if field F of structure TYPE is a flexible array. */
static bool
@@ -6906,7 +6906,7 @@ all_zeros_p (const_tree exp)
return initializer_zerop (exp);
}
-\f
+
/* Helper function for store_constructor.
TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
CLEARED is as for store_constructor.
@@ -7852,7 +7852,7 @@ store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos,
return store_expr (exp, to_rtx, 0, nontemporal, reverse);
}
}
-\f
+
/* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
codes and find the ultimate containing object, which we return.
@@ -8117,7 +8117,7 @@ target_align (const_tree target)
}
}
-\f
+
/* Given an rtx VALUE that may contain additions and multiplications, return
an equivalent value that just refers to a register, memory, or constant.
This is done by generating instructions to perform the arithmetic and
@@ -8271,7 +8271,7 @@ force_operand (rtx value, rtx target)
return value;
}
-\f
+
/* Subroutine of expand_expr: return nonzero iff there is no way that
EXP can reference X, which is being modified. TOP_P is nonzero if this
call is going to be used to determine whether we need a temporary
@@ -8472,7 +8472,7 @@ safe_from_p (const_rtx x, tree exp, int top_p)
return 1;
}
-\f
+
/* Return the highest power of two that EXP is known to be a multiple of.
This is used in updating alignment of MEMs in array references. */
@@ -8502,7 +8502,7 @@ highest_pow2_factor_for_target (const_tree target, const_tree exp)
return MAX (factor, talign);
}
-\f
+
/* Convert the tree comparison code TCODE to the rtl one where the
signedness is UNSIGNEDP. */
@@ -8584,7 +8584,7 @@ expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
}
}
-\f
+
/* Return a MEM that contains constant EXP. DEFER is as for
output_constant_def and MODIFIER is as for expand_expr. */
@@ -10617,8 +10617,8 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
#undef REDUCE_BIT_FIELD
-/* Return TRUE if expression STMT is suitable for replacement.
- Never consider memory loads as replaceable, because those don't ever lead
+/* Return TRUE if expression STMT is suitable for replacement.
+ Never consider memory loads as replaceable, because those don't ever lead
into constant expressions. */
static bool
@@ -12160,7 +12160,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
return expand_expr_real_2 (&ops, target, tmode, modifier);
}
}
-\f
+
/* Subroutine of above: reduce EXP to the precision of TYPE (in the
signedness of TYPE), possibly returning the result in TARGET.
TYPE is known to be a partial integer type. */
@@ -12192,7 +12192,7 @@ reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0);
}
}
-\f
+
/* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
when applied to the address of EXP produces an address known to be
aligned more than BIGGEST_ALIGNMENT. */
@@ -12905,7 +12905,7 @@ maybe_optimize_sub_cmp_0 (enum tree_code code, tree *arg0, tree *arg1)
*arg0 = treeop0;
*arg1 = treeop1;
}
-\f
+
/* Generate code to calculate OPS, and exploded expression
using a store-flag instruction and return an rtx for the result.
OPS reflects a comparison.
@@ -13121,7 +13121,7 @@ do_store_flag (sepops ops, rtx target, machine_mode mode)
(TYPE_PRECISION (ops->type) == 1
&& !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
}
-\f
+
/* Attempt to generate a casesi instruction. Returns 1 if successful,
0 otherwise (i.e. if there is no casesi instruction).
@@ -13278,7 +13278,7 @@ do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
int
try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
- rtx table_label, rtx default_label,
+ rtx table_label, rtx default_label,
profile_probability default_probability)
{
rtx index;
diff --git a/gcc/expr.h b/gcc/expr.h
index e3ba9eb5370..85299836854 100644
--- a/gcc/expr.h
+++ b/gcc/expr.h
@@ -42,7 +42,7 @@ enum expand_modifier {EXPAND_NORMAL = 0, EXPAND_STACK_PARM, EXPAND_SUM,
/* Allow the compiler to defer stack pops. See inhibit_defer_pop for
more information. */
#define OK_DEFER_POP (inhibit_defer_pop -= 1)
-\f
+
/* This structure is used to pass around information about exploded
unary, binary and trinary expressions between expand_expr_real_1 and
friends. */
@@ -53,7 +53,7 @@ typedef struct separate_ops
tree type;
tree op0, op1, op2;
} *sepops;
-\f
+
/* This is run during target initialization to set up which modes can be
used directly in memory and to initialize the block move optab. */
extern void init_expr_target (void);
diff --git a/gcc/final.cc b/gcc/final.cc
index e614491a69a..211eef440a6 100644
--- a/gcc/final.cc
+++ b/gcc/final.cc
@@ -201,7 +201,7 @@ static void leaf_renumber_regs (rtx_insn *);
#endif
static int align_fuzz (rtx, rtx, int, unsigned);
static void collect_fn_hard_reg_usage (void);
-\f
+
/* Initialize data in final at the beginning of a compilation. */
void
@@ -262,7 +262,7 @@ app_disable (void)
app_on = 0;
}
}
-\f
+
/* Return the number of slots filled in the current
delayed branch sequence (we don't count the insn needing the
delay slot). Zero if not in a delayed branch sequence. */
@@ -275,7 +275,7 @@ dbr_sequence_length (void)
else
return 0;
}
-\f
+
/* The next two pages contain routines used to compute the length of an insn
and to shorten branches. */
@@ -404,7 +404,7 @@ get_attr_min_length (rtx_insn *insn)
{
return get_attr_length_1 (insn, insn_min_length);
}
-\f
+
/* Code to handle alignment inside shorten_branches. */
/* Here is an explanation how the algorithm in align_fuzz can give
@@ -600,7 +600,7 @@ insn_current_reference_address (rtx_insn *branch)
+ align_fuzz (dest, seq, length_unit_log, ~0));
}
}
-\f
+
/* Compute branch alignments based on CFG profile. */
unsigned int
@@ -803,7 +803,7 @@ make_pass_compute_alignments (gcc::context *ctxt)
return new pass_compute_alignments (ctxt);
}
-\f
+
/* Make a pass over all insns and compute their actual lengths by shortening
any branches of variable length if possible. */
@@ -1405,7 +1405,7 @@ asm_str_count (const char *templ)
return count;
}
-\f
+
/* Return true if DWARF2 debug info can be emitted for DECL. */
static bool
@@ -1869,7 +1869,7 @@ final_end_function (void)
some_local_dynamic_name = 0;
}
-\f
+
/* Dumper helper for basic block information. FILE is the assembly
output file, and INSN is the instruction being emitted. */
@@ -2014,7 +2014,7 @@ final (rtx_insn *first, FILE *file, int optimize_p)
final_1 (first, file, 0, optimize_p);
}
-\f
+
const char *
get_insn_template (int code, rtx_insn *insn)
{
@@ -2892,7 +2892,7 @@ final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p,
return ret;
}
-\f
+
/* Map DECLs to instance discriminators. This is allocated and
defined in ada/gcc-interfaces/trans.cc, when compiling with -gnateS.
@@ -3042,7 +3042,7 @@ notice_source_line (rtx_insn *insn, bool *is_stmt)
return false;
}
-\f
+
/* For each operand in INSN, simplify (subreg (reg)) so that it refers
directly to the desired hard register. */
@@ -3166,7 +3166,7 @@ walk_alter_subreg (rtx *xp, bool *changed)
return *xp;
}
-\f
+
/* Report inconsistency between the assembler template and the operands.
In an `asm', it's the user's fault; otherwise, the compiler's fault. */
@@ -3193,7 +3193,7 @@ output_operand_lossage (const char *cmsgid, ...)
free (new_message);
va_end (ap);
}
-\f
+
/* Output of assembler code from a template, and its subroutines. */
/* Annotate the assembly with a comment describing the pattern and
@@ -3575,7 +3575,7 @@ output_asm_insn (const char *templ, rtx *operands)
putc ('\n', asm_out_file);
}
-\f
+
/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
void
@@ -3647,7 +3647,7 @@ output_address (machine_mode mode, rtx x)
walk_alter_subreg (&x, &changed);
targetm.asm_out.print_operand_address (asm_out_file, mode, x);
}
-\f
+
/* Print an integer constant expression in assembler syntax.
Addition and subtraction are the only arithmetic
that may appear in these expressions. */
@@ -3787,7 +3787,7 @@ output_addr_const (FILE *file, rtx x)
output_operand_lossage ("invalid expression as operand");
}
}
-\f
+
/* Output a quoted string. */
void
@@ -3813,7 +3813,7 @@ output_quoted_string (FILE *asm_file, const char *string)
putc ('\"', asm_file);
#endif
}
-\f
+
/* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
void
@@ -4042,7 +4042,7 @@ asm_fprintf (FILE *file, const char *p, ...)
}
va_end (argptr);
}
-\f
+
/* Return nonzero if this function has no function calls. */
int
@@ -4221,7 +4221,7 @@ leaf_renumber_regs_insn (rtx in_rtx)
}
}
#endif
-\f
+
/* Turn the RTL into assembly. */
static unsigned int
rest_of_handle_final (void)
diff --git a/gcc/flags.h b/gcc/flags.h
index e4bafa310d6..9b132613ade 100644
--- a/gcc/flags.h
+++ b/gcc/flags.h
@@ -70,14 +70,14 @@ extern int base_of_path (const char *path, const char **base_out);
extern bool fast_math_flags_set_p (const struct gcc_options *);
extern bool fast_math_flags_struct_set_p (struct cl_optimization *);
-\f
+
/* Now the symbols that are set with `-f' switches. */
/* True if printing into -fdump-final-insns= dump. */
extern bool final_insns_dump_p;
-\f
+
/* Other basic status info about current function. */
class target_flag_state
diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc
index 9aaea71a2fc..424161191c0 100644
--- a/gcc/fold-const.cc
+++ b/gcc/fold-const.cc
@@ -178,7 +178,7 @@ protected_set_expr_location_unshare (tree x, location_t loc)
}
return x;
}
-\f
+
/* If ARG2 divides ARG1 with zero remainder, carries out the exact
division and returns the quotient. Otherwise returns
NULL_TREE. */
@@ -192,9 +192,9 @@ div_if_zero_remainder (const_tree arg1, const_tree arg2)
SIGNED, &quo))
return wide_int_to_tree (TREE_TYPE (arg1), quo);
- return NULL_TREE;
+ return NULL_TREE;
}
-\f
+
/* This is nonzero if we should defer warnings about undefined
overflow. This facility exists because these warnings are a
special case. The code to estimate loop iterations does not want
@@ -312,7 +312,7 @@ fold_overflow_warning (const char* gmsgid, enum warn_strict_overflow_code wc)
else if (issue_strict_overflow_warning (wc))
warning (OPT_Wstrict_overflow, gmsgid);
}
-\f
+
/* Return true if the built-in mathematical function specified by CODE
is odd, i.e. -f(x) == f(-x). */
@@ -795,7 +795,7 @@ negate_expr (tree t)
tem = build1_loc (loc, NEGATE_EXPR, TREE_TYPE (t), t);
return fold_convert_loc (loc, type, tem);
}
-\f
+
/* Split a tree IN into a constant, literal and variable parts that could be
combined with CODE to make IN. "constant" means an expression with
TREE_CONSTANT but that isn't an actual constant. CODE must be a
@@ -975,7 +975,7 @@ associate_trees (location_t loc, tree t1, tree t2, enum tree_code code, tree typ
return fold_build2_loc (loc, code, type, fold_convert_loc (loc, type, t1),
fold_convert_loc (loc, type, t2));
}
-\f
+
/* Check whether TYPE1 and TYPE2 are equivalent integer types, suitable
for use in int_const_binop, size_binop and size_diffop. */
@@ -1930,7 +1930,7 @@ size_int_kind (poly_int64 number, enum size_type_kind kind)
{
return build_int_cst (sizetype_tab[(int) kind], number);
}
-\f
+
/* Combine operands OP1 and OP2 with arithmetic operation CODE. CODE
is a tree code. The type of the result is taken from the operands.
Both must be equivalent integer types, ala int_binop_types_match_p.
@@ -2032,7 +2032,7 @@ size_diffop_loc (location_t loc, tree arg0, tree arg1)
MINUS_EXPR,
arg1, arg0)));
}
-\f
+
/* A subroutine of fold_convert_const handling conversions of an
INTEGER_CST to another integer type. */
@@ -2191,7 +2191,7 @@ fold_convert_const_real_from_real (tree type, const_tree arg1)
and the operand is a signaling NaN. */
if (HONOR_SNANS (arg1)
&& REAL_VALUE_ISSIGNALING_NAN (TREE_REAL_CST (arg1)))
- return NULL_TREE;
+ return NULL_TREE;
/* With flag_rounding_math we should respect the current rounding mode
unless the conversion is exact. */
@@ -2630,7 +2630,7 @@ fold_convert_loc (location_t loc, tree type, tree arg)
tem = protected_set_expr_location_unshare (tem, loc);
return tem;
}
-\f
+
/* Return false if expr can be assumed not to be an lvalue, true
otherwise. */
@@ -2694,7 +2694,7 @@ non_lvalue_loc (location_t loc, tree x)
return x;
return build1_loc (loc, NON_LVALUE_EXPR, TREE_TYPE (x), x);
}
-\f
+
/* Given a tree comparison code, return the code that is the logical inverse.
It is generally not safe to do this for floating-point comparisons, except
for EQ_EXPR, NE_EXPR, ORDERED_EXPR and UNORDERED_EXPR, so we return
@@ -2967,7 +2967,7 @@ combine_comparisons (location_t loc,
return fold_build2_loc (loc, tcode, truth_type, ll_arg, lr_arg);
}
}
-\f
+
/* Return nonzero if two operands (typically of the same tree node)
are necessarily equal. FLAGS modifies behavior as follows:
@@ -3635,10 +3635,10 @@ operand_compare::operand_equal_p (const_tree arg0, const_tree arg1,
Double check this so we won't get false
positives for GENERIC. */
|| (c0->index
- && (TREE_CODE (c0->index) != INTEGER_CST
+ && (TREE_CODE (c0->index) != INTEGER_CST
|| compare_tree_int (c0->index, i)))
|| (c1->index
- && (TREE_CODE (c1->index) != INTEGER_CST
+ && (TREE_CODE (c1->index) != INTEGER_CST
|| compare_tree_int (c1->index, i))))
return false;
}
@@ -4049,7 +4049,7 @@ add_expr (const_tree t, inchash::hash &hstate, unsigned int flags)
}
}
-\f
+
/* Similar to operand_equal_p, but see if ARG0 might be a variant of ARG1
with a different signedness or a narrower precision. */
@@ -4084,13 +4084,13 @@ operand_equal_for_comparison_p (tree arg0, tree arg1)
return false;
}
-\f
+
/* See if ARG is an expression that is either a comparison or is performing
arithmetic on comparisons. The comparisons must only be comparing
two different values, which will be stored in *CVAL1 and *CVAL2; if
they are nonzero it means that some operands have already been found.
No variables may be used anywhere else in the expression except in the
- comparisons.
+ comparisons.
If this is true, return 1. Otherwise, return zero. */
@@ -4164,7 +4164,7 @@ twoval_comparison_p (tree arg, tree *cval1, tree *cval2)
return false;
}
}
-\f
+
/* ARG is a tree that is known to contain just arithmetic operations and
comparisons. Evaluate the operations in the tree substituting NEW0 for
any occurrence of OLD0 as an operand of a comparison and likewise for
@@ -4249,7 +4249,7 @@ eval_subst (location_t loc, tree arg, tree old0, tree new0,
return arg;
}
}
-\f
+
/* Return a tree for the case when the result of an expression is RESULT
converted to TYPE and OMITTED was previously an operand of the expression
but is now not needed (e.g., we folded OMITTED * 0).
@@ -4298,7 +4298,7 @@ omit_two_operands_loc (location_t loc, tree type, tree result,
return TREE_CODE (t) != COMPOUND_EXPR ? non_lvalue_loc (loc, t) : t;
}
-\f
+
/* Return a simplified tree node for the truth-negation of ARG. This
never alters ARG itself. We assume that ARG is an operation that
returns a truth value (0 or 1).
@@ -4474,7 +4474,7 @@ invert_truthvalue_loc (location_t loc, tree arg)
: TRUTH_NOT_EXPR,
type, arg);
}
-\f
+
/* Return a BIT_FIELD_REF of type TYPE to refer to BITSIZE bits of INNER
starting at BITPOS. The field is unsigned if UNSIGNEDP is nonzero
and uses reverse storage order if REVERSEP is nonzero. ORIG_INNER
@@ -4730,7 +4730,7 @@ optimize_bit_field_compare (location_t loc, enum tree_code code,
build2 (BIT_AND_EXPR, unsigned_type, lhs, mask), rhs);
return lhs;
}
-\f
+
/* Subroutine for fold_truth_andor_1: decode a field reference.
If EXP is a comparison reference, we return the innermost reference.
@@ -4948,7 +4948,7 @@ simple_condition_p (tree exp)
return simple_operand_p (exp);
}
-\f
+
/* The following functions are subroutines to fold_range_test and allow it to
try to change a logical combination of comparisons into a range test.
@@ -5042,7 +5042,7 @@ range_binop (enum tree_code code, tree type, tree arg0, int upper0_p,
return constant_boolean_node (result, type);
}
-\f
+
/* Helper routine for make_range. Perform one step for it, return
new expression if the loop should continue or NULL_TREE if it should
stop. */
@@ -5436,7 +5436,7 @@ maskable_range_p (const_tree low, const_tree high, tree type, tree *mask,
return true;
}
-\f
+
/* Helper routine for build_range_check and match.pd. Return the type to
perform the check or NULL if it shouldn't be optimized. */
@@ -5571,7 +5571,7 @@ build_range_check (location_t loc, tree type, tree exp, int in_p,
return 0;
}
-\f
+
/* Return the predecessor of VAL in its type, handling the infinite case. */
static tree
@@ -5838,7 +5838,7 @@ merge_ranges (int *pin_p, tree *plow, tree *phigh, int in0_p, tree low0,
*pin_p = in_p, *plow = low, *phigh = high;
return 1;
}
-\f
+
/* Subroutine of fold, looking inside expressions of the form
A op B ? A : C, where (ARG00, COMP_CODE, ARG01), ARG1 and ARG2
@@ -6056,7 +6056,7 @@ fold_cond_expr_with_comparison (location_t loc, tree type,
}
-\f
+
#ifndef LOGICAL_OP_NON_SHORT_CIRCUIT
#define LOGICAL_OP_NON_SHORT_CIRCUIT \
(BRANCH_COST (optimize_function_for_speed_p (cfun), \
@@ -6159,7 +6159,7 @@ fold_range_test (location_t loc, enum tree_code code, tree type,
return 0;
}
-\f
+
/* Subroutine for fold_truth_andor_1: C is an INTEGER_CST interpreted as a P
bit value. Arrange things so the extra bits will be set to zero if and
only if C is signed-extended to its full width. If MASK is nonzero,
@@ -6201,7 +6201,7 @@ unextend (tree c, int p, int unsignedp, tree mask)
return fold_convert (type, const_binop (BIT_XOR_EXPR, c, temp));
}
-\f
+
/* For an expression that has the form
(A && B) || ~B
or
@@ -6210,7 +6210,7 @@ unextend (tree c, int p, int unsignedp, tree mask)
A || ~B
or
A && ~B
- LOC is the location of the resulting expression. OP is the inner
+ LOC is the location of the resulting expression. OP is the inner
logical operation; the left-hand side in the examples above, while CMPOP
is the right-hand side. RHS_ONLY is used to prevent us from accidentally
removing a condition that guards another, as in
@@ -6732,7 +6732,7 @@ fold_truth_andor_1 (location_t loc, enum tree_code code, tree truth_type,
return build2_loc (loc, wanted_code, truth_type, result,
const_binop (BIT_IOR_EXPR, l_const, r_const));
}
-\f
+
/* T is an integer expression that is being multiplied, divided, or taken a
modulus (CODE says which and what kind of divide or modulus) by a
constant C. See if we can eliminate that operation by folding it with
@@ -7128,7 +7128,7 @@ extract_muldiv_1 (tree t, tree c, enum tree_code code, tree wide_type,
return 0;
}
-\f
+
/* Return a node which has the indicated constant VALUE (either 0 or
1 for scalars or {-1,-1,..} or {0,0,...} for vectors),
and is of the indicated TYPE. */
@@ -7241,7 +7241,7 @@ fold_binary_op_with_conditional_arg (location_t loc,
return fold_build3_loc (loc, cond_code, type, test, lhs, rhs);
}
-\f
+
/* Subroutine of fold() that checks for the addition of ARG +/- 0.0.
If !NEGATE, return true if ZERO_ARG is +/-0.0 and, for all ARG of
@@ -7819,7 +7819,7 @@ native_encode_fixed (const_tree expr, unsigned char *ptr, int len, int off)
if (NULL_TREE == i_type || TYPE_PRECISION (i_type) != total_bytes)
return 0;
-
+
value = TREE_FIXED_CST (expr);
i_value = double_int_to_tree (i_type, value.data);
@@ -9830,7 +9830,7 @@ fold_truth_andor (location_t loc, enum tree_code code, tree type,
side-effects. */
&& simple_condition_p (TREE_OPERAND (arg1, 0)))
{
- tem = fold_build2_loc (loc, ncode, type,
+ tem = fold_build2_loc (loc, ncode, type,
arg0, TREE_OPERAND (arg1, 0));
return fold_build2_loc (loc, icode, type, tem,
TREE_OPERAND (arg1, 1));
@@ -11862,7 +11862,7 @@ fold_binary_loc (location_t loc, enum tree_code code, tree type,
case TRUNC_DIV_EXPR:
/* Fall through */
-
+
case FLOOR_DIV_EXPR:
/* Simplify A / (B << N) where A and B are positive and B is
a power of 2, to A >> (N + log2(B)). */
@@ -12123,10 +12123,10 @@ fold_binary_loc (location_t loc, enum tree_code code, tree type,
l0 = fold_convert_loc (loc, type, TREE_OPERAND (arg0, 0));
l1 = fold_convert_loc (loc, type, TREE_OPERAND (arg0, 1));
-
+
n0 = fold_build1_loc (loc, TRUTH_NOT_EXPR, type, l0);
n1 = fold_build1_loc (loc, TRUTH_NOT_EXPR, type, l1);
-
+
if ((operand_equal_p (n0, a0, 0)
&& operand_equal_p (n1, a1, 0))
|| (operand_equal_p (n0, a1, 0)
diff --git a/gcc/fortran/array.cc b/gcc/fortran/array.cc
index 7457c03e6cd..7368e7bfa94 100644
--- a/gcc/fortran/array.cc
+++ b/gcc/fortran/array.cc
@@ -852,7 +852,7 @@ gfc_set_array_spec (gfc_symbol *sym, gfc_array_spec *as, locus *error_loc)
{
int i;
symbol_attribute *attr;
-
+
if (as == NULL)
return true;
@@ -861,7 +861,7 @@ gfc_set_array_spec (gfc_symbol *sym, gfc_array_spec *as, locus *error_loc)
attr = &sym->attr;
if (gfc_submodule_procedure(attr))
return true;
-
+
if (as->rank
&& !gfc_add_dimension (&sym->attr, sym->name, error_loc))
return false;
@@ -2427,7 +2427,7 @@ gfc_ref_dimen_size (gfc_array_ref *ar, int dimen, mpz_t *result, mpz_t *end)
mpz_set_ui (stride, 1);
else
{
- stride_expr = gfc_copy_expr(ar->stride[dimen]);
+ stride_expr = gfc_copy_expr(ar->stride[dimen]);
if (!gfc_simplify_expr (stride_expr, 1)
|| stride_expr->expr_type != EXPR_CONSTANT
diff --git a/gcc/fortran/decl.cc b/gcc/fortran/decl.cc
index bac7b6568b0..0069d248480 100644
--- a/gcc/fortran/decl.cc
+++ b/gcc/fortran/decl.cc
@@ -2698,7 +2698,7 @@ variable_decl (int elem)
}
gfc_seen_div0 = false;
-
+
/* F2018:C830 (R816) An explicit-shape-spec whose bounds are not
constant expressions shall appear only in a subprogram, derived
type definition, BLOCK construct, or interface body. */
@@ -2769,7 +2769,7 @@ variable_decl (int elem)
if (e->expr_type != EXPR_CONSTANT)
{
n = gfc_copy_expr (e);
- if (!gfc_simplify_expr (n, 1) && gfc_seen_div0)
+ if (!gfc_simplify_expr (n, 1) && gfc_seen_div0)
{
m = MATCH_ERROR;
goto cleanup;
@@ -2784,12 +2784,12 @@ variable_decl (int elem)
if (e->expr_type != EXPR_CONSTANT)
{
n = gfc_copy_expr (e);
- if (!gfc_simplify_expr (n, 1) && gfc_seen_div0)
+ if (!gfc_simplify_expr (n, 1) && gfc_seen_div0)
{
m = MATCH_ERROR;
goto cleanup;
}
-
+
if (n->expr_type == EXPR_CONSTANT)
gfc_replace_expr (e, n);
else
diff --git a/gcc/fortran/dependency.h b/gcc/fortran/dependency.h
index 339be76a8d0..3ad9e2ecf49 100644
--- a/gcc/fortran/dependency.h
+++ b/gcc/fortran/dependency.h
@@ -23,7 +23,7 @@ enum gfc_dep_check
{
NOT_ELEMENTAL, /* Not elemental case: normal dependency check. */
ELEM_CHECK_VARIABLE, /* Test whether variables overlap. */
- ELEM_DONT_CHECK_VARIABLE /* Test whether variables overlap only if used
+ ELEM_DONT_CHECK_VARIABLE /* Test whether variables overlap only if used
in an expression. */
};
diff --git a/gcc/fortran/dump-parse-tree.cc b/gcc/fortran/dump-parse-tree.cc
index ae8ca6fb500..10640d34589 100644
--- a/gcc/fortran/dump-parse-tree.cc
+++ b/gcc/fortran/dump-parse-tree.cc
@@ -3909,7 +3909,7 @@ write_proc (gfc_symbol *sym, bool bind_c)
if (sym->formal)
fputs (", ", dumpfile);
}
-
+
for (f = sym->formal; f; f = f->next)
{
gfc_symbol *s;
diff --git a/gcc/fortran/f95-lang.cc b/gcc/fortran/f95-lang.cc
index 0d83f3f8b69..4d906050959 100644
--- a/gcc/fortran/f95-lang.cc
+++ b/gcc/fortran/f95-lang.cc
@@ -745,11 +745,11 @@ gfc_init_builtin_functions (void)
#include "mathbuiltins.def"
- gfc_define_builtin ("__builtin_roundl", mfunc_longdouble[0],
+ gfc_define_builtin ("__builtin_roundl", mfunc_longdouble[0],
BUILT_IN_ROUNDL, "roundl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_round", mfunc_double[0],
+ gfc_define_builtin ("__builtin_round", mfunc_double[0],
BUILT_IN_ROUND, "round", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_roundf", mfunc_float[0],
+ gfc_define_builtin ("__builtin_roundf", mfunc_float[0],
BUILT_IN_ROUNDF, "roundf", ATTR_CONST_NOTHROW_LEAF_LIST);
gfc_define_builtin ("__builtin_truncl", mfunc_longdouble[0],
@@ -759,139 +759,139 @@ gfc_init_builtin_functions (void)
gfc_define_builtin ("__builtin_truncf", mfunc_float[0],
BUILT_IN_TRUNCF, "truncf", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cabsl", func_clongdouble_longdouble,
+ gfc_define_builtin ("__builtin_cabsl", func_clongdouble_longdouble,
BUILT_IN_CABSL, "cabsl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cabs", func_cdouble_double,
+ gfc_define_builtin ("__builtin_cabs", func_cdouble_double,
BUILT_IN_CABS, "cabs", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cabsf", func_cfloat_float,
+ gfc_define_builtin ("__builtin_cabsf", func_cfloat_float,
BUILT_IN_CABSF, "cabsf", ATTR_CONST_NOTHROW_LEAF_LIST);
-
- gfc_define_builtin ("__builtin_copysignl", mfunc_longdouble[1],
+
+ gfc_define_builtin ("__builtin_copysignl", mfunc_longdouble[1],
BUILT_IN_COPYSIGNL, "copysignl",
ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_copysign", mfunc_double[1],
+ gfc_define_builtin ("__builtin_copysign", mfunc_double[1],
BUILT_IN_COPYSIGN, "copysign",
ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_copysignf", mfunc_float[1],
+ gfc_define_builtin ("__builtin_copysignf", mfunc_float[1],
BUILT_IN_COPYSIGNF, "copysignf",
ATTR_CONST_NOTHROW_LEAF_LIST);
-
- gfc_define_builtin ("__builtin_nextafterl", mfunc_longdouble[1],
+
+ gfc_define_builtin ("__builtin_nextafterl", mfunc_longdouble[1],
BUILT_IN_NEXTAFTERL, "nextafterl",
ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_nextafter", mfunc_double[1],
+ gfc_define_builtin ("__builtin_nextafter", mfunc_double[1],
BUILT_IN_NEXTAFTER, "nextafter",
ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_nextafterf", mfunc_float[1],
+ gfc_define_builtin ("__builtin_nextafterf", mfunc_float[1],
BUILT_IN_NEXTAFTERF, "nextafterf",
ATTR_CONST_NOTHROW_LEAF_LIST);
-
+
/* Some built-ins depend on rounding mode. Depending on compilation options, they
will be "pure" or "const". */
attr = flag_rounding_math ? ATTR_PURE_NOTHROW_LEAF_LIST : ATTR_CONST_NOTHROW_LEAF_LIST;
- gfc_define_builtin ("__builtin_rintl", mfunc_longdouble[0],
+ gfc_define_builtin ("__builtin_rintl", mfunc_longdouble[0],
BUILT_IN_RINTL, "rintl", attr);
- gfc_define_builtin ("__builtin_rint", mfunc_double[0],
+ gfc_define_builtin ("__builtin_rint", mfunc_double[0],
BUILT_IN_RINT, "rint", attr);
- gfc_define_builtin ("__builtin_rintf", mfunc_float[0],
+ gfc_define_builtin ("__builtin_rintf", mfunc_float[0],
BUILT_IN_RINTF, "rintf", attr);
- gfc_define_builtin ("__builtin_remainderl", mfunc_longdouble[1],
+ gfc_define_builtin ("__builtin_remainderl", mfunc_longdouble[1],
BUILT_IN_REMAINDERL, "remainderl", attr);
- gfc_define_builtin ("__builtin_remainder", mfunc_double[1],
+ gfc_define_builtin ("__builtin_remainder", mfunc_double[1],
BUILT_IN_REMAINDER, "remainder", attr);
- gfc_define_builtin ("__builtin_remainderf", mfunc_float[1],
+ gfc_define_builtin ("__builtin_remainderf", mfunc_float[1],
BUILT_IN_REMAINDERF, "remainderf", attr);
-
- gfc_define_builtin ("__builtin_logbl", mfunc_longdouble[0],
+
+ gfc_define_builtin ("__builtin_logbl", mfunc_longdouble[0],
BUILT_IN_LOGBL, "logbl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_logb", mfunc_double[0],
+ gfc_define_builtin ("__builtin_logb", mfunc_double[0],
BUILT_IN_LOGB, "logb", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_logbf", mfunc_float[0],
+ gfc_define_builtin ("__builtin_logbf", mfunc_float[0],
BUILT_IN_LOGBF, "logbf", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_frexpl", mfunc_longdouble[4],
+ gfc_define_builtin ("__builtin_frexpl", mfunc_longdouble[4],
BUILT_IN_FREXPL, "frexpl", ATTR_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_frexp", mfunc_double[4],
+ gfc_define_builtin ("__builtin_frexp", mfunc_double[4],
BUILT_IN_FREXP, "frexp", ATTR_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_frexpf", mfunc_float[4],
+ gfc_define_builtin ("__builtin_frexpf", mfunc_float[4],
BUILT_IN_FREXPF, "frexpf", ATTR_NOTHROW_LEAF_LIST);
-
- gfc_define_builtin ("__builtin_fabsl", mfunc_longdouble[0],
+
+ gfc_define_builtin ("__builtin_fabsl", mfunc_longdouble[0],
BUILT_IN_FABSL, "fabsl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_fabs", mfunc_double[0],
+ gfc_define_builtin ("__builtin_fabs", mfunc_double[0],
BUILT_IN_FABS, "fabs", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_fabsf", mfunc_float[0],
+ gfc_define_builtin ("__builtin_fabsf", mfunc_float[0],
BUILT_IN_FABSF, "fabsf", ATTR_CONST_NOTHROW_LEAF_LIST);
-
+
gfc_define_builtin ("__builtin_scalbnl", mfunc_longdouble[2],
BUILT_IN_SCALBNL, "scalbnl", ATTR_CONST_NOTHROW_LEAF_LIST);
gfc_define_builtin ("__builtin_scalbn", mfunc_double[2],
BUILT_IN_SCALBN, "scalbn", ATTR_CONST_NOTHROW_LEAF_LIST);
gfc_define_builtin ("__builtin_scalbnf", mfunc_float[2],
BUILT_IN_SCALBNF, "scalbnf", ATTR_CONST_NOTHROW_LEAF_LIST);
-
- gfc_define_builtin ("__builtin_fmodl", mfunc_longdouble[1],
+
+ gfc_define_builtin ("__builtin_fmodl", mfunc_longdouble[1],
BUILT_IN_FMODL, "fmodl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_fmod", mfunc_double[1],
+ gfc_define_builtin ("__builtin_fmod", mfunc_double[1],
BUILT_IN_FMOD, "fmod", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_fmodf", mfunc_float[1],
+ gfc_define_builtin ("__builtin_fmodf", mfunc_float[1],
BUILT_IN_FMODF, "fmodf", ATTR_CONST_NOTHROW_LEAF_LIST);
/* iround{f,,l}, lround{f,,l} and llround{f,,l} */
ftype = build_function_type_list (integer_type_node,
- float_type_node, NULL_TREE);
+ float_type_node, NULL_TREE);
gfc_define_builtin("__builtin_iroundf", ftype, BUILT_IN_IROUNDF,
"iroundf", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (long_integer_type_node,
- float_type_node, NULL_TREE);
+ float_type_node, NULL_TREE);
gfc_define_builtin ("__builtin_lroundf", ftype, BUILT_IN_LROUNDF,
"lroundf", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (long_long_integer_type_node,
- float_type_node, NULL_TREE);
+ float_type_node, NULL_TREE);
gfc_define_builtin ("__builtin_llroundf", ftype, BUILT_IN_LLROUNDF,
"llroundf", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (integer_type_node,
- double_type_node, NULL_TREE);
+ double_type_node, NULL_TREE);
gfc_define_builtin("__builtin_iround", ftype, BUILT_IN_IROUND,
"iround", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (long_integer_type_node,
- double_type_node, NULL_TREE);
+ double_type_node, NULL_TREE);
gfc_define_builtin ("__builtin_lround", ftype, BUILT_IN_LROUND,
"lround", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (long_long_integer_type_node,
- double_type_node, NULL_TREE);
+ double_type_node, NULL_TREE);
gfc_define_builtin ("__builtin_llround", ftype, BUILT_IN_LLROUND,
"llround", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (integer_type_node,
- long_double_type_node, NULL_TREE);
+ long_double_type_node, NULL_TREE);
gfc_define_builtin("__builtin_iroundl", ftype, BUILT_IN_IROUNDL,
"iroundl", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (long_integer_type_node,
- long_double_type_node, NULL_TREE);
+ long_double_type_node, NULL_TREE);
gfc_define_builtin ("__builtin_lroundl", ftype, BUILT_IN_LROUNDL,
"lroundl", ATTR_CONST_NOTHROW_LEAF_LIST);
ftype = build_function_type_list (long_long_integer_type_node,
- long_double_type_node, NULL_TREE);
+ long_double_type_node, NULL_TREE);
gfc_define_builtin ("__builtin_llroundl", ftype, BUILT_IN_LLROUNDL,
"llroundl", ATTR_CONST_NOTHROW_LEAF_LIST);
/* These are used to implement the ** operator. */
- gfc_define_builtin ("__builtin_powl", mfunc_longdouble[1],
+ gfc_define_builtin ("__builtin_powl", mfunc_longdouble[1],
BUILT_IN_POWL, "powl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_pow", mfunc_double[1],
+ gfc_define_builtin ("__builtin_pow", mfunc_double[1],
BUILT_IN_POW, "pow", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_powf", mfunc_float[1],
+ gfc_define_builtin ("__builtin_powf", mfunc_float[1],
BUILT_IN_POWF, "powf", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cpowl", mfunc_clongdouble[1],
+ gfc_define_builtin ("__builtin_cpowl", mfunc_clongdouble[1],
BUILT_IN_CPOWL, "cpowl", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cpow", mfunc_cdouble[1],
+ gfc_define_builtin ("__builtin_cpow", mfunc_cdouble[1],
BUILT_IN_CPOW, "cpow", ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cpowf", mfunc_cfloat[1],
+ gfc_define_builtin ("__builtin_cpowf", mfunc_cfloat[1],
BUILT_IN_CPOWF, "cpowf", ATTR_CONST_NOTHROW_LEAF_LIST);
gfc_define_builtin ("__builtin_powil", mfunc_longdouble[2],
BUILT_IN_POWIL, "powil", ATTR_CONST_NOTHROW_LEAF_LIST);
@@ -912,7 +912,7 @@ gfc_init_builtin_functions (void)
gfc_define_builtin ("__builtin_cbrtf", mfunc_float[0],
BUILT_IN_CBRTF, "cbrtf",
ATTR_CONST_NOTHROW_LEAF_LIST);
- gfc_define_builtin ("__builtin_cexpil", func_longdouble_clongdouble,
+ gfc_define_builtin ("__builtin_cexpil", func_longdouble_clongdouble,
BUILT_IN_CEXPIL, "cexpil",
ATTR_CONST_NOTHROW_LEAF_LIST);
gfc_define_builtin ("__builtin_cexpi", func_double_cdouble,
diff --git a/gcc/fortran/gfortranspec.cc b/gcc/fortran/gfortranspec.cc
index 69dbc9298b6..a100cc0f1fb 100644
--- a/gcc/fortran/gfortranspec.cc
+++ b/gcc/fortran/gfortranspec.cc
@@ -200,7 +200,7 @@ lang_specific_driver (struct cl_decoded_option **in_decoded_options,
int need_math = (MATH_LIBRARY[0] != '\0');
/* Whether we should link a static libgfortran. */
- int static_lib = 0;
+ int static_lib = 0;
/* Whether we need to link statically. */
int static_linking = 0;
diff --git a/gcc/fortran/io.cc b/gcc/fortran/io.cc
index b898fd3b6a7..5cb7df2090d 100644
--- a/gcc/fortran/io.cc
+++ b/gcc/fortran/io.cc
@@ -234,7 +234,7 @@ format_lex (void)
}
c = next_char_not_space ();
-
+
negative_flag = 0;
switch (c)
{
@@ -596,7 +596,7 @@ check_format (bool is_input)
= G_("Positive width required in format string at %L");
const char *nonneg_required
= G_("Nonnegative width required in format string at %L");
- const char *unexpected_element
+ const char *unexpected_element
= G_("Unexpected element %qc in format string at %L");
const char *unexpected_end
= G_("Unexpected end of format string in format string at %L");
@@ -890,7 +890,7 @@ data_desc:
error = zero_width;
goto syntax;
}
- if (!gfc_notify_std (GFC_STD_F2008, "%<G0%> in format at %L",
+ if (!gfc_notify_std (GFC_STD_F2008, "%<G0%> in format at %L",
&format_locus))
return false;
u = format_lex ();
@@ -1301,7 +1301,7 @@ extension_optional_comma:
}
goto format_item;
-
+
syntax:
if (mode != MODE_FORMAT)
format_locus.nextc += format_string_pos;
@@ -1344,9 +1344,9 @@ check_format_string (gfc_expr *e, bool is_input)
for (i=e->value.character.length-1;i>format_string_pos-1;i--)
if (e->value.character.string[i] != ' ')
{
- format_locus.nextc += format_length + 1;
+ format_locus.nextc += format_length + 1;
gfc_warning (0,
- "Extraneous characters in format at %L", &format_locus);
+ "Extraneous characters in format at %L", &format_locus);
break;
}
return rv;
@@ -1699,7 +1699,7 @@ resolve_tag_format (gfc_expr *e)
n = 0;
c = gfc_constructor_first (e->value.constructor);
len = c->expr->value.character.length;
-
+
for ( ; c; c = gfc_constructor_next (c))
n += len;
@@ -1859,7 +1859,7 @@ resolve_tag (const io_tag *tag, gfc_expr *e)
if (tag == &tag_newunit)
{
- if (!gfc_notify_std (GFC_STD_F2008, "NEWUNIT specifier at %L",
+ if (!gfc_notify_std (GFC_STD_F2008, "NEWUNIT specifier at %L",
&e->where))
return false;
}
@@ -1874,7 +1874,7 @@ resolve_tag (const io_tag *tag, gfc_expr *e)
if (!gfc_check_vardef_context (e, false, false, false, context))
return false;
}
-
+
if (tag == &tag_convert)
{
if (!gfc_notify_std (GFC_STD_GNU, "CONVERT tag at %L", &e->where))
@@ -3080,7 +3080,7 @@ dtio_procs_present (gfc_symbol *sym, io_kind k)
derived = sym->ts.u.derived;
else
return false;
- if ((k == M_WRITE || k == M_PRINT) &&
+ if ((k == M_WRITE || k == M_PRINT) &&
(gfc_find_specific_dtio_proc (derived, true, true) != NULL))
return true;
if ((k == M_READ) &&
@@ -3369,7 +3369,7 @@ gfc_resolve_dt (gfc_code *dt_code, gfc_dt *dt, locus *loc)
/* If we are writing, make sure the internal unit can be changed. */
gcc_assert (k != M_PRINT);
if (k == M_WRITE
- && !gfc_check_vardef_context (e, false, false, false,
+ && !gfc_check_vardef_context (e, false, false, false,
_("internal unit in WRITE")))
return false;
}
@@ -3403,7 +3403,7 @@ gfc_resolve_dt (gfc_code *dt_code, gfc_dt *dt, locus *loc)
e = gfc_get_variable_expr (gfc_find_sym_in_symtree (n->sym));
t = gfc_check_vardef_context (e, false, false, false, NULL);
gfc_free_expr (e);
-
+
if (!t)
{
gfc_error ("NAMELIST %qs in READ statement at %L contains"
@@ -3423,7 +3423,7 @@ gfc_resolve_dt (gfc_code *dt_code, gfc_dt *dt, locus *loc)
"procedure", n->sym->name, dt->namelist->name, loc);
return false;
}
-
+
if ((n->sym->ts.type == BT_DERIVED)
&& (n->sym->ts.u.derived->attr.alloc_comp
|| n->sym->ts.u.derived->attr.pointer_comp))
@@ -3433,7 +3433,7 @@ gfc_resolve_dt (gfc_code *dt_code, gfc_dt *dt, locus *loc)
"or POINTER components", n->sym->name,
dt->namelist->name, loc))
return false;
-
+
if (!t)
{
gfc_error ("NAMELIST object %qs in namelist %qs at %L has "
@@ -3447,7 +3447,7 @@ gfc_resolve_dt (gfc_code *dt_code, gfc_dt *dt, locus *loc)
}
if (dt->extra_comma
- && !gfc_notify_std (GFC_STD_LEGACY, "Comma before i/o item list at %L",
+ && !gfc_notify_std (GFC_STD_LEGACY, "Comma before i/o item list at %L",
&dt->extra_comma->where))
return false;
@@ -4694,7 +4694,7 @@ gfc_match_inquire (void)
}
gfc_unset_implicit_pure (NULL);
-
+
if (inquire->id != NULL && inquire->pending == NULL)
{
gfc_error ("INQUIRE statement at %L requires a PENDING= specifier with "
@@ -4806,7 +4806,7 @@ gfc_resolve_wait (gfc_wait *wait)
if (!gfc_reference_st_label (wait->err, ST_LABEL_TARGET))
return false;
-
+
if (!gfc_reference_st_label (wait->end, ST_LABEL_TARGET))
return false;
diff --git a/gcc/fortran/iresolve.cc b/gcc/fortran/iresolve.cc
index dea19358b17..92292223348 100644
--- a/gcc/fortran/iresolve.cc
+++ b/gcc/fortran/iresolve.cc
@@ -3358,7 +3358,7 @@ gfc_resolve_mvbits (gfc_code *c)
}
-/* Set up the call to RANDOM_INIT. */
+/* Set up the call to RANDOM_INIT. */
void
gfc_resolve_random_init (gfc_code *c)
diff --git a/gcc/fortran/match.h b/gcc/fortran/match.h
index 2a805815d9c..f953e9a62fc 100644
--- a/gcc/fortran/match.h
+++ b/gcc/fortran/match.h
@@ -101,7 +101,7 @@ match gfc_match_call (void);
/* We want to use this function to check for a common-block-name
that can exist in a bind statement, so removed the "static"
declaration of the function in match.cc. */
-
+
match gfc_match_common_name (char *name);
match gfc_match_common (void);
diff --git a/gcc/fortran/module.cc b/gcc/fortran/module.cc
index 5ddabdcff4d..c2ea00a4725 100644
--- a/gcc/fortran/module.cc
+++ b/gcc/fortran/module.cc
@@ -1348,7 +1348,7 @@ parse_integer (int c)
atom_int = 10 * atom_int + c - '0';
}
- atom_int *= sign;
+ atom_int *= sign;
}
@@ -6312,7 +6312,7 @@ write_module (void)
/* Initialize the column counter. */
module_column = 1;
-
+
/* Write the operator interfaces. */
mio_lparen ();
diff --git a/gcc/fortran/openmp.cc b/gcc/fortran/openmp.cc
index b71ee467c01..75f5e141a18 100644
--- a/gcc/fortran/openmp.cc
+++ b/gcc/fortran/openmp.cc
@@ -3937,7 +3937,7 @@ gfc_match_oacc_cache (void)
return m;
}
- if (gfc_current_state() != COMP_DO
+ if (gfc_current_state() != COMP_DO
&& gfc_current_state() != COMP_DO_CONCURRENT)
{
gfc_error ("ACC CACHE directive must be inside of loop %C");
@@ -4171,7 +4171,7 @@ gfc_match_oacc_routine (void)
new_st.op = EXEC_OACC_ROUTINE;
new_st.ext.omp_clauses = c;
- return MATCH_YES;
+ return MATCH_YES;
cleanup:
gfc_current_locus = old_loc;
@@ -7479,7 +7479,7 @@ resolve_omp_clauses (gfc_code *code, gfc_omp_clauses *omp_clauses,
n->sym->name, &n->where);
}
}
-
+
for (n = omp_clauses->lists[OMP_LIST_TO]; n; n = n->next)
n->sym->mark = 0;
for (n = omp_clauses->lists[OMP_LIST_FROM]; n; n = n->next)
@@ -9775,7 +9775,7 @@ resolve_oacc_directive_inside_omp_region (gfc_code *code)
gfc_statement st = omp_code_to_statement (omp_current_ctx->code);
gfc_statement oacc_st = oacc_code_to_statement (code);
gfc_error ("The %s directive cannot be specified within "
- "a %s region at %L", gfc_ascii_statement (oacc_st),
+ "a %s region at %L", gfc_ascii_statement (oacc_st),
gfc_ascii_statement (st), &code->loc);
}
}
@@ -9788,7 +9788,7 @@ resolve_omp_directive_inside_oacc_region (gfc_code *code)
gfc_statement st = oacc_code_to_statement (omp_current_ctx->code);
gfc_statement omp_st = omp_code_to_statement (code);
gfc_error ("The %s directive cannot be specified within "
- "a %s region at %L", gfc_ascii_statement (omp_st),
+ "a %s region at %L", gfc_ascii_statement (omp_st),
gfc_ascii_statement (st), &code->loc);
}
}
diff --git a/gcc/fortran/options.cc b/gcc/fortran/options.cc
index 08afb781d34..dd252bf7541 100644
--- a/gcc/fortran/options.cc
+++ b/gcc/fortran/options.cc
@@ -151,7 +151,7 @@ gfc_init_options (unsigned int decoded_options_count,
gfc_option.flag_preprocessed = 0;
gfc_option.flag_d_lines = -1;
set_init_local_zero (0);
-
+
gfc_option.fpe = 0;
/* All except GFC_FPE_INEXACT. */
gfc_option.fpe_summary = GFC_FPE_INVALID | GFC_FPE_DENORMAL
@@ -368,7 +368,7 @@ gfc_post_options (const char **pfilename)
{
gfc_current_form = FORM_FREE;
main_input_filename = filename;
- gfc_warning_now (0, "Reading file %qs as free form",
+ gfc_warning_now (0, "Reading file %qs as free form",
(filename[0] == '\0') ? "<stdin>" : filename);
}
}
@@ -458,7 +458,7 @@ gfc_post_options (const char **pfilename)
/* Implement -fno-automatic as -fmax-stack-var-size=0. */
if (!flag_automatic)
flag_max_stack_var_size = 0;
-
+
/* If the user did not specify an inline matmul limit, inline up to the BLAS
limit or up to 30 if no external BLAS is specified. */
@@ -607,7 +607,7 @@ gfc_handle_runtime_check_option (const char *arg)
GFC_RTCHECK_RECURSION, GFC_RTCHECK_DO,
GFC_RTCHECK_POINTER, GFC_RTCHECK_MEM,
GFC_RTCHECK_BITS, 0 };
-
+
while (*arg)
{
while (*arg == ',')
@@ -668,7 +668,7 @@ gfc_handle_option (size_t scode, const char *arg, HOST_WIDE_INT value,
case OPT_fcheck_array_temporaries:
SET_BITFLAG (gfc_option.rtcheck, value, GFC_RTCHECK_ARRAY_TEMPS);
break;
-
+
case OPT_fd_lines_as_code:
gfc_option.flag_d_lines = 1;
break;
@@ -813,8 +813,8 @@ gfc_handle_option (size_t scode, const char *arg, HOST_WIDE_INT value,
break;
}
- Fortran_handle_option_auto (&global_options, &global_options_set,
- scode, arg, value,
+ Fortran_handle_option_auto (&global_options, &global_options_set,
+ scode, arg, value,
gfc_option_lang_mask (), kind,
loc, handlers, global_dc);
return result;
@@ -863,7 +863,7 @@ gfc_get_option_string (void)
result = XCNEWVEC (char, len);
- pos = 0;
+ pos = 0;
for (j = 1; j < save_decoded_options_count; j++)
{
switch (save_decoded_options[j].opt_index)
diff --git a/gcc/fortran/scanner.cc b/gcc/fortran/scanner.cc
index fa1d9cba394..0dbd59dc005 100644
--- a/gcc/fortran/scanner.cc
+++ b/gcc/fortran/scanner.cc
@@ -66,7 +66,7 @@ static locus gcc_attribute_locus;
gfc_source_form gfc_current_form;
static gfc_linebuf *line_head, *line_tail;
-
+
locus gfc_current_locus;
const char *gfc_source_file;
static FILE *gfc_src_file;
@@ -283,19 +283,19 @@ gfc_scanner_done_1 (void)
gfc_linebuf *lb;
gfc_file *f;
- while(line_head != NULL)
+ while(line_head != NULL)
{
lb = line_head->next;
free (line_head);
line_head = lb;
}
-
- while(file_head != NULL)
+
+ while(file_head != NULL)
{
f = file_head->next;
free (file_head->filename);
free (file_head);
- file_head = f;
+ file_head = f;
}
}
@@ -370,7 +370,7 @@ add_path_to_list (gfc_directorylist **list, const char *path,
char *q;
size_t len;
int i;
-
+
p = path;
while (*p == ' ' || *p == '\t') /* someone might do "-I include" */
if (*p++ == '\0')
@@ -629,11 +629,11 @@ gfc_advance_line (void)
if (gfc_at_end ())
return;
- if (gfc_current_locus.lb == NULL)
+ if (gfc_current_locus.lb == NULL)
{
end_flag = 1;
return;
- }
+ }
if (gfc_current_locus.lb->next
&& !gfc_current_locus.lb->next->dbg_emitted)
@@ -644,13 +644,13 @@ gfc_advance_line (void)
gfc_current_locus.lb = gfc_current_locus.lb->next;
- if (gfc_current_locus.lb != NULL)
+ if (gfc_current_locus.lb != NULL)
gfc_current_locus.nextc = gfc_current_locus.lb->line;
- else
+ else
{
gfc_current_locus.nextc = NULL;
end_flag = 1;
- }
+ }
}
@@ -667,7 +667,7 @@ static gfc_char_t
next_char (void)
{
gfc_char_t c;
-
+
if (gfc_current_locus.nextc == NULL)
return '\n';
@@ -784,7 +784,7 @@ skip_free_oacc_sentinel (locus start, locus old_loc)
openacc_locus = old_loc;
gfc_current_locus = start;
}
- else
+ else
r = false;
}
else
@@ -824,7 +824,7 @@ skip_free_omp_sentinel (locus start, locus old_loc)
openmp_locus = old_loc;
gfc_current_locus = start;
}
- else
+ else
r = false;
}
else
@@ -1104,7 +1104,7 @@ skip_fixed_comments (void)
continue_line = gfc_linebuf_linenum (gfc_current_locus.lb);
/* If -fopenmp/-fopenacc, we need to handle here 2 things:
- 1) don't treat !$omp/!$acc|c$omp/c$acc|*$omp / *$acc as comments,
+ 1) don't treat !$omp/!$acc|c$omp/c$acc|*$omp / *$acc as comments,
but directives
2) handle OpenMP/OpenACC conditional compilation, where
!$|c$|*$ should be treated as 2 spaces if the characters
@@ -1372,7 +1372,7 @@ restart:
skip_comment_line ();
else
gfc_advance_line ();
-
+
if (gfc_at_eof ())
goto not_continuation;
@@ -1477,7 +1477,7 @@ restart:
{
gfc_current_locus.nextc--;
if (warn_ampersand && in_string == INSTRING_WARN)
- gfc_warning (OPT_Wampersand,
+ gfc_warning (OPT_Wampersand,
"Missing %<&%> in continued character "
"constant at %C");
}
@@ -1800,7 +1800,7 @@ gfc_gobble_whitespace (void)
load_line returns whether the line was truncated.
NOTE: The error machinery isn't available at this point, so we can't
- easily report line and column numbers consistent with other
+ easily report line and column numbers consistent with other
parts of gfortran. */
static int
@@ -1860,7 +1860,7 @@ load_line (FILE *input, gfc_char_t **pbuf, int *pbuflen, const int *first_char)
if (c == '\n')
{
/* Check for illegal use of ampersand. See F95 Standard 3.3.1.3. */
- if (gfc_current_form == FORM_FREE
+ if (gfc_current_form == FORM_FREE
&& !seen_printable && seen_ampersand)
{
if (pedantic)
diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 44177aa0813..d46ce915426 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -994,9 +994,9 @@ gfc_get_array_span (tree desc, gfc_expr *expr)
if (tmp && TREE_CODE (tmp) == ARRAY_TYPE && TYPE_STRING_FLAG (tmp))
{
gcc_assert (expr->ts.type == BT_CHARACTER);
-
+
tmp = gfc_get_character_len_in_bytes (tmp);
-
+
if (tmp == NULL_TREE || integer_zerop (tmp))
{
tree bs;
@@ -1007,7 +1007,7 @@ gfc_get_array_span (tree desc, gfc_expr *expr)
tmp = fold_build2_loc (input_location, MULT_EXPR,
gfc_array_index_type, tmp, bs);
}
-
+
tmp = (tmp && !integer_zerop (tmp))
? (fold_convert (gfc_array_index_type, tmp)) : (NULL_TREE);
}
@@ -7531,7 +7531,7 @@ gfc_conv_expr_descriptor (gfc_se *se, gfc_expr *expr)
if (!se->direct_byref)
se->unlimited_polymorphic = UNLIMITED_POLY (expr);
-
+
/* Special case things we know we can pass easily. */
switch (expr->expr_type)
{
diff --git a/gcc/fortran/trans-common.cc b/gcc/fortran/trans-common.cc
index 7c8cba0b2da..95f016cc6ed 100644
--- a/gcc/fortran/trans-common.cc
+++ b/gcc/fortran/trans-common.cc
@@ -16,22 +16,22 @@ for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
-<http://www.gnu.org/licenses/>. */
+<http://www.gnu.org/licenses/>. */
/* The core algorithm is based on Andy Vaught's g95 tree. Also the
way to build UNION_TYPE is borrowed from Richard Henderson.
-
+
Transform common blocks. An integral part of this is processing
equivalence variables. Equivalenced variables that are not in a
common block end up in a private block of their own.
Each common block or local equivalence list is declared as a union.
Variables within the block are represented as a field within the
- block with the proper offset.
-
+ block with the proper offset.
+
So if two variables are equivalenced, they just point to a common
area in memory.
-
+
Mathematically, laying out an equivalence block is equivalent to
solving a linear system of equations. The matrix is usually a
sparse matrix in which each row contains all zero elements except
@@ -40,7 +40,7 @@ along with GCC; see the file COPYING3. If not see
overdetermined, underdetermined or have a unique solution. If the
system is inconsistent, the program is not standard conforming.
The solution vector is integral, since all of the pivots are +1 or -1.
-
+
How we lay out an equivalence block is a little less complicated.
In an equivalence list with n elements, there are n-1 conditions to
be satisfied. The conditions partition the variables into what we
@@ -51,43 +51,43 @@ along with GCC; see the file COPYING3. If not see
common block is made up of a series of segments that are joined one
after the other. In the linear system, a segment is a block
diagonal.
-
+
To lay out a segment we first start with some variable and
determine its length. The first variable is assumed to start at
offset one and extends to however long it is. We then traverse the
list of equivalences to find an unused condition that involves at
least one of the variables currently in the segment.
-
+
Each equivalence condition amounts to the condition B+b=C+c where B
and C are the offsets of the B and C variables, and b and c are
constants which are nonzero for array elements, substrings or
structure components. So for
-
+
EQUIVALENCE(B(2), C(3))
we have
B + 2*size of B's elements = C + 3*size of C's elements.
-
+
If B and C are known we check to see if the condition already
holds. If B is known we can solve for C. Since we know the length
of C, we can see if the minimum and maximum extents of the segment
are affected. Eventually, we make a full pass through the
equivalence list without finding any new conditions and the segment
is fully specified.
-
+
At this point, the segment is added to the current common block.
Since we know the minimum extent of the segment, everything in the
segment is translated to its position in the common block. The
usual case here is that there are no equivalence statements and the
common block is series of segments with one variable each, which is
a diagonal matrix in the matrix formulation.
-
+
Each segment is described by a chain of segment_info structures. Each
segment_info structure describes the extents of a single variable within
the segment. This list is maintained in the order the elements are
positioned within the segment. If two elements have the same starting
offset the smaller will come first. If they also have the same size their
- ordering is undefined.
-
+ ordering is undefined.
+
Once all common blocks have been created, the list of equivalences
is examined for still-unused equivalence conditions. We create a
block for each merged equivalence list. */
@@ -521,7 +521,7 @@ build_common_decl (gfc_common_head *com, tree union_type, bool is_init)
/* Return a field that is the size of the union, if an equivalence has
overlapping initializers. Merge the initializers into a single
- initializer for this new field, then free the old ones. */
+ initializer for this new field, then free the old ones. */
static tree
get_init_field (segment_info *head, tree union_type, tree *field_init,
@@ -576,7 +576,7 @@ get_init_field (segment_info *head, tree union_type, tree *field_init,
&chk[s->offset],
(size_t)s->length);
}
-
+
for (i = 0; i < length; i++)
CONSTRUCTOR_APPEND_ELT (v, NULL, build_int_cst (type, data[i]));
@@ -826,7 +826,7 @@ get_mpz (gfc_expr *e)
array element number (zero based). Bounds and elements are guaranteed
to be constants. If something goes wrong we generate an error and
return zero. */
-
+
static HOST_WIDE_INT
element_number (gfc_array_ref *ar)
{
@@ -842,7 +842,7 @@ element_number (gfc_array_ref *ar)
mpz_init (n);
for (i = 0; i < rank; i++)
- {
+ {
if (ar->dimen_type[i] != DIMEN_ELEMENT)
gfc_internal_error ("element_number(): Bad dimension type");
@@ -850,10 +850,10 @@ element_number (gfc_array_ref *ar)
mpz_sub (n, *get_mpz (ar->start[i]), *get_mpz (as->lower[i]));
else
mpz_sub_ui (n, *get_mpz (ar->start[i]), 1);
-
+
mpz_mul (n, n, multiplier);
mpz_add (offset, offset, n);
-
+
if (as && as->upper[i] && as->lower[i])
{
mpz_sub (extent, *get_mpz (as->upper[i]), *get_mpz (as->lower[i]));
@@ -861,20 +861,20 @@ element_number (gfc_array_ref *ar)
}
else
mpz_set_ui (extent, 0);
-
+
if (mpz_sgn (extent) < 0)
mpz_set_ui (extent, 0);
-
+
mpz_mul (multiplier, multiplier, extent);
- }
-
+ }
+
i = mpz_get_ui (offset);
-
+
mpz_clear (multiplier);
mpz_clear (offset);
mpz_clear (extent);
mpz_clear (n);
-
+
return i;
}
@@ -943,7 +943,7 @@ new_condition (segment_info *v, gfc_equiv *eq1, gfc_equiv *eq2)
a = get_segment_info (eq2->expr->symtree->n.sym,
v->offset + offset1 - offset2);
-
+
current_segment = add_segments (current_segment, a);
}
@@ -1312,7 +1312,7 @@ finish_equivalences (gfc_namespace *ns)
for (z = ns->equiv; z; z = z->next)
for (y = z->eq; y; y = y->eq)
{
- if (y->used)
+ if (y->used)
continue;
sym = z->expr->symtree->n.sym;
current_segment = get_segment_info (sym, 0);
diff --git a/gcc/fortran/trans-openmp.cc b/gcc/fortran/trans-openmp.cc
index 45b136d1acb..d0839d0fc2b 100644
--- a/gcc/fortran/trans-openmp.cc
+++ b/gcc/fortran/trans-openmp.cc
@@ -2849,7 +2849,7 @@ gfc_trans_omp_clauses (stmtblock_t *block, gfc_omp_clauses *clauses,
for (; n != NULL; n = n->next)
{
if (iterator && prev->u2.ns != n->u2.ns)
- {
+ {
BLOCK_SUBBLOCKS (tree_block) = gfc_finish_block (&iter_block);
TREE_VEC_ELT (iterator, 5) = tree_block;
for (tree c = omp_clauses; c != prev_clauses;
@@ -3006,7 +3006,7 @@ gfc_trans_omp_clauses (stmtblock_t *block, gfc_omp_clauses *clauses,
omp_clauses = gfc_trans_add_clause (node, omp_clauses);
}
if (iterator)
- {
+ {
BLOCK_SUBBLOCKS (tree_block) = gfc_finish_block (&iter_block);
TREE_VEC_ELT (iterator, 5) = tree_block;
for (tree c = omp_clauses; c != prev_clauses;
@@ -4506,7 +4506,7 @@ gfc_trans_oacc_construct (gfc_code *code)
}
/* update, enter_data, exit_data, cache. */
-static tree
+static tree
gfc_trans_oacc_executable_directive (gfc_code *code)
{
stmtblock_t block;
@@ -4534,7 +4534,7 @@ gfc_trans_oacc_executable_directive (gfc_code *code)
gfc_start_block (&block);
oacc_clauses = gfc_trans_omp_clauses (&block, code->ext.omp_clauses,
code->loc, false, true);
- stmt = build1_loc (input_location, construct_code, void_type_node,
+ stmt = build1_loc (input_location, construct_code, void_type_node,
oacc_clauses);
gfc_add_expr_to_block (&block, stmt);
return gfc_finish_block (&block);
diff --git a/gcc/fortran/trans-types.cc b/gcc/fortran/trans-types.cc
index 196f2cecbfc..c956f51ed4f 100644
--- a/gcc/fortran/trans-types.cc
+++ b/gcc/fortran/trans-types.cc
@@ -39,7 +39,7 @@ along with GCC; see the file COPYING3. If not see
#include "dwarf2out.h" /* For struct array_descr_info. */
#include "attribs.h"
#include "alias.h"
-\f
+
#if (GFC_MAX_DIMENSIONS < 10)
#define GFC_RANK_DIGITS 1
@@ -1111,7 +1111,7 @@ gfc_get_pchar_type (int kind)
return index < 0 ? 0 : gfc_pcharacter_types[index];
}
-\f
+
/* Create a character type with the given kind and length. */
tree
@@ -1147,7 +1147,7 @@ gfc_get_character_type (int kind, gfc_charlen * cl)
return gfc_get_character_type_len (kind, len);
}
-\f
+
/* Convert a basic type. This will be an array for character types. */
tree
@@ -1243,7 +1243,7 @@ gfc_typenode_for_spec (gfc_typespec * spec, int codim)
}
return basetype;
}
-\f
+
/* Build an INT_CST for constant expressions, otherwise return NULL_TREE. */
static tree
@@ -1256,7 +1256,7 @@ gfc_conv_array_bound (gfc_expr * expr)
/* Otherwise return NULL. */
return NULL_TREE;
}
-\f
+
/* Return the type of an element of the array. Note that scalar coarrays
are special. In particular, for GFC_ARRAY_TYPE_P, the original argument
(with POINTER_TYPE stripped) is returned. */
@@ -1296,7 +1296,7 @@ gfc_get_element_type (tree type)
return element;
}
-\f
+
/* Build an array. This function is called from gfc_sym_type().
Actually returns array descriptor type.
@@ -1468,7 +1468,7 @@ gfc_build_array_type (tree type, gfc_array_spec * as,
corank, lbound, ubound, 0, akind,
restricted);
}
-\f
+
/* Returns the struct descriptor_dimension type. */
static tree
@@ -1591,7 +1591,7 @@ gfc_get_dtype_rank_type (int rank, tree etype)
size = size_in_bytes (etype);
break;
}
-
+
gcc_assert (size);
STRIP_NOPS (size);
@@ -2090,7 +2090,7 @@ gfc_get_array_type_bounds (tree etype, int dimen, int codimen, tree * lbound,
return fat_type;
}
-\f
+
/* Build a pointer type. This function is called from gfc_sym_type(). */
static tree
@@ -2265,7 +2265,7 @@ gfc_nonrestricted_type (tree t)
return ret;
}
-\f
+
/* Return the type for a symbol. Special handling is required for character
types to get the correct level of indirection.
For functions return the return type.
@@ -2390,7 +2390,7 @@ gfc_sym_type (gfc_symbol * sym, bool is_bind_c)
return (type);
}
-\f
+
/* Layout and output debug info for a record type. */
void
@@ -2405,7 +2405,7 @@ gfc_finish_type (tree type)
rest_of_type_compilation (type, 1);
rest_of_decl_compilation (decl, 1, 0);
}
-\f
+
/* Add a field of given NAME and TYPE to the context of a UNION_TYPE
or RECORD_TYPE pointed to by CONTEXT. The new field is chained
to the end of the field list pointed to by *CHAIN.
@@ -2967,7 +2967,7 @@ gfc_return_by_reference (gfc_symbol * sym)
return 0;
}
-\f
+
static tree
gfc_get_mixed_entry_union (gfc_namespace *ns)
{
@@ -3004,7 +3004,7 @@ gfc_get_mixed_entry_union (gfc_namespace *ns)
TYPE_DECL_SUPPRESS_DEBUG (TYPE_STUB_DECL (type)) = 1;
return type;
}
-\f
+
/* Create a "fn spec" based on the formal arguments;
cf. create_function_arglist. */
@@ -3323,7 +3323,7 @@ arg_type_list_done:
return type;
}
-\f
+
/* Language hooks for middle-end access to type nodes. */
/* Return an integer type with BITS bits of precision,
diff --git a/gcc/fortran/trans.h b/gcc/fortran/trans.h
index bc9035c1717..17aad66b1b5 100644
--- a/gcc/fortran/trans.h
+++ b/gcc/fortran/trans.h
@@ -55,7 +55,7 @@ typedef struct gfc_se
/* Whether expr is a reference to an unlimited polymorphic object. */
unsigned unlimited_polymorphic:1;
-
+
/* If set gfc_conv_variable will return an expression for the array
descriptor. When set, want_pointer should also be set.
If not set scalarizing variables will be substituted. */
diff --git a/gcc/function.cc b/gcc/function.cc
index d975b001ec9..4bac16bbe1b 100644
--- a/gcc/function.cc
+++ b/gcc/function.cc
@@ -131,7 +131,7 @@ static GTY((cache))
hash_table<insn_cache_hasher> *prologue_insn_hash;
static GTY((cache))
hash_table<insn_cache_hasher> *epilogue_insn_hash;
-\f
+
hash_table<used_type_hasher> *types_used_by_vars_hash = NULL;
vec<tree, va_gc> *types_used_by_cur_var_decl;
@@ -154,7 +154,7 @@ static void prepare_function_start (void);
static void do_clobber_return_reg (rtx, void *);
static void do_use_return_reg (rtx, void *);
-\f
+
/* Stack of nested functions. */
/* Keep track of the cfun stack. */
@@ -218,7 +218,7 @@ free_after_compilation (struct function *f)
regno_reg_rtx = NULL;
}
-\f
+
/* Return size needed for stack frame based on slots so far allocated.
This size counts from zero. It is not rounded to PREFERRED_STACK_BOUNDARY;
the caller may have to do that. */
@@ -546,7 +546,7 @@ assign_stack_local (machine_mode mode, poly_int64 size, int align)
{
return assign_stack_local_1 (mode, size, align, ASLK_RECORD_PAD);
}
-\f
+
/* In order to evaluate some expressions, such as function calls returning
structures in memory, we need to temporarily allocate stack locations.
We record each allocated temporary in the following structure.
@@ -777,7 +777,7 @@ find_temp_slot_from_address (rtx x)
return NULL;
}
-\f
+
/* Allocate a temporary stack slot and record it for possible later
reuse.
@@ -953,7 +953,7 @@ assign_stack_temp (machine_mode mode, poly_int64 size)
{
return assign_stack_temp_for_type (mode, size, NULL_TREE);
}
-\f
+
/* Assign a temporary.
If TYPE_OR_DECL is a decl, then we are doing it on behalf of the decl
and so that should be used in error messages. In either case, we
@@ -1026,7 +1026,7 @@ assign_temp (tree type_or_decl, int memory_required,
return gen_reg_rtx (mode);
}
-\f
+
/* Combine temporary stack slots which are adjacent on the stack.
This allows for better use of already allocated stack space. This is only
@@ -1093,7 +1093,7 @@ combine_temp_slots (void)
cut_slot_from_list (p, &avail_temp_slots);
}
}
-\f
+
/* Indicate that NEW_RTX is an alternate way of referring to the temp
slot that previously was known by OLD_RTX. */
@@ -1246,7 +1246,7 @@ init_temp_slots (void)
else
temp_slot_address_table->empty ();
}
-\f
+
/* Functions and data structures to keep track of the values hard regs
had at the start of the function. */
@@ -1373,7 +1373,7 @@ initial_value_entry (int i, rtx *hreg, rtx *preg)
*preg = ivs->entries[i].pseudo;
return true;
}
-\f
+
/* These routines are responsible for converting virtual register references
to the actual hard register references once RTL generation is complete.
@@ -1426,7 +1426,7 @@ static poly_int64 cfa_offset;
#endif
#endif
-\f
+
/* Given a piece of RTX and a pointer to a HOST_WIDE_INT, if the RTX
is a virtual register, return the equivalent hard register and set the
offset indirectly through the pointer. Otherwise, return 0. */
@@ -2044,7 +2044,7 @@ make_pass_instantiate_virtual_regs (gcc::context *ctxt)
return new pass_instantiate_virtual_regs (ctxt);
}
-\f
+
/* Return 1 if EXP is an aggregate type (or a value with aggregate type).
This means a type for which function calls must pass an address to the
function or get an address back from the function.
@@ -2146,7 +2146,7 @@ aggregate_value_p (const_tree exp, const_tree fntype)
return 0;
}
-\f
+
/* Return true if we should assign DECL a pseudo register; false if it
should live on the local stack. */
@@ -2377,7 +2377,7 @@ split_complex_args (vec<tree> *args)
the hidden struct return argument, and (abi willing) complex args.
Return the new parameter list. */
-static vec<tree>
+static vec<tree>
assign_parms_augmented_arg_list (struct assign_parm_data_all *all)
{
tree fndecl = current_function_decl;
@@ -4007,7 +4007,7 @@ gimplify_parameters (gimple_seq *cleanup)
return stmts;
}
-\f
+
/* Compute the size and offset from the start of the stacked arguments for a
parm passed in mode PASSED_MODE and with type TYPE.
@@ -4273,7 +4273,7 @@ pad_below (struct args_size *offset_ptr, machine_mode passed_mode, tree sizetree
}
}
}
-\f
+
/* True if register REGNO was alive at a place where `setjmp' was
called and was set more than once or is an argument. Such regs may
@@ -4350,7 +4350,7 @@ generate_setjmp_warnings (void)
setjmp_args_warning (setjmp_crosses);
}
-\f
+
/* Reverse the order of elements in the fragment chain T of blocks,
and return the new head of the chain (old last element).
In addition to that clear BLOCK_SAME_RANGE flags when needed
@@ -4680,7 +4680,7 @@ debug_find_var_in_block_tree (tree var, tree block)
return NULL_TREE;
}
-\f
+
/* Keep track of whether we're in a dummy function context. If we are,
we don't want to invoke the set_current_function hook, because we'll
get into trouble if the hook calls target_reinit () recursively or
@@ -5055,7 +5055,7 @@ stack_protect_epilogue (void)
free_temp_slots ();
emit_label (label);
}
-\f
+
/* Start the RTL for a new function, and set variables used for
emitting RTL.
SUBR is the FUNCTION_DECL node.
@@ -5125,7 +5125,7 @@ expand_function_start (tree subr)
else if (DECL_MODE (res) == VOIDmode)
/* If return mode is void, this decl rtl should not be used. */
set_parm_rtl (res, NULL_RTX);
- else
+ else
{
/* Compute the return values into a pseudo reg, which we will copy
into the true return register after the cleanups are done. */
@@ -5258,7 +5258,7 @@ expand_function_start (tree subr)
if (flag_stack_check == GENERIC_STACK_CHECK)
stack_check_probe_note = emit_note (NOTE_INSN_DELETED);
}
-\f
+
void
pop_dummy_function (void)
{
@@ -5636,7 +5636,7 @@ get_arg_pointer_save_area (void)
return ret;
}
-\f
+
/* If debugging dumps are requested, dump information about how the
target handled -fstack-check=clash for the prologue.
@@ -6402,7 +6402,7 @@ current_function_name (void)
{
return function_name (cfun);
}
-\f
+
static unsigned int
rest_of_handle_check_leaf_regs (void)
diff --git a/gcc/function.h b/gcc/function.h
index 9b3b5a2fb7d..c3e731cbbbe 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -32,7 +32,7 @@ struct GTY(()) sequence_stack {
rtx_insn *last;
struct sequence_stack *next;
};
-\f
+
struct GTY(()) emit_status {
void ensure_regno_capacity ();
@@ -45,7 +45,7 @@ struct GTY(()) emit_status {
/* seq.first and seq.last are the ends of the doubly-linked chain of
rtl for the current function. Both are reset to null at the
- start of rtl generation for the function.
+ start of rtl generation for the function.
start_sequence saves both of these on seq.next and then starts
a new, nested sequence of insns.
@@ -620,7 +620,7 @@ enum stack_clash_probes {
};
extern void dump_stack_clash_frame_info (enum stack_clash_probes, bool);
-\f
+
extern void push_function_context (void);
extern void pop_function_context (void);
diff --git a/gcc/fwprop.cc b/gcc/fwprop.cc
index ae342f59407..be072f74f60 100644
--- a/gcc/fwprop.cc
+++ b/gcc/fwprop.cc
@@ -889,7 +889,7 @@ forward_propagate_into (use_info *use, bool reg_prop_only = false)
return false;
}
-\f
+
static void
fwprop_init (void)
{
diff --git a/gcc/gcc-ar.cc b/gcc/gcc-ar.cc
index 5e5b63e1988..205329c58ed 100644
--- a/gcc/gcc-ar.cc
+++ b/gcc/gcc-ar.cc
@@ -105,7 +105,7 @@ setup_prefixes (const char *exec_path)
/* Build the relative path to the target-specific tool directory. */
self_tooldir_prefix = concat (tooldir_base_prefix, target_machine,
dir_separator, NULL);
- self_tooldir_prefix = concat (self_exec_prefix, target_machine,
+ self_tooldir_prefix = concat (self_exec_prefix, target_machine,
dir_separator, target_version, dir_separator,
self_tooldir_prefix, NULL);
@@ -113,7 +113,7 @@ setup_prefixes (const char *exec_path)
prefix_from_string (concat (self_tooldir_prefix, "bin", NULL), &target_path);
/* Add the target-specific libexec prefix. */
- self_libexec_prefix = concat (self_libexec_prefix, target_machine,
+ self_libexec_prefix = concat (self_libexec_prefix, target_machine,
dir_separator, target_version,
dir_separator, NULL);
prefix_from_string (self_libexec_prefix, &target_path);
@@ -122,7 +122,7 @@ setup_prefixes (const char *exec_path)
prefix_from_env ("PATH", &path);
}
-int
+int
main (int ac, char **av)
{
const char *exe_name;
@@ -228,12 +228,12 @@ main (int ac, char **av)
/* Run utility */
/* ??? the const is misplaced in pex_one's argv? */
- err_msg = pex_one (PEX_LAST|PEX_SEARCH,
- exe_name,
+ err_msg = pex_one (PEX_LAST|PEX_SEARCH,
+ exe_name,
CONST_CAST2 (char * const *, const char **, nargv),
concat ("gcc-", exe_name, NULL),
NULL,NULL, &status, &err);
- if (err_msg)
+ if (err_msg)
fprintf (stderr, "Error running %s: %s\n", exe_name, err_msg);
else if (status)
{
diff --git a/gcc/gcc.cc b/gcc/gcc.cc
index d629ca5e424..3ce69578140 100644
--- a/gcc/gcc.cc
+++ b/gcc/gcc.cc
@@ -47,7 +47,7 @@ compilation is specified by a string called a "spec". */
#include "opts-jobserver.h"
#include "common/common-target.h"
-\f
+
/* Manage the manipulation of env vars.
@@ -170,7 +170,7 @@ env_manager::restore ()
#pragma GCC poison getenv putenv
#endif
-\f
+
/* By default there is no special suffix for target executables. */
#ifdef TARGET_EXECUTABLE_SUFFIX
@@ -448,7 +448,7 @@ static char *quote_spec (char *);
static char *quote_spec_arg (char *);
static bool not_actual_file_p (const char *);
-\f
+
/* The Specs Language
Specs are strings containing lines, each of which (if not blank)
@@ -678,7 +678,7 @@ to tell which compilers to run.
GCC also knows implicitly that arguments starting in `-l' are to be
treated as compiler output files, and passed to the linker in their
proper position among the other output files. */
-\f
+
/* Define the macros used for specs %a, %l, %L, %S, %C, %1. */
/* config.h can define ASM_SPEC to provide extra args to the assembler
@@ -1362,7 +1362,7 @@ struct user_specs
static struct user_specs *user_specs_head, *user_specs_tail;
-\f
+
/* Record the mapping from file suffixes for compilation specs. */
struct compiler
@@ -1507,7 +1507,7 @@ static vec<char_p> assembler_options;
These options are accumulated by -Wp,
and substituted into the preprocessor command with %Z. */
static vec<char_p> preprocessor_options;
-\f
+
static char *
skip_whitespace (char *p)
{
@@ -1650,7 +1650,7 @@ static const char *multilib_os_dir;
set_multilib_dir based on the compilation options. */
static const char *multiarch_dir;
-\f
+
/* Structure to keep track of the specs that have been defined so far.
These are accessed using %(specname) in a compiler or link
spec. */
@@ -1742,7 +1742,7 @@ static struct spec_list *extra_specs = (struct spec_list *) 0;
/* List of dynamically allocates specs that have been defined so far. */
static struct spec_list *specs = (struct spec_list *) 0;
-\f
+
/* List of static spec functions. */
static const struct spec_function static_spec_functions[] =
@@ -1774,7 +1774,7 @@ static const struct spec_function static_spec_functions[] =
};
static int processing_spec_function;
-\f
+
/* Add appropriate libgcc specs to OBSTACK, taking into account
various permutations of -shared-libgcc, -shared, and such. */
@@ -2029,7 +2029,7 @@ static void set_static_spec_shared (const char **spec, const char *val)
return set_static_spec (spec, val, false);
}
-\f
+
/* Change the value of spec NAME to SPEC. If SPEC is empty, then the spec is
removed; If the spec starts with a + then SPEC is added to the end of the
current spec. */
@@ -2091,7 +2091,7 @@ set_spec (const char *name, const char *spec, bool user_p)
sl->user_p = user_p;
sl->alloc_p = true;
}
-\f
+
/* Accumulate a command (program name and args), and run it. */
typedef const char *const_char_p; /* For DEF_VEC_P. */
@@ -2137,7 +2137,7 @@ static int execution_count;
/* Number of commands that exited with a signal. */
static int signal_count;
-\f
+
/* Allocate the argument vector. */
static void
@@ -2269,7 +2269,7 @@ close_at_file (void)
record_temp_file (temp_file, !save_temps_flag, !save_temps_flag);
}
-\f
+
/* Load specs from a file name named FILENAME, replacing occurrences of
various different types of line-endings, \r\n, \n\r and just \r, with
a single \n. */
@@ -2594,7 +2594,7 @@ read_specs (const char *filename, bool main_p, bool user_p)
XDELETEVEC (buffer);
}
-\f
+
/* Record the names of temporary files we tell compilers to write,
and delete them at the end of the run. */
@@ -2734,7 +2734,7 @@ clear_failure_queue (void)
{
failure_delete_queue = 0;
}
-\f
+
/* Call CALLBACK for each path in PATHS, breaking out early if CALLBACK
returns non-NULL.
If DO_MULTI is true iterate over the paths twice, first with multilib
@@ -2977,7 +2977,7 @@ putenv_from_prefixes (const struct path_prefix *paths, const char *env_var,
{
xputenv (build_search_list (paths, env_var, true, do_multi));
}
-\f
+
/* Check whether NAME can be accessed in MODE. This is like access,
except that it never considers directories to be executable. */
@@ -3219,7 +3219,7 @@ add_sysrooted_hdrs_prefix (struct path_prefix *pprefix, const char *prefix,
require_machine_suffix, os_multilib);
}
-\f
+
/* Execute the command specified by the arguments on the current line of spec.
When using pipes, this includes several piped-together commands
with `|' between them.
@@ -3573,7 +3573,7 @@ execute (void)
return ret_code;
}
}
-\f
+
static struct switchstr *switches;
static int n_switches;
@@ -3647,7 +3647,7 @@ static int added_libraries;
/* And a vector of corresponding output files is made up later. */
const char **outfiles;
-\f
+
#if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX)
/* Convert NAME to a new name if it is the standard suffix. DO_EXE
@@ -3703,7 +3703,7 @@ convert_filename (const char *name, int do_exe ATTRIBUTE_UNUSED,
return name;
}
#endif
-\f
+
/* Display the command line switches accepted by gcc. */
static void
display_help (void)
@@ -3800,7 +3800,7 @@ add_linker_option (const char *option, int len)
{
linker_options.safe_push (save_string (option, len));
}
-\f
+
/* Allocate space for an input file in infiles. */
static void
@@ -5528,7 +5528,7 @@ set_collect_gcc_options (void)
obstack_grow (&collect_obstack, "\0", 1);
xputenv (XOBFINISH (&collect_obstack, char *));
}
-\f
+
/* Process a spec string, accumulating and running commands. */
/* These variables describe the input file name.
@@ -6725,7 +6725,7 @@ do_spec_1 (const char *spec, int inswitch, const char *soft_matched_part)
"%{foo=*:bar%*}%{foo=*:one%*two}"
matches -foo=hello then it will produce:
-
+
barhello onehellotwo
*/
if (*p == 0 || *p == '}')
@@ -7374,7 +7374,7 @@ process_brace_body (const char *p, const char *atom, const char *end_atom,
invalid:
fatal_error (input_location, "braced spec body %qs is invalid", body);
}
-\f
+
/* Return 0 iff switch number SWITCHNUM is obsoleted by a later switch
on the command line. PREFIX_LENGTH is the length of XXX in an {XXX*}
spec, or -1 if either exact match or %* is used.
@@ -7455,7 +7455,7 @@ check_live_switch (int switchnum, int prefix_length)
switches[switchnum].live_cond |= SWITCH_LIVE;
return 1;
}
-\f
+
/* Pass a switch to the current accumulating command
in the same form that we received it.
SWITCHNUM identifies the switch; it is an index into
@@ -7509,7 +7509,7 @@ give_switch (int switchnum, int omit_first_word)
do_spec_1 (" ", 0, NULL);
switches[switchnum].validated = true;
}
-\f
+
/* Print GCC configuration (e.g. version, thread model, target,
configuration_arguments) to a given FILE. */
@@ -7945,7 +7945,7 @@ set_input (const char *filename)
INPUT_STAT_SET signals that the stat is needed. */
input_stat_set = 0;
}
-\f
+
/* On fatal signals, delete all the temporary files. */
static void
@@ -9243,7 +9243,7 @@ lookup_compiler (const char *name, size_t length, const char *language)
}
return 0;
}
-\f
+
static char *
save_string (const char *s, int len)
{
@@ -9255,7 +9255,7 @@ save_string (const char *s, int len)
return result;
}
-\f
+
static inline void
validate_switches_from_spec (const char *spec, bool user)
{
@@ -9373,7 +9373,7 @@ next_member:
return p;
#undef SKIP_WHITE
}
-\f
+
struct mdswitchstr
{
const char *str;
@@ -10128,7 +10128,7 @@ print_multilib_info (void)
++p;
}
}
-\f
+
/* getenv built-in spec function.
Returns the value of the environment variable given by its first argument,
@@ -10510,9 +10510,9 @@ static unsigned HOST_WIDE_INT
get_random_number (void)
{
unsigned HOST_WIDE_INT ret = 0;
- int fd;
+ int fd;
- fd = open ("/dev/urandom", O_RDONLY);
+ fd = open ("/dev/urandom", O_RDONLY);
if (fd >= 0)
{
read (fd, &ret, sizeof (HOST_WIDE_INT));
@@ -10943,16 +10943,16 @@ whitespace_to_convert_p (char c, void *)
return (c == ' ' || c == '\t');
}
-/* Insert backslash before spaces in ORIG (usually a file path), to
+/* Insert backslash before spaces in ORIG (usually a file path), to
avoid being broken by spec parser.
This function is needed as do_spec_1 treats white space (' ' and '\t')
as the end of an argument. But in case of -plugin /usr/gcc install/xxx.so,
the file name should be treated as a single argument rather than being
- broken into multiple. Solution is to insert '\\' before the space in a
+ broken into multiple. Solution is to insert '\\' before the space in a
file name.
-
- This function converts and only converts all occurrence of ' '
+
+ This function converts and only converts all occurrence of ' '
to '\\' + ' ' and '\t' to '\\' + '\t'. For example:
"a b" -> "a\\ b"
"a b" -> "a\\ \\ b"
diff --git a/gcc/gcov-dump.cc b/gcc/gcov-dump.cc
index 20e464022dc..1c1e3d10cfc 100644
--- a/gcc/gcov-dump.cc
+++ b/gcc/gcov-dump.cc
@@ -324,7 +324,7 @@ tag_function (const char *filename ATTRIBUTE_UNUSED,
if (gcov_position () - pos < (gcov_position_t) length)
{
const char *name;
-
+
name = gcov_read_string ();
printf (", `%s'", name ? name : "NULL");
unsigned artificial = gcov_read_unsigned ();
@@ -379,7 +379,7 @@ tag_arcs (const char *filename ATTRIBUTE_UNUSED,
if (flags)
{
char c = '(';
-
+
if (flags & GCOV_ARC_ON_TREE)
printf ("%ctree", c), c = ',';
if (flags & GCOV_ARC_FAKE)
diff --git a/gcc/gcov-io.cc b/gcc/gcov-io.cc
index 6728b01c78e..0c0baa2294c 100644
--- a/gcc/gcov-io.cc
+++ b/gcc/gcov-io.cc
@@ -85,7 +85,7 @@ gcov_is_error (void)
GCOV_LINKAGE inline void
gcov_rewrite (void)
{
- gcov_var.mode = -1;
+ gcov_var.mode = -1;
gcov_var.error = GCOV_FILE_NO_ERROR;
fseek (gcov_var.file, 0L, SEEK_SET);
}
diff --git a/gcc/gcov.cc b/gcc/gcov.cc
index 2ec7248cc0e..f083535ce1e 100644
--- a/gcc/gcov.cc
+++ b/gcc/gcov.cc
@@ -912,7 +912,7 @@ main (int argc, char **argv)
return return_code;
}
-\f
+
/* Print a usage message and exit. If ERROR_P is nonzero, this is an error,
otherwise the output of --help. */
@@ -2407,7 +2407,7 @@ find_exception_blocks (function_info *fn)
}
}
}
-\f
+
/* Increment totals in COVERAGE according to arc ARC. */
diff --git a/gcc/gcse-common.cc b/gcc/gcse-common.cc
index 544a7d219cb..937e5d64e43 100644
--- a/gcc/gcse-common.cc
+++ b/gcc/gcse-common.cc
@@ -15,7 +15,7 @@
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
- <http://www.gnu.org/licenses/>.
+ <http://www.gnu.org/licenses/>.
It is expected that more hunks of gcse.cc and postreload-gcse.cc should
migrate into this file. */
@@ -97,7 +97,7 @@ record_last_mem_set_info_common (rtx_insn *insn,
/* For each block, compute whether X is transparent. X is either an
expression or an assignment [though we don't care which, for this context
an assignment is treated as an expression]. For each block where an
- element of X is modified, reset the INDX bit in BMAP.
+ element of X is modified, reset the INDX bit in BMAP.
BLOCKS_WITH_CALLS indicates which blocks contain CALL_INSNs which kill
memory.
diff --git a/gcc/gcse.cc b/gcc/gcse.cc
index 72832736572..c86a2fd81f3 100644
--- a/gcc/gcse.cc
+++ b/gcc/gcse.cc
@@ -237,7 +237,7 @@ along with GCC; see the file COPYING3. If not see
doesn't have this problem as much as it computes the reaching defs of
each register in each block and thus can try to use an existing
register. */
-\f
+
/* GCSE global vars. */
struct target_gcse default_target_gcse;
@@ -412,13 +412,13 @@ static int bytes_used;
static int gcse_subst_count;
/* Number of copy instructions created. */
static int gcse_create_count;
-\f
+
/* Doing code hoisting. */
static bool doing_code_hoisting_p = false;
-\f
+
/* For available exprs */
static sbitmap *ae_kill;
-\f
+
/* Data stored for each basic block. */
struct bb_data
{
@@ -442,7 +442,7 @@ static basic_block curr_bb;
/* Current register pressure for each pressure class. */
static int curr_reg_pressure[N_REG_CLASSES];
-\f
+
static void compute_can_copy (void);
static void *gmalloc (size_t) ATTRIBUTE_MALLOC;
@@ -525,7 +525,7 @@ static void free_modify_mem_tables (void);
#define GOBNEW(T) ((T *) gcse_alloc (sizeof (T)))
#define GOBNEWVAR(T, S) ((T *) gcse_alloc ((S)))
-\f
+
/* Misc. utilities. */
#define can_copy \
@@ -577,7 +577,7 @@ can_copy_p (machine_mode mode)
return can_copy[mode] != 0;
}
-\f
+
/* Cover function to xmalloc to record bytes allocated. */
static void *
@@ -637,7 +637,7 @@ free_gcse_mem (void)
BITMAP_FREE (modify_mem_list_set);
BITMAP_FREE (blocks_with_calls);
}
-\f
+
/* Compute the local properties of each recorded expression.
Local properties are those that are defined by the block, irrespective of
@@ -728,7 +728,7 @@ compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc,
}
}
}
-\f
+
/* Hash table support. */
struct reg_avail_info
@@ -1596,7 +1596,7 @@ compute_hash_table (struct gcse_hash_table_d *table)
compute_hash_table_work (table);
}
-\f
+
/* Expression tracking support. */
/* Clear canon_modify_mem_list and modify_mem_list tables. */
@@ -1626,7 +1626,7 @@ free_modify_mem_tables (void)
modify_mem_list = 0;
canon_modify_mem_list = 0;
}
-\f
+
/* Compute PRE+LCM working variables. */
/* Local properties of expressions. */
@@ -1797,7 +1797,7 @@ prune_expressions (bool pre_p)
make the existing occurrences of expressions fully redundant. This
routine examines the set of insertions and deletions and if the ratio
of insertions to deletions is too high for a particular expression, then
- the expression is removed from the insertion/deletion sets.
+ the expression is removed from the insertion/deletion sets.
N_ELEMS is the number of elements in the hash table. */
@@ -1894,7 +1894,7 @@ compute_pre_data (void)
return edge_list;
}
-\f
+
/* PRE utilities */
/* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
@@ -1968,7 +1968,7 @@ pre_expr_reaches_here_p (basic_block occr_bb, struct gcse_expr *expr, basic_bloc
free (visited);
return rval;
}
-\f
+
/* Generate RTL to copy an EXP to REG and return it. */
rtx_insn *
@@ -2392,7 +2392,7 @@ single_set_gcse (rtx_insn *insn)
{
struct set_data s;
rtx pattern;
-
+
gcc_assert (INSN_P (insn));
/* Optimize common case. */
@@ -2628,7 +2628,7 @@ one_pre_gcse_pass (void)
return changed;
}
-\f
+
/* If X contains any LABEL_REF's, add REG_LABEL_OPERAND notes for them
to INSN. If such notes are added to an insn which references a
CODE_LABEL, the LABEL_NUSES count is incremented. We have to add
@@ -2793,10 +2793,10 @@ compute_code_hoist_data (void)
instruction FROM, if live ranges of inputs are shrunk. Also
maintain live_in information if live range of register referred
in FROM is shrunk.
-
+
Return 0 if register pressure doesn't change, otherwise return
the number by which register pressure is decreased.
-
+
NOTE: Register pressure won't be increased in this function. */
static int
@@ -2990,7 +2990,7 @@ should_hoist_expr_to_dom (basic_block expr_bb, struct gcse_expr *expr,
return (pred == NULL);
}
-\f
+
/* Find occurrence in BB. */
static struct gcse_occr *
@@ -3563,7 +3563,7 @@ one_code_hoisting_pass (void)
return changed;
}
-\f
+
/* Here we provide the things required to do store motion towards the exit.
In order for this to be effective, gcse also needed to be taught how to
move a load when it is killed only by a store to itself.
@@ -3695,7 +3695,7 @@ find_rtx_in_ldst (rtx x)
return NULL;
return *slot;
}
-\f
+
/* Load Motion for loads which only kill themselves. */
/* Return true if x, a MEM, is a simple access with no side effects.
@@ -3954,7 +3954,7 @@ update_ld_motion_stores (struct gcse_expr * expr)
}
}
}
-\f
+
/* Return true if the graph is too expensive to optimize. PASS is the
optimization about to be performed. */
@@ -3964,7 +3964,7 @@ gcse_or_cprop_is_too_expensive (const char *pass)
unsigned HOST_WIDE_INT memory_request
= ((unsigned HOST_WIDE_INT)n_basic_blocks_for_fn (cfun)
* SBITMAP_SET_SIZE (max_reg_num ()) * sizeof (SBITMAP_ELT_TYPE));
-
+
/* Trying to perform global optimizations on flow graphs which have
a high connectivity will take a long time and is unlikely to be
particularly useful.
@@ -3999,7 +3999,7 @@ gcse_or_cprop_is_too_expensive (const char *pass)
return false;
}
-\f
+
static unsigned int
execute_rtl_pre (void)
{
diff --git a/gcc/genattrtab.cc b/gcc/genattrtab.cc
index a5f7c0b8764..fb3dd3d3e8e 100644
--- a/gcc/genattrtab.cc
+++ b/gcc/genattrtab.cc
@@ -4781,7 +4781,7 @@ write_const_num_delay_slots (FILE *outf)
fprintf (outf, " }\n}\n\n");
}
}
-\f
+
/* Synthetic attributes used by insn-automata.cc and the scheduler.
These are primarily concerned with (define_insn_reservation)
patterns. */
@@ -5379,7 +5379,7 @@ main (int argc, const char **argv)
if (startswith(attr->name, "*internal_dfa_insn_code"))
outf = dfa_file;
else if (startswith (attr->name, "*insn_default_latency"))
- outf = latency_file;
+ outf = latency_file;
else
outf = attr_file;
diff --git a/gcc/genautomata.cc b/gcc/genautomata.cc
index bf2dcdf2967..da285467798 100644
--- a/gcc/genautomata.cc
+++ b/gcc/genautomata.cc
@@ -207,12 +207,12 @@ static pos_t no_pos = 0;
/* All IR is stored in the following obstack. */
static struct obstack irp;
-\f
+
/* Declare vector types for various data structures: */
typedef vec<vect_el_t> vla_hwint_t;
-\f
+
/* Forward declarations of functions used before their definitions, only. */
static regexp_t gen_regexp_sequence (const char *);
static void reserv_sets_or (reserv_sets_t, reserv_sets_t,
@@ -225,7 +225,7 @@ static int check_absence_pattern_sets (reserv_sets_t, reserv_sets_t,
static arc_t first_out_arc (const_state_t);
static arc_t next_out_arc (arc_t);
-\f
+
/* Options with the following names can be set up in automata_option
construction. Because the strings occur more one time we use the
@@ -298,7 +298,7 @@ static char *output_description_file_name;
being processed. This is start point of IR. */
static struct description *description;
-\f
+
/* This page contains description of IR structure (nodes). */
@@ -1743,7 +1743,7 @@ gen_insn_reserv (md_rtx_info *info)
decls.safe_push (decl);
}
-\f
+
/* The function evaluates hash value (0..UINT_MAX) of string. */
static unsigned
@@ -1756,7 +1756,7 @@ string_hash (const char *string)
return result;
}
-\f
+
/* This page contains abstract data `table of automaton declarations'.
Elements of the table is nodes representing automaton declarations.
@@ -1856,7 +1856,7 @@ finish_automaton_decl_table (void)
htab_delete (automaton_decl_table);
}
-\f
+
/* This page contains abstract data `table of insn declarations'.
Elements of the table is nodes representing insn declarations. Key
@@ -1955,7 +1955,7 @@ finish_insn_decl_table (void)
htab_delete (insn_decl_table);
}
-\f
+
/* This page contains abstract data `table of declarations'. Elements
of the table is nodes representing declarations (of units and
@@ -2054,7 +2054,7 @@ finish_decl_table (void)
htab_delete (decl_table);
}
-\f
+
/* This page contains checker of pipeline hazard description. */
@@ -3101,7 +3101,7 @@ check_all_description (void)
evaluate_max_reserv_cycles ();
}
-\f
+
/* The page contains abstract data `ticker'. This data is used to
report time of different phases of building automata. It is
@@ -3175,7 +3175,7 @@ print_active_time (FILE *f, ticker_t ticker)
fprintf (f, "%d.%06d", msecs / 1000000, msecs % 1000000);
}
-\f
+
/* The following variable value is number of automaton which are
really being created. This value is defined on the base of
@@ -3210,7 +3210,7 @@ static ticker_t check_time;
static ticker_t generation_time;
static ticker_t all_time;
-\f
+
/* Pseudo insn decl which denotes advancing cycle. */
static decl_t advance_cycle_insn_decl;
@@ -3258,7 +3258,7 @@ special_decl_p (struct insn_reserv_decl *decl)
&& decl == DECL_INSN_RESERV (collapse_ndfa_insn_decl)));
}
-\f
+
/* Abstract data `alternative states' which represents
nondeterministic nature of the description (see comments for
structures alt_state and state). */
@@ -3408,7 +3408,7 @@ finish_alt_states (void)
{
}
-\f
+
/* The page contains macros for work with bits strings. We could use
standard gcc bitmap or sbitmap but it would result in difficulties
@@ -3430,7 +3430,7 @@ finish_alt_states (void)
((bitstring)[(bitno) / (sizeof (*(bitstring)) * CHAR_BIT)] >> \
(bitno) % (sizeof (*(bitstring)) * CHAR_BIT) & 1)
-\f
+
/* This page contains abstract data `state'. */
@@ -3957,7 +3957,7 @@ finish_states (void)
finish_alt_states ();
}
-\f
+
/* Abstract data `arcs'. */
@@ -4079,7 +4079,7 @@ finish_arcs (void)
{
}
-\f
+
/* Abstract data `automata lists'. */
@@ -4227,7 +4227,7 @@ finish_automata_lists (void)
htab_delete (automata_list_table);
}
-\f
+
/* The page contains abstract data for work with exclusion sets (see
exclusion_set in file rtl.def). */
@@ -4307,7 +4307,7 @@ get_excl_set (reserv_sets_t in_set)
return excl_set;
}
-\f
+
/* The page contains abstract data for work with presence/absence
pattern sets (see presence_set/absence_set in file rtl.def). */
@@ -4473,7 +4473,7 @@ check_absence_pattern_sets (reserv_sets_t checked_set,
return TRUE;
}
-\f
+
/* This page contains code for transformation of original reservations
described in .md file. The main goal of transformations is
@@ -5015,7 +5015,7 @@ transform_insn_regexps (void)
ticker_off (&transform_time);
}
-\f
+
/* The following variable value is TRUE if the first annotated message
about units to automata distribution has been output. */
@@ -5334,7 +5334,7 @@ check_unit_distributions_to_automata (void)
fprintf (stderr, "done\n");
}
-\f
+
/* The page contains code for building alt_states (see comments for
IR) describing all possible insns reservations of an automaton. */
@@ -5476,7 +5476,7 @@ create_alt_states (automaton_t automaton)
}
}
-\f
+
/* The page contains major code for building DFA(s) for fast pipeline
hazards recognition. */
@@ -6349,7 +6349,7 @@ build_automaton (automaton_t automaton)
}
}
-\f
+
/* The page contains code for enumeration of all states of an automaton. */
@@ -6375,7 +6375,7 @@ enumerate_states (automaton_t automaton)
automaton->achieved_states_num = curr_state_order_num;
}
-\f
+
/* The page contains code for finding equivalent automaton insns
(ainsns). */
@@ -6509,7 +6509,7 @@ set_insn_equiv_classes (automaton_t automaton)
automaton->insn_equiv_classes_num = equiv_classes_num;
}
-\f
+
/* This page contains code for creating DFA(s) and calls functions
building them. */
@@ -6776,7 +6776,7 @@ create_automata (void)
}
}
-\f
+
/* This page contains code for forming string representation of
regexp. The representation is formed on IR obstack. So you should
@@ -6888,7 +6888,7 @@ finish_regexp_representation (void)
obstack_blank_fast (&irp, -length);
}
-\f
+
/* This page contains code for output PHR (pipeline hazards recognizer). */
@@ -8755,7 +8755,7 @@ output_dfa_finish_func (void)
DFA_FINISH_FUNC_NAME, DFA_INSN_CODES_VARIABLE_NAME);
}
-\f
+
/* The page contains code for output description file (readable
representation of original description and generated DFA(s). */
@@ -9076,7 +9076,7 @@ output_automaton_descriptions (void)
}
}
-\f
+
/* The page contains top level function for generation DFA(s) used for
PHR. */
@@ -9194,7 +9194,7 @@ generate (void)
ticker_off (&automaton_generation_time);
}
-\f
+
/* This page mainly contains top level functions of pipeline hazards
description translator. */
diff --git a/gcc/genchecksum.cc b/gcc/genchecksum.cc
index 1fe39af71af..09449e2613c 100644
--- a/gcc/genchecksum.cc
+++ b/gcc/genchecksum.cc
@@ -106,7 +106,7 @@ main (int argc, char ** argv)
}
md5_init_ctx (&ctx);
- for (i = 1; i < argc; i++)
+ for (i = 1; i < argc; i++)
dosum (&ctx, argv[i]);
md5_finish_ctx (&ctx, result);
diff --git a/gcc/genemit.cc b/gcc/genemit.cc
index 33c9ec05d6f..98c423b6d8b 100644
--- a/gcc/genemit.cc
+++ b/gcc/genemit.cc
@@ -53,7 +53,7 @@ static void output_peephole2_scratches (rtx);
/* True for <X>_optab if that optab isn't allowed to fail. */
static bool nofail_optabs[NUM_OPTABS];
-\f
+
static void
print_code (RTX_CODE code)
{
@@ -297,7 +297,7 @@ gen_emit_seq (rtvec vec, char *used, md_rtx_info *info)
}
}
}
-\f
+
/* Emit the given C code to the output file. The code is allowed to
fail if CAN_FAIL_P. NAME describes what we're generating,
for use in error messages. */
@@ -319,7 +319,7 @@ emit_c_code (const char *code, bool can_fail_p, const char *name)
printf ("#undef DONE\n");
printf ("#undef FAIL\n");
}
-\f
+
/* Generate the `gen_...' function for a DEFINE_INSN. */
static void
@@ -441,7 +441,7 @@ gen_insn (md_rtx_info *info)
printf (";\n}\n\n");
XDELETEVEC (used);
}
-\f
+
/* Generate the `gen_...' function for a DEFINE_EXPAND. */
static void
@@ -639,7 +639,7 @@ gen_split (md_rtx_info *info)
free (used);
}
-\f
+
/* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
the end of the vector. */
@@ -677,7 +677,7 @@ output_add_clobbers (md_rtx_info *info)
printf (" }\n");
printf ("}\n");
}
-\f
+
/* Write a function, `added_clobbers_hard_reg_p' that is given an insn_code
number that will have clobbers added (as indicated by `recog') and returns
1 if those include a clobber of a hard reg or 0 if all of them just clobber
@@ -715,7 +715,7 @@ output_added_clobbers_hard_reg_p (void)
printf (" }\n");
printf ("}\n");
}
-\f
+
/* Generate code to invoke find_free_register () as needed for the
scratch registers used by the peephole2 pattern in SPLIT. */
--git a/gcc/genextract.cc b/gcc/genextract.cc
index 910eee3fe7f..aefbbeb431d 100644
--- a/gcc/genextract.cc
+++ b/gcc/genextract.cc
@@ -183,7 +183,7 @@ gen_insn (md_rtx_info *info)
memcpy (p->duplocs, acc.duplocs.address (), dup_count * sizeof (locstr));
memcpy (p->dupnums, acc.dupnums.address (), dup_count * sizeof (int));
}
-\f
+
/* Helper subroutine of walk_rtx: given a vec<locstr>, an index, and a
string, insert the string at the index, which should either already
exist and be NULL, or not yet exist within the vector. In the latter
@@ -349,7 +349,7 @@ print_path (const char *path)
gcc_unreachable ();
}
}
-\f
+
static void
print_header (void)
{
diff --git a/gcc/gengenrtl.cc b/gcc/gengenrtl.cc
index 68f1bb6a2ed..f589fa630c6 100644
--- a/gcc/gengenrtl.cc
+++ b/gcc/gengenrtl.cc
@@ -40,7 +40,7 @@ static const struct rtx_definition defs[] =
#define NUM_RTX_CODE ARRAY_SIZE (defs)
static const char *formats[NUM_RTX_CODE];
-\f
+
/* Decode a format letter into a C type string. */
static const char *
diff --git a/gcc/gengtype-parse.cc b/gcc/gengtype-parse.cc
index 2b2156c5f45..92edbe919e5 100644
--- a/gcc/gengtype-parse.cc
+++ b/gcc/gengtype-parse.cc
@@ -138,7 +138,7 @@ parse_error (const char *msg, ...)
{
va_list ap;
- fprintf (stderr, "%s:%d: parse error: ",
+ fprintf (stderr, "%s:%d: parse error: ",
get_input_file_name (lexer_line.file), lexer_line.line);
va_start (ap, msg);
@@ -455,7 +455,7 @@ consume_until_comma_or_eos ()
break;
}
}
-\f
+
/* GTY(()) option handling. */
static type_p type (options_p *optsp, bool nested);
@@ -603,7 +603,7 @@ gtymarker_opt (void)
}
-\f
+
/* Declarators. The logic here is largely lifted from c-parser.cc.
Note that we do not have to process abstract declarators, which can
appear only in parameter type lists or casts (but see absdecl,
@@ -776,7 +776,7 @@ declarator (type_p ty, const char **namep, options_p *optsp,
}
return direct_declarator (ty, namep, optsp, in_struct);
}
-\f
+
/* Types and declarations. */
/* Structure field(s) declaration:
@@ -1053,7 +1053,7 @@ type (options_p *optsp, bool nested)
return create_scalar_type ("erroneous type");
}
}
-\f
+
/* Top level constructs. */
/* Dispatch declarations beginning with 'typedef'. */
diff --git a/gcc/gengtype-state.cc b/gcc/gengtype-state.cc
index 4bba37f718f..32611b498fd 100644
--- a/gcc/gengtype-state.cc
+++ b/gcc/gengtype-state.cc
@@ -280,15 +280,15 @@ state_writer::state_writer ()
/* Fatal message while reading state. */
-static void
+static void
fatal_reading_state (struct state_token_st* tok, const char*msg)
{
if (tok)
fatal ("%s:%d:%d: Invalid state file; %s",
- tok->stok_file, tok->stok_line, tok->stok_col,
- msg);
+ tok->stok_file, tok->stok_line, tok->stok_col,
+ msg);
else
- fatal ("%s:%d: Invalid state file; %s",
+ fatal ("%s:%d: Invalid state file; %s",
state_path, state_line, msg);
}
@@ -363,7 +363,7 @@ read_a_state_token (void)
goto again;
/* Skip comments starting with semi-colon. */
if (c == ';')
- {
+ {
do
{
c = getc (state_file);
@@ -1401,7 +1401,7 @@ write_state (const char *state_path)
progname, state_path, statelen, sw.m_state_written_type_count);
}
-\f
+
/** End of writing routines! The corresponding reading routines follow. **/
@@ -2366,7 +2366,7 @@ read_state_structures (type_p *structures)
else
fatal_reading_state (t0, "Bad structures syntax");
if (countstruct != nbstruct)
- fatal_reading_state_printf (NULL_STATE_TOKEN,
+ fatal_reading_state_printf (NULL_STATE_TOKEN,
"expected %d structures but got %d",
nbstruct, countstruct);
if (verbosity_level >= 2)
diff --git a/gcc/gengtype.cc b/gcc/gengtype.cc
index 7763f40e9ab..81a3d56d86f 100644
--- a/gcc/gengtype.cc
+++ b/gcc/gengtype.cc
@@ -91,7 +91,7 @@ static const char *get_file_langdir (const input_file *);
static void dump_pair (int indent, pair_p p);
static void dump_type (int indent, type_p p);
static void dump_type_list (int indent, type_p p);
-\f
+
/* Nonzero iff an error has occurred. */
bool hit_error = false;
@@ -118,7 +118,7 @@ error_at_line (const struct fileloc *pos, const char *msg, ...)
va_end (ap);
}
-\f
+
/* Locate the ultimate base class of struct S. */
static const_type_p
@@ -136,7 +136,7 @@ get_ultimate_base_class (type_p s)
s = s->u.s.base_class;
return s;
}
-\f
+
/* Input file handling. */
/* Table of all input files. */
@@ -481,7 +481,7 @@ read_input_list (const char *listname)
fclose (list);
}
-\f
+
/* The one and only TYPE_STRING. */
@@ -1022,18 +1022,18 @@ create_optional_field_ (pair_p next, type_p type, const char *name,
The field has a tag of "1". This allows us to make the presence
of a field of type TYPE depend on some boolean "desc" being true. */
union_fields = create_field (NULL, type, "");
- union_fields->opt =
+ union_fields->opt =
create_string_option (union_fields->opt, "dot", "");
- union_fields->opt =
+ union_fields->opt =
create_string_option (union_fields->opt, "tag", "1");
- union_type =
+ union_type =
new_structure (xasprintf ("%s_%d", "fake_union", id++), TYPE_UNION,
&lexer_line, union_fields, NULL, NULL);
/* Create the field and give it the new fake union type. Add a "desc"
tag that specifies the condition under which the field is valid. */
return create_field_all (next, union_type, name,
- create_string_option (0, "desc", cond),
+ create_string_option (0, "desc", cond),
this_file, line);
}
@@ -1053,7 +1053,7 @@ nreverse_pairs (pair_p list)
}
return prev;
}
-\f
+
/* We don't care how long a CONST_DOUBLE is. */
#define CONST_DOUBLE_FORMAT "ww"
@@ -1173,9 +1173,9 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
rtvec_tp = create_pointer (find_structure ("rtvec_def", TYPE_STRUCT));
tree_tp = create_pointer (find_structure ("tree_node", TYPE_UNION));
mem_attrs_tp = create_pointer (find_structure ("mem_attrs", TYPE_STRUCT));
- reg_attrs_tp =
+ reg_attrs_tp =
create_pointer (find_structure ("reg_attrs", TYPE_STRUCT));
- basic_block_tp =
+ basic_block_tp =
create_pointer (find_structure ("basic_block_def", TYPE_STRUCT));
constant_tp =
create_pointer (find_structure ("constant_descriptor_rtx", TYPE_STRUCT));
@@ -1211,10 +1211,10 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
/* NOTE_INSN_MAX is used as the default field for line
number notes. */
if (c == NOTE_INSN_MAX)
- note_flds->opt =
+ note_flds->opt =
create_string_option (nodot, "default", "");
else
- note_flds->opt =
+ note_flds->opt =
create_string_option (nodot, "tag", note_insn_name[c]);
}
note_union_tp = new_structure ("rtx_def_note_subunion", TYPE_UNION,
@@ -1292,7 +1292,7 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
t = rtx_tp, subname = "rt_rtx";
else
{
- error_at_line
+ error_at_line
(&lexer_line,
"rtx type `%s' has `0' in position %lu, can't handle",
rtx_name[i], (unsigned long) aindex);
@@ -1351,7 +1351,7 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
create_string_option (subfields->opt, "desc",
"NOTE_KIND (&%0)");
if (t == symbol_union_tp)
- subfields->opt =
+ subfields->opt =
create_string_option (subfields->opt, "desc",
"CONSTANT_POOL_ADDRESS_P (&%0)");
}
@@ -1432,7 +1432,7 @@ adjust_field_type (type_p t, options_p opt)
return t;
}
-\f
+
static void set_gc_used_type (type_p, enum gc_used_enum, bool = false);
static void set_gc_used (pair_p);
@@ -1584,7 +1584,7 @@ set_gc_used (pair_p variables)
if (verbosity_level >= 2)
printf ("%s used %d GTY-ed variables\n", progname, nbvars);
}
-\f
+
/* File mapping routines. For each input file, there is one output .cc file
(but some output files have many input files), and there is one .h file
for the whole build. */
@@ -2151,7 +2151,7 @@ get_output_file_with_visibility (input_file *inpf)
{
size_t i;
for (i = 0; i < nb_plugin_files; i++)
- if (inpf == plugin_files[i])
+ if (inpf == plugin_files[i])
{
inpf->inpoutf = plugin_output;
return plugin_output;
@@ -2359,8 +2359,8 @@ close_output_files (void)
printf ("%s write #%-3d %s\n", progname, nbwrittenfiles, of->name);
free (backupname);
}
- else
- {
+ else
+ {
/* output file remains unchanged. */
if (verbosity_level >= 2)
printf ("%s keep %s\n", progname, of->name);
@@ -2372,7 +2372,7 @@ close_output_files (void)
if (verbosity_level >= 1)
printf ("%s wrote %d files.\n", progname, nbwrittenfiles);
}
-\f
+
struct flist
{
struct flist *next;
@@ -2671,7 +2671,7 @@ walk_type (type_p t, struct walk_type_data *d)
maybe_undef_p = 1;
else if (strcmp (oo->name, "desc") == 0 && oo->kind == OPTION_STRING)
desc = oo->info.string;
- else if (strcmp (oo->name, "nested_ptr") == 0
+ else if (strcmp (oo->name, "nested_ptr") == 0
&& oo->kind == OPTION_NESTED)
nested_ptr_d = (const struct nested_ptr_data *) oo->info.nested;
else if (strcmp (oo->name, "dot") == 0)
@@ -3074,7 +3074,7 @@ walk_type (type_p t, struct walk_type_data *d)
{
fprintf (stderr,
"%s:%d: warning: field `%s' is missing `tag' or `default' option\n",
- get_input_file_name (d->line->file), d->line->line,
+ get_input_file_name (d->line->file), d->line->line,
f->name);
continue;
}
@@ -4520,7 +4520,7 @@ write_roots (pair_p variables, bool emit_pch)
for (v = variables; v; v = v->next)
{
- outf_p f =
+ outf_p f =
get_output_file_with_visibility (CONST_CAST (input_file*,
v->line.file));
struct flist *fli;
@@ -4824,7 +4824,7 @@ dump_options (int indent, options_p opt)
static void
dump_fileloc (int indent, struct fileloc line)
{
- printf ("%*cfileloc: file = %s, line = %d\n", indent, ' ',
+ printf ("%*cfileloc: file = %s, line = %d\n", indent, ' ',
get_input_file_name (line.file),
line.line);
}
@@ -4989,7 +4989,7 @@ dump_everything (void)
/* Allocated with the first call to dump_type. */
htab_delete (seen_types);
}
-\f
+
/* Option specification for getopt_long. */
@@ -5126,7 +5126,7 @@ parse_program_options (int argc, char **argv)
}
-\f
+
/******* Manage input files. ******/
/* Hash table of unique input file names. */
@@ -5266,7 +5266,7 @@ main (int argc, char **argv)
num_build_headers++;
}
if (verbosity_level >= 1)
- printf ("%s parsed %d files with %d GTY types\n",
+ printf ("%s parsed %d files with %d GTY types\n",
progname, (int) num_gt_files, type_count);
DBGPRINT_COUNT_TYPE ("structures after parsing", structures);
@@ -5337,7 +5337,7 @@ main (int argc, char **argv)
DBGPRINT_COUNT_TYPE ("structures before write_state", structures);
if (hit_error)
- fatal ("didn't write state file %s after errors",
+ fatal ("didn't write state file %s after errors",
write_state_filename);
DBGPRINTF ("before write_state %s", write_state_filename);
diff --git a/gcc/gengtype.h b/gcc/gengtype.h
index 03264feb623..0fca7b729eb 100644
--- a/gcc/gengtype.h
+++ b/gcc/gengtype.h
@@ -31,7 +31,7 @@ typedef unsigned lang_bitmap;
/* Variable length structure representing an input file. A hash table
ensure uniqueness for a given input file name. The only function
allocating input_file-s is input_file_by_name. */
-struct input_file_st
+struct input_file_st
{
struct outf* inpoutf; /* Cached corresponding output file, computed
in get_output_file_with_visibility. */
@@ -362,10 +362,10 @@ union_or_struct_p (const_type_p x)
}
/* Give the file location of a type, if any. */
-static inline struct fileloc*
+static inline struct fileloc*
type_fileloc (type_p t)
{
- if (!t)
+ if (!t)
return NULL;
if (union_or_struct_p (t))
return &t->u.s.line;
diff --git a/gcc/genhooks.cc b/gcc/genhooks.cc
index 0d4b13b7a71..3f72e4827d0 100644
--- a/gcc/genhooks.cc
+++ b/gcc/genhooks.cc
@@ -67,7 +67,7 @@ s_hook_hash (const void *p)
static int
s_hook_eq_p (const void *p1, const void *p2)
{
- return (strcmp (((const struct s_hook *) p1)->name,
+ return (strcmp (((const struct s_hook *) p1)->name,
((const struct s_hook *) p2)->name) == 0);
}
@@ -198,7 +198,7 @@ emit_documentation (const char *in_fname)
if (i != shp->pos)
printf ("\n\n");
- /* Print header. Function-valued hooks have a parameter list,
+ /* Print header. Function-valued hooks have a parameter list,
unlike POD-valued ones. */
deftype = hook_array[i].param ? "deftypefn" : "deftypevr";
printf ("@%s {%s} ", deftype, hook_array[i].docname);
diff --git a/gcc/genmatch.cc b/gcc/genmatch.cc
index fb9e37ae434..c4ea9bd6839 100644
--- a/gcc/genmatch.cc
+++ b/gcc/genmatch.cc
@@ -1132,7 +1132,7 @@ lower_opt (operand *o, unsigned char grp, bool strip)
return ne;
}
-/* Determine whether O or its children uses the conditional operation
+/* Determine whether O or its children uses the conditional operation
group GRP. */
static bool
@@ -3766,7 +3766,7 @@ decision_tree::gen (FILE *f, bool gimple)
fprintf (stderr, "%s decision tree has %u leafs, maximum depth %u and "
"a total number of %u nodes\n",
- gimple ? "GIMPLE" : "GENERIC",
+ gimple ? "GIMPLE" : "GENERIC",
root->num_leafs, root->max_level, root->total_size);
/* First split out the transform part of equal leafs. */
@@ -4807,7 +4807,7 @@ parser::parse_for (location_t)
else
fatal_at (token, "iterator cannot be used as operator-list");
}
- else
+ else
op->substitutes.safe_push (idb);
}
op->nargs = arity;
@@ -4870,7 +4870,7 @@ parser::parse_for (location_t)
void
parser::parse_operator_list (location_t)
{
- const cpp_token *token = peek ();
+ const cpp_token *token = peek ();
const char *id = get_ident ();
if (get_operator (id, true) != 0)
@@ -4878,13 +4878,13 @@ parser::parse_operator_list (location_t)
user_id *op = new user_id (id, true);
int arity = -1;
-
+
while ((token = peek_ident ()) != 0)
{
- token = peek ();
+ token = peek ();
const char *oper = get_ident ();
id_base *idb = get_operator (oper, true);
-
+
if (idb == 0)
fatal_at (token, "no such operator '%s'", oper);
diff --git a/gcc/genmddump.cc b/gcc/genmddump.cc
index 68fbd2778a2..0cdd9614f44 100644
--- a/gcc/genmddump.cc
+++ b/gcc/genmddump.cc
@@ -34,7 +34,7 @@
#include "read-md.h"
#include "gensupport.h"
-\f
+
extern int main (int, const char **);
int
diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc
index 2d418f09aab..99f2f36c92c 100644
--- a/gcc/genmodes.cc
+++ b/gcc/genmodes.cc
@@ -1016,8 +1016,8 @@ emit_max_int (void)
puts ("");
- printf ("#define BITS_PER_UNIT (%d)\n", bits_per_unit);
-
+ printf ("#define BITS_PER_UNIT (%d)\n", bits_per_unit);
+
if (max_bitsize_mode_any_int == 0)
{
for (max = 1, i = modes[MODE_INT]; i; i = i->next)
diff --git a/gcc/genopinit.cc b/gcc/genopinit.cc
index 83cb7504fa1..1ce4b9f7ab7 100644
--- a/gcc/genopinit.cc
+++ b/gcc/genopinit.cc
@@ -250,7 +250,7 @@ main (int argc, const char **argv)
fprintf (h_file, "#define NUM_OPTAB_PATTERNS %u\n",
(unsigned) patterns.length ());
- fprintf (h_file,
+ fprintf (h_file,
"typedef enum optab_tag optab;\n"
"typedef enum optab_tag convert_optab;\n"
"typedef enum optab_tag direct_optab;\n"
diff --git a/gcc/genoutput.cc b/gcc/genoutput.cc
index 163e8dfef4c..b3e382c5a03 100644
--- a/gcc/genoutput.cc
+++ b/gcc/genoutput.cc
@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. If not see
assuming it is the 25th entry present, would cause
insn_data[24].template to be "clrd %0", and
insn_data[24].n_operands to be 1. */
-\f
+
#include "bconfig.h"
#include "system.h"
#include "coretypes.h"
@@ -167,7 +167,7 @@ static class data *idata;
everything relevant from the machien description is appended to. */
static class data **idata_end;
-\f
+
static void output_prologue (void);
static void output_operand_data (void);
static void output_insn_data (void);
@@ -198,7 +198,7 @@ constraints_by_letter_table[1 << CHAR_BIT];
static int mdep_constraint_len (const char *, file_location, int);
static void note_constraint (md_rtx_info *);
-\f
+
static void
output_prologue (void)
{
@@ -416,7 +416,7 @@ output_get_insn_name (void)
printf ("}\n");
}
-\f
+
/* Stores the operand data into `d->operand[i]'.
THIS_ADDRESS_P is nonzero if the containing rtx was an ADDRESS.
@@ -613,7 +613,7 @@ place_operands (class data *d)
return;
}
-\f
+
/* Process an assembler template from a define_insn or a define_peephole.
It is either the assembler code template, a list of assembler code
templates, or C code to generate the assembler code template. */
@@ -738,7 +738,7 @@ process_template (class data *d, const char *template_code)
d->output_format = INSN_OUTPUT_FORMAT_SINGLE;
}
}
-\f
+
/* Check insn D for consistency in number of constraint alternatives. */
static void
@@ -861,7 +861,7 @@ validate_optab_operands (class data *d)
have_error = 1;
}
}
-\f
+
/* Look at a define_insn just read. Assign its code number. Record
on idata the template and the number of arguments. If the insn has
a hairy output action, output a function for now. */
@@ -903,7 +903,7 @@ gen_insn (md_rtx_info *info)
place_operands (d);
process_template (d, XTMPL (insn, 3));
}
-\f
+
/* Look at a define_peephole just read. Assign its code number.
Record on idata the template and the number of arguments.
If the insn has a hairy output action, output it now. */
@@ -943,7 +943,7 @@ gen_peephole (md_rtx_info *info)
place_operands (d);
process_template (d, XTMPL (peep, 2));
}
-\f
+
/* Process a define_expand just read. Assign its code number,
only for the purposes of `insn_gen_function'. */
@@ -988,7 +988,7 @@ gen_expand (md_rtx_info *info)
validate_optab_operands (d);
place_operands (d);
}
-\f
+
static void
init_insn_for_nothing (void)
{
diff --git a/gcc/genpeep.cc b/gcc/genpeep.cc
index a2b6f5e1992..26109d9789a 100644
--- a/gcc/genpeep.cc
+++ b/gcc/genpeep.cc
@@ -49,7 +49,7 @@ static int n_operands;
static void match_rtx (rtx, struct link *, int);
static void print_path (struct link *);
static void print_code (RTX_CODE);
-\f
+
static void
gen_peephole (md_rtx_info *info)
{
@@ -113,7 +113,7 @@ gen_peephole (md_rtx_info *info)
printf (" L%d:\n\n", info->index);
}
-\f
+
static void
match_rtx (rtx x, struct link *path, int fail_label)
{
@@ -334,7 +334,7 @@ print_path (struct link *path)
printf (", %d)", path->pos);
}
}
-\f
+
static void
print_code (RTX_CODE code)
{
diff --git a/gcc/genpreds.cc b/gcc/genpreds.cc
index bdd65ef7d7a..19a54c07481 100644
--- a/gcc/genpreds.cc
+++ b/gcc/genpreds.cc
@@ -656,7 +656,7 @@ write_one_predicate_function (struct pred_data *p)
write_predicate_stmts (p->exp);
fputs ("}\n\n", stdout);
}
-\f
+
/* Constraints fall into two categories: register constraints
(define_register_constraint), and others (define_constraint,
define_memory_constraint, define_special_memory_constraint,
@@ -1319,7 +1319,7 @@ write_insn_const_int_ok_for_constraint (void)
" return false;\n"
"}\n");
}
-\f
+
/* Write a definition for a function NAME that returns true if a given
constraint_num is in the range [START, END). */
static void
diff --git a/gcc/genrecog.cc b/gcc/genrecog.cc
index 6dd375da5e3..c8d14d1f1cb 100644
--- a/gcc/genrecog.cc
+++ b/gcc/genrecog.cc
@@ -260,7 +260,7 @@ static unsigned int num_positions = 1;
/* A list of all POS_PEEP2_INSNs. The entry for insn 0 is the root position,
since we are given that instruction's pattern as x0. */
static struct position *peep2_insn_pos_list = &root_pos;
-\f
+
/* Return a position with the given BASE, TYPE and ARG. NEXT_PTR
points to where the unique object that represents the position
should be stored. Create the object if it doesn't already exist,
@@ -343,7 +343,7 @@ common_position (struct position *pos1, struct position *pos2)
}
return pos1;
}
-\f
+
/* Search for and return operand N, stop when reaching node STOP. */
static rtx
@@ -809,7 +809,7 @@ validate_pattern (rtx pattern, md_rtx_info *info, rtx set, int set_code)
}
}
}
-\f
+
/* Simple list structure for items of type T, for use when being part
of a list is an inherent property of T. T must have members equivalent
to "T *prev, *next;" and a function "void set_parent (list_head <T> *)"
@@ -946,7 +946,7 @@ list_head <T>::singleton () const
{
return first == last ? first : 0;
}
-\f
+
class state;
/* Describes a possible successful return from a routine. */
diff --git a/gcc/gensupport.cc b/gcc/gensupport.cc
index f9efc6eb757..909066662f7 100644
--- a/gcc/gensupport.cc
+++ b/gcc/gensupport.cc
@@ -129,7 +129,7 @@ typedef const char * (*constraints_handler_t) (const char *, int);
static rtx alter_constraints (rtx, int, constraints_handler_t);
static rtx adjust_operands_numbers (rtx);
static rtx replace_duplicating_operands_in_pattern (rtx);
-\f
+
/* Make a version of gen_rtx_CONST_INT so that GEN_INT can be used in
the gensupport programs. */
@@ -158,7 +158,7 @@ add_implicit_parallel (rtvec vec)
return pattern;
}
}
-\f
+
/* Predicate handling.
We construct from the machine description a table mapping each
@@ -396,7 +396,7 @@ process_define_predicate (rtx desc, file_location loc)
#undef I
#undef N
#undef Y
-\f
+
/* Queue PATTERN on LIST_TAIL. Return the address of the new queue
element. */
@@ -644,7 +644,7 @@ process_rtx (rtx desc, file_location loc)
break;
}
}
-\f
+
/* Return true if attribute PREDICABLE is true for ELEM, which holds
a DEFINE_INSN. */
@@ -2302,7 +2302,7 @@ process_define_subst (void)
process_substs_on_one_elem (elem, other_queue);
}
}
-\f
+
/* A subclass of rtx_reader which reads .md files and calls process_rtx on
the top-level elements. */
@@ -2630,7 +2630,7 @@ init_rtx_reader_args (int argc, const char **argv)
{
return init_rtx_reader_args_cb (argc, argv, 0);
}
-\f
+
/* Try to read a single rtx from the file. Return true on success,
describing it in *INFO. */
@@ -2991,7 +2991,7 @@ init_predicate_table (void)
add_predicate (pred);
}
}
-\f
+
/* These functions allow linkage with print-rtl.cc. Also, some generators
like to annotate their output with insn names. */
@@ -3038,7 +3038,7 @@ record_insn_name (int code, const char *name)
insn_name_ptr[code] = new_name;
}
-\f
+
/* Make STATS describe the operands that appear in rtx X. */
static void
diff --git a/gcc/ggc-common.cc b/gcc/ggc-common.cc
index db317f49993..486f2ab77f1 100644
--- a/gcc/ggc-common.cc
+++ b/gcc/ggc-common.cc
@@ -209,7 +209,7 @@ ggc_print_common_statistics (FILE *stream ATTRIBUTE_UNUSED,
/* Don't gather statistics any more. */
ggc_stats = NULL;
}
-\f
+
/* Functions for saving and restoring GCable memory to disk. */
struct ptr_data
diff --git a/gcc/ggc-page.cc b/gcc/ggc-page.cc
index c25218d7415..6666e252873 100644
--- a/gcc/ggc-page.cc
+++ b/gcc/ggc-page.cc
@@ -90,7 +90,7 @@ along with GCC; see the file COPYING3. If not see
3: Object allocations as well.
4: Object marks as well. */
#define GGC_DEBUG_LEVEL (0)
-\f
+
/* A two-level tree is used to look up the page-entry for a given
pointer. Two chunks of the pointer's bits are extracted to index
the first and second levels of the tree, as follows:
@@ -515,7 +515,7 @@ static bool in_gc = false;
/* Initial guess as to how many page table entries we might need. */
#define INITIAL_PTE_COUNT 128
-\f
+
static page_entry *lookup_page_table_entry (const void *);
static void set_page_table_entry (void *, page_entry *);
#ifdef USING_MMAP
@@ -1026,7 +1026,7 @@ release_pages (void)
/* First free larger continuous areas to the OS.
This allows other allocators to grab these areas if needed.
- This is only done on larger chunks to avoid fragmentation.
+ This is only done on larger chunks to avoid fragmentation.
This does not always work because the free_pages list is only
approximately sorted. */
@@ -1067,7 +1067,7 @@ release_pages (void)
prev = newprev;
}
- /* Now give back the fragmented pages to the OS, but keep the address
+ /* Now give back the fragmented pages to the OS, but keep the address
space to reuse it next time. */
for (p = G.free_pages; p; )
@@ -1087,7 +1087,7 @@ release_pages (void)
p = p->next;
}
/* Give the page back to the kernel, but don't free the mapping.
- This avoids fragmentation in the virtual memory map of the
+ This avoids fragmentation in the virtual memory map of the
process. Next time we can reuse it by just touching it. */
madvise (start, len, MADV_DONTNEED);
/* Don't count those pages as mapped to not touch the garbage collector
@@ -1246,7 +1246,7 @@ size_t
ggc_round_alloc_size (size_t requested_size)
{
size_t size = 0;
-
+
ggc_round_alloc_size_1 (requested_size, NULL, &size);
return size;
}
@@ -1693,7 +1693,7 @@ ggc_free (void *p)
}
#endif
}
-\f
+
/* Subroutine of init_ggc which computes the pair of numbers used to
perform division by OBJECT_SIZE (order) and fills in inverse_table[].
@@ -1865,7 +1865,7 @@ ggc_recalculate_in_use_p (page_entry *p)
gcc_assert (p->num_free_objects < num_objects);
}
-\f
+
/* Unmark all objects. */
static void
@@ -2388,7 +2388,7 @@ ggc_print_statistics (void)
}
}
}
-\f
+
struct ggc_pch_ondisk
{
unsigned totals[NUM_ORDERS];
diff --git a/gcc/ggc-tests.cc b/gcc/ggc-tests.cc
index 668d6385d69..0b511839f00 100644
--- a/gcc/ggc-tests.cc
+++ b/gcc/ggc-tests.cc
@@ -29,7 +29,7 @@ along with GCC; see the file COPYING3. If not see
/* The various GTY markers must be outside of a namespace to be seen by
gengtype, so we don't put this file within the selftest namespace. */
-\f
+
/* Verify that a simple struct works, and that it can
own references to non-roots, and have them be marked. */
@@ -53,7 +53,7 @@ test_basic_struct ()
ASSERT_TRUE (ggc_marked_p (root_test_struct->other));
}
-\f
+
/* Selftest for GTY((length)). */
@@ -84,7 +84,7 @@ test_length ()
ASSERT_TRUE (ggc_marked_p (root_test_of_length->elem[i]));
}
-\f
+
/* Selftest for unions, GTY((tag)), and GTY((desc)). */
@@ -161,7 +161,7 @@ test_union ()
ASSERT_TRUE (ggc_marked_p (referenced_by_other));
}
-\f
+
/* Verify that destructors get run when instances are collected. */
@@ -198,7 +198,7 @@ test_finalization ()
ASSERT_EQ (count, test_struct_with_dtor::dtor_call_count);
}
-\f
+
/* Verify that a global can be marked as "deletable". */
@@ -215,7 +215,7 @@ test_deletable_global ()
ASSERT_EQ (NULL, test_of_deletable);
}
-\f
+
/* Verify that gengtype etc can cope with inheritance. */
@@ -309,7 +309,7 @@ test_inheritance ()
test_some_other_subclass_as_base_ptr)->m_c));
}
-\f
+
/* Test of chain_next/chain_prev
@@ -377,7 +377,7 @@ test_chain_next ()
}
}
-\f
+
/* Test for GTY((user)). */
@@ -436,7 +436,7 @@ test_user_struct ()
ASSERT_TRUE (num_calls_to_user_gt_ggc_mx > 0);
}
-\f
+
/* Smoketest to ensure that the tree type is marked. */
@@ -452,7 +452,7 @@ test_tree_marking ()
ASSERT_TRUE (ggc_marked_p (dummy_unittesting_tree));
}
-\f
+
/* Ideas for other tests:
- pch-handling */
diff --git a/gcc/ggc.h b/gcc/ggc.h
index 78eab7eaba6..50586da2af9 100644
--- a/gcc/ggc.h
+++ b/gcc/ggc.h
@@ -122,7 +122,7 @@ extern bool ggc_protect_identifiers;
/* Write out all GCed objects to F. */
extern void gt_pch_save (FILE *f);
-\f
+
/* Allocation. */
/* The internal primitive. */
@@ -287,7 +287,7 @@ extern void ggc_register_root_tab (const struct ggc_root_tab *);
/* Read objects previously saved with gt_pch_save from F. */
extern void gt_pch_restore (FILE *f);
-\f
+
/* Statistics. */
/* Print allocation statistics. */
diff --git a/gcc/gimple-array-bounds.cc b/gcc/gimple-array-bounds.cc
index 116200a317f..4e69518739f 100644
--- a/gcc/gimple-array-bounds.cc
+++ b/gcc/gimple-array-bounds.cc
@@ -521,7 +521,7 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref,
minbound = aref.sizrng[0];
}
}
-
+
/* The range of the byte offset into the reference. Adjusted below. */
offset_int offrange[2] = { aref.offrng[0], aref.offrng[1] };
diff --git a/gcc/gimple-fold.cc b/gcc/gimple-fold.cc
index 379d2e930ea..eb5b2f231fd 100644
--- a/gcc/gimple-fold.cc
+++ b/gcc/gimple-fold.cc
@@ -103,7 +103,7 @@ get_range_strlen (tree, bitmap, strlen_range_kind, c_strlen_data *, unsigned);
to method that was partitioned elsehwere.
In this case we have static VAR_DECL or FUNCTION_DECL
that has no corresponding callgraph/varpool node
- declaring the body.
+ declaring the body.
3) COMDAT functions referred by external vtables that
we devirtualize only during final compilation stage.
At this time we already decided that we will not output
@@ -173,7 +173,7 @@ can_refer_decl_in_current_unit_p (tree decl, tree from_decl)
As observed in PR20991 for already optimized out comdat virtual functions
it may be tempting to not necessarily give up because the copy will be
- output elsewhere when corresponding vtable is output.
+ output elsewhere when corresponding vtable is output.
This is however not possible - ABI specify that COMDATs are output in
units where they are used and when the other unit was compiled with LTO
it is possible that vtable was kept public while the function itself
@@ -2566,7 +2566,7 @@ gimple_fold_builtin_strncat (gimple_stmt_iterator *gsi)
/* Fold a call to the __strncat_chk builtin with arguments DEST, SRC,
LEN, and SIZE. */
-static bool
+static bool
gimple_fold_builtin_strncat_chk (gimple_stmt_iterator *gsi)
{
gimple *stmt = gsi_stmt (*gsi);
@@ -3739,7 +3739,7 @@ gimple_fold_builtin_snprintf (gimple_stmt_iterator *gsi)
simplified form of the call as a tree. FCODE is the BUILT_IN_*
code of the function to be simplified. */
-static bool
+static bool
gimple_fold_builtin_fprintf (gimple_stmt_iterator *gsi,
tree fp, tree fmt, tree arg,
enum built_in_function fcode)
@@ -4055,7 +4055,7 @@ gimple_fold_builtin_acc_on_device (gimple_stmt_iterator *gsi, tree arg0)
#endif
location_t loc = gimple_location (gsi_stmt (*gsi));
-
+
tree host_eq = make_ssa_name (boolean_type_node);
gimple *host_ass = gimple_build_assign
(host_eq, EQ_EXPR, arg0, build_int_cst (TREE_TYPE (arg0), val_host));
@@ -6431,7 +6431,7 @@ fold_stmt_inplace (gimple_stmt_iterator *gsi)
return changed;
}
-/* Canonicalize and possibly invert the boolean EXPR; return NULL_TREE
+/* Canonicalize and possibly invert the boolean EXPR; return NULL_TREE
if EXPR is null or we don't know how.
If non-null, the result always has boolean type. */
@@ -6606,7 +6606,7 @@ and_var_with_comparison (tree type, tree var, bool invert,
/* We can only deal with variables whose definitions are assignments. */
if (!is_gimple_assign (stmt))
return NULL_TREE;
-
+
/* If we have an inverted comparison, apply DeMorgan's law and rewrite
!var AND (op2a code2 op2b) => !(var OR !(op2a code2 op2b))
Then we only have to consider the simpler non-inverted cases. */
@@ -6678,7 +6678,7 @@ and_var_with_comparison_1 (tree type, gimple *stmt,
tree t;
tree partial = NULL_TREE;
bool is_and = (innercode == BIT_AND_EXPR);
-
+
/* Check for boolean identities that don't require recursive examination
of inner1/inner2:
inner1 AND (inner1 AND inner2) => inner1 AND inner2 => var
@@ -6734,7 +6734,7 @@ and_var_with_comparison_1 (tree type, gimple *stmt,
/* Save partial result for later. */
partial = t;
}
-
+
/* Compute the second partial result, (inner2 AND (op2a code op2b)) */
if (TREE_CODE (inner2) == SSA_NAME
&& is_gimple_assign (s = SSA_NAME_DEF_STMT (inner2))
@@ -6856,7 +6856,7 @@ and_comparisons_1 (tree type, enum tree_code code1, tree op1a, tree op1b,
for (i = 0; i < gimple_phi_num_args (stmt); i++)
{
tree arg = gimple_phi_arg_def (stmt, i);
-
+
/* If this PHI has itself as an argument, ignore it.
If all the other args produce the same result,
we're still OK. */
@@ -7084,7 +7084,7 @@ or_var_with_comparison (tree type, tree var, bool invert,
/* We can only deal with variables whose definitions are assignments. */
if (!is_gimple_assign (stmt))
return NULL_TREE;
-
+
/* If we have an inverted comparison, apply DeMorgan's law and rewrite
!var OR (op2a code2 op2b) => !(var AND !(op2a code2 op2b))
Then we only have to consider the simpler non-inverted cases. */
@@ -7142,7 +7142,7 @@ or_var_with_comparison_1 (tree type, gimple *stmt,
if (t)
return t;
}
-
+
/* If the definition is an AND or OR expression, we may be able to
simplify by reassociating. */
if (TREE_CODE (TREE_TYPE (var)) == BOOLEAN_TYPE
@@ -7154,7 +7154,7 @@ or_var_with_comparison_1 (tree type, gimple *stmt,
tree t;
tree partial = NULL_TREE;
bool is_or = (innercode == BIT_IOR_EXPR);
-
+
/* Check for boolean identities that don't require recursive examination
of inner1/inner2:
inner1 OR (inner1 OR inner2) => inner1 OR inner2 => var
@@ -7176,7 +7176,7 @@ or_var_with_comparison_1 (tree type, gimple *stmt,
? boolean_true_node
: or_var_with_comparison (type, inner1, false, code2, op2a,
op2b, outer_cond_bb));
-
+
/* Next, redistribute/reassociate the OR across the inner tests.
Compute the first partial result, (inner1 OR (op2a code op2b)) */
if (TREE_CODE (inner1) == SSA_NAME
@@ -7200,7 +7200,7 @@ or_var_with_comparison_1 (tree type, gimple *stmt,
else if (integer_zerop (t))
return inner2;
}
-
+
/* Handle the AND case, where we are redistributing:
(inner1 AND inner2) OR (op2a code2 op2b)
=> (t AND (inner2 OR (op2a code op2b))) */
@@ -7210,7 +7210,7 @@ or_var_with_comparison_1 (tree type, gimple *stmt,
/* Save partial result for later. */
partial = t;
}
-
+
/* Compute the second partial result, (inner2 OR (op2a code op2b)) */
if (TREE_CODE (inner2) == SSA_NAME
&& is_gimple_assign (s = SSA_NAME_DEF_STMT (inner2))
@@ -7236,12 +7236,12 @@ or_var_with_comparison_1 (tree type, gimple *stmt,
else if (partial && same_bool_result_p (t, partial))
return t;
}
-
+
/* Handle the AND case, where we are redistributing:
(inner1 AND inner2) OR (op2a code2 op2b)
=> (t AND (inner1 OR (op2a code2 op2b)))
=> (t AND partial) */
- else
+ else
{
if (integer_zerop (t))
return boolean_false_node;
@@ -7333,7 +7333,7 @@ or_comparisons_1 (tree type, enum tree_code code1, tree op1a, tree op1b,
for (i = 0; i < gimple_phi_num_args (stmt); i++)
{
tree arg = gimple_phi_arg_def (stmt, i);
-
+
/* If this PHI has itself as an argument, ignore it.
If all the other args produce the same result,
we're still OK. */
@@ -8367,7 +8367,7 @@ fold_const_aggregate_ref (tree t)
}
/* Lookup virtual method with index TOKEN in a virtual table V
- at OFFSET.
+ at OFFSET.
Set CAN_REFER if non-NULL to false if method
is not referable or if the virtual table is ill-formed (such as rewriten
by non-C++ produced symbol). Otherwise just return NULL in that calse. */
diff --git a/gcc/gimple-iterator.h b/gcc/gimple-iterator.h
index 8857a7e94bc..d70b15c5db2 100644
--- a/gcc/gimple-iterator.h
+++ b/gcc/gimple-iterator.h
@@ -43,7 +43,7 @@ struct gphi_iterator : public gimple_stmt_iterator
return as_a <gphi *> (ptr);
}
};
-
+
enum gsi_iterator_update
{
GSI_NEW_STMT = 2, /* Move the iterator to the first statement added. */
diff --git a/gcc/gimple-loop-jam.cc b/gcc/gimple-loop-jam.cc
index c6b2fc28d1c..4d9a79e47a5 100644
--- a/gcc/gimple-loop-jam.cc
+++ b/gcc/gimple-loop-jam.cc
@@ -42,7 +42,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-cfgcleanup.h"
/* Unroll and Jam transformation
-
+
This is a combination of two transformations, where the second
is not always valid. It's applicable if a loop nest has redundancies
over the iterations of an outer loop while not having that with
@@ -451,7 +451,7 @@ adjust_unroll_factor (class loop *inner, struct data_dependence_relation *ddr,
1 0 0 w a[0][0] b[0][0]
4 1 0 r a[2][0] b[2][0]
5 1 0 w a[1][0] b[1][0]
- 2 0 1 r a[1][0] b[1][1]
+ 2 0 1 r a[1][0] b[1][1]
3 0 1 w a[0][0] b[0][1]
Note how access 2 accesses the same element as access 5
for array 'a' but not for array 'b'. */
diff --git a/gcc/gimple-low.cc b/gcc/gimple-low.cc
index e6f04f234df..c649bc6e065 100644
--- a/gcc/gimple-low.cc
+++ b/gcc/gimple-low.cc
@@ -1200,7 +1200,7 @@ lower_builtin_setjmp (gimple_stmt_iterator *gsi)
/* __builtin_setjmp_{setup,receiver} aren't ECF_RETURNS_TWICE and for RTL
these builtins are modelled as non-local label jumps to the label
that is passed to these two builtins, so pretend we have a non-local
- label during GIMPLE passes too. See PR60003. */
+ label during GIMPLE passes too. See PR60003. */
cfun->has_nonlocal_label = 1;
/* NEXT_LABEL is the label __builtin_longjmp will jump to. Its address is
@@ -1351,7 +1351,7 @@ lower_builtin_assume_aligned (gimple_stmt_iterator *gsi)
ptr_info_def *pi = get_ptr_info (lhs);
set_ptr_info_alignment (pi, aligni, misaligni);
}
-\f
+
/* Record the variables in VARS into function FN. */
diff --git a/gcc/gimple-match.h b/gcc/gimple-match.h
index b20585dca4b..659db90b235 100644
--- a/gcc/gimple-match.h
+++ b/gcc/gimple-match.h
@@ -151,7 +151,7 @@ inline
gimple_match_op::gimple_match_op (const gimple_match_cond &cond_in,
code_helper code_in, tree type_in,
tree op0, tree op1)
- : cond (cond_in), code (code_in), type (type_in), reverse (false),
+ : cond (cond_in), code (code_in), type (type_in), reverse (false),
num_ops (2)
{
ops[0] = op0;
diff --git a/gcc/gimple-pretty-print.cc b/gcc/gimple-pretty-print.cc
index 300e9d7ed1e..bbed789bf10 100644
--- a/gcc/gimple-pretty-print.cc
+++ b/gcc/gimple-pretty-print.cc
@@ -541,7 +541,7 @@ dump_ternary_rhs (pretty_printer *buffer, const gassign *gs, int spc,
dump_generic_node (buffer, gimple_assign_rhs3 (gs), spc, flags, false);
pp_greater (buffer);
break;
-
+
case VEC_PERM_EXPR:
if (flags & TDF_GIMPLE)
pp_string (buffer, "__VEC_PERM (");
@@ -744,10 +744,10 @@ dump_gimple_call_args (pretty_printer *buffer, const gcall *gs,
static const char *const unique_args[] = {IFN_UNIQUE_CODES};
#undef DEF
enums = unique_args;
-
+
limit = ARRAY_SIZE (unique_args);
break;
-
+
case IFN_GOACC_LOOP:
#define DEF(X) #X
static const char *const loop_args[] = {IFN_GOACC_LOOP_CODES};
diff --git a/gcc/gimple-range-cache.cc b/gcc/gimple-range-cache.cc
index a8202f0e895..13ec8d41bf4 100644
--- a/gcc/gimple-range-cache.cc
+++ b/gcc/gimple-range-cache.cc
@@ -490,7 +490,7 @@ ssa_global_cache::~ssa_global_cache ()
delete m_range_allocator;
}
-// Retrieve the global range of NAME from cache memory if it exists.
+// Retrieve the global range of NAME from cache memory if it exists.
// Return the value in R.
bool
@@ -1026,7 +1026,7 @@ ranger_cache::block_range (vrange &r, basic_block bb, tree name, bool calc)
{
// If we get to the entry block, this better be a default def
// or range_on_entry was called for a block not dominated by
- // the def.
+ // the def.
gcc_checking_assert (SSA_NAME_IS_DEFAULT_DEF (name));
def_bb = ENTRY_BLOCK_PTR_FOR_FN (cfun);
}
@@ -1100,7 +1100,7 @@ ranger_cache::propagate_cache (tree name)
// If the cache couldn't set the value, mark it as failed.
if (!ok_p)
m_update->propagation_failed (bb);
- if (DEBUG_RANGE_CACHE)
+ if (DEBUG_RANGE_CACHE)
{
if (!ok_p)
{
@@ -1119,11 +1119,11 @@ ranger_cache::propagate_cache (tree name)
FOR_EACH_EDGE (e, ei, bb->succs)
if (m_on_entry.bb_range_p (name, e->dest))
{
- if (DEBUG_RANGE_CACHE)
+ if (DEBUG_RANGE_CACHE)
fprintf (dump_file, " bb%d",e->dest->index);
m_update->add (e->dest);
}
- if (DEBUG_RANGE_CACHE)
+ if (DEBUG_RANGE_CACHE)
fprintf (dump_file, "\n");
}
}
diff --git a/gcc/gimple-range-cache.h b/gcc/gimple-range-cache.h
index 4ff435dc5c1..3f72ad932c5 100644
--- a/gcc/gimple-range-cache.h
+++ b/gcc/gimple-range-cache.h
@@ -21,7 +21,7 @@ along with GCC; see the file COPYING3. If not see
#ifndef GCC_SSA_RANGE_CACHE_H
#define GCC_SSA_RANGE_CACHE_H
-#include "gimple-range-gori.h"
+#include "gimple-range-gori.h"
#include "gimple-range-infer.h"
// This class manages a vector of pointers to ssa_block ranges. It
@@ -67,7 +67,7 @@ private:
vrange_allocator *m_range_allocator;
};
-// This class provides all the caches a global ranger may need, and makes
+// This class provides all the caches a global ranger may need, and makes
// them available for gori-computes to query so outgoing edges can be
// properly calculated.
diff --git a/gcc/gimple-range-edge.cc b/gcc/gimple-range-edge.cc
index 31fc6c26705..2d688a06e93 100644
--- a/gcc/gimple-range-edge.cc
+++ b/gcc/gimple-range-edge.cc
@@ -91,7 +91,7 @@ gimple_outgoing_range::switch_edge_range (irange &r, gswitch *sw, edge e)
// arguments are 32 bit, causing a trap when we create a case_range.
// Until this is resolved (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87798)
// punt on switches where the labels dont match the argument.
- if (gimple_switch_num_labels (sw) > 1 &&
+ if (gimple_switch_num_labels (sw) > 1 &&
TYPE_PRECISION (TREE_TYPE (CASE_LOW (gimple_switch_label (sw, 1)))) !=
TYPE_PRECISION (TREE_TYPE (gimple_switch_index (sw))))
return false;
diff --git a/gcc/gimple-range-edge.h b/gcc/gimple-range-edge.h
index b1dbf8e4b9b..7e0a34823d7 100644
--- a/gcc/gimple-range-edge.h
+++ b/gcc/gimple-range-edge.h
@@ -27,7 +27,7 @@ along with GCC; see the file COPYING3. If not see
// For a COND_EXPR, the TRUE edge will return [1,1] and the false edge a [0,0].
//
// For SWITCH_EXPR, it is awkward to calculate ranges. When a request
-// is made, the entire switch is evalauted and the results cached.
+// is made, the entire switch is evalauted and the results cached.
// Any future requests to that switch will use the cached value, providing
// dramatic decrease in computation time.
//
diff --git a/gcc/gimple-range-gori.h b/gcc/gimple-range-gori.h
index ee77dc2913e..c042882db25 100644
--- a/gcc/gimple-range-gori.h
+++ b/gcc/gimple-range-gori.h
@@ -141,10 +141,10 @@ private:
// If there is any known range for b_4 coming into this block, it can refine
// the results. This allows for cascading results to be propogated.
// if b_4 is [100, 200] on entry to the block, feeds into the calculation
-// of a_2 = [92, 192], and finally on the true edge the range would be
+// of a_2 = [92, 192], and finally on the true edge the range would be
// an empty range [] because it is not possible for the true edge to be taken.
//
-// expr_range_in_bb is simply a wrapper which calls ssa_range_in_bb for
+// expr_range_in_bb is simply a wrapper which calls ssa_range_in_bb for
// SSA_NAMES and otherwise simply calculates the range of the expression.
//
// The constructor takes a flag value to use on edges to check for the
diff --git a/gcc/gimple-range.cc b/gcc/gimple-range.cc
index 4bdb0bdbc82..437d8d7cd85 100644
--- a/gcc/gimple-range.cc
+++ b/gcc/gimple-range.cc
@@ -189,7 +189,7 @@ gimple_ranger::range_on_exit (vrange &r, basic_block bb, tree name)
range_on_entry (r, bb, name);
gcc_checking_assert (r.undefined_p ()
|| range_compatible_p (r.type (), TREE_TYPE (name)));
-
+
if (idx)
tracer.trailer (idx, "range_on_exit", true, name, r);
}
@@ -461,7 +461,7 @@ gimple_ranger::fold_stmt (gimple_stmt_iterator *gsi, tree (*valueize) (tree))
}
// Called during dominator walks to register any inferred ranges that take
-// effect from this point forward.
+// effect from this point forward.
void
gimple_ranger::register_inferred_ranges (gimple *s)
diff --git a/gcc/gimple-ssa-store-merging.cc b/gcc/gimple-ssa-store-merging.cc
index 5a477c4704e..8534cd374fa 100644
--- a/gcc/gimple-ssa-store-merging.cc
+++ b/gcc/gimple-ssa-store-merging.cc
@@ -4135,7 +4135,7 @@ imm_store_chain_info::output_merged_store (merged_store_group *group)
{
clobber_first = true;
unsigned HOST_WIDE_INT pos = group->start / BITS_PER_UNIT;
- FOR_EACH_VEC_ELT (split_stores, i, split_store)
+ FOR_EACH_VEC_ELT (split_stores, i, split_store)
if (split_store->bytepos != pos)
{
clobber_first = false;
@@ -5129,7 +5129,7 @@ pass_store_merging::process_store (gimple *stmt)
else if (handled_load (def_stmt, &ops[0], bitsize, bitpos,
bitregion_start, bitregion_end))
rhs_code = MEM_REF;
- else if (gimple_assign_rhs_code (def_stmt) == BIT_NOT_EXPR)
+ else if (gimple_assign_rhs_code (def_stmt) == BIT_NOT_EXPR)
{
tree rhs1 = gimple_assign_rhs1 (def_stmt);
if (TREE_CODE (rhs1) == SSA_NAME
diff --git a/gcc/gimple-ssa-strength-reduction.cc b/gcc/gimple-ssa-strength-reduction.cc
index 65d6c06b629..507f7f9788d 100644
--- a/gcc/gimple-ssa-strength-reduction.cc
+++ b/gcc/gimple-ssa-strength-reduction.cc
@@ -56,7 +56,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-affine.h"
#include "tree-eh.h"
#include "builtins.h"
-\f
+
/* Information about a strength reduction candidate. Each statement
in the candidate table represents an expression of one of the
following forms (the special case of CAND_REF will be described
@@ -75,7 +75,7 @@ along with GCC; see the file COPYING3. If not see
(CAND_ADD) S0: Y = B + (i' * S)
is called a "basis" for S1. In both cases, S1 may be replaced by
-
+
S1': X = Y + (i - i') * S,
where (i - i') * S is folded to the extent possible.
@@ -85,7 +85,7 @@ along with GCC; see the file COPYING3. If not see
given at least one entry in the candidate table. Such statements
include addition, pointer addition, subtraction, multiplication,
negation, copies, and nontrivial type casts. If a statement may
- represent more than one expression of the forms of S1 above,
+ represent more than one expression of the forms of S1 above,
multiple "interpretations" are stored in the table and chained
together. Examples:
@@ -112,9 +112,9 @@ along with GCC; see the file COPYING3. If not see
Strength reduction in addressing
--------------------------------
There is another kind of candidate known as CAND_REF. A CAND_REF
- describes a statement containing a memory reference having
+ describes a statement containing a memory reference having
complex addressing that might benefit from strength reduction.
- Specifically, we are interested in references for which
+ Specifically, we are interested in references for which
get_inner_reference returns a base address, offset, and bitpos as
follows:
@@ -122,7 +122,7 @@ along with GCC; see the file COPYING3. If not see
offset: MULT_EXPR (PLUS_EXPR (T2, C2), C3)
bitpos: C4 * BITS_PER_UNIT
- Here T1 and T2 are arbitrary trees, and C1, C2, C3, C4 are
+ Here T1 and T2 are arbitrary trees, and C1, C2, C3, C4 are
arbitrary integer constants. Note that C2 may be zero, in which
case the offset will be MULT_EXPR (T2, C3).
@@ -142,9 +142,9 @@ along with GCC; see the file COPYING3. If not see
Strength reduction of CAND_REFs uses the same infrastructure as
that used by CAND_MULTs and CAND_ADDs. We record T1 in the base (B)
- field, MULT_EXPR (T2, C3) in the stride (S) field, and
+ field, MULT_EXPR (T2, C3) in the stride (S) field, and
C1 + (C2 * C3) + C4 in the index (i) field. A basis for a CAND_REF
- is thus another CAND_REF with the same B and S values. When at
+ is thus another CAND_REF with the same B and S values. When at
least two CAND_REFs are chained together using the basis relation,
each of them is replaced as above, resulting in improved code
generation for addressing.
@@ -192,7 +192,7 @@ along with GCC; see the file COPYING3. If not see
is its derived base name (as is the case with argument x_0).
The hidden basis for statement (6) is the nearest dominating candidate
- whose base name is the derived base name (x_0) of the feeding phi (4),
+ whose base name is the derived base name (x_0) of the feeding phi (4),
and whose stride is identical to that of the statement. We can then
create the new "phi basis" (4a) and feeding adds along incoming arcs (3a),
allowing the final replacement of (6) by the strength-reduced (6r).
@@ -207,7 +207,7 @@ along with GCC; see the file COPYING3. If not see
extracting the derived base name, and searching for a basis in the
usual manner after substituting the derived base name.
- Note that the transformation is only valid when the original phi and
+ Note that the transformation is only valid when the original phi and
the statements that define the phi's arguments are all at the same
position in the loop hierarchy. */
@@ -250,7 +250,7 @@ public:
/* The type to be used to interpret the stride field when the stride
is not a constant. Normally the same as the type of the recorded
stride, but when the stride has been cast we need to maintain that
- knowledge in order to make legal substitutions without losing
+ knowledge in order to make legal substitutions without losing
precision. When the stride is a constant, this will be sizetype. */
tree stride_type;
@@ -413,7 +413,7 @@ static bool address_arithmetic_p;
static slsr_cand_t base_cand_from_table (tree);
static tree introduce_cast_before_cand (slsr_cand_t, tree, tree);
static bool legal_cast_p_1 (tree, tree);
-\f
+
/* Produce a pointer to the IDX'th candidate in the candidate vector. */
static slsr_cand_t
@@ -445,7 +445,7 @@ cand_chain_hasher::equal (const cand_chain *chain1, const cand_chain *chain2)
/* Hash table embodying a mapping from base exprs to chains of candidates. */
static hash_table<cand_chain_hasher> *base_cand_map;
-\f
+
/* Pointer map used by tree_to_aff_combination_expand. */
static hash_map<tree, name_expansion *> *name_expansions;
/* Pointer map embodying a mapping from bases to alternative bases. */
@@ -730,7 +730,7 @@ stmt_cost (gimple *gs, bool speed)
lhs = gimple_assign_lhs (gs);
rhs1 = gimple_assign_rhs1 (gs);
lhs_mode = TYPE_MODE (TREE_TYPE (lhs));
-
+
switch (gimple_assign_rhs_code (gs))
{
case MULT_EXPR:
@@ -757,11 +757,11 @@ stmt_cost (gimple *gs, bool speed)
will go away. */
case SSA_NAME:
return 0;
-
+
default:
;
}
-
+
gcc_unreachable ();
}
@@ -779,7 +779,7 @@ base_cand_from_table (tree base_in)
return (slsr_cand_t) NULL;
result = stmt_cand_map->get (def);
-
+
if (result && (*result)->kind != CAND_REF)
return *result;
@@ -793,7 +793,7 @@ add_cand_for_stmt (gimple *gs, slsr_cand_t c)
{
gcc_assert (!stmt_cand_map->put (gs, c));
}
-\f
+
/* Given PHI which contains a phi statement, determine whether it
satisfies all the requirements of a phi candidate. If so, create
a candidate. Note that a CAND_PHI never has a basis itself, but
@@ -1101,7 +1101,7 @@ create_mul_ssa_cand (gimple *gs, tree base_in, tree stride_in, bool speed)
ctype = base_cand->cand_type;
stype = TREE_TYPE (stride_in);
if (has_single_use (base_in))
- savings = (base_cand->dead_savings
+ savings = (base_cand->dead_savings
+ stmt_cost (base_cand->cand_stmt, speed));
}
else if (base_cand->kind == CAND_ADD
@@ -1173,7 +1173,7 @@ create_mul_imm_cand (gimple *gs, tree base_in, tree stride_in, bool speed)
stride = wide_int_to_tree (TREE_TYPE (stride_in), temp);
ctype = base_cand->cand_type;
if (has_single_use (base_in))
- savings = (base_cand->dead_savings
+ savings = (base_cand->dead_savings
+ stmt_cost (base_cand->cand_stmt, speed));
}
}
@@ -1356,14 +1356,14 @@ create_add_ssa_cand (gimple *gs, tree base_in, tree addend_in,
ctype = TREE_TYPE (base_in);
stype = subtrahend_cand->cand_type;
if (has_single_use (addend_in))
- savings = (subtrahend_cand->dead_savings
+ savings = (subtrahend_cand->dead_savings
+ stmt_cost (subtrahend_cand->cand_stmt, speed));
}
subtrahend_cand = lookup_cand (subtrahend_cand->next_interp);
}
}
-
+
base_cand = lookup_cand (base_cand->next_interp);
}
@@ -1411,7 +1411,7 @@ create_add_imm_cand (gimple *gs, tree base_in, const widest_int &index_in,
/* Y = (B + i') * S, S constant, c = kS for some integer k
X = Y + c
============================
- X = (B + (i'+ k)) * S
+ X = (B + (i'+ k)) * S
OR
Y = B + (i' * S), S constant, c = kS for some integer k
X = Y + c
@@ -1424,7 +1424,7 @@ create_add_imm_cand (gimple *gs, tree base_in, const widest_int &index_in,
ctype = base_cand->cand_type;
stype = base_cand->stride_type;
if (has_single_use (base_in))
- savings = (base_cand->dead_savings
+ savings = (base_cand->dead_savings
+ stmt_cost (base_cand->cand_stmt, speed));
}
@@ -1617,7 +1617,7 @@ slsr_process_cast (gimple *gs, tree rhs1, bool speed)
which comes from the cast, and the base candidate's cast,
which is no longer applicable. */
if (has_single_use (rhs1))
- savings = (base_cand->dead_savings
+ savings = (base_cand->dead_savings
+ stmt_cost (base_cand->cand_stmt, speed));
c = alloc_cand_and_find_basis (base_cand->kind, gs,
@@ -1634,7 +1634,7 @@ slsr_process_cast (gimple *gs, tree rhs1, bool speed)
base_cand = lookup_cand (base_cand->next_interp);
}
}
- else
+ else
{
/* If nothing is known about the RHS, create fresh CAND_ADD and
CAND_MULT interpretations:
@@ -1662,7 +1662,7 @@ slsr_process_cast (gimple *gs, tree rhs1, bool speed)
appropriate entry in the candidate table.
This interface is included for completeness, but is unnecessary
- if this pass immediately follows a pass that performs copy
+ if this pass immediately follows a pass that performs copy
propagation, such as DOM. */
static void
@@ -1681,7 +1681,7 @@ slsr_process_copy (gimple *gs, tree rhs1, bool speed)
{
/* Propagate all data from the base candidate. */
if (has_single_use (rhs1))
- savings = (base_cand->dead_savings
+ savings = (base_cand->dead_savings
+ stmt_cost (base_cand->cand_stmt, speed));
c = alloc_cand_and_find_basis (base_cand->kind, gs,
@@ -1698,7 +1698,7 @@ slsr_process_copy (gimple *gs, tree rhs1, bool speed)
base_cand = lookup_cand (base_cand->next_interp);
}
}
- else
+ else
{
/* If nothing is known about the RHS, create fresh CAND_ADD and
CAND_MULT interpretations:
@@ -1723,7 +1723,7 @@ slsr_process_copy (gimple *gs, tree rhs1, bool speed)
mapping. */
add_cand_for_stmt (gs, c);
}
-\f
+
class find_candidates_dom_walker : public dom_walker
{
public:
@@ -1822,7 +1822,7 @@ find_candidates_dom_walker::before_dom_children (basic_block bb)
}
return NULL;
}
-\f
+
/* Dump a candidate for debug. */
static void
@@ -1904,7 +1904,7 @@ dump_cand_vec (void)
slsr_cand_t c;
fprintf (dump_file, "\nStrength reduction candidate vector:\n\n");
-
+
FOR_EACH_VEC_ELT (cand_vec, i, c)
if (c != NULL)
dump_candidate (c);
@@ -1949,7 +1949,7 @@ dump_incr_vec (void)
unsigned i;
fprintf (dump_file, "\nIncrement vector:\n\n");
-
+
for (i = 0; i < incr_vec_len; i++)
{
fprintf (dump_file, "%3d increment: ", i);
@@ -1962,7 +1962,7 @@ dump_incr_vec (void)
}
}
}
-\f
+
/* Replace *EXPR in candidate C with an equivalent strength-reduced
data reference. */
@@ -2076,7 +2076,7 @@ phi_dependent_cand_p (slsr_cand_t c)
&& lookup_cand (c->basis)->def_phi != c->def_phi);
}
-/* Calculate the increment required for candidate C relative to
+/* Calculate the increment required for candidate C relative to
its basis. */
static widest_int
@@ -2221,7 +2221,7 @@ replace_mult_candidate (slsr_cand_t c, tree basis_name, widest_int bump)
stmt_to_print = gsi_stmt (gsi);
}
}
-
+
if (dump_file && (dump_flags & TDF_DETAILS))
{
fputs ("With: ", dump_file);
@@ -2249,7 +2249,7 @@ replace_unconditional_candidate (slsr_cand_t c)
replace_mult_candidate (c, gimple_assign_lhs (basis->cand_stmt), bump);
}
-\f
+
/* Return the index in the increment vector of the given INCREMENT,
or -1 if not found. The latter can occur if more than
MAX_INCR_VEC_LEN increments have been found. */
@@ -2258,7 +2258,7 @@ static inline int
incr_vec_index (const widest_int &increment)
{
unsigned i;
-
+
for (i = 0; i < incr_vec_len && increment != incr_vec[i].incr; i++)
;
@@ -2290,7 +2290,7 @@ create_add_on_incoming_edge (slsr_cand_t c, tree basis_name,
basis_type = TREE_TYPE (basis_name);
lhs = make_temp_ssa_name (basis_type, NULL, "slsr");
- /* Occasionally people convert integers to pointers without a
+ /* Occasionally people convert integers to pointers without a
cast, leading us into trouble if we aren't careful. */
enum tree_code plus_code
= POINTER_TYPE_P (basis_type) ? POINTER_PLUS_EXPR : PLUS_EXPR;
@@ -2513,7 +2513,7 @@ replace_conditional_candidate (slsr_cand_t c)
slsr_cand_t basis;
location_t loc;
- /* Look up the LHS SSA name from C's basis. This will be the
+ /* Look up the LHS SSA name from C's basis. This will be the
RHS1 of the adds we will introduce to create new phi arguments. */
basis = lookup_cand (c->basis);
basis_name = gimple_assign_lhs (basis->cand_stmt);
@@ -2587,7 +2587,7 @@ phi_add_costs_1 (gimple *phi, slsr_cand_t c, int one_add_cost, int *spread)
}
/* Compute the expected costs of inserting basis adjustments for
- candidate C with phi-definition PHI. The cost of inserting
+ candidate C with phi-definition PHI. The cost of inserting
one adjustment is given by ONE_ADD_COST. If PHI has arguments
which are themselves phi results, recursively calculate costs
for those phis as well. */
@@ -2601,7 +2601,7 @@ phi_add_costs (gimple *phi, slsr_cand_t c, int one_add_cost)
return retval;
}
/* For candidate C, each sibling of candidate C, and each dependent of
- candidate C, determine whether the candidate is dependent upon a
+ candidate C, determine whether the candidate is dependent upon a
phi that hides its basis. If not, replace the candidate unconditionally.
Otherwise, determine whether the cost of introducing compensation code
for the candidate is offset by the gains from strength reduction. If
@@ -2616,7 +2616,7 @@ replace_uncond_cands_and_profitable_phis (slsr_cand_t c)
of a copy or cast; there is no value in replacing it. */
if (c->kind == CAND_MULT && wi::to_widest (c->stride) != 1)
{
- /* A candidate dependent upon a phi will replace a multiply by
+ /* A candidate dependent upon a phi will replace a multiply by
a constant with an add, and will insert at most one add for
each phi argument. Add these costs with the potential dead-code
savings to determine profitability. */
@@ -2624,7 +2624,7 @@ replace_uncond_cands_and_profitable_phis (slsr_cand_t c)
int mult_savings = stmt_cost (c->cand_stmt, speed);
gimple *phi = lookup_cand (c->def_phi)->cand_stmt;
tree phi_result = gimple_phi_result (phi);
- int one_add_cost = add_cost (speed,
+ int one_add_cost = add_cost (speed,
TYPE_MODE (TREE_TYPE (phi_result)));
int add_costs = one_add_cost + phi_add_costs (phi, c, one_add_cost);
int cost = add_costs - mult_savings - c->dead_savings;
@@ -2655,7 +2655,7 @@ replace_uncond_cands_and_profitable_phis (slsr_cand_t c)
if (c->dependent)
replace_uncond_cands_and_profitable_phis (lookup_cand (c->dependent));
}
-\f
+
/* Count the number of candidates in the tree rooted at C that have
not already been replaced under other interpretations. */
@@ -2709,7 +2709,7 @@ record_increment (slsr_cand_t c, widest_int increment, bool is_phi_adjust)
incr_vec[i].initializer = NULL_TREE;
incr_vec[i].init_bb = NULL;
}
-
+
break;
}
}
@@ -2723,7 +2723,7 @@ record_increment (slsr_cand_t c, widest_int increment, bool is_phi_adjust)
incr_vec[incr_vec_len].incr = increment;
incr_vec[incr_vec_len].count = c->basis || is_phi_adjust ? 1 : 0;
incr_vec[incr_vec_len].cost = COST_INFINITE;
-
+
/* Optimistically record the first occurrence of this increment
as providing an initializer (if it does); we will revise this
opinion later if it doesn't dominate all other occurrences.
@@ -2772,7 +2772,7 @@ record_phi_increments_1 (slsr_cand_t basis, gimple *phi)
{
unsigned i;
slsr_cand_t phi_cand = *stmt_cand_map->get (phi);
-
+
if (phi_cand->visited)
return;
phi_cand->visited = 1;
@@ -2900,7 +2900,7 @@ phi_incr_cost_1 (slsr_cand_t c, const widest_int &incr, gimple *phi,
arg_cand = base_cand_from_table (arg);
diff = arg_cand->index - basis->index;
}
-
+
if (incr == diff)
{
tree basis_lhs = gimple_assign_lhs (basis->cand_stmt);
@@ -3005,7 +3005,7 @@ lowest_cost_path (int cost_in, int repl_savings, slsr_cand_t c,
}
if (c->dependent)
- local_cost = lowest_cost_path (local_cost, repl_savings,
+ local_cost = lowest_cost_path (local_cost, repl_savings,
lookup_cand (c->dependent), incr,
count_phis);
@@ -3206,7 +3206,7 @@ ncd_for_two_cands (basic_block bb1, basic_block bb2,
}
ncd = nearest_common_dominator (CDI_DOMINATORS, bb1, bb2);
-
+
/* If both candidates are in the same block, the earlier
candidate wins. */
if (bb1 == ncd && bb2 == ncd)
@@ -3253,7 +3253,7 @@ ncd_with_phi (slsr_cand_t c, const widest_int &incr, gphi *phi,
if (gimple_code (arg_def) == GIMPLE_PHI)
ncd = ncd_with_phi (c, incr, as_a <gphi *> (arg_def), ncd, where);
- else
+ else
{
widest_int diff;
@@ -3264,9 +3264,9 @@ ncd_with_phi (slsr_cand_t c, const widest_int &incr, gphi *phi,
slsr_cand_t arg_cand = base_cand_from_table (arg);
diff = arg_cand->index - basis->index;
}
-
+
basic_block pred = gimple_phi_arg_edge (phi, i)->src;
-
+
if ((incr == diff) || (!address_arithmetic_p && incr == -diff))
ncd = ncd_for_two_cands (ncd, pred, *where, NULL, where);
}
@@ -3291,7 +3291,7 @@ ncd_of_cand_and_phis (slsr_cand_t c, const widest_int &incr, slsr_cand_t *where)
ncd = gimple_bb (c->cand_stmt);
*where = c;
}
-
+
if (phi_dependent_cand_p (c))
ncd = ncd_with_phi (c, incr,
as_a <gphi *> (lookup_cand (c->def_phi)->cand_stmt),
@@ -3591,7 +3591,7 @@ all_phi_incrs_profitable_1 (slsr_cand_t c, gphi *phi, int *spread)
return true;
}
-
+
/* Return TRUE iff all required increments for candidates feeding PHI
are profitable (and legal!) to replace on behalf of candidate C. */
@@ -3630,7 +3630,7 @@ introduce_cast_before_cand (slsr_cand_t c, tree to_type, tree from_expr)
return cast_lhs;
}
-/* Replace the RHS of the statement represented by candidate C with
+/* Replace the RHS of the statement represented by candidate C with
NEW_CODE, NEW_RHS1, and NEW_RHS2, provided that to do so doesn't
leave C unchanged or just interchange its operands. The original
operation and operands are in OLD_CODE, OLD_RHS1, and OLD_RHS2.
@@ -3738,12 +3738,12 @@ replace_one_candidate (slsr_cand_t c, unsigned i, tree basis_name)
{
tree stride_type = TREE_TYPE (c->stride);
tree orig_type = TREE_TYPE (orig_rhs2);
-
+
if (types_compatible_p (orig_type, stride_type))
rhs2 = c->stride;
else
rhs2 = introduce_cast_before_cand (c, orig_type, c->stride);
-
+
stmt_to_print = replace_rhs_if_not_dup (repl_code, basis_name, rhs2,
orig_code, orig_rhs1, orig_rhs2,
c);
@@ -3754,12 +3754,12 @@ replace_one_candidate (slsr_cand_t c, unsigned i, tree basis_name)
tree stride_type = TREE_TYPE (c->stride);
tree orig_type = TREE_TYPE (orig_rhs2);
gcc_assert (repl_code != POINTER_PLUS_EXPR);
-
+
if (types_compatible_p (orig_type, stride_type))
rhs2 = c->stride;
else
rhs2 = introduce_cast_before_cand (c, orig_type, c->stride);
-
+
if (orig_code != MINUS_EXPR
|| !operand_equal_p (basis_name, orig_rhs1, 0)
|| !operand_equal_p (rhs2, orig_rhs2, 0))
@@ -3786,7 +3786,7 @@ replace_one_candidate (slsr_cand_t c, unsigned i, tree basis_name)
tree lhs = gimple_assign_lhs (c->cand_stmt);
tree lhs_type = TREE_TYPE (lhs);
tree basis_type = TREE_TYPE (basis_name);
-
+
if (types_compatible_p (lhs_type, basis_type))
{
gassign *copy_stmt = gimple_build_assign (lhs, basis_name);
@@ -3822,7 +3822,7 @@ replace_one_candidate (slsr_cand_t c, unsigned i, tree basis_name)
}
else
gcc_unreachable ();
-
+
if (dump_file && (dump_flags & TDF_DETAILS) && stmt_to_print)
{
fputs ("With: ", dump_file);
@@ -3848,7 +3848,7 @@ replace_profitable_candidates (slsr_cand_t c)
/* Only process profitable increments. Nothing useful can be done
to a cast or copy. */
if (i >= 0
- && profitable_increment_p (i)
+ && profitable_increment_p (i)
&& orig_code != SSA_NAME
&& !CONVERT_EXPR_CODE_P (orig_code))
{
@@ -3858,7 +3858,7 @@ replace_profitable_candidates (slsr_cand_t c)
if (all_phi_incrs_profitable (c, phi))
{
- /* Look up the LHS SSA name from C's basis. This will be
+ /* Look up the LHS SSA name from C's basis. This will be
the RHS1 of the adds we will introduce to create new
phi arguments. */
slsr_cand_t basis = lookup_cand (c->basis);
@@ -3890,7 +3890,7 @@ replace_profitable_candidates (slsr_cand_t c)
if (c->dependent)
replace_profitable_candidates (lookup_cand (c->dependent));
}
-\f
+
/* Analyze costs of related candidates in the candidate vector,
and make beneficial replacements. */
diff --git a/gcc/gimple-ssa-warn-access.cc b/gcc/gimple-ssa-warn-access.cc
index ad9dac54874..07b2f63e002 100644
--- a/gcc/gimple-ssa-warn-access.cc
+++ b/gcc/gimple-ssa-warn-access.cc
@@ -3266,7 +3266,7 @@ pass_waccess::check_builtin (gcall *stmt)
check_memop_access (stmt, dst, NULL_TREE, len);
return true;
}
-
+
default:
if (check_atomic_builtin (stmt))
return true;
diff --git a/gcc/gimple.cc b/gcc/gimple.cc
index b97fbd54da2..be6451b8123 100644
--- a/gcc/gimple.cc
+++ b/gcc/gimple.cc
@@ -2998,7 +2998,7 @@ nonbarrier_call_p (gimple *call)
}
/* Callback for walk_stmt_load_store_ops.
-
+
Return TRUE if OP will dereference the tree stored in DATA, FALSE
otherwise.
@@ -3139,7 +3139,7 @@ sort_case_labels (vec<tree> &label_vec)
{
label_vec.qsort (compare_case_labels);
}
-\f
+
/* Prepare a vector of case labels to be used in a GIMPLE_SWITCH statement.
LABELS is a vector that contains all case labels to look at.
diff --git a/gcc/gimplify-me.cc b/gcc/gimplify-me.cc
index 478782a474d..00b5ba0dc1b 100644
--- a/gcc/gimplify-me.cc
+++ b/gcc/gimplify-me.cc
@@ -1,4 +1,4 @@
-/* Tree lowering to gimple for middle end use only.
+/* Tree lowering to gimple for middle end use only.
This converts the GENERIC functions-as-trees tree representation into
the GIMPLE form.
Copyright (C) 2013-2023 Free Software Foundation, Inc.
diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index 1b362dd83e3..a33f74a8a1b 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -830,7 +830,7 @@ gimple_add_tmp_var (tree tmp)
}
-\f
+
/* This page contains routines to unshare tree nodes, i.e. to duplicate tree
nodes that are referenced more than once in GENERIC functions. This is
necessary because gimplification (translation into GIMPLE) is performed
@@ -1098,7 +1098,7 @@ rexpr_has_location (tree expr)
return rexpr_location (expr) != UNKNOWN_LOCATION;
}
-\f
+
/* WRAPPER is a code such as BIND_EXPR or CLEANUP_POINT_EXPR which can both
contain statements and have a value. Assign its value to a temporary
and give it void_type_node. Return the temporary, or NULL_TREE if
@@ -2670,7 +2670,7 @@ expand_FALLTHROUGH (gimple_seq *seq_p)
"a case label or default label");
}
-\f
+
/* Gimplify a SWITCH_EXPR, and collect the vector of labels it can
branch to. */
@@ -4405,7 +4405,7 @@ gimplify_cond_expr (tree *expr_p, gimple_seq *pre_p, fallback_t fallback)
if (!VOID_TYPE_P (TREE_TYPE (else_)))
else_ = build_fold_addr_expr_loc (loc, else_);
-
+
expr
= build3 (COND_EXPR, type, TREE_OPERAND (expr, 0), then_, else_);
@@ -7611,7 +7611,7 @@ omp_default_clause (struct gimplify_omp_ctx *ctx, tree decl,
rtype = "teams";
else
gcc_unreachable ();
-
+
error ("%qE not specified in enclosing %qs",
DECL_NAME (lang_hooks.decls.omp_report_decl (decl)), rtype);
inform (ctx->location, "enclosing %qs", rtype);
@@ -7652,7 +7652,7 @@ omp_default_clause (struct gimplify_omp_ctx *ctx, tree decl,
}
}
}
-
+
if (TREE_CODE (decl) == PARM_DECL
|| (!is_global_var (decl)
&& DECL_CONTEXT (decl) == current_function_decl))
@@ -12492,7 +12492,7 @@ gimplify_adjust_omp_clauses_1 (splay_tree_node n, void *data)
/* Don't call omp_finish_clause on implicitly added OMP_CLAUSE_PRIVATE
in simd. Those are only added for the local vars inside of simd body
and they don't need to be e.g. default constructible. */
- if (code != OMP_CLAUSE_PRIVATE || ctx->region_type != ORT_SIMD)
+ if (code != OMP_CLAUSE_PRIVATE || ctx->region_type != ORT_SIMD)
lang_hooks.decls.omp_finish_clause (clause, pre_p,
(ctx->region_type & ORT_ACC) != 0);
if (gimplify_omp_ctxp)
diff --git a/gcc/ginclude/float.h b/gcc/ginclude/float.h
index 172b9de477f..0976253f71b 100644
--- a/gcc/ginclude/float.h
+++ b/gcc/ginclude/float.h
@@ -565,9 +565,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-1 indeterminate
0 evaluate all operations and constants just to the range and
precision of the type
- 1 evaluate operations and constants of type _Decimal32
- and _Decimal64 to the range and precision of the _Decimal64
- type, evaluate _Decimal128 operations and constants to the
+ 1 evaluate operations and constants of type _Decimal32
+ and _Decimal64 to the range and precision of the _Decimal64
+ type, evaluate _Decimal128 operations and constants to the
range and precision of the _Decimal128 type;
2 evaluate all operations and constants to the range and
precision of the _Decimal128 type. */
diff --git a/gcc/ginclude/stdarg.h b/gcc/ginclude/stdarg.h
index 5149f7b3f4f..7ee0056ec13 100644
--- a/gcc/ginclude/stdarg.h
+++ b/gcc/ginclude/stdarg.h
@@ -60,7 +60,7 @@ typedef __builtin_va_list __gnuc_va_list;
/* Define va_list, if desired, from __gnuc_va_list. */
/* We deliberately do not define va_list when called from
stdio.h, because ANSI C says that stdio.h is not supposed to define
- va_list. stdio.h needs to have access to that data type,
+ va_list. stdio.h needs to have access to that data type,
but must not use that name. It should use the name __gnuc_va_list,
which is safe because it is reserved for the implementation. */
diff --git a/gcc/ginclude/stdatomic.h b/gcc/ginclude/stdatomic.h
index e16b072ccde..69eb3529667 100644
--- a/gcc/ginclude/stdatomic.h
+++ b/gcc/ginclude/stdatomic.h
@@ -76,7 +76,7 @@ typedef _Atomic __UINTPTR_TYPE__ atomic_uintptr_t;
typedef _Atomic __SIZE_TYPE__ atomic_size_t;
typedef _Atomic __PTRDIFF_TYPE__ atomic_ptrdiff_t;
typedef _Atomic __INTMAX_TYPE__ atomic_intmax_t;
-typedef _Atomic __UINTMAX_TYPE__ atomic_uintmax_t;
+typedef _Atomic __UINTMAX_TYPE__ atomic_uintmax_t;
#if !(defined __STDC_VERSION__ && __STDC_VERSION__ > 201710L)
@@ -118,7 +118,7 @@ extern void atomic_signal_fence (memory_order);
/* Note that these macros require __auto_type to remove
_Atomic qualifiers (and const qualifiers, if those are valid on
macro operands).
-
+
Also note that the header file uses the generic form of __atomic
builtins, which requires the address to be taken of the value
parameter, and then we pass that value on. This allows the macros
diff --git a/gcc/ginclude/stddef.h b/gcc/ginclude/stddef.h
index 7980045e712..01262c150e2 100644
--- a/gcc/ginclude/stddef.h
+++ b/gcc/ginclude/stddef.h
@@ -286,7 +286,7 @@ typedef long ssize_t;
symbols in the _FOO_T_ family, stays defined even after its
corresponding type is defined). If we define wchar_t, then we
must undef _WCHAR_T_; for BSD/386 1.1 (and perhaps others), if
- we undef _WCHAR_T_, then we must also define rune_t, since
+ we undef _WCHAR_T_, then we must also define rune_t, since
headers like runetype.h assume that if machine/ansi.h is included,
and _BSD_WCHAR_T_ is not defined, then rune_t is available.
machine/ansi.h says, "Note that _WCHAR_T_ and _RUNE_T_ must be of
diff --git a/gcc/go/go-gcc.cc b/gcc/go/go-gcc.cc
index 6e5887aecab..656e7d8f3de 100644
--- a/gcc/go/go-gcc.cc
+++ b/gcc/go/go-gcc.cc
@@ -2821,7 +2821,7 @@ Gcc_backend::global_variable_set_init(Bvariable* var, Bexpression* expr)
Bvariable*
Gcc_backend::local_variable(Bfunction* function, const std::string& name,
- Btype* btype, Bvariable* decl_var,
+ Btype* btype, Bvariable* decl_var,
unsigned int flags, Location location)
{
tree type_tree = btype->get_tree();
diff --git a/gcc/go/gofrontend/types.cc b/gcc/go/gofrontend/types.cc
index 7f471eab428..a7067d163f3 100644
--- a/gcc/go/gofrontend/types.cc
+++ b/gcc/go/gofrontend/types.cc
@@ -1194,7 +1194,7 @@ Type::get_backend_placeholder(Gogo* gogo)
bt = gogo->backend()->array_type(element, len);
}
break;
-
+
case TYPE_INTERFACE:
{
go_assert(!this->interface_type()->is_empty());
@@ -1273,7 +1273,7 @@ Type::finish_backend(Gogo* gogo, Btype *placeholder)
// is converted.
this->array_type()->finish_backend_element(gogo);
break;
-
+
case TYPE_MAP:
case TYPE_CHANNEL:
go_unreachable();
diff --git a/gcc/go/gospec.cc b/gcc/go/gospec.cc
index 1e514076803..7f0a520c150 100644
--- a/gcc/go/gospec.cc
+++ b/gcc/go/gospec.cc
@@ -125,7 +125,7 @@ lang_specific_driver (struct cl_decoded_option **in_decoded_options,
#endif
/* The first input file with an extension of .go. */
- const char *first_go_file = NULL;
+ const char *first_go_file = NULL;
/* Whether we saw any -g option. */
bool saw_opt_g = false;
diff --git a/gcc/graphite-isl-ast-to-gimple.cc b/gcc/graphite-isl-ast-to-gimple.cc
index 6c0d6f9b498..8f35d975837 100644
--- a/gcc/graphite-isl-ast-to-gimple.cc
+++ b/gcc/graphite-isl-ast-to-gimple.cc
@@ -443,7 +443,7 @@ nary_op_to_tree (tree type, __isl_take isl_ast_expr *expr, ivs_params &ip)
break;
default:
- gcc_unreachable ();
+ gcc_unreachable ();
}
isl_ast_expr *arg_expr = isl_ast_expr_get_op_arg (expr, 0);
tree res = gcc_expression_from_isl_expression (type, arg_expr, ip);
@@ -746,7 +746,7 @@ translate_isl_ast_node_for (loop_p context_loop, __isl_keep isl_ast_node *node,
/* Inserts in iv_map a tuple (OLD_LOOP->num, NEW_NAME) for the induction
variables of the loops around GBB in SESE.
-
+
FIXME: Instead of using a vec<tree> that maps each loop id to a possible
chrec, we could consider using a map<int, tree> that maps loop ids to the
corresponding tree expressions. */
@@ -853,7 +853,7 @@ translate_isl_ast_node_block (loop_p context_loop,
isl_ast_node_list_free (node_list);
return next_e;
}
-
+
/* Creates a new if region corresponding to isl's cond. */
edge translate_isl_ast_to_gimple::
diff --git a/gcc/graphite-scop-detection.cc b/gcc/graphite-scop-detection.cc
index f976451949d..e3ad1c684f6 100644
--- a/gcc/graphite-scop-detection.cc
+++ b/gcc/graphite-scop-detection.cc
@@ -483,7 +483,7 @@ scop_detection::merge_sese (sese_l first, sese_l second) const
}
bitmap_set_bit (in_sese_region, bb->index);
-
+
basic_block dom = get_immediate_dominator (CDI_DOMINATORS, bb);
FOR_EACH_EDGE (e, ei, bb->preds)
if (e->src == dom
@@ -1544,7 +1544,7 @@ try_generate_gimple_bb (scop_p scop, basic_block bb)
/* Compute alias-sets for all data references in DRS. */
-static bool
+static bool
build_alias_set (scop_p scop)
{
int num_vertices = scop->drs.length ();
diff --git a/gcc/graphite.cc b/gcc/graphite.cc
index 19f8975ffa2..d7f298c8324 100644
--- a/gcc/graphite.cc
+++ b/gcc/graphite.cc
@@ -260,7 +260,7 @@ cached_scalar_evolution_in_region (const sese_l ®ion, loop_p loop,
hstate.add_int (key.loop_num);
inchash::add_expr (key.expr, hstate);
key.hash = hstate.end ();
-
+
bool existed;
tree &chrec = seir_cache->get_or_insert (key, &existed);
if (!existed)
diff --git a/gcc/haifa-sched.cc b/gcc/haifa-sched.cc
index 48b53776fa9..2be52cf8f54 100644
--- a/gcc/haifa-sched.cc
+++ b/gcc/haifa-sched.cc
@@ -121,7 +121,7 @@ along with GCC; see the file COPYING3. If not see
exception regions are also carefully retained by this pass. All
other NOTE insns are grouped in their same relative order at the
beginning of basic blocks and regions that have been scheduled. */
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -388,7 +388,7 @@ static int may_trap_exp (const_rtx, int);
/* Returns a class that insn with GET_DEST(insn)=x may belong to,
as found by analyzing insn's expression. */
-\f
+
static int haifa_luid_for_non_insn (rtx x);
/* Haifa version of sched_info hooks common to all headers. */
@@ -562,7 +562,7 @@ haifa_classify_insn (const_rtx insn)
{
return haifa_classify_rtx (PATTERN (insn));
}
-\f
+
/* After the scheduler initialization function has been called, this function
can be called to enable modulo scheduling. II is the initiation interval
we should use, it affects the delays for delay_pairs that were recorded as
@@ -571,7 +571,7 @@ haifa_classify_insn (const_rtx insn)
MAX_STAGES provides us with a limit
after which we give up scheduling; the caller must have unrolled at least
as many copies of the loop body and recorded delay_pairs for them.
-
+
INSNS is the number of real (non-debug) insns in one iteration of
the loop. MAX_UID can be used to test whether an insn belongs to
the first iteration of the loop; all of them have a uid lower than
@@ -824,7 +824,7 @@ add_delay_dependencies (rtx_insn *insn)
}
}
}
-\f
+
/* Forward declarations. */
static int priority (rtx_insn *, bool force_recompute = false);
@@ -895,10 +895,10 @@ static void calc_priorities (const rtx_vec_t &);
static void add_jump_dependencies (rtx_insn *, rtx_insn *);
#endif /* INSN_SCHEDULING */
-\f
+
/* Point to state used for the current scheduling pass. */
struct haifa_sched_info *current_sched_info;
-\f
+
#ifndef INSN_SCHEDULING
void
schedule_insns (void)
@@ -1122,7 +1122,7 @@ print_curr_reg_pressure (void)
}
fprintf (sched_dump, "\n");
}
-\f
+
/* Determine if INSN has a condition that is clobbered if a register
in SET_REGS is modified. */
static bool
@@ -1283,7 +1283,7 @@ recompute_todo_spec (rtx_insn *next, bool for_backtrack)
}
return 0;
}
-
+
else if (n_control == 1 && n_replace == 0 && n_spec == 0)
{
rtx_insn *pro, *other;
@@ -1293,7 +1293,7 @@ recompute_todo_spec (rtx_insn *next, bool for_backtrack)
rtx_insn *prev = NULL;
int i;
unsigned regno;
-
+
if ((current_sched_info->flags & DO_PREDICATION) == 0
|| (ORIG_PAT (next) != NULL_RTX
&& PREDICATED_PAT (next) == NULL_RTX))
@@ -1365,7 +1365,7 @@ recompute_todo_spec (rtx_insn *next, bool for_backtrack)
return new_ds;
}
-\f
+
/* Pointer to the last instruction scheduled. */
static rtx_insn *last_scheduled_insn;
@@ -1693,7 +1693,7 @@ priority (rtx_insn *insn, bool force_recompute)
return INSN_PRIORITY (insn);
}
-\f
+
/* Macros and functions for keeping the priority queue sorted, and
dealing with queuing and dequeuing of instructions. */
@@ -1750,7 +1750,7 @@ setup_insn_reg_pressure_info (rtx_insn *insn)
}
INSN_REG_PRESSURE_EXCESS_COST_CHANGE (insn) = excess_cost_change;
}
-\f
+
/* This is the first page of code related to SCHED_PRESSURE_MODEL.
It tries to make the scheduler take register pressure into account
without introducing too many unnecessary stalls. It hooks into the
@@ -2265,7 +2265,7 @@ must_restore_pattern_p (rtx_insn *next, dep_t dep)
}
return true;
}
-\f
+
/* model_spill_cost (CL, P, P') returns the cost of increasing the
pressure on CL from P to P'. We use this to calculate a "base ECC",
baseECC (CL, X), for each pressure class CL and each instruction X.
@@ -2532,7 +2532,7 @@ model_set_excess_costs (rtx_insn **insns, int count)
}
}
}
-\f
+
/* Enum of rank_for_schedule heuristic decisions. */
enum rfs_decision {
@@ -3253,7 +3253,7 @@ sched_setup_bb_reg_pressure_info (basic_block bb, rtx_insn *after)
initiate_bb_reg_pressure_info (bb);
setup_insn_max_reg_pressure (after, false);
}
-\f
+
/* If doing predication while scheduling, verify whether INSN, which
has just been scheduled, clobbers the conditions of any
instructions that must be predicated in order to break their
@@ -3298,7 +3298,7 @@ check_clobbered_conditions (rtx_insn *insn)
}
}
}
-\f
+
/* Return (in order):
- positive if INSN adversely affects the pressure on one
@@ -3951,7 +3951,7 @@ sched_pressure_start_bb (basic_block bb)
if (sched_pressure == SCHED_PRESSURE_MODEL)
model_start_schedule (bb);
}
-\f
+
/* A structure that holds local state for the loop in schedule_block. */
struct sched_block_state
{
@@ -7139,7 +7139,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
return success;
}
-\f
+
/* Set_priorities: compute priority of each insn in the block. */
int
diff --git a/gcc/hash-table.cc b/gcc/hash-table.cc
index 6ef7d4cae9e..e75b32d9afa 100644
--- a/gcc/hash-table.cc
+++ b/gcc/hash-table.cc
@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. If not see
code to divide by a constant, we want to be able to use the same algorithm
all the time. All of these inverses (are implied to) have bit 32 set.
- For the record, here's the function that computed the table; it's a
+ For the record, here's the function that computed the table; it's a
vastly simplified version of the function of the same name from gcc. */
struct prime_ent const prime_tab[] = {
diff --git a/gcc/hw-doloop.cc b/gcc/hw-doloop.cc
index 29ead1cc00c..9aeb18bb40d 100644
--- a/gcc/hw-doloop.cc
+++ b/gcc/hw-doloop.cc
@@ -290,7 +290,7 @@ discover_loop (hwloop_info loop, basic_block tail_bb, rtx_insn *tail_insn, rtx r
if (!found_tail)
loop->bad = true;
-
+
/* Find the predecessor, and make sure nothing else jumps into this loop. */
if (!loop->bad)
{
@@ -532,7 +532,7 @@ reorder_loops (hwloop_info loops)
}
loops = loops->next;
}
-
+
FOR_EACH_BB_FN (bb, cfun)
{
if (bb->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
diff --git a/gcc/hw-doloop.h b/gcc/hw-doloop.h
index b683cadc972..7e5fd56929d 100644
--- a/gcc/hw-doloop.h
+++ b/gcc/hw-doloop.h
@@ -101,7 +101,7 @@ struct GTY (()) hwloop_info_d
/* The following values are collected before calling the target's optimize
function and are not valid earlier. */
-
+
/* Record information about control flow: whether the loop has calls
or asm statements, whether it has edges that jump out of the loop,
or edges that jump within the loop. */
diff --git a/gcc/hwint.h b/gcc/hwint.h
index e31aa006fa4..afed7be37cc 100644
--- a/gcc/hwint.h
+++ b/gcc/hwint.h
@@ -51,7 +51,7 @@ extern char sizeof_long_long_must_be_8[sizeof (long long) == 8 ? 1 : -1];
to be either long or long long. */
#define HOST_BITS_PER_WIDE_INT 64
-#if INT64_T_IS_LONG
+#if INT64_T_IS_LONG
# define HOST_WIDE_INT long
# define HOST_WIDE_INT_C(X) X ## L
#else
diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc
index 008796838f7..ea1a2fca95b 100644
--- a/gcc/ifcvt.cc
+++ b/gcc/ifcvt.cc
@@ -106,7 +106,7 @@ static bool noce_convert_multiple_sets_1 (struct noce_if_info *,
auto_vec<rtx> *,
auto_vec<rtx> *,
auto_vec<rtx_insn *> *, int *);
-\f
+
/* Count the number of non-jump active insns in BB. */
static int
@@ -130,7 +130,7 @@ count_bb_insns (const_basic_block bb)
/* Determine whether the total insn_cost on non-jump insns in
basic block BB is less than MAX_COST. This function returns
- false if the cost of any instruction could not be estimated.
+ false if the cost of any instruction could not be estimated.
The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
as those insns are being speculated. MAX_COST is scaled with SCALE
@@ -330,7 +330,7 @@ rtx_interchangeable_p (const_rtx a, const_rtx b)
return mem_attrs_eq_p (get_mem_attrs (a), get_mem_attrs (b));
}
-\f
+
/* Go through a bunch of insns, converting them to conditional
execution format if possible. Return TRUE if all of the non-note
insns were processed. */
@@ -771,7 +771,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
cancel_changes (0);
return FALSE;
}
-\f
+
static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int);
static int noce_try_move (struct noce_if_info *);
static int noce_try_ifelse_collapse (struct noce_if_info *);
@@ -4389,7 +4389,7 @@ done:
return success_p;
}
-\f
+
/* Determine if a given basic block heads a simple IF-THEN-JOIN or an
IF-THEN-ELSE-JOIN block.
@@ -4527,7 +4527,7 @@ noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge,
return FALSE;
}
-\f
+
/* Merge the blocks and mark for local life update. */
@@ -4668,7 +4668,7 @@ merge_if_block (struct ce_if_block * ce_info)
num_updated_if_blocks++;
}
-\f
+
/* Find a block ending in a simple IF condition and try to transform it
in some way. When converting a multi-block condition, put the new code
in the first such block and delete the rest. Return a pointer to this
@@ -5815,7 +5815,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
return FALSE;
}
-\f
+
/* Main entry point for all if-conversion. AFTER_COMBINE is true if
we are after combine pass. */
@@ -5920,7 +5920,7 @@ if_convert (bool after_combine)
checking_verify_flow_info ();
}
-\f
+
/* If-conversion and CFG cleanup. */
static unsigned int
rest_of_handle_if_conversion (void)
diff --git a/gcc/incpath.cc b/gcc/incpath.cc
index 4d44321183f..bbc318aa061 100644
--- a/gcc/incpath.cc
+++ b/gcc/incpath.cc
@@ -260,7 +260,7 @@ remove_duplicates (cpp_reader *pfile, struct cpp_dir *head,
if (HOST_STAT_FOR_64BIT_INODES (cur->name, &st))
{
- /* Dirs that don't exist or have denied permissions are
+ /* Dirs that don't exist or have denied permissions are
silently ignored, unless verbose. */
if ((errno != ENOENT) && (errno != EPERM))
cpp_errno (pfile, CPP_DL_ERROR, cur->name);
diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
index 54ce04c6830..8bfc917db87 100644
--- a/gcc/internal-fn.cc
+++ b/gcc/internal-fn.cc
@@ -890,7 +890,7 @@ static void
expand_ubsan_result_store (rtx target, rtx res)
{
if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
- /* If this is a scalar in a register that is stored in a wider mode
+ /* If this is a scalar in a register that is stored in a wider mode
than the declared mode, compute the result into its declared mode
and then convert to the wider mode. Our value is the computed
expression. */
@@ -1241,7 +1241,7 @@ expand_addsub_overflow (location_t loc, tree_code code, tree lhs,
&& JUMP_P (last)
&& any_condjump_p (last)
&& !find_reg_note (last, REG_BR_PROB, 0))
- add_reg_br_prob_note (last,
+ add_reg_br_prob_note (last,
profile_probability::very_unlikely ());
emit_jump (done_label);
goto do_error_label;
@@ -1391,7 +1391,7 @@ expand_neg_overflow (location_t loc, tree lhs, tree arg1, bool is_ubsan,
&& JUMP_P (last)
&& any_condjump_p (last)
&& !find_reg_note (last, REG_BR_PROB, 0))
- add_reg_br_prob_note (last,
+ add_reg_br_prob_note (last,
profile_probability::very_unlikely ());
emit_jump (done_label);
}
@@ -1450,7 +1450,7 @@ can_widen_mult_without_libcall (scalar_int_mode wmode, scalar_int_mode mode,
if (find_widening_optab_handler (umul_widen_optab, wmode, mode)
!= CODE_FOR_nothing)
return true;
-
+
if (find_widening_optab_handler (smul_widen_optab, wmode, mode)
!= CODE_FOR_nothing)
return true;
@@ -1467,7 +1467,7 @@ can_widen_mult_without_libcall (scalar_int_mode wmode, scalar_int_mode mode,
rtx ret = expand_mult (wmode, op0, op1, NULL_RTX, uns, true);
delete_insns_since (last);
return ret != NULL_RTX;
-}
+}
/* Add mul overflow checking to the statement STMT. */
@@ -1861,7 +1861,7 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1,
&& JUMP_P (last)
&& any_condjump_p (last)
&& !find_reg_note (last, REG_BR_PROB, 0))
- add_reg_br_prob_note (last,
+ add_reg_br_prob_note (last,
profile_probability::very_unlikely ());
emit_jump (done_label);
}
@@ -1961,7 +1961,7 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1,
NULL_RTX, NULL, done_label,
profile_probability::very_likely ());
}
-
+
}
else if (int_mode_for_size (prec / 2, 1).exists (&hmode)
&& 2 * GET_MODE_PRECISION (hmode) == prec)
diff --git a/gcc/ipa-comdats.cc b/gcc/ipa-comdats.cc
index a4225f40233..ea879d52b32 100644
--- a/gcc/ipa-comdats.cc
+++ b/gcc/ipa-comdats.cc
@@ -340,7 +340,7 @@ ipa_comdats (void)
FOR_EACH_DEFINED_SYMBOL (symbol)
{
struct cgraph_node *fun;
- symbol->aux = NULL;
+ symbol->aux = NULL;
if (!symbol->get_comdat_group ()
&& !symbol->alias
&& (!(fun = dyn_cast <cgraph_node *> (symbol))
diff --git a/gcc/ipa-devirt.cc b/gcc/ipa-devirt.cc
index 5e27e4aeb30..ee4819c27d7 100644
--- a/gcc/ipa-devirt.cc
+++ b/gcc/ipa-devirt.cc
@@ -750,7 +750,7 @@ compare_virtual_tables (varpool_node *prevailing, varpool_node *vtable)
{
/* Extra paranoia; compare the sizes. We do not have information
about virtual inheritance offsets, so just be sure that these
- match.
+ match.
Do this as very last check so the not very informative error
is not output too often. */
if (DECL_SIZE (prevailing->decl) != DECL_SIZE (vtable->decl))
@@ -1111,7 +1111,7 @@ warn_types_mismatch (tree t1, tree t2, location_t loc1, location_t loc2)
{
tree i1 = TYPE_DOMAIN (t1);
tree i2 = TYPE_DOMAIN (t2);
-
+
if (i1 && i2
&& TYPE_MAX_VALUE (i1)
&& TYPE_MAX_VALUE (i2)
@@ -1528,7 +1528,7 @@ odr_types_equivalent_p (tree t1, tree t2, bool warn, bool *warned,
warn_odr (t1, t2, f1, f2, warn, warned,
G_("a type with different number of fields "
"is defined in another translation unit"));
-
+
return false;
}
}
@@ -1773,7 +1773,7 @@ add_type_duplicate (odr_type val, tree type)
if (symtab->dump_file)
{
fprintf (symtab->dump_file, "ODR base violation\n");
-
+
print_node (symtab->dump_file, "", val->type, 0);
putc ('\n',symtab->dump_file);
print_node (symtab->dump_file, "", type, 0);
@@ -2324,7 +2324,7 @@ build_type_inheritance_graph (void)
}
/* Return true if N has reference from live virtual table
- (and thus can be a destination of polymorphic call).
+ (and thus can be a destination of polymorphic call).
Be conservatively correct when callgraph is not built or
if the method may be referred externally. */
@@ -2342,7 +2342,7 @@ referenced_from_vtable_p (struct cgraph_node *node)
/* Keep this test constant time.
It is unlikely this can happen except for the case where speculative
- devirtualization introduced many speculative edges to this node.
+ devirtualization introduced many speculative edges to this node.
In this case the target is very likely alive anyway. */
if (node->ref_list.referring.length () > 100)
return true;
@@ -2402,7 +2402,7 @@ maybe_record_node (vec <cgraph_node *> &nodes,
/* The only case when method of anonymous namespace becomes unreferable
is when we completely optimized it out. */
if (flag_ltrans
- || !target
+ || !target
|| !type_in_anonymous_namespace_p (DECL_CONTEXT (target)))
*completep = false;
return;
@@ -2425,7 +2425,7 @@ maybe_record_node (vec <cgraph_node *> &nodes,
}
/* Method can only be called by polymorphic call if any
- of vtables referring to it are alive.
+ of vtables referring to it are alive.
While this holds for non-anonymous functions, too, there are
cases where we want to keep them in the list; for example
@@ -2491,7 +2491,7 @@ maybe_record_node (vec <cgraph_node *> &nodes,
*completep = false;
}
-/* See if BINFO's type matches OUTER_TYPE. If so, look up
+/* See if BINFO's type matches OUTER_TYPE. If so, look up
BINFO of subtype of OTR_TYPE at OFFSET and in that BINFO find
method in vtable and insert method to NODES array
or BASES_TO_CONSIDER if this array is non-NULL.
@@ -2595,15 +2595,15 @@ record_target_from_binfo (vec <cgraph_node *> &nodes,
/* Walking bases that have no virtual method is pointless exercise. */
if (polymorphic_type_binfo_p (base_binfo))
record_target_from_binfo (nodes, bases_to_consider, base_binfo, otr_type,
- type_binfos,
+ type_binfos,
otr_token, outer_type, offset, inserted,
matched_vtables, anonymous, completep);
if (BINFO_VTABLE (binfo))
type_binfos.pop ();
}
-
+
/* Look up virtual methods matching OTR_TYPE (with OFFSET and OTR_TOKEN)
- of TYPE, insert them to NODES, recurse into derived nodes.
+ of TYPE, insert them to NODES, recurse into derived nodes.
INSERTED is used to avoid duplicate insertions of methods into NODES.
MATCHED_VTABLES are used to avoid duplicate walking vtables.
Clear COMPLETEP if unreferable target is found.
@@ -2647,7 +2647,7 @@ possible_polymorphic_call_targets_1 (vec <cgraph_node *> &nodes,
type->anonymous_namespace, completep);
}
for (i = 0; i < type->derived_types.length (); i++)
- possible_polymorphic_call_targets_1 (nodes, inserted,
+ possible_polymorphic_call_targets_1 (nodes, inserted,
matched_vtables,
otr_type,
type->derived_types[i],
@@ -2819,7 +2819,7 @@ subbinfo_with_vtable_at_offset (tree binfo, unsigned HOST_WIDE_INT offset,
}
/* T is known constant value of virtual table pointer.
- Store virtual table to V and its offset to OFFSET.
+ Store virtual table to V and its offset to OFFSET.
Return false if T does not look like virtual table reference. */
bool
@@ -2827,7 +2827,7 @@ vtable_pointer_value_to_vtable (const_tree t, tree *v,
unsigned HOST_WIDE_INT *offset)
{
/* We expect &MEM[(void *)&virtual_table + 16B].
- We obtain object's BINFO from the context of the virtual table.
+ We obtain object's BINFO from the context of the virtual table.
This one contains pointer to virtual table represented via
POINTER_PLUS_EXPR. Verify that this pointer matches what
we propagated through.
@@ -3020,7 +3020,7 @@ class final_warning_record *final_warning_records;
temporarily change to one of base types. INCLUDE_DERIVED_TYPES make
us to walk the inheritance graph for all derivations.
- If COMPLETEP is non-NULL, store true if the list is complete.
+ If COMPLETEP is non-NULL, store true if the list is complete.
CACHE_TOKEN (if non-NULL) will get stored to an unique ID of entry
in the target cache. If user needs to visit every target list
just once, it can memoize them.
@@ -3200,7 +3200,7 @@ possible_polymorphic_call_targets (tree otr_type,
else
target = NULL;
- /* In the case we get complete method, we don't need
+ /* In the case we get complete method, we don't need
to walk derivations. */
if (target && DECL_FINAL_P (target))
context.speculative_maybe_derived_type = false;
@@ -3248,7 +3248,7 @@ possible_polymorphic_call_targets (tree otr_type,
if (target && DECL_CXX_DESTRUCTOR_P (target))
context.maybe_in_construction = false;
- /* In the case we get complete method, we don't need
+ /* In the case we get complete method, we don't need
to walk derivations. */
if (target && DECL_FINAL_P (target))
{
@@ -3669,7 +3669,7 @@ ipa_devirt (void)
}
FOR_EACH_DEFINED_FUNCTION (n)
- {
+ {
bool update = false;
if (!opt_for_fn (n->decl, flag_devirtualize))
continue;
@@ -3696,7 +3696,7 @@ ipa_devirt (void)
possible_polymorphic_call_targets (e);
if (dump_file)
- dump_possible_polymorphic_call_targets
+ dump_possible_polymorphic_call_targets
(dump_file, e, (dump_flags & TDF_DETAILS));
npolymorphic++;
@@ -4160,7 +4160,7 @@ ipa_odr_read_section (struct lto_file_decl_data *file_data, const char *data,
const char *rname = streamer_read_string (data_in, &ib);
unsigned int nvals = streamer_read_uhwi (&ib);
char *name;
-
+
obstack_grow (&odr_enum_obstack, rname, strlen (rname) + 1);
name = XOBFINISH (&odr_enum_obstack, char *);
diff --git a/gcc/ipa-fnsummary.cc b/gcc/ipa-fnsummary.cc
index 8e0aee01fce..bb57d3b7e70 100644
--- a/gcc/ipa-fnsummary.cc
+++ b/gcc/ipa-fnsummary.cc
@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see
present in the callgraph).
We provide access to the ipa_fn_summary data structure and
- basic logic updating the parameters when inlining is performed.
+ basic logic updating the parameters when inlining is performed.
The summaries are context sensitive. Context means
1) partial assignment of known constant values of operands
@@ -1361,7 +1361,7 @@ eliminated_by_inlining_prob (ipa_func_body_info *fbi, gimple *stmt)
lhs_free = true;
/* Writes to parameters, parameters passed by value and return value
- (either directly or passed via invisible reference) are free.
+ (either directly or passed via invisible reference) are free.
TODO: We ought to handle testcase like
struct a {int a,b;};
@@ -2183,7 +2183,7 @@ record_modified (ao_ref *ao ATTRIBUTE_UNUSED, tree vdef, void *data)
}
/* Return probability (based on REG_BR_PROB_BASE) that I-th parameter of STMT
- will change since last invocation of STMT.
+ will change since last invocation of STMT.
Value 0 is reserved for compile time invariants.
For common parameters it is REG_BR_PROB_BASE. For loop invariants it
@@ -2206,7 +2206,7 @@ param_change_prob (ipa_func_body_info *fbi, gimple *stmt, int i)
/* We would have to do non-trivial analysis to really work out what
is the probability of value to change (i.e. when init statement
- is in a sibling loop of the call).
+ is in a sibling loop of the call).
We do an conservative estimate: when call is executed N times more often
than the statement defining value, we take the frequency 1/N. */
@@ -2278,12 +2278,12 @@ param_change_prob (ipa_func_body_info *fbi, gimple *stmt, int i)
max = max.max (BASIC_BLOCK_FOR_FN (cfun, index)->count);
if (dump_file)
{
- fprintf (dump_file, " Set with count ");
+ fprintf (dump_file, " Set with count ");
max.dump (dump_file);
- fprintf (dump_file, " and used with count ");
+ fprintf (dump_file, " and used with count ");
bb->count.dump (dump_file);
fprintf (dump_file, " freq %f\n",
- max.to_sreal_scale (bb->count).to_double ());
+ max.to_sreal_scale (bb->count).to_double ());
}
BITMAP_FREE (info.bb_set);
@@ -2464,7 +2464,7 @@ find_foldable_builtin_expect (basic_block bb)
/* Return true when the basic blocks contains only clobbers followed by RESX.
Such BBs are kept around to make removal of dead stores possible with
presence of EH and will be optimized out by optimize_clobbers later in the
- game.
+ game.
NEED_EH is used to recurse in case the clobber has non-EH predecessors
that can be clobber only, too.. When it is false, the RESX is not necessary
@@ -2616,7 +2616,7 @@ analyze_function_body (struct cgraph_node *node, bool early)
When optimizing and analyzing for early inliner, initialize node params
so we can produce correct BB predicates. */
-
+
if (opt_for_fn (node->decl, optimize))
{
calculate_dominance_info (CDI_DOMINATORS);
@@ -3825,7 +3825,7 @@ ipa_call_context::estimate_size_and_time (ipa_call_estimates *estimates,
}
else
{
- int prob = e->nonconst_predicate.probability
+ int prob = e->nonconst_predicate.probability
(info->conds, m_possible_truths,
m_inline_param_summary);
gcc_checking_assert (prob >= 0);
@@ -4394,9 +4394,9 @@ read_ipa_call_summary (class lto_input_block *ib, struct cgraph_edge *e,
bitpack_d bp = streamer_read_bitpack (ib);
if (es)
- es->is_return_callee_uncaptured = bp_unpack_value (&bp, 1);
+ es->is_return_callee_uncaptured = bp_unpack_value (&bp, 1);
else
- bp_unpack_value (&bp, 1);
+ bp_unpack_value (&bp, 1);
p.stream_in (ib);
if (es)
diff --git a/gcc/ipa-fnsummary.h b/gcc/ipa-fnsummary.h
index 546d15aea30..81a112d6cd1 100644
--- a/gcc/ipa-fnsummary.h
+++ b/gcc/ipa-fnsummary.h
@@ -45,7 +45,7 @@ enum ipa_hints_vals {
it. Set by simple_edge_hints in ipa-inline-analysis.cc. */
INLINE_HINT_declared_inline = 32,
/* Programs are usually still organized for non-LTO compilation and thus
- if functions are in different modules, inlining may not be so important.
+ if functions are in different modules, inlining may not be so important.
Set by simple_edge_hints in ipa-inline-analysis.cc. */
INLINE_HINT_cross_module = 64,
/* We know that the callee is hot by profile. */
@@ -85,7 +85,7 @@ public:
sreal time;
};
-/* Summary about function and stack frame sizes. We keep this info
+/* Summary about function and stack frame sizes. We keep this info
for inline clones and also for WPA streaming. For this reason this is not
part of ipa_fn_summary which exists only for offline functions. */
class ipa_size_summary
diff --git a/gcc/ipa-free-lang-data.cc b/gcc/ipa-free-lang-data.cc
index ff9657a6e06..cd4c751dd4f 100644
--- a/gcc/ipa-free-lang-data.cc
+++ b/gcc/ipa-free-lang-data.cc
@@ -96,7 +96,7 @@ fld_worklist_push (tree t, class free_lang_data_d *fld)
}
-\f
+
/* Return simplified TYPE_NAME of TYPE. */
static tree
diff --git a/gcc/ipa-icf.cc b/gcc/ipa-icf.cc
index 20d37935745..a4f20abed9c 100644
--- a/gcc/ipa-icf.cc
+++ b/gcc/ipa-icf.cc
@@ -948,7 +948,7 @@ set_addressable (varpool_node *node, void *)
return false;
}
-/* Clear DECL_RTL of NODE.
+/* Clear DECL_RTL of NODE.
Helper for call_for_symbol_thunks_and_aliases. */
static bool
@@ -1869,7 +1869,7 @@ sem_variable::equals (tree t1, tree t2)
return false;
return true;
}
-
+
case COMPONENT_REF:
case POINTER_PLUS_EXPR:
case PLUS_EXPR:
diff --git a/gcc/ipa-inline-transform.cc b/gcc/ipa-inline-transform.cc
index fefcc801541..b03cf0c2660 100644
--- a/gcc/ipa-inline-transform.cc
+++ b/gcc/ipa-inline-transform.cc
@@ -59,7 +59,7 @@ int nfunctions_inlined;
/* Scale counts of NODE edges by NUM/DEN. */
static void
-update_noncloned_counts (struct cgraph_node *node,
+update_noncloned_counts (struct cgraph_node *node,
profile_count num, profile_count den)
{
struct cgraph_edge *e;
@@ -568,7 +568,7 @@ save_inline_function_body (struct cgraph_node *node)
if (dump_file)
fprintf (dump_file, "\nSaving body of %s for later reuse\n",
node->dump_name ());
-
+
gcc_assert (node == cgraph_node::get (node->decl));
/* first_clone will be turned into real function. */
@@ -729,7 +729,7 @@ inline_transform (struct cgraph_node *node)
unsigned int todo = 0;
struct cgraph_edge *e, *next;
bool has_inline = false;
-
+
/* FIXME: Currently the pass manager is adding inline transform more than
once to some clones. This needs revisiting after WPA cleanups. */
if (cfun->after_inlining)
diff --git a/gcc/ipa-inline.cc b/gcc/ipa-inline.cc
index 474fbff2057..eb4e1dcdd54 100644
--- a/gcc/ipa-inline.cc
+++ b/gcc/ipa-inline.cc
@@ -129,7 +129,7 @@ static profile_count max_count;
static profile_count spec_rem;
/* Return false when inlining edge E would lead to violating
- limits on function unit growth or stack usage growth.
+ limits on function unit growth or stack usage growth.
The relative function body growth limit is present generally
to avoid problems with non-linear behavior of the compiler.
@@ -311,9 +311,9 @@ sanitize_attrs_match_for_inline_p (const_tree caller, const_tree callee)
!= opts_for_fn (callee->decl)->x_##flag)
/* Decide if we can inline the edge and possibly update
- inline_failed reason.
+ inline_failed reason.
We check whether inlining is possible at all and whether
- caller growth limits allow doing so.
+ caller growth limits allow doing so.
if REPORT is true, output reason to the dump file. */
@@ -444,9 +444,9 @@ inline_insns_auto (cgraph_node *n, bool hint, bool hint2)
}
/* Decide if we can inline the edge and possibly update
- inline_failed reason.
+ inline_failed reason.
We check whether inlining is possible at all and whether
- caller growth limits allow doing so.
+ caller growth limits allow doing so.
if REPORT is true, output reason to the dump file.
@@ -979,7 +979,7 @@ want_inline_small_function_p (struct cgraph_edge *e, bool report)
/* EDGE is self recursive edge.
We handle two cases - when function A is inlining into itself
or when function A is being inlined into another inliner copy of function
- A within function B.
+ A within function B.
In first case OUTER_NODE points to the toplevel copy of A, while
in the second case OUTER_NODE points to the outermost copy of A in B.
@@ -1053,7 +1053,7 @@ want_inline_self_recursive_call_p (struct cgraph_edge *edge,
Deciding reliably on when to do recursive inlining without profile feedback
is tricky. For now we disable recursive inlining when probability of self
- recursion is low.
+ recursion is low.
Recursive inlining of self recursive call within loop also results in
large loop depths that generally optimize badly. We may want to throttle
@@ -1077,7 +1077,7 @@ want_inline_self_recursive_call_p (struct cgraph_edge *edge,
}
/* Return true when NODE has uninlinable caller;
- set HAS_HOT_CALL if it has hot call.
+ set HAS_HOT_CALL if it has hot call.
Worker for cgraph_for_node_and_aliases. */
static bool
@@ -1122,7 +1122,7 @@ has_caller_p (struct cgraph_node *node, void *data ATTRIBUTE_UNUSED)
}
/* Decide if inlining NODE would reduce unit size by eliminating
- the offline copy of function.
+ the offline copy of function.
When COLD is true the cold calls are considered, too. */
static bool
@@ -1225,7 +1225,7 @@ edge_badness (struct cgraph_edge *edge, bool dump)
return sreal::max ();
}
/* When profile is available. Compute badness as:
-
+
time_saved * caller_count
goodness = -------------------------------------------------
growth_of_caller * overall_growth * combined_size
@@ -1531,7 +1531,7 @@ update_caller_keys (edge_heap_t *heap, struct cgraph_node *node,
If UPDATE_SINCE is non-NULL check if edges called within that function
are inlinable (typically UPDATE_SINCE is the inline clone we introduced
where all edges have new context).
-
+
This is used when we know that edge badnesses are going only to increase
(we introduced new call site) and thus all we need is to insert newly
created edges into heap. */
@@ -2105,7 +2105,7 @@ inline_small_functions (void)
&& (!max_count.initialized_p () || !max_count.nonzero_p ()))
{
sreal cached_badness = edge_badness (edge, false);
-
+
int old_size_est = estimate_edge_size (edge);
sreal old_time_est = estimate_edge_time (edge);
int old_hints_est = estimate_edge_hints (edge);
@@ -2156,7 +2156,7 @@ inline_small_functions (void)
resolve_noninline_speculation (&edge_heap, edge);
continue;
}
-
+
callee = edge->callee->ultimate_alias_target ();
growth = estimate_edge_growth (edge);
if (dump_file)
@@ -2761,7 +2761,7 @@ ipa_inline (void)
symtab->remove_unreachable_nodes (dump_file);
/* Inline functions with a property that after inlining into all callers the
- code size will shrink because the out-of-line copy is eliminated.
+ code size will shrink because the out-of-line copy is eliminated.
We do this regardless on the callee size as long as function growth limits
are met. */
if (dump_file)
diff --git a/gcc/ipa-polymorphic-call.cc b/gcc/ipa-polymorphic-call.cc
index a79d39c824b..6d78809ad97 100644
--- a/gcc/ipa-polymorphic-call.cc
+++ b/gcc/ipa-polymorphic-call.cc
@@ -72,7 +72,7 @@ contains_polymorphic_type_p (const_tree type)
}
/* Return true if it seems valid to use placement new to build EXPECTED_TYPE
- at position CUR_OFFSET within TYPE.
+ at position CUR_OFFSET within TYPE.
POD can be changed to an instance of a polymorphic type by
placement new. Here we play safe and assume that any
@@ -112,10 +112,10 @@ possible_placement_new (tree type, tree expected_type,
}
and we look for type at offset sizeof(int), we end up with B and offset 0.
If the same is produced by multiple inheritance, we end up with A and offset
- sizeof(int).
+ sizeof(int).
If we cannot find corresponding class, give up by setting
- THIS->OUTER_TYPE to OTR_TYPE and THIS->OFFSET to NULL.
+ THIS->OUTER_TYPE to OTR_TYPE and THIS->OFFSET to NULL.
Return true when lookup was successful.
When CONSIDER_PLACEMENT_NEW is false, reject contexts that may be made
@@ -296,7 +296,7 @@ ipa_polymorphic_call_context::restrict_to_inner_class (tree otr_type,
Because of the way the bases are packed into a class, the
field's size may be smaller than type size, so it needs
to be done with a care. */
-
+
if (pos <= (unsigned HOST_WIDE_INT)cur_offset
&& (pos + size) >= (unsigned HOST_WIDE_INT)cur_offset
+ POINTER_SIZE
@@ -442,7 +442,7 @@ no_useful_type_info:
if (speculative)
return true;
clear_outer_type (otr_type);
- invalid = true;
+ invalid = true;
return false;
}
}
@@ -742,8 +742,8 @@ ipa_polymorphic_call_context::set_by_decl (tree base, HOST_WIDE_INT off)
outer_type = TYPE_MAIN_VARIANT (TREE_TYPE (base));
offset = off;
/* Make very conservative assumption that all objects
- may be in construction.
-
+ may be in construction.
+
It is up to caller to revisit this via
get_dynamic_type or decl_maybe_in_construction_p. */
maybe_in_construction = true;
@@ -752,7 +752,7 @@ ipa_polymorphic_call_context::set_by_decl (tree base, HOST_WIDE_INT off)
}
/* CST is an invariant (address of decl), try to get meaningful
- polymorphic call context for polymorphic call of method
+ polymorphic call context for polymorphic call of method
if instance of OTR_TYPE that is located at offset OFF of this invariant.
Return FALSE if nothing meaningful can be found. */
@@ -800,7 +800,7 @@ walk_ssa_copies (tree op, hash_set<tree> **global_visited = NULL)
&& !SSA_NAME_IS_DEFAULT_DEF (op)
/* We might be called via fold_stmt during cfgcleanup where
SSA form need not be up-to-date. */
- && !name_registered_for_update_p (op)
+ && !name_registered_for_update_p (op)
&& (gimple_assign_single_p (SSA_NAME_DEF_STMT (op))
|| gimple_code (SSA_NAME_DEF_STMT (op)) == GIMPLE_PHI))
{
@@ -810,7 +810,7 @@ walk_ssa_copies (tree op, hash_set<tree> **global_visited = NULL)
*global_visited = new hash_set<tree>;
if ((*global_visited)->add (op))
goto done;
- }
+ }
else
{
if (!visited)
@@ -1003,7 +1003,7 @@ ipa_polymorphic_call_context::ipa_polymorphic_call_context (tree fndecl,
/* Handle the case we inlined into a thunk. In this case
thunk has THIS pointer of type bar, but it really receives
- address to its base type foo which sits in bar at
+ address to its base type foo which sits in bar at
0-thunk.fixed_offset. It starts with code that adds
think.fixed_offset to the pointer to compensate for this.
@@ -1072,7 +1072,7 @@ ipa_polymorphic_call_context::ipa_polymorphic_call_context (tree fndecl,
not part of outer type. */
if (otr_type && !contains_type_p (outer_type, offset,
otr_type))
- {
+ {
invalid = true;
if (instance)
*instance = base_pointer;
@@ -1111,7 +1111,7 @@ ipa_polymorphic_call_context::ipa_polymorphic_call_context (tree fndecl,
&& gimple_assign_single_p (SSA_NAME_DEF_STMT (base_pointer)))
base_type = TREE_TYPE (gimple_assign_rhs1
(SSA_NAME_DEF_STMT (base_pointer)));
-
+
if (base_type && POINTER_TYPE_P (base_type))
combine_speculation_with (TYPE_MAIN_VARIANT (TREE_TYPE (base_type)),
offset,
@@ -1330,7 +1330,7 @@ extr_type_from_vtbl_ptr_store (gimple *stmt, struct type_change_info *tci,
/* FIXME: We should support construction contexts. */
return NULL;
}
-
+
*type_offset = tree_to_shwi (BINFO_OFFSET (binfo)) * BITS_PER_UNIT;
return DECL_CONTEXT (vtable);
}
@@ -1606,14 +1606,14 @@ ipa_polymorphic_call_context::get_dynamic_type (tree instance,
/* We need to obtain reference to virtual table pointer. It is better
to look it up in the code rather than build our own. This require bit
of pattern matching, but we end up verifying that what we found is
- correct.
+ correct.
What we pattern match is:
tmp = instance->_vptr.A; // vtbl ptr load
tmp2 = tmp[otr_token]; // vtable lookup
OBJ_TYPE_REF(tmp2;instance->0) (instance);
-
+
We want to start alias oracle walk from vtbl pointer load,
but we may not be able to identify it, for example, when PRE moved the
load around. */
@@ -1675,7 +1675,7 @@ ipa_polymorphic_call_context::get_dynamic_type (tree instance,
}
}
}
-
+
/* If we failed to look up the reference in code, build our own. */
if (!instance_ref)
{
@@ -1740,7 +1740,7 @@ ipa_polymorphic_call_context::get_dynamic_type (tree instance,
&tci, NULL, &function_entry_reached, aa_walk_budget);
/* If we did not find any type changing statements, we may still drop
- maybe_in_construction flag if the context already have outer type.
+ maybe_in_construction flag if the context already have outer type.
Here we make special assumptions about both constructors and
destructors which are all the functions that are allowed to alter the
@@ -1778,7 +1778,7 @@ ipa_polymorphic_call_context::get_dynamic_type (tree instance,
only these). We then must detect that statements in section 2 change
the dynamic type and can try to derive the new type. That is enough
and we can stop, we will never see the calls into constructors of
- sub-objects in this code.
+ sub-objects in this code.
Therefore if the static outer type was found (outer_type)
we can safely ignore tci.speculative that is set on calls and give up
@@ -1888,14 +1888,14 @@ ipa_polymorphic_call_context::speculation_consistent_p (tree spec_outer_type,
return false;
/* If outer type already contains speculation as a filed,
- it is useless. We already know from OUTER_TYPE
+ it is useless. We already know from OUTER_TYPE
SPEC_TYPE and that it is not in the construction. */
if (contains_type_p (outer_type, offset - spec_offset,
spec_outer_type, false, false))
return false;
/* If speculative outer type is not more specified than outer
- type, just give up.
+ type, just give up.
We can only decide this safely if we can compare types with OUTER_TYPE.
*/
if ((!in_lto_p || odr_type_p (outer_type))
@@ -1907,7 +1907,7 @@ ipa_polymorphic_call_context::speculation_consistent_p (tree spec_outer_type,
}
/* Improve THIS with speculation described by NEW_OUTER_TYPE, NEW_OFFSET,
- NEW_MAYBE_DERIVED_TYPE
+ NEW_MAYBE_DERIVED_TYPE
If OTR_TYPE is set, assume the context is used with OTR_TYPE. */
bool
@@ -2195,7 +2195,7 @@ ipa_polymorphic_call_context::combine_with (ipa_polymorphic_call_context ctx,
/* It may be easy to check if second context permits the first
and set INVALID otherwise. This is not easy to do in general;
contains_type_p may return false negatives for non-comparable
- types.
+ types.
If OTR_TYPE is known, we however can expect that
restrict_to_inner_class should have discovered the same base
diff --git a/gcc/ipa-profile.cc b/gcc/ipa-profile.cc
index 8083b8195a8..92cfad4306e 100644
--- a/gcc/ipa-profile.cc
+++ b/gcc/ipa-profile.cc
@@ -32,7 +32,7 @@ along with GCC; see the file COPYING3. If not see
node corresponding to the target and produce a speculative call.
This call may or may not survive through IPA optimization based on decision
- of inliner.
+ of inliner.
- Finally we propagate the following flags: unlikely executed, executed
once, executed at startup and executed at exit. These flags are used to
control code size/performance threshold and code placement (by producing
@@ -136,7 +136,7 @@ dump_histogram (FILE *file, vec<histogram_entry *> histogram)
unsigned int i;
gcov_type overall_time = 0, cumulated_time = 0, cumulated_size = 0,
overall_size = 0;
-
+
fprintf (dump_file, "Histogram:\n");
for (i = 0; i < histogram.length (); i++)
{
@@ -801,7 +801,7 @@ ipa_profile (void)
cumulated_size += histogram[i]->size;
}
fprintf (dump_file, "Determined min count: %" PRId64
- " Time:%3.2f%% Size:%3.2f%%\n",
+ " Time:%3.2f%% Size:%3.2f%%\n",
(int64_t)threshold,
cumulated_time * 100.0 / overall_time,
cumulated_size * 100.0 / overall_size);
diff --git a/gcc/ipa-prop.cc b/gcc/ipa-prop.cc
index 36b2a104a54..456087e51a6 100644
--- a/gcc/ipa-prop.cc
+++ b/gcc/ipa-prop.cc
@@ -780,7 +780,7 @@ param_type_may_change_p (tree function, tree arg, gimple *call)
callsite CALL) by looking for assignments to its virtual table pointer. If
it is, return true. ARG is the object itself (not a pointer
to it, unless dereferenced). BASE is the base of the memory access as
- returned by get_ref_base_and_extent, as is the offset.
+ returned by get_ref_base_and_extent, as is the offset.
This is helper function for detect_type_change and detect_type_change_ssa
that does the heavy work which is usually unnecesary. */
@@ -3368,7 +3368,7 @@ update_jump_functions_after_inlining (struct cgraph_edge *cs,
}
}
-/* If TARGET is an addr_expr of a function declaration, make it the
+/* If TARGET is an addr_expr of a function declaration, make it the
(SPECULATIVE)destination of an indirect edge IE and return the edge.
Otherwise, return NULL. */
@@ -3432,7 +3432,7 @@ ipa_make_edge_direct_to_target (struct cgraph_edge *ie, tree target,
{
/* We are better to ensure we can refer to it.
- In the case of static functions we are out of luck, since we already
+ In the case of static functions we are out of luck, since we already
removed its body. In the case of public functions we may or may
not introduce the reference. */
if (!canonicalize_constructor_val (target, NULL)
@@ -5798,7 +5798,7 @@ ipcp_update_bits (struct cgraph_node *node)
if (align > 1)
{
if (dump_file)
- fprintf (dump_file, "Adjusting align: %u, misalign: %u\n", align, misalign);
+ fprintf (dump_file, "Adjusting align: %u, misalign: %u\n", align, misalign);
unsigned old_align, old_misalign;
struct ptr_info_def *pi = get_ptr_info (ddef);
@@ -5823,7 +5823,7 @@ ipcp_update_bits (struct cgraph_node *node)
fprintf (dump_file, "old_misalign (%u) and misalign (%u) mismatch\n",
old_misalign, misalign);
- set_ptr_info_alignment (pi, align, misalign);
+ set_ptr_info_alignment (pi, align, misalign);
}
}
}
diff --git a/gcc/ipa-pure-const.cc b/gcc/ipa-pure-const.cc
index 224a582f77c..47d1ac7cc46 100644
--- a/gcc/ipa-pure-const.cc
+++ b/gcc/ipa-pure-const.cc
@@ -1201,7 +1201,7 @@ funct_state_summary_t::duplicate (cgraph_node *, cgraph_node *dst,
dst_data->malloc_state = STATE_MALLOC_BOTTOM;
}
-\f
+
void
pass_ipa_pure_const::
register_hooks (void)
@@ -2364,7 +2364,7 @@ pass_nothrow::execute (function *)
callee_t))
continue;
}
-
+
if (dump_file)
{
fprintf (dump_file, "Statement can throw: ");
diff --git a/gcc/ipa-reference.cc b/gcc/ipa-reference.cc
index 3ad83c3c18f..75254f3d512 100644
--- a/gcc/ipa-reference.cc
+++ b/gcc/ipa-reference.cc
@@ -247,7 +247,7 @@ ipa_reference_get_written_global (struct cgraph_node *fn)
else
return NULL;
}
-\f
+
/* Hepler for is_proper_for_analysis. */
static bool
@@ -652,7 +652,7 @@ generate_summary (void)
}
}
}
-\f
+
/* Set READ_ALL/WRITE_ALL based on decl flags of NODE. */
static void
@@ -913,10 +913,10 @@ propagate (void)
if (!node->alias && opt_for_fn (node->decl, flag_ipa_reference))
{
node_g = &node_info->global;
- bool read_all =
+ bool read_all =
(node_g->statics_read == all_module_statics
|| bitmap_equal_p (node_g->statics_read, all_module_statics));
- bool written_all =
+ bool written_all =
(node_g->statics_written == all_module_statics
|| bitmap_equal_p (node_g->statics_written,
all_module_statics));
diff --git a/gcc/ipa-split.cc b/gcc/ipa-split.cc
index 0113461065c..d73c45cdfaf 100644
--- a/gcc/ipa-split.cc
+++ b/gcc/ipa-split.cc
@@ -54,10 +54,10 @@ along with GCC; see the file COPYING3. If not see
2) Via DFS walk find all possible basic blocks where we can split
and chose best one.
3) If split point is found, split at the specified BB by creating a clone
- and updating function to call it.
+ and updating function to call it.
The decisions what functions to split are in execute_split_functions
- and consider_split.
+ and consider_split.
There are several possible future improvements for this pass including:
@@ -70,7 +70,7 @@ along with GCC; see the file COPYING3. If not see
value computed in header from function parameter in very cheap way, we
can just recompute it.
5) Support splitting of nested functions.
- 6) Support non-SSA arguments.
+ 6) Support non-SSA arguments.
7) There is nothing preventing us from producing multiple parts of single function
when needed or splitting also the parts. */
@@ -316,7 +316,7 @@ verify_non_ssa_vars (class split_point *current, bitmap non_ssa_vars,
else
break;
}
-
+
done:
BITMAP_FREE (seen);
worklist.release ();
@@ -574,7 +574,7 @@ consider_split (class split_point *current, bitmap non_ssa_vars,
/* Splitting functions brings the target out of comdat group; this will
lead to code duplication if the function is reused by other unit.
- Limit this duplication. This is consistent with limit in tree-sra.cc
+ Limit this duplication. This is consistent with limit in tree-sra.cc
FIXME: with LTO we ought to be able to do better! */
if (DECL_ONE_ONLY (current_function_decl)
&& current->split_size >= (unsigned int) param_max_inline_insns_auto + 10)
@@ -602,7 +602,7 @@ consider_split (class split_point *current, bitmap non_ssa_vars,
we can pass more than that. */
if (num_args != bitmap_count_bits (current->ssa_names_to_pass))
{
-
+
if (dump_file && (dump_flags & TDF_DETAILS))
fprintf (dump_file,
" Refused: need to pass non-param values\n");
@@ -708,9 +708,9 @@ consider_split (class split_point *current, bitmap non_ssa_vars,
if (!best_split_point.split_bbs
|| best_split_point.count
> current->count
- || (best_split_point.count == current->count
+ || (best_split_point.count == current->count
&& best_split_point.split_size < current->split_size))
-
+
{
if (dump_file && (dump_flags & TDF_DETAILS))
fprintf (dump_file, " New best split point!\n");
@@ -853,7 +853,7 @@ mark_nonssa_use (gimple *, tree t, tree, void *data)
for ssa uses and store them in USED_SSA_NAMES and for any non-SSA automatic
vars stored in NON_SSA_VARS.
- When BB has edge to RETURN_BB, collect uses in RETURN_BB too.
+ When BB has edge to RETURN_BB, collect uses in RETURN_BB too.
Return false when BB contains something that prevents it from being put into
split function. */
@@ -883,7 +883,7 @@ visit_bb (basic_block bb, basic_block return_bb,
/* FIXME: We can split regions containing EH. We cannot however
split RESX, EH_DISPATCH and EH_POINTER referring to same region
into different partitions. This would require tracking of
- EH regions and checking in consider_split_point if they
+ EH regions and checking in consider_split_point if they
are not used elsewhere. */
if (gimple_code (stmt) == GIMPLE_RESX)
{
diff --git a/gcc/ipa-utils.cc b/gcc/ipa-utils.cc
index 163899af6af..362d1eb3e66 100644
--- a/gcc/ipa-utils.cc
+++ b/gcc/ipa-utils.cc
@@ -379,7 +379,7 @@ scale_ipa_profile_for_fn (struct cgraph_node *node, profile_count orig_count)
profile_count to = node->count;
profile_count::adjust_for_ipa_scaling (&to, &orig_count);
struct cgraph_edge *e;
-
+
for (e = node->callees; e; e = e->next_callee)
e->count = e->count.apply_scale (to, orig_count);
for (e = node->indirect_calls; e; e = e->next_callee)
@@ -521,7 +521,7 @@ ipa_merge_profiles (struct cgraph_node *dst,
"Giving up; last block mismatch.\n");
match = false;
}
- else
+ else
{
basic_block srcbb, dstbb;
struct cgraph_edge *e, *e2;
@@ -643,14 +643,14 @@ ipa_merge_profiles (struct cgraph_node *dst,
if (srce->probability.initialized_p ())
dste->probability = srce->probability;
}
- }
- else
+ }
+ else
{
for (i = 0; i < EDGE_COUNT (srcbb->succs); i++)
{
edge srce = EDGE_SUCC (srcbb, i);
edge dste = EDGE_SUCC (dstbb, i);
- dste->probability =
+ dste->probability =
dste->probability * dstbb->count.ipa ().probability_in
(dstbb->count.ipa ()
+ srccount.ipa ())
diff --git a/gcc/ipa-utils.h b/gcc/ipa-utils.h
index 8733ff48cda..69e41ae89bb 100644
--- a/gcc/ipa-utils.h
+++ b/gcc/ipa-utils.h
@@ -114,7 +114,7 @@ void set_type_canonical_for_odr_type (tree type, tree canonical);
void register_odr_enum (tree type);
/* Return vector containing possible targets of polymorphic call E.
- If COMPLETEP is non-NULL, store true if the list is complete.
+ If COMPLETEP is non-NULL, store true if the list is complete.
CACHE_TOKEN (if non-NULL) will get stored to an unique ID of entry
in the target cache. If user needs to visit every target list
just once, it can memoize them.
@@ -182,7 +182,7 @@ possible_polymorphic_call_target_p (struct cgraph_edge *e,
context, n);
}
-/* Return true if BINFO corresponds to a type with virtual methods.
+/* Return true if BINFO corresponds to a type with virtual methods.
Every type has several BINFOs. One is the BINFO associated by the type
while other represents bases of derived types. The BINFOs representing
@@ -247,7 +247,7 @@ type_in_anonymous_namespace_p (const_tree t)
return !TREE_PUBLIC (TYPE_STUB_DECL (t));
}
-/* Return true of T is type with One Definition Rule info attached.
+/* Return true of T is type with One Definition Rule info attached.
It means that either it is anonymous type or it has assembler name
set. */
diff --git a/gcc/ipa-visibility.cc b/gcc/ipa-visibility.cc
index 8ec82bb333e..039dac946f0 100644
--- a/gcc/ipa-visibility.cc
+++ b/gcc/ipa-visibility.cc
@@ -17,7 +17,7 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* This file implements two related passes:
+/* This file implements two related passes:
- pass_data_ipa_function_and_variable_visibility run just after
symbol table, references and callgraph are built
@@ -116,7 +116,7 @@ cgraph_node::local_p (void)
return n->callees->callee->local_p ();
return !n->call_for_symbol_thunks_and_aliases (non_local_p,
NULL, true);
-
+
}
/* A helper for comdat_can_be_unshared_p. */
@@ -157,7 +157,7 @@ comdat_can_be_unshared_p_1 (symtab_node *node)
/* COMDAT functions must be shared only if they have address taken,
otherwise we can produce our own private implementation with
- -fwhole-program.
+ -fwhole-program.
Return true when turning COMDAT function static cannot lead to wrong
code when the resulting object links with a library defining same COMDAT.
@@ -352,7 +352,7 @@ can_replace_by_local_alias (symtab_node *node)
node = node->get_alias_target ();
if (node->weakref)
return false;
-
+
return (node->get_availability () > AVAIL_INTERPOSABLE
&& !decl_binds_to_current_def_p (node->decl)
&& !node->can_be_discarded_p ());
@@ -389,7 +389,7 @@ update_vtable_references (tree *tp, int *walk_subtrees,
}
/* In LTO we can remove COMDAT groups and weak symbols.
- Either turn them into normal symbols or external symbol depending on
+ Either turn them into normal symbols or external symbol depending on
resolution info. */
static void
@@ -766,7 +766,7 @@ function_and_variable_visibility (bool whole_program)
enable more optimization.
TODO: We can also update virtual tables. */
- if (node->callers
+ if (node->callers
&& can_replace_by_local_alias (node))
{
cgraph_node *alias = dyn_cast<cgraph_node *>
diff --git a/gcc/ipa.cc b/gcc/ipa.cc
index 4de605000b6..843de61d40c 100644
--- a/gcc/ipa.cc
+++ b/gcc/ipa.cc
@@ -261,7 +261,7 @@ walk_polymorphic_call_targets (hash_set<void *> *reachable_call_targets,
nodes even when they are reachable.
- virtual functions are kept in callgraph even if they seem unreachable in
- hope calls to them will be devirtualized.
+ hope calls to them will be devirtualized.
Again we remove them after inlining. In late optimization some
devirtualization may happen, but it is not important since we won't inline
@@ -806,7 +806,7 @@ ipa_discover_variable_flags (void)
}
if (!address_taken && !written
/* Making variable in explicit section readonly can cause section
- type conflict.
+ type conflict.
See e.g. gcc.c-torture/compile/pr23237.c */
&& vnode->get_section () == NULL)
{
@@ -818,7 +818,7 @@ ipa_discover_variable_flags (void)
{
if (dump_file)
fprintf (dump_file, " %s (write-only)", vnode->dump_name ());
- vnode->call_for_symbol_and_aliases (set_writeonly_bit, &remove_p,
+ vnode->call_for_symbol_and_aliases (set_writeonly_bit, &remove_p,
true);
}
}
@@ -1376,7 +1376,7 @@ make_pass_ipa_cdtor_merge (gcc::context *ctxt)
FUNCTION is current single user of a variable, VAR is variable that uses it.
Latttice is stored in SINGLE_USER_MAP.
- We represent:
+ We represent:
- TOP by no entry in SIGNLE_USER_MAP
- BOTTOM by BOTTOM in AUX pointer (to save lookups)
- known single user by cgraph pointer in SINGLE_USER_MAP. */
diff --git a/gcc/ira-build.cc b/gcc/ira-build.cc
index 93e46033170..73d352450a2 100644
--- a/gcc/ira-build.cc
+++ b/gcc/ira-build.cc
@@ -89,7 +89,7 @@ ira_copy_t *ira_copies;
/* Size of the previous array. */
int ira_copies_num;
-\f
+
/* LAST_BASIC_BLOCK before generating additional insns because of live
range splitting. Emitting insns on a critical edge creates a new
@@ -243,7 +243,7 @@ finish_loop_tree_nodes (void)
ira_free (ira_bb_nodes);
}
-\f
+
/* The following recursive function adds LOOP to the loop tree
hierarchy. LOOP is added only once. If LOOP is NULL we adding
@@ -364,7 +364,7 @@ form_loop_tree (void)
ira_assert (ira_loop_tree_root->regno_allocno_map != NULL);
}
-\f
+
/* Rebuild IRA_REGNO_ALLOCNO_MAP and REGNO_ALLOCNO_MAPs of the loop
tree nodes. */
@@ -409,7 +409,7 @@ rebuild_regno_allocno_maps (void)
loop_tree_node->regno_allocno_map[regno] = a;
}
}
-\f
+
/* Pools for allocnos, allocno live ranges and objects. */
static object_allocator<live_range> live_range_pool ("live ranges");
@@ -1163,7 +1163,7 @@ finish_allocnos (void)
live_range_pool.release ();
}
-\f
+
/* Pools for allocno preferences. */
static object_allocator <ira_allocno_pref> pref_pool ("prefs");
@@ -1350,7 +1350,7 @@ finish_prefs (void)
pref_pool.release ();
}
-\f
+
/* Pools for copies. */
static object_allocator<ira_allocno_copy> copy_pool ("copies");
@@ -1609,7 +1609,7 @@ finish_copies (void)
copy_pool.release ();
}
-\f
+
/* Pools for cost vectors. It is defined only for allocno classes. */
static pool_allocator *cost_vector_pool[N_REG_CLASSES];
@@ -1660,7 +1660,7 @@ finish_cost_vectors (void)
}
}
-\f
+
/* Compute a post-ordering of the reverse control flow of the loop body
designated by the children nodes of LOOP_NODE, whose body nodes in
@@ -1758,7 +1758,7 @@ ira_allocno_t *ira_curr_regno_allocno_map;
IRA_CURR_LOOP_TREE_NODE and IRA_CURR_REGNO_ALLOCNO_MAP. If BB_P,
basic block nodes of LOOP_NODE is also processed (before its
subloop nodes).
-
+
If BB_P is set and POSTORDER_FUNC is given, the basic blocks in
the loop are passed in the *reverse* post-order of the *reverse*
CFG. This is only used by ira_create_allocno_live_ranges, which
@@ -1825,7 +1825,7 @@ ira_traverse_loop_tree (bool bb_p, ira_loop_tree_node_t loop_node,
(*postorder_func) (loop_node);
}
-\f
+
/* The basic block currently being processed. */
static basic_block curr_bb;
@@ -2114,7 +2114,7 @@ create_allocnos (void)
propagate_modified_regnos);
}
-\f
+
/* The page contains function to remove some regions from a separate
register allocation. We remove regions whose separate allocation
@@ -2659,7 +2659,7 @@ remove_unnecessary_regions (bool all_p)
removed_loop_vec.release ();
}
-\f
+
/* At this point true value of allocno attribute bad_spill_p means
that there is an insn where allocno occurs and where the allocno
@@ -2731,7 +2731,7 @@ update_bad_spill_attribute (void)
}
}
-\f
+
/* Set up minimal and maximal live range points for allocnos. */
static void
@@ -2996,7 +2996,7 @@ setup_min_max_conflict_allocno_ids (void)
}
}
-\f
+
static void
create_caps (void)
@@ -3020,7 +3020,7 @@ create_caps (void)
}
}
-\f
+
/* The page contains code transforming more one region internal
representation (IR) to one region IR which is necessary for reload.
@@ -3393,7 +3393,7 @@ ira_flattening (int max_regno_before_emit, int ira_max_point_before_emit)
ira_free (regno_top_level_allocno_map);
}
-\f
+
#ifdef ENABLE_IRA_CHECKING
/* Check creation of all allocnos. Allocnos on lower levels should
diff --git a/gcc/ira-color.cc b/gcc/ira-color.cc
index fe6dfc6e769..5761239cbe9 100644
--- a/gcc/ira-color.cc
+++ b/gcc/ira-color.cc
@@ -199,7 +199,7 @@ static vec<ira_allocno_t> allocno_stack_vec;
issues, e.g. X - Y < 0 for some X > 0 and Y < 0. */
#define SORTGT(x,y) (((x) > (y)) ? 1 : -1)
-\f
+
/* Definition of vector of allocno hard registers. */
@@ -313,7 +313,7 @@ allocno_hard_regs_compare (const void *v1p, const void *v2p)
return SORTGT (allocno_hard_regs_hasher::hash(hv2), allocno_hard_regs_hasher::hash(hv1));
}
-\f
+
/* Used for finding a common ancestor of two allocno hard registers
nodes in the forest. We use the current value of
@@ -573,7 +573,7 @@ remove_unused_allocno_hard_regs_nodes (allocno_hard_regs_node_t *roots)
{
if (prev == NULL)
*roots = node->first;
- else
+ else
prev->next = node->first;
if (next != NULL)
next->prev = last;
@@ -718,7 +718,7 @@ form_allocno_hard_regs_nodes_forest (void)
{
a = ira_allocnos[i];
allocno_data = ALLOCNO_COLOR_DATA (a);
-
+
if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
continue;
hv = (add_allocno_hard_regs
@@ -811,7 +811,7 @@ static void
finish_allocno_hard_regs_nodes_forest (void)
{
allocno_hard_regs_node_t node, next;
-
+
ira_free (allocno_hard_regs_subnodes);
for (node = hard_regs_roots; node != NULL; node = next)
{
@@ -850,7 +850,7 @@ setup_left_conflict_sizes_p (ira_allocno_t a)
ira_object_t obj = ALLOCNO_OBJECT (a, k);
ira_object_t conflict_obj;
ira_object_conflict_iterator oci;
-
+
FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
{
int size;
@@ -890,7 +890,7 @@ setup_left_conflict_sizes_p (ira_allocno_t a)
for (i = 0; i < data->hard_regs_subnodes_num; i++)
{
allocno_hard_regs_node_t temp_node;
-
+
temp_node = allocno_hard_regs_nodes[i + node_preorder_num];
ira_assert (temp_node->preorder_num == i + node_preorder_num);
subnodes[i].left_conflict_size = (temp_node->check != node_check_tick
@@ -903,7 +903,7 @@ setup_left_conflict_sizes_p (ira_allocno_t a)
HARD_REG_SET temp_set;
int j, n, hard_regno;
enum reg_class aclass;
-
+
temp_set = temp_node->hard_regs->set & profitable_hard_regs;
aclass = ALLOCNO_CLASS (a);
for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
@@ -921,7 +921,7 @@ setup_left_conflict_sizes_p (ira_allocno_t a)
{
int size, parent_i;
allocno_hard_regs_node_t parent;
-
+
size = (subnodes[i].left_conflict_subnodes_size
+ MIN (subnodes[i].max_node_impact
- subnodes[i].left_conflict_subnodes_size,
@@ -1001,7 +1001,7 @@ update_left_conflict_sizes_p (ira_allocno_t a,
subnodes[i].left_conflict_subnodes_size -= diff;
}
if (i != 0
- || (conflict_size
+ || (conflict_size
+ ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
> data->available_regs_num))
return false;
@@ -1054,7 +1054,7 @@ setup_profitable_hard_regs (void)
for (k = 0; k < nobj; k++)
{
ira_object_t obj = ALLOCNO_OBJECT (a, k);
-
+
data->profitable_hard_regs
&= ~OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
}
@@ -1086,7 +1086,7 @@ setup_profitable_hard_regs (void)
if (nregs == nobj && nregs > 1)
{
int num = OBJECT_SUBWORD (conflict_obj);
-
+
if (REG_WORDS_BIG_ENDIAN)
CLEAR_HARD_REG_BIT
(ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
@@ -1144,7 +1144,7 @@ setup_profitable_hard_regs (void)
}
}
-\f
+
/* This page contains functions used to choose hard registers for
allocnos. */
@@ -1530,12 +1530,12 @@ static void
update_conflict_allocno_hard_prefs (ira_allocno_t allocno)
{
int l, nr = ALLOCNO_NUM_OBJECTS (allocno);
-
+
for (l = 0; l < nr; l++)
{
ira_object_t conflict_obj, obj = ALLOCNO_OBJECT (allocno, l);
ira_object_conflict_iterator oci;
-
+
FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
{
ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
@@ -1715,7 +1715,7 @@ check_hard_reg_p (ira_allocno_t a, int hard_regno,
{
int k;
int set_to_test_start = 0, set_to_test_end = nwords;
-
+
if (nregs == nwords)
{
if (REG_WORDS_BIG_ENDIAN)
@@ -1970,7 +1970,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
if (! retry_p)
start_update_cost ();
mem_cost += ALLOCNO_UPDATED_MEMORY_COST (a);
-
+
ira_allocate_and_copy_costs (&ALLOCNO_UPDATED_HARD_REG_COSTS (a),
aclass, ALLOCNO_HARD_REG_COSTS (a));
a_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
@@ -1996,7 +1996,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
ira_object_t conflict_obj;
ira_object_t obj = ALLOCNO_OBJECT (a, word);
ira_object_conflict_iterator oci;
-
+
/* Take preferences of conflicting allocnos into account. */
FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
{
@@ -2098,7 +2098,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
!= curr_allocno_process))
{
int k, *conflict_costs;
-
+
ALLOCNO_COLOR_DATA (conflict_a)->last_process
= curr_allocno_process;
ira_allocate_and_copy_costs
@@ -2216,7 +2216,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
return best_hard_regno >= 0;
}
-\f
+
/* An array used to sort copies. */
static ira_copy_t *sorted_copies;
@@ -2227,7 +2227,7 @@ static ira_allocno_t
get_cap_member (ira_allocno_t a)
{
ira_allocno_t member;
-
+
while ((member = ALLOCNO_CAP_MEMBER (a)) != NULL)
a = member;
return a;
@@ -2290,7 +2290,7 @@ copy_freq_compare_func (const void *v1p, const void *v2p)
return cp1->num - cp2->num;
}
-\f
+
/* Return true if any allocno from thread of A1 conflicts with any
allocno from thread A2. */
@@ -2470,7 +2470,7 @@ init_allocno_threads (void)
}
}
-\f
+
/* This page contains the allocator based on the Chaitin-Briggs algorithm. */
@@ -2541,7 +2541,7 @@ bucket_allocno_compare_func (const void *v1p, const void *v2p)
freq2 = ALLOCNO_COLOR_DATA (t2)->thread_freq;
if ((diff = freq1 - freq2) != 0)
return diff;
-
+
if ((diff = ALLOCNO_NUM (t2) - ALLOCNO_NUM (t1)) != 0)
return diff;
@@ -2661,7 +2661,7 @@ push_allocno_to_stack (ira_allocno_t a)
enum reg_class aclass;
allocno_color_data_t data, conflict_data;
int size, i, n = ALLOCNO_NUM_OBJECTS (a);
-
+
data = ALLOCNO_COLOR_DATA (a);
data->in_graph_p = false;
allocno_stack_vec.safe_push (a);
@@ -2680,7 +2680,7 @@ push_allocno_to_stack (ira_allocno_t a)
ira_object_t obj = ALLOCNO_OBJECT (a, i);
ira_object_t conflict_obj;
ira_object_conflict_iterator oci;
-
+
FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
{
ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
@@ -2711,7 +2711,7 @@ push_allocno_to_stack (ira_allocno_t a)
fprintf (ira_dump_file, " colorable\n");
}
}
-
+
}
}
}
@@ -3223,7 +3223,7 @@ improve_allocation (void)
ira_object_t conflict_obj;
ira_object_t obj = ALLOCNO_OBJECT (a, word);
ira_object_conflict_iterator oci;
-
+
FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
{
ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
@@ -3310,7 +3310,7 @@ improve_allocation (void)
ira_object_t conflict_obj;
ira_object_t obj = ALLOCNO_OBJECT (a, word);
ira_object_conflict_iterator oci;
-
+
FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
{
ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
@@ -3424,7 +3424,7 @@ color_allocnos (void)
ira_remove_pref (pref);
}
}
-
+
if (flag_ira_algorithm == IRA_ALGORITHM_PRIORITY)
{
n = 0;
@@ -3518,7 +3518,7 @@ color_allocnos (void)
improve_allocation ();
}
-\f
+
/* Output information about the loop given by its LOOP_TREE_NODE. */
static void
@@ -3768,7 +3768,7 @@ do_coloring (void)
ira_free_bitmap (coloring_allocno_bitmap);
}
-\f
+
/* Move spill/restore code, which are to be generated in ira-emit.cc,
to less frequent points (if it is profitable) by reassigning some
@@ -3919,7 +3919,7 @@ move_spill_restore (void)
}
}
-\f
+
/* Update current hard reg costs and current conflict hard reg costs
for allocno A. It is done by processing its copies containing
@@ -4059,7 +4059,7 @@ ira_reassign_conflict_allocnos (int start_regno)
}
}
-\f
+
/* This page contains functions used to find conflicts using allocno
live ranges. */
@@ -4086,7 +4086,7 @@ conflict_by_live_ranges_p (int regno1, int regno2)
#endif
-\f
+
/* This page contains code to coalesce memory stack slots used by
spilled allocnos. This results in smaller stack frame, better data
@@ -4638,7 +4638,7 @@ ira_sort_regnos_for_alter_reg (int *pseudo_regnos, int n,
ira_free (regno_coalesced_allocno_cost);
}
-\f
+
/* This page contains code used by the reload pass to improve the
final code. */
@@ -5126,7 +5126,7 @@ ira_better_spill_reload_regno_p (int *regnos, int *other_regnos,
return false;
}
-\f
+
/* Allocate and initialize data necessary for assign_hard_reg. */
void
@@ -5153,7 +5153,7 @@ ira_finish_assign (void)
ira_free (sorted_copies);
}
-\f
+
/* Entry function doing color-based register allocation. */
static void
@@ -5168,7 +5168,7 @@ color (void)
move_spill_restore ();
}
-\f
+
/* This page contains a simple register allocator without usage of
allocno conflicts. This is used for fast allocation for -O0. */
@@ -5275,7 +5275,7 @@ fast_allocation (void)
ira_print_disposition (ira_dump_file);
}
-\f
+
/* Entry function doing coloring. */
void
diff --git a/gcc/ira-conflicts.cc b/gcc/ira-conflicts.cc
index 5aa080af421..644fcf34be5 100644
--- a/gcc/ira-conflicts.cc
+++ b/gcc/ira-conflicts.cc
@@ -53,7 +53,7 @@ static IRA_INT_TYPE **conflicts;
OBJECT_CONFLICT_ID (C2), \
OBJECT_MIN (C1), OBJECT_MAX (C1)))
-\f
+
/* Record a conflict between objects OBJ1 and OBJ2. If necessary,
canonicalize the conflict by recording it for lower-order subobjects
of the corresponding allocnos. */
@@ -188,7 +188,7 @@ build_conflict_bit_table (void)
sparseset_free (objects_live);
return true;
}
-\f
+
/* Return true iff allocnos A1 and A2 cannot be allocated to the same
register due to conflicts. */
@@ -665,7 +665,7 @@ build_conflicts (void)
ira_free (collected_conflict_objects);
}
-\f
+
/* Print hard reg set SET with TITLE to FILE. */
static void
@@ -790,7 +790,7 @@ ira_debug_conflicts (bool reg_p)
print_conflicts (stderr, reg_p);
}
-\f
+
/* Entry function which builds allocno conflicts and allocno copies
and accumulate some allocno info on upper level regions. */
diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc
index 4c28171f27d..d4c74f0f6fc 100644
--- a/gcc/ira-costs.cc
+++ b/gcc/ira-costs.cc
@@ -104,7 +104,7 @@ static int *regno_equiv_gains;
/* Execution frequency of the current insn. */
static int frequency;
-\f
+
/* Info about reg classes whose costs are calculated for a pseudo. */
struct cost_classes
@@ -413,7 +413,7 @@ finish_regno_cost_classes (void)
cost_classes_htab = NULL;
}
-\f
+
/* Compute the cost of loading X into (if TO_P is TRUE) or from (if
TO_P is FALSE) a register of class RCLASS in mode MODE. X must not
@@ -471,7 +471,7 @@ copy_cost (rtx x, machine_mode mode, reg_class_t rclass, bool to_p,
return sri.extra_cost + COSTS_N_INSNS (1);
}
-\f
+
/* Record the cost of using memory or hard registers of various
classes for the operands in INSN.
@@ -1051,7 +1051,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
}
-\f
+
/* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */
static inline bool
@@ -1271,7 +1271,7 @@ record_address_regs (machine_mode mode, addr_space_t as, rtx x,
}
}
-\f
+
/* Calculate the costs of insn operands. */
static void
@@ -1334,7 +1334,7 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref)
cost = (i == 0
? move_costs[hard_reg_class][rclass]
: move_costs[rclass][hard_reg_class]);
-
+
op_costs[i]->cost[k] = cost * frequency;
/* If this insn is a single set copying operand 1 to
operand 0 and one operand is an allocno with the
@@ -1422,7 +1422,7 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref)
constraints, insn, pref);
}
-\f
+
/* Process one insn INSN. Scan it and record each time it would save
code to put a certain allocnos in a certain class. Return the last
@@ -1511,7 +1511,7 @@ scan_one_insn (rtx_insn *insn)
for (i = 0; i < recog_data.n_operands; i++)
{
rtx op = recog_data.operand[i];
-
+
if (GET_CODE (op) == SUBREG)
op = SUBREG_REG (op);
if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
@@ -1522,7 +1522,7 @@ scan_one_insn (rtx_insn *insn)
int *p_costs = p->cost, *q_costs = q->cost;
cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
int add_cost;
-
+
/* If the already accounted for the memory "cost" above, don't
do so again. */
if (!counted_mem)
@@ -1546,7 +1546,7 @@ scan_one_insn (rtx_insn *insn)
return insn;
}
-\f
+
/* Print allocnos costs to file F. */
static void
@@ -2023,7 +2023,7 @@ find_costs_and_classes (FILE *dump_file)
ira_free (regno_best_class);
}
-\f
+
/* Process moves involving hard regs to modify allocno hard register
costs. We can do this only after determining allocno class. If a
@@ -2172,7 +2172,7 @@ setup_allocno_class_and_costs (void)
process_bb_node_for_hard_reg_moves, NULL);
}
-\f
+
/* Function called once during compiler work. */
void
@@ -2231,7 +2231,7 @@ ira_init_costs (void)
temp_costs = (struct costs *) xmalloc (max_struct_costs_size);
}
-\f
+
/* Common initialization function for ira_costs and
ira_set_pseudo_classes. */
@@ -2298,7 +2298,7 @@ ira_set_pseudo_classes (bool define_pseudo_classes, FILE *dump_file)
finish_costs ();
}
-\f
+
/* Change hard register costs for allocnos which lives through
function calls. This is called only when we found all intersected
diff --git a/gcc/ira-emit.cc b/gcc/ira-emit.cc
index bcc4f09f7c4..29a03c3356c 100644
--- a/gcc/ira-emit.cc
+++ b/gcc/ira-emit.cc
@@ -147,7 +147,7 @@ create_new_allocno (int regno, ira_loop_tree_node_t loop_tree_node)
return a;
}
-\f
+
/* See comments below. */
typedef struct move *move_t;
@@ -573,7 +573,7 @@ change_loop (ira_loop_tree_node_t node)
if (node != ira_loop_tree_root)
{
ira_assert (current_loops != NULL);
-
+
if (node->bb != NULL)
{
FOR_BB_INSNS (node->bb, insn)
diff --git a/gcc/ira-int.h b/gcc/ira-int.h
index 95ad76e96ce..c73c32a517e 100644
--- a/gcc/ira-int.h
+++ b/gcc/ira-int.h
@@ -191,7 +191,7 @@ extern ira_loop_tree_node_t ira_loop_nodes;
#define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
-\f
+
/* The structure describes program points where a given allocno lives.
If the live ranges of two allocnos are intersected, the allocnos
are in conflict. */
@@ -638,7 +638,7 @@ extern int64_t ira_reg_cost, ira_mem_cost;
extern int64_t ira_load_cost, ira_store_cost, ira_shuffle_cost;
extern int ira_move_loops_num, ira_additional_jumps_num;
-\f
+
/* This page contains a bitset implementation called 'min/max sets' used to
record conflicts in IRA.
They are named min/maxs set since we keep track of a minimum and a maximum
@@ -789,7 +789,7 @@ minmax_set_iter_next (minmax_set_iterator *i)
for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
minmax_set_iter_cond (&(ITER), &(N)); \
minmax_set_iter_next (&(ITER)))
-\f
+
class target_ira_int {
public:
~target_ira_int ();
@@ -969,7 +969,7 @@ extern class target_ira_int *this_target_ira_int;
(this_target_ira_int->x_ira_reg_class_superunion)
#define ira_prohibited_mode_move_regs \
(this_target_ira_int->x_ira_prohibited_mode_move_regs)
-\f
+
/* ira.cc: */
extern void *ira_allocate (size_t);
@@ -1081,7 +1081,7 @@ extern void ira_initiate_emit_data (void);
extern void ira_finish_emit_data (void);
extern void ira_emit (bool);
-\f
+
/* Return true if equivalence of pseudo REGNO is not a lvalue. */
static inline bool
@@ -1095,7 +1095,7 @@ ira_equiv_no_lvalue_p (int regno)
&& MEM_READONLY_P (ira_reg_equiv[regno].memory)));
}
-\f
+
/* Initialize register costs for MODE if necessary. */
static inline void
@@ -1105,7 +1105,7 @@ ira_init_register_move_cost_if_necessary (machine_mode mode)
ira_init_register_move_cost (mode);
}
-\f
+
/* The iterator for all allocnos. */
struct ira_allocno_iterator {
@@ -1143,7 +1143,7 @@ ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
#define FOR_EACH_ALLOCNO(A, ITER) \
for (ira_allocno_iter_init (&(ITER)); \
ira_allocno_iter_cond (&(ITER), &(A));)
-\f
+
/* The iterator for all objects. */
struct ira_object_iterator {
/* The number of the current element in ira_object_id_map. */
@@ -1180,7 +1180,7 @@ ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
#define FOR_EACH_OBJECT(OBJ, ITER) \
for (ira_object_iter_init (&(ITER)); \
ira_object_iter_cond (&(ITER), &(OBJ));)
-\f
+
/* The iterator for objects associated with an allocno. */
struct ira_allocno_object_iterator {
/* The number of the element the allocno's object array. */
@@ -1216,7 +1216,7 @@ ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
#define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
for (ira_allocno_object_iter_init (&(ITER)); \
ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
-\f
+
/* The iterator for prefs. */
struct ira_pref_iterator {
@@ -1254,7 +1254,7 @@ ira_pref_iter_cond (ira_pref_iterator *i, ira_pref_t *pref)
#define FOR_EACH_PREF(P, ITER) \
for (ira_pref_iter_init (&(ITER)); \
ira_pref_iter_cond (&(ITER), &(P));)
-\f
+
/* The iterator for copies. */
struct ira_copy_iterator {
@@ -1292,7 +1292,7 @@ ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
#define FOR_EACH_COPY(C, ITER) \
for (ira_copy_iter_init (&(ITER)); \
ira_copy_iter_cond (&(ITER), &(C));)
-\f
+
/* The iterator for object conflicts. */
struct ira_object_conflict_iterator {
@@ -1400,7 +1400,7 @@ ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
ira_object_conflict_iter_cond (&(ITER), &(CONF));)
-\f
+
/* The function returns TRUE if at least one hard register from ones
starting with HARD_REGNO and containing value of MODE are in set
@@ -1446,7 +1446,7 @@ ira_hard_reg_in_set_p (int hard_regno, machine_mode mode,
return true;
}
-\f
+
/* To save memory we use a lazy approach for allocation and
initialization of the cost vectors. We do this only when it is
diff --git a/gcc/ira-lives.cc b/gcc/ira-lives.cc
index 6a3901ee234..5db904e4fd9 100644
--- a/gcc/ira-lives.cc
+++ b/gcc/ira-lives.cc
@@ -866,7 +866,7 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
{
case 'g':
return NO_REGS;
-
+
default:
/* ??? Is this the best way to handle memory constraints? */
cn = lookup_constraint (constraints);
@@ -890,7 +890,7 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
return NO_REGS;
cl = next_cl;
break;
-
+
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
{
@@ -1124,7 +1124,7 @@ find_call_crossed_cheap_reg (rtx_insn *insn)
}
}
return cheap_reg;
-}
+}
/* Determine whether INSN is a register to register copy of the type where
we do not need to make the source and destiniation registers conflict.
@@ -1428,7 +1428,7 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node)
make_early_clobber_and_input_conflicts ();
curr_point++;
-
+
/* Mark each used value as live. */
FOR_EACH_INSN_USE (use, insn)
mark_ref_live (use);
@@ -1582,7 +1582,7 @@ remove_some_program_points_and_update_live_ranges (void)
live_range_t r, prev_r, next_r;
sbitmap_iterator sbi;
bool born_p, dead_p, prev_born_p, prev_dead_p;
-
+
auto_sbitmap born (ira_max_point);
auto_sbitmap dead (ira_max_point);
bitmap_clear (born);
diff --git a/gcc/ira.cc b/gcc/ira.cc
index 66df03e8a59..d92eb574f09 100644
--- a/gcc/ira.cc
+++ b/gcc/ira.cc
@@ -200,7 +200,7 @@ along with GCC; see the file COPYING3. If not see
stack. Pushing thread allocnos one after another onto the
stack increases chances of removing copies when the allocnos
get the same hard reg.
-
+
We also use a modification of Chaitin-Briggs algorithm which
works for intersected register classes of allocnos. To
figure out trivial colorability of allocnos, the mentioned
@@ -437,7 +437,7 @@ static HARD_REG_SET temp_hard_regset;
#define last_mode_for_init_move_cost \
(this_target_ira_int->x_last_mode_for_init_move_cost)
-\f
+
/* The function sets up the map IRA_REG_MODE_HARD_REGSET. */
static void
@@ -457,7 +457,7 @@ setup_reg_mode_hard_regset (void)
}
}
-\f
+
#define no_unit_alloc_regs \
(this_target_ira_int->x_no_unit_alloc_regs)
@@ -520,7 +520,7 @@ setup_alloc_regs (bool use_hard_frame_p)
setup_class_hard_regs ();
}
-\f
+
#define alloc_reg_class_subclasses \
(this_target_ira_int->x_alloc_reg_class_subclasses)
@@ -560,7 +560,7 @@ setup_reg_subclasses (void)
}
}
-\f
+
/* Set up IRA_MEMORY_MOVE_COST and IRA_MAX_MEMORY_MOVE_COST. */
static void
@@ -631,7 +631,7 @@ setup_class_subset_and_memory_move_costs (void)
setup_reg_subclasses ();
}
-\f
+
/* Define the following macro if allocation through malloc if
preferable. */
@@ -686,7 +686,7 @@ ira_free_bitmap (bitmap b ATTRIBUTE_UNUSED)
/* do nothing */
}
-\f
+
/* Output information about allocation of all allocnos (except for
caps) into file F. */
@@ -728,7 +728,7 @@ ira_debug_disposition (void)
ira_print_disposition (stderr);
}
-\f
+
/* Set up ira_stack_reg_pressure_class which is the biggest pressure
register class containing stack registers or NO_REGS if there are
@@ -791,7 +791,7 @@ setup_pressure_classes (void)
if (targetm.compute_pressure_classes)
n = targetm.compute_pressure_classes (pressure_classes);
else
- {
+ {
n = 0;
for (cl = 0; cl < N_REG_CLASSES; cl++)
{
@@ -1306,7 +1306,7 @@ setup_reg_class_relations (void)
& ~no_unit_alloc_regs);
if (ira_reg_class_subunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_set2, temp_hard_regset)
-
+
&& (temp_set2 != temp_hard_regset
|| cl3 == GENERAL_REGS
/* If the allocatable hard register sets are the
@@ -1407,7 +1407,7 @@ find_reg_classes (void)
setup_reg_class_relations ();
}
-\f
+
/* Set up the array above. */
static void
@@ -1439,7 +1439,7 @@ setup_hard_regno_aclass (void)
}
}
-\f
+
/* Form IRA_REG_CLASS_MAX_NREGS and IRA_REG_CLASS_MIN_NREGS maps. */
static void
@@ -1463,7 +1463,7 @@ setup_reg_class_nregs (void)
}
}
-\f
+
/* Set up IRA_PROHIBITED_CLASS_MODE_REGS, IRA_EXCLUDE_CLASS_MODE_REGS, and
IRA_CLASS_SINGLETON. This function is called once IRA_CLASS_HARD_REGS has
@@ -1545,7 +1545,7 @@ clarify_prohibited_class_mode_regs (void)
}
}
}
-\f
+
/* Allocate and initialize IRA_REGISTER_MOVE_COST, IRA_MAY_MOVE_IN_COST
and IRA_MAY_MOVE_OUT_COST for MODE. */
void
@@ -1612,7 +1612,7 @@ ira_init_register_move_cost (machine_mode mode)
{
int cost;
enum reg_class *p1, *p2;
-
+
if (last_move_cost[cl1][cl2] == 65535)
{
ira_register_move_cost[mode][cl1][cl2] = 65535;
@@ -1622,29 +1622,29 @@ ira_init_register_move_cost (machine_mode mode)
else
{
cost = last_move_cost[cl1][cl2];
-
+
for (p2 = ®_class_subclasses[cl2][0];
*p2 != LIM_REG_CLASSES; p2++)
if (ira_class_hard_regs_num[*p2] > 0
&& (ira_reg_class_max_nregs[*p2][mode]
<= ira_class_hard_regs_num[*p2]))
cost = MAX (cost, ira_register_move_cost[mode][cl1][*p2]);
-
+
for (p1 = ®_class_subclasses[cl1][0];
*p1 != LIM_REG_CLASSES; p1++)
if (ira_class_hard_regs_num[*p1] > 0
&& (ira_reg_class_max_nregs[*p1][mode]
<= ira_class_hard_regs_num[*p1]))
cost = MAX (cost, ira_register_move_cost[mode][*p1][cl2]);
-
+
ira_assert (cost <= 65535);
ira_register_move_cost[mode][cl1][cl2] = cost;
-
+
if (ira_class_subset_p[cl1][cl2])
ira_may_move_in_cost[mode][cl1][cl2] = 0;
else
ira_may_move_in_cost[mode][cl1][cl2] = cost;
-
+
if (ira_class_subset_p[cl2][cl1])
ira_may_move_out_cost[mode][cl1][cl2] = 0;
else
@@ -1653,7 +1653,7 @@ ira_init_register_move_cost (machine_mode mode)
}
}
-\f
+
/* This is called once during compiler work. It sets up
different arrays whose values don't depend on the compiled
@@ -1720,7 +1720,7 @@ ira_init (void)
ira_init_costs ();
}
-\f
+
#define ira_prohibited_mode_move_regs_initialized_p \
(this_target_ira_int->x_ira_prohibited_mode_move_regs_initialized_p)
@@ -1762,7 +1762,7 @@ setup_prohibited_mode_move_regs (void)
}
}
-\f
+
/* Extract INSN and return the set of alternatives that we should consider.
This excludes any alternatives whose constraints are obviously impossible
@@ -1827,7 +1827,7 @@ ira_setup_alts (rtx_insn *insn)
case '\0':
len = 0;
break;
-
+
case '%':
/* The commutative modifier is handled above. */
break;
@@ -1846,11 +1846,11 @@ ira_setup_alts (rtx_insn *insn)
win_p = true;
}
break;
-
+
case 'g':
goto op_success;
break;
-
+
default:
{
enum constraint_num cn = lookup_constraint (p);
@@ -2040,7 +2040,7 @@ ira_get_dup_out_num (int op_num, alternative_mask alts,
goto fail;
break;
}
-
+
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
{
@@ -2119,7 +2119,7 @@ ira_get_dup_out_num (int op_num, alternative_mask alts,
return -1;
}
-\f
+
/* Search forward to see if the source register of a copy insn dies
before either it or the destination register is modified, but don't
@@ -2159,7 +2159,7 @@ decrease_live_ranges_number (void)
continue;
sregno = REGNO (src);
dregno = REGNO (dest);
-
+
/* We don't want to mess with hard regs if register classes
are small. */
if (sregno == dregno
@@ -2172,7 +2172,7 @@ decrease_live_ranges_number (void)
|| sregno == STACK_POINTER_REGNUM
|| dregno == STACK_POINTER_REGNUM)
continue;
-
+
dest_death = NULL_RTX;
for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
@@ -2181,7 +2181,7 @@ decrease_live_ranges_number (void)
continue;
if (BLOCK_FOR_INSN (p) != bb)
break;
-
+
if (reg_set_p (src, p) || reg_set_p (dest, p)
/* If SRC is an asm-declared register, it must not be
replaced in any asm. Unfortunately, the REG_EXPR
@@ -2201,20 +2201,20 @@ decrease_live_ranges_number (void)
|| (GET_CODE (PATTERN (p)) == USE
&& reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
break;
-
+
/* See if all of SRC dies in P. This test is slightly
more conservative than it needs to be. */
if ((note = find_regno_note (p, REG_DEAD, sregno))
&& GET_MODE (XEXP (note, 0)) == GET_MODE (src))
{
int failed = 0;
-
+
/* We can do the optimization. Scan forward from INSN
again, replacing regs as we go. Set FAILED if a
replacement can't be done. In that case, we can't
move the death note for SRC. This should be
rare. */
-
+
/* Set to stop at next insn. */
for (q = next_real_insn (insn);
q != next_real_insn (p);
@@ -2231,11 +2231,11 @@ decrease_live_ranges_number (void)
if (sregno < FIRST_PSEUDO_REGISTER
&& reg_mentioned_p (dest, PATTERN (q)))
failed = 1;
-
+
/* Attempt to replace all uses. */
else if (!validate_replace_rtx (src, dest, q))
failed = 1;
-
+
/* If this succeeded, but some part of the
register is still present, undo the
replacement. */
@@ -2246,7 +2246,7 @@ decrease_live_ranges_number (void)
failed = 1;
}
}
-
+
/* If DEST dies here, remove the death note and
save it for later. Make sure ALL of DEST dies
here; again, this is overly conservative. */
@@ -2262,7 +2262,7 @@ decrease_live_ranges_number (void)
}
}
}
-
+
if (! failed)
{
/* Move death note of SRC from P to INSN. */
@@ -2270,7 +2270,7 @@ decrease_live_ranges_number (void)
XEXP (note, 1) = REG_NOTES (insn);
REG_NOTES (insn) = note;
}
-
+
/* DEST is also dead if INSN has a REG_UNUSED note for
DEST. */
if (! dest_death
@@ -2280,7 +2280,7 @@ decrease_live_ranges_number (void)
PUT_REG_NOTE_KIND (dest_death, REG_DEAD);
remove_note (insn, dest_death);
}
-
+
/* Put death note of DEST on P if we saw it die. */
if (dest_death)
{
@@ -2289,7 +2289,7 @@ decrease_live_ranges_number (void)
}
break;
}
-
+
/* If SRC is a hard register which is set or killed in
some other way, we can't do this optimization. */
else if (sregno < FIRST_PSEUDO_REGISTER && dead_or_set_p (p, src))
@@ -2298,7 +2298,7 @@ decrease_live_ranges_number (void)
}
}
-\f
+
/* Return nonzero if REGNO is a particularly bad choice for reloading X. */
static bool
@@ -2409,7 +2409,7 @@ ira_setup_eliminable_regset (void)
if (frame_pointer_needed)
for (i = 0; i < fp_reg_count; i++)
df_set_regs_ever_live (HARD_FRAME_POINTER_REGNUM + i, true);
-
+
ira_no_alloc_regs = no_unit_alloc_regs;
CLEAR_HARD_REG_SET (eliminable_regset);
@@ -2460,7 +2460,7 @@ ira_setup_eliminable_regset (void)
}
}
-\f
+
/* Vector of substitutions of register numbers,
used to map pseudo regs into hardware regs.
@@ -2499,7 +2499,7 @@ setup_reg_renumber (void)
int i, nwords;
enum reg_class pclass;
ira_object_t obj;
-
+
pclass = ira_pressure_class_translate[REGNO_REG_CLASS (hard_regno)];
nwords = ALLOCNO_NUM_OBJECTS (a);
for (i = 0; i < nwords; i++)
@@ -2900,7 +2900,7 @@ setup_preferred_alternate_classes_for_new_pseudos (int start)
}
}
-\f
+
/* The number of entries allocated in reg_info. */
static int allocated_reg_info_size;
@@ -2936,7 +2936,7 @@ too_high_register_pressure_p (void)
return false;
}
-\f
+
/* Indicate that hard register number FROM was eliminated and replaced with
an offset from hard register number TO. The status of hard registers live
@@ -2968,7 +2968,7 @@ mark_elimination (int from, int to)
}
}
-\f
+
/* The length of the following array. */
int ira_reg_equiv_len;
@@ -3008,7 +3008,7 @@ finish_reg_equiv (void)
free (ira_reg_equiv);
}
-\f
+
struct equivalence
{
@@ -3267,7 +3267,7 @@ process_set_for_memref_referenced_p (rtx memref, rtx x)
}
else if (memref_referenced_p (memref, x, false))
return true;
-
+
return false;
}
@@ -3322,7 +3322,7 @@ memref_referenced_p (rtx memref, rtx x, bool read_p)
return true;
return memref_referenced_p (memref, XEXP (x, 0), true);
-
+
case POST_MODIFY:
case PRE_MODIFY:
/* op0 = op0 + op1 */
@@ -4092,7 +4092,7 @@ indirect_jump_optimize (void)
timevar_pop (TV_JUMP);
}
}
-\f
+
/* Set up fields memory, constant, and invariant from init_insns in
the structures of array ira_reg_equiv. */
static void
@@ -4111,7 +4111,7 @@ setup_reg_equiv (void)
next_elem = elem->next ();
insn = elem->insn ();
set = single_set (insn);
-
+
/* Init insns can set up equivalence when the reg is a destination or
a source (in this case the destination is memory). */
if (set != 0 && (REG_P (SET_DEST (set)) || REG_P (SET_SRC (set))))
@@ -4137,7 +4137,7 @@ setup_reg_equiv (void)
&& REGNO (SET_DEST (set)) == (unsigned int) i)
x = SET_SRC (set);
else
- {
+ {
gcc_assert (REG_P (SET_SRC (set))
&& REGNO (SET_SRC (set)) == (unsigned int) i);
x = SET_DEST (set);
@@ -4163,7 +4163,7 @@ setup_reg_equiv (void)
else if (function_invariant_p (x))
{
machine_mode mode;
-
+
mode = GET_MODE (SET_DEST (set));
if (GET_CODE (x) == PLUS
|| x == frame_pointer_rtx || x == arg_pointer_rtx)
@@ -4193,7 +4193,7 @@ setup_reg_equiv (void)
}
}
-\f
+
/* Print chain C to FILE. */
static void
@@ -4540,7 +4540,7 @@ build_insn_chain (void)
if (dump_file)
print_insn_chains (dump_file);
}
- \f
+
/* Examine the rtx found in *LOC, which is read or written to as determined
by TYPE. Return false if we find a reason why an insn containing this
rtx should not be moved (such as accesses to non-constant memory), true
@@ -4569,7 +4569,7 @@ rtx_moveable_p (rtx *loc, enum op_type type)
return true;
if (HARD_REGISTER_P (x))
return false;
-
+
return true;
case MEM:
@@ -4669,7 +4669,7 @@ static vec<rtx> pseudo_replaced_reg;
(typically induction variables), as this increases the freedom for our
intended transformation, and does not limit the second instruction
scheduler pass. */
-
+
static void
find_moveable_pseudos (void)
{
@@ -4724,7 +4724,7 @@ find_moveable_pseudos (void)
df_ref def, use;
uid_luid[INSN_UID (insn)] = i++;
-
+
def = df_single_def (insn_info);
use = df_single_use (insn_info);
if (use
@@ -4796,7 +4796,7 @@ find_moveable_pseudos (void)
for (note = REG_NOTES (def_insn); note; note = XEXP (note, 1))
if (REG_NOTE_KIND (note) == REG_EQUIV && MEM_P (XEXP (note, 0)))
break;
-
+
if (note)
{
if (dump_file)
@@ -4976,7 +4976,7 @@ find_moveable_pseudos (void)
}
}
}
-
+
FOR_EACH_BB_FN (bb, cfun)
{
bitmap_clear (bb_local + bb->index);
@@ -5263,7 +5263,7 @@ move_unallocated_pseudos (void)
first_moveable_pseudo = last_moveable_pseudo = 0;
}
-\f
+
/* Code dealing with scratches (changing them onto
pseudos and restoring them from the pseudos).
@@ -5334,7 +5334,7 @@ static bool
contains_X_constraint_p (const char *str)
{
int c;
-
+
while ((c = *str))
{
str += CONSTRAINT_LEN (c, str);
@@ -5342,7 +5342,7 @@ contains_X_constraint_p (const char *str)
}
return false;
}
-
+
/* Change INSN's scratches into pseudos and save their location.
Return true if we changed any scratch. */
bool
@@ -5352,7 +5352,7 @@ ira_remove_insn_scratches (rtx_insn *insn, bool all_p, FILE *dump_file,
int i;
bool insn_changed_p;
rtx reg, *loc;
-
+
extract_insn (insn);
insn_changed_p = false;
for (i = 0; i < recog_data.n_operands; i++)
@@ -5452,7 +5452,7 @@ ira_restore_scratches (FILE *dump_file)
bitmap_clear (&scratch_operand_bitmap);
}
-\f
+
/* If the backend knows where to allocate pseudos for hard
register initial values, register these allocations now. */
@@ -5503,7 +5503,7 @@ allocate_initial_values (void)
}
}
-\f
+
/* True when we use LRA instead of reload pass for the current
@@ -5529,7 +5529,7 @@ ira (FILE *f)
edge_iterator ei;
edge e;
bool output_jump_reload_p = false;
-
+
if (ira_use_lra_p)
{
/* First put potential jump output reloads on the output edges
@@ -5981,7 +5981,7 @@ do_reload (void)
FOR_ALL_BB_FN (bb, cfun)
bb->loop_father = NULL;
current_loops = NULL;
-
+
regstat_free_ri ();
regstat_free_n_sets_and_refs ();
}
@@ -6049,7 +6049,7 @@ do_reload (void)
timevar_pop (TV_IRA);
}
-\f
+
/* Run the integrated register allocator. */
namespace {
diff --git a/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc b/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc
index bd8fbdc0fd8..6b891f385f2 100644
--- a/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc
+++ b/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc
@@ -776,7 +776,7 @@ compilation_state::create_function (const char *funcname)
ctxt.new_cast (x, bool_type, loc),
op_blocks[op->op_operand], /* on_true */
next_block, /* on_false */
- loc);
+ loc);
break;
default:
diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc
index f111a01501a..2c813faebb6 100644
--- a/gcc/jit/jit-playback.cc
+++ b/gcc/jit/jit-playback.cc
@@ -3879,7 +3879,7 @@ void
playback::context::
init_types ()
{
- /* See lto_init() in lto-lang.cc or void visit (TypeBasic *t) in D's types.cc
+ /* See lto_init() in lto-lang.cc or void visit (TypeBasic *t) in D's types.cc
for reference. If TYPE_NAME is not set, debug info will not contain types */
#define NAME_TYPE(t,n) \
if (t) \
diff --git a/gcc/json.cc b/gcc/json.cc
index 01879c9c466..7778208714e 100644
--- a/gcc/json.cc
+++ b/gcc/json.cc
@@ -266,7 +266,7 @@ literal::print (pretty_printer *pp) const
}
}
-\f
+
#if CHECKING_P
namespace selftest {
diff --git a/gcc/jump.cc b/gcc/jump.cc
index 7a5db118e7a..09ed36e346a 100644
--- a/gcc/jump.cc
+++ b/gcc/jump.cc
@@ -64,7 +64,7 @@ static void mark_jump_label_1 (rtx, rtx_insn *, bool, bool);
static void mark_jump_label_asm (rtx, rtx_insn *);
static void redirect_exp_1 (rtx *, rtx, rtx, rtx_insn *);
static int invert_exp_1 (rtx, rtx_insn *);
-\f
+
/* Worker for rebuild_jump_labels and rebuild_jump_labels_chain. */
static void
rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
@@ -99,14 +99,14 @@ rebuild_jump_labels (rtx_insn *f)
}
/* This function is like rebuild_jump_labels, but doesn't run over
- forced_labels. It can be used on insn chains that aren't the
+ forced_labels. It can be used on insn chains that aren't the
main function chain. */
void
rebuild_jump_labels_chain (rtx_insn *chain)
{
rebuild_jump_labels_1 (chain, false);
}
-\f
+
/* Some old code expects exactly one BARRIER as the NEXT_INSN of a
non-fallthru insn. This is not generally true, as multiple barriers
may have crept in, or the BARRIER may be separated from the last
@@ -197,7 +197,7 @@ make_pass_cleanup_barriers (gcc::context *ctxt)
return new pass_cleanup_barriers (ctxt);
}
-\f
+
/* Initialize LABEL_NUSES and JUMP_LABEL fields, add REG_LABEL_TARGET
for remaining targets for JUMP_P. Delete any REG_LABEL_OPERAND
notes whose labels don't occur in the insn any more. */
@@ -344,7 +344,7 @@ mark_all_labels (rtx_insn *f)
}
}
}
-\f
+
/* Given a comparison (CODE ARG0 ARG1), inside an insn, INSN, return a code
of reversed comparison if it is possible to do so. Otherwise return UNKNOWN.
UNKNOWN may be returned in case we are having CC_MODE compare and we don't
@@ -485,7 +485,7 @@ reversed_comparison (const_rtx exp, machine_mode mode)
XEXP (exp, 0), XEXP (exp, 1));
}
-\f
+
/* Given an rtx-code for a comparison, return the code for the negated
comparison. If no such code exists, return UNKNOWN.
@@ -685,7 +685,7 @@ signed_condition (enum rtx_code code)
gcc_unreachable ();
}
}
-\f
+
/* Return nonzero if CODE1 is more strict than CODE2, i.e., if the
truth of CODE1 implies the truth of CODE2. */
@@ -767,7 +767,7 @@ comparison_dominates_p (enum rtx_code code1, enum rtx_code code2)
return 0;
}
-\f
+
/* Return 1 if INSN is an unconditional jump and nothing else. */
int
@@ -1011,7 +1011,7 @@ jump_to_label_p (const rtx_insn *insn)
return (JUMP_P (insn)
&& JUMP_LABEL (insn) != NULL && !ANY_RETURN_P (JUMP_LABEL (insn)));
}
-\f
+
/* Find all CODE_LABELs referred to in X, and increment their use
counts. If INSN is a JUMP_INSN and there is at least one
CODE_LABEL referenced in INSN as a jump target, then store the last
@@ -1199,7 +1199,7 @@ mark_jump_label_asm (rtx asmop, rtx_insn *insn)
for (i = ASM_OPERANDS_LABEL_LENGTH (asmop) - 1; i >= 0; --i)
mark_jump_label_1 (ASM_OPERANDS_LABEL (asmop, i), insn, false, true);
}
-\f
+
/* Delete insn INSN from the chain of insns and update label ref counts
and delete insns now unreachable.
@@ -1332,7 +1332,7 @@ delete_related_insns (rtx uncast_insn)
next = NEXT_INSN (next);
return next;
}
-\f
+
/* Delete a range of insns from FROM to TO, inclusive.
This is for the sake of peephole optimization, so assume
that whatever these insns do will still be done by a new
@@ -1372,7 +1372,7 @@ delete_for_peephole (rtx_insn *from, rtx_insn *to)
since the peephole that replaces this sequence
is also an unconditional jump in that case. */
}
-\f
+
/* A helper function for redirect_exp_1; examines its input X and returns
either a LABEL_REF around a label, or a RETURN if X was NULL. */
static rtx
@@ -1635,7 +1635,7 @@ invert_jump (rtx_jump_insn *jump, rtx nlabel, int delete_unused)
return 0;
}
-\f
+
/* Like rtx_equal_p except that it considers two REGs as equal
if they renumber to the same value and considers two commutative
operations to be the same if the order of the operands has been
@@ -1850,7 +1850,7 @@ rtx_renumbered_equal_p (const_rtx x, const_rtx y)
}
return 1;
}
-\f
+
/* If X is a hard register or equivalent to one or a subregister of one,
return the hard register number. If X is a pseudo register that was not
assigned a hard register, return the pseudo register number. Otherwise,
diff --git a/gcc/langhooks.h b/gcc/langhooks.h
index cca75285fc2..5e3481e079d 100644
--- a/gcc/langhooks.h
+++ b/gcc/langhooks.h
@@ -543,7 +543,7 @@ struct lang_hooks
struct lang_hooks_for_decls decls;
struct lang_hooks_for_types types;
-
+
struct lang_hooks_for_lto lto;
/* Returns a TREE_VEC of the generic parameters of an instantiation of
diff --git a/gcc/lcm.cc b/gcc/lcm.cc
index d7a86c75cd9..c456960e9d2 100644
--- a/gcc/lcm.cc
+++ b/gcc/lcm.cc
@@ -72,7 +72,7 @@ static void compute_nearerout (struct edge_list *, sbitmap *, sbitmap *,
static void compute_rev_insert_delete (struct edge_list *edge_list, sbitmap *,
sbitmap *, sbitmap *, sbitmap *,
sbitmap *);
-\f
+
/* Edge based lcm routines. */
/* Compute expression anticipatability at entrance and exit of each block.
diff --git a/gcc/loop-doloop.cc b/gcc/loop-doloop.cc
index 4feb0a25ab9..98b9a766eb5 100644
--- a/gcc/loop-doloop.cc
+++ b/gcc/loop-doloop.cc
@@ -98,7 +98,7 @@ doloop_condition_get (rtx_insn *doloop_pat)
2) (set (reg) (plus (reg) (const_int -1))
(set (pc) (if_then_else (reg != 0)
(label_ref (label))
- (pc))).
+ (pc))).
Some targets (ARM) do the comparison before the branch, as in the
following form:
@@ -139,15 +139,15 @@ doloop_condition_get (rtx_insn *doloop_pat)
return 0;
cmp_arg1 = XEXP (SET_SRC (cmp_orig), 0);
cmp_arg2 = XEXP (SET_SRC (cmp_orig), 1);
- if (cmp_arg2 != const0_rtx
+ if (cmp_arg2 != const0_rtx
|| GET_CODE (cmp_arg1) != PLUS)
return 0;
reg_orig = XEXP (cmp_arg1, 0);
- if (XEXP (cmp_arg1, 1) != GEN_INT (-1)
+ if (XEXP (cmp_arg1, 1) != GEN_INT (-1)
|| !REG_P (reg_orig))
return 0;
cc_reg = SET_DEST (cmp_orig);
-
+
inc = XVECEXP (PATTERN (prev_insn), 0, 1);
}
else
@@ -204,7 +204,7 @@ doloop_condition_get (rtx_insn *doloop_pat)
return 0;
if ((XEXP (condition, 0) == reg)
- /* For the third case: */
+ /* For the third case: */
|| ((cc_reg != NULL_RTX)
&& (XEXP (condition, 0) == cc_reg)
&& (reg_orig == reg))
@@ -233,7 +233,7 @@ doloop_condition_get (rtx_insn *doloop_pat)
(set (reg) (plus (reg) (const_int -1)))])
(set (pc) (if_then_else (cc == NE)
(label_ref (label))
- (pc)))
+ (pc)))
which is equivalent to the following:
diff --git a/gcc/loop-init.cc b/gcc/loop-init.cc
index d8e24630407..0be118b54c7 100644
--- a/gcc/loop-init.cc
+++ b/gcc/loop-init.cc
@@ -35,7 +35,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-scalar-evolution.h"
#include "tree-cfgcleanup.h"
-\f
+
/* Apply FLAGS to the loop state. */
static void
@@ -330,7 +330,7 @@ fix_loop_structure (bitmap changed_bbs)
return number_of_loops (cfun) - old_nloops + n_deleted;
}
-\f
+
/* The RTL loop superpass. The actual passes are subpasses. See passes.cc for
more on that. */
@@ -378,7 +378,7 @@ pass_loop2::gate (function *fun)
if (current_loops)
loop_optimizer_finalize ();
return false;
- }
+ }
}
} // anon namespace
@@ -389,7 +389,7 @@ make_pass_loop2 (gcc::context *ctxt)
return new pass_loop2 (ctxt);
}
-\f
+
/* Initialization of the RTL loop passes. */
static unsigned int
rtl_loop_init (void)
@@ -441,7 +441,7 @@ make_pass_rtl_loop_init (gcc::context *ctxt)
return new pass_rtl_loop_init (ctxt);
}
-\f
+
/* Finalization of the RTL loop passes. */
namespace {
@@ -497,7 +497,7 @@ make_pass_rtl_loop_done (gcc::context *ctxt)
return new pass_rtl_loop_done (ctxt);
}
-\f
+
/* Loop invariant code motion. */
namespace {
@@ -541,7 +541,7 @@ make_pass_rtl_move_loop_invariants (gcc::context *ctxt)
return new pass_rtl_move_loop_invariants (ctxt);
}
-\f
+
namespace {
const pass_data pass_data_rtl_unroll_loops =
@@ -602,7 +602,7 @@ make_pass_rtl_unroll_loops (gcc::context *ctxt)
return new pass_rtl_unroll_loops (ctxt);
}
-\f
+
namespace {
const pass_data pass_data_rtl_doloop =
diff --git a/gcc/loop-invariant.cc b/gcc/loop-invariant.cc
index a9b156682bc..8250e7a457a 100644
--- a/gcc/loop-invariant.cc
+++ b/gcc/loop-invariant.cc
@@ -1988,7 +1988,7 @@ free_loop_data (class loop *loop)
loop->aux = NULL;
}
-\f
+
/* Registers currently living. */
static bitmap_head curr_regs_live;
@@ -2268,7 +2268,7 @@ calculate_loop_reg_pressure (void)
}
}
-\f
+
/* Move the invariants out of the loops. */
diff --git a/gcc/loop-unroll.cc b/gcc/loop-unroll.cc
index 93333d8ba11..120fb41cfc6 100644
--- a/gcc/loop-unroll.cc
+++ b/gcc/loop-unroll.cc
@@ -409,7 +409,7 @@ decide_unroll_constant_iterations (class loop *loop, int flags)
return;
}
- /* Check whether the loop rolls enough to consider.
+ /* Check whether the loop rolls enough to consider.
Consult also loop bounds and profile; in the case the loop has more
than one exit it may well loop less than determined maximal number
of iterations. */
@@ -1177,7 +1177,7 @@ decide_unroll_stupid (class loop *loop, int flags)
}
/* Do not unroll loops with branches inside -- it increases number
- of mispredicts.
+ of mispredicts.
TODO: this heuristic needs tunning; call inside the loop body
is also relatively good reason to not unroll. */
if (num_loop_branches (loop) > 1)
diff --git a/gcc/lower-subreg.cc b/gcc/lower-subreg.cc
index 481e1e85a26..598875d2c5e 100644
--- a/gcc/lower-subreg.cc
+++ b/gcc/lower-subreg.cc
@@ -1743,7 +1743,7 @@ decompose_multiword_subregs (bool decompose_copies)
BITMAP_FREE (non_decomposable_context);
BITMAP_FREE (subreg_context);
}
-\f
+
/* Implement first lower subreg pass. */
namespace {
diff --git a/gcc/lra-assigns.cc b/gcc/lra-assigns.cc
index 73fbef29912..c6977971641 100644
--- a/gcc/lra-assigns.cc
+++ b/gcc/lra-assigns.cc
@@ -577,7 +577,7 @@ find_hard_regno_for_1 (int regno, int *cost, int try_only_hard_regno,
= lra_reg_info[conflict_regno].biggest_mode;
int biggest_conflict_nregs
= hard_regno_nregs (conflict_hr, biggest_conflict_mode);
-
+
nregs_diff
= (biggest_conflict_nregs
- hard_regno_nregs (conflict_hr,
@@ -696,7 +696,7 @@ find_hard_regno_for (int regno, int *cost, int try_only_hard_regno, bool first_p
if (try_only_hard_regno < 0 && regno < lra_new_regno_start)
{
enum reg_class pref_class = reg_preferred_class (regno);
-
+
if (regno_allocno_class_array[regno] != pref_class)
{
hard_regno = find_hard_regno_for_1 (regno, cost, -1, first_p,
@@ -1226,7 +1226,7 @@ setup_live_pseudos_and_spill_after_risky_transforms (bitmap
|| hard_regno != reg_renumber[conflict_regno])
{
int conflict_hard_regno = reg_renumber[conflict_regno];
-
+
biggest_mode = lra_reg_info[conflict_regno].biggest_mode;
biggest_nregs = hard_regno_nregs (conflict_hard_regno,
biggest_mode);
@@ -1560,7 +1560,7 @@ assign_by_spills (void)
{
enum reg_class rclass = lra_get_allocno_class (regno);
enum reg_class spill_class;
-
+
if (targetm.spill_class == NULL
|| lra_reg_info[regno].restore_rtx == NULL_RTX
|| ! bitmap_bit_p (&lra_inheritance_pseudos, regno)
@@ -1710,7 +1710,7 @@ find_reload_regno_insns (int regno, rtx_insn * &start, rtx_insn * &finish)
bool clobber_p = false;
rtx_insn *prev_insn, *next_insn;
rtx_insn *start_insn = NULL, *first_insn = NULL, *second_insn = NULL;
-
+
EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
{
if (start_insn == NULL)
@@ -1782,7 +1782,7 @@ lra_split_hard_reg_for (void)
either case. */
bool asm_p = false, spill_p = false;
bitmap_head failed_reload_insns, failed_reload_pseudos, over_split_insns;
-
+
if (lra_dump_file != NULL)
fprintf (lra_dump_file,
"\n****** Splitting a hard reg after assignment #%d: ******\n\n",
diff --git a/gcc/lra-coalesce.cc b/gcc/lra-coalesce.cc
index 04a5bbd714b..d786bbf6bbe 100644
--- a/gcc/lra-coalesce.cc
+++ b/gcc/lra-coalesce.cc
@@ -228,7 +228,7 @@ lra_coalesce (void)
int coalesced_moves;
int max_regno = max_reg_num ();
bitmap_head involved_insns_bitmap;
-
+
timevar_push (TV_LRA_COALESCE);
if (lra_dump_file != NULL)
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index b0b3c5b01dc..83451a10e7b 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -152,7 +152,7 @@ static machine_mode curr_operand_mode[MAX_RECOG_OPERANDS];
insn. VOIDmode in all other cases. */
static machine_mode original_subreg_reg_mode[MAX_RECOG_OPERANDS];
-\f
+
/* Start numbers for new registers and insns at the current constraints
pass start. */
@@ -497,7 +497,7 @@ static void
update_equiv (int regno)
{
rtx x;
-
+
if ((x = ira_reg_equiv[regno].memory) != NULL_RTX)
ira_reg_equiv[regno].memory
= simplify_replace_fn_rtx (x, NULL_RTX, loc_equivalence_callback,
@@ -569,7 +569,7 @@ init_curr_operand_mode (void)
}
}
-\f
+
/* The page contains code to reuse input reloads. */
@@ -733,7 +733,7 @@ get_reload_reg (enum op_type type, machine_mode mode, rtx original,
return true;
}
-\f
+
/* The page contains major code to choose the current insn alternative
and generate reloads for it. */
@@ -1055,7 +1055,7 @@ match_reload (signed char out, signed char *ins, signed char *outs,
if (GET_CODE (in_rtx) == SUBREG)
{
rtx subreg_reg = SUBREG_REG (in_rtx);
-
+
/* If SUBREG_REG is dying here and sub-registers IN_RTX
and NEW_IN_REG are similar, we can use the same hard
register for REG and SUBREG_REG. */
@@ -1973,7 +1973,7 @@ prohibited_class_reg_set_mode_p (enum reg_class rclass,
machine_mode mode)
{
HARD_REG_SET temp;
-
+
lra_assert (hard_reg_set_subset_p (reg_class_contents[rclass], set));
temp = set & ~lra_no_alloc_regs;
return (hard_reg_set_subset_p
@@ -1995,7 +1995,7 @@ update_and_check_small_class_inputs (int nop, int nalt,
{
static unsigned int small_class_check[LIM_REG_CLASSES];
static int small_class_input_nums[LIM_REG_CLASSES];
-
+
if (SMALL_REGISTER_CLASS_P (op_class)
/* We are interesting in classes became small because of fixing
some hard regs, e.g. by an user through GCC options. */
@@ -2257,7 +2257,7 @@ process_alt_operands (int only_alternative)
|| curr_operand_mode[nop] == BLKmode)
&& curr_operand_mode[m] != curr_operand_mode[nop])
break;
-
+
m_hregno = get_hard_regno (*curr_id->operand_loc[m], false);
/* We are supposed to match a previous operand.
If we do, we win if that one did. If we do
@@ -2328,7 +2328,7 @@ process_alt_operands (int only_alternative)
&& REG_USERVAR_P (m_reg))
{
int i;
-
+
for (i = 0; i < early_clobbered_regs_num; i++)
if (m == early_clobbered_nops[i])
break;
@@ -2957,10 +2957,10 @@ process_alt_operands (int only_alternative)
nop);
reject += 3;
}
-
+
/* If reload requires moving value through secondary
memory, it will need one more insn at least. */
- if (this_alternative != NO_REGS
+ if (this_alternative != NO_REGS
&& REG_P (op) && (cl = get_reg_class (REGNO (op))) != NO_REGS
&& ((curr_static_id->operand[nop].type != OP_OUT
&& targetm.secondary_memory_needed (GET_MODE (op), cl,
@@ -3779,7 +3779,7 @@ process_address_1 (int nop, bool check_only_p,
enum reg_class cl = base_reg_class (ad.mode, ad.as,
SCRATCH, SCRATCH);
rtx addr = *ad.inner;
-
+
new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, NULL, "addr");
/* addr => new_base. */
lra_emit_move (new_reg, addr);
@@ -4069,7 +4069,7 @@ curr_insn_transform (bool check_only_p)
if (curr_static_id->operand[i].is_operator)
continue;
-
+
old = op = *curr_id->operand_loc[i];
if (GET_CODE (old) == SUBREG)
old = SUBREG_REG (old);
@@ -4118,7 +4118,7 @@ curr_insn_transform (bool check_only_p)
change_p = true;
lra_update_dup (curr_id, i);
}
-
+
if (change_p)
/* If we've changed the instruction then any alternative that
we chose previously may no longer be valid. */
@@ -4484,7 +4484,7 @@ curr_insn_transform (bool check_only_p)
for (j = 0; goal_alt_matched[i][j] != -1; j++)
{
rtx op2 = *curr_id->operand_loc[goal_alt_matched[i][j]];
-
+
if (REG_P (op2) && REGNO (op) != REGNO (op2))
break;
}
@@ -5074,7 +5074,7 @@ lra_constraints (bool first_p)
the equiv. We could update the equiv insns after
transformations including an equiv insn deletion
but it is not worthy as such cases are extremely
- rare. */
+ rare. */
|| contains_deleted_insn_p (ira_reg_equiv[i].init_insns)
/* If it is not a reverse equivalence, we check that a
pseudo in rhs of the init insn is not dying in the
@@ -5171,7 +5171,7 @@ lra_constraints (bool first_p)
cannot be changed. Such insns might be not in
init_insns because we don't update equiv data
during insn transformations.
-
+
As an example, let suppose that a pseudo got
hard register and on the 1st pass was not
changed to equivalent constant. We generate an
@@ -5262,7 +5262,7 @@ lra_constraints_finish (void)
finish_invariants ();
}
-\f
+
/* Structure describes invariants for ineheritance. */
struct lra_invariant
@@ -5356,7 +5356,7 @@ clear_invariants (void)
invariants.truncate (0);
}
-\f
+
/* This page contains code to do inheritance/split
transformations. */
@@ -5871,7 +5871,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
if (lra_dump_file != NULL)
fprintf (lra_dump_file,
" ((((((((((((((((((((((((((((((((((((((((((((((((\n");
-
+
if (call_save_p)
{
mode = HARD_REGNO_CALLER_SAVE_MODE (hard_regno,
@@ -6035,7 +6035,7 @@ spill_hard_reg_in_range (int regno, enum reg_class rclass, rtx_insn *from, rtx_i
unsigned int uid;
bitmap_iterator bi;
HARD_REG_SET ignore;
-
+
lra_assert (from != NULL && to != NULL);
ignore = lra_no_alloc_regs;
EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
@@ -6043,7 +6043,7 @@ spill_hard_reg_in_range (int regno, enum reg_class rclass, rtx_insn *from, rtx_i
lra_insn_recog_data_t id = lra_insn_recog_data[uid];
struct lra_static_insn_data *static_id = id->insn_static_data;
struct lra_insn_reg *reg;
-
+
for (reg = id->regs; reg != NULL; reg = reg->next)
if (reg->regno < FIRST_PSEUDO_REGISTER)
SET_HARD_REG_BIT (ignore, reg->regno);
@@ -6981,7 +6981,7 @@ lra_inheritance (void)
timevar_pop (TV_LRA_INHERITANCE);
}
-\f
+
/* This page contains code to undo failed inheritance/split
transformations. */
diff --git a/gcc/lra-eliminations.cc b/gcc/lra-eliminations.cc
index 42206366669..fa49bd2440f 100644
--- a/gcc/lra-eliminations.cc
+++ b/gcc/lra-eliminations.cc
@@ -186,7 +186,7 @@ setup_elimination_map (void)
elimination_map[ep->from] = ep;
}
-\f
+
/* Compute the sum of X and Y, making canonicalizations assumed in an
address, namely: sum constant integers, surround the sum of two
@@ -286,7 +286,7 @@ move_plus_up (rtx x)
{
rtx subreg_reg;
machine_mode x_mode, subreg_reg_mode;
-
+
if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
return x;
subreg_reg = SUBREG_REG (x);
@@ -398,7 +398,7 @@ lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
if (! update_p && ! full_p)
return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
-
+
if (maybe_ne (update_sp_offset, 0))
offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
else
@@ -500,7 +500,7 @@ lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
case LE: case LT: case LEU: case LTU:
{
rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
- subst_p, update_p,
+ subst_p, update_p,
update_sp_offset, full_p);
rtx new1 = XEXP (x, 1)
? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
@@ -749,7 +749,7 @@ mark_not_eliminable (rtx x, machine_mode mem_mode)
&& poly_int_rtx_p (XEXP (XEXP (x, 1), 1), &offset))))
{
poly_int64 size = GET_MODE_SIZE (mem_mode);
-
+
#ifdef PUSH_ROUNDING
/* If more bytes than MEM_MODE are pushed, account for
them. */
@@ -822,7 +822,7 @@ mark_not_eliminable (rtx x, machine_mode mem_mode)
{
/* See if this is setting the replacement hard register for
an elimination.
-
+
If DEST is the hard frame pointer, we do nothing because
we assume that all assignments to the frame pointer are
for non-local gotos and are being done at a time when
@@ -838,7 +838,7 @@ mark_not_eliminable (rtx x, machine_mode mem_mode)
&& SET_DEST (x) != hard_frame_pointer_rtx)
setup_can_eliminate (ep, false);
}
-
+
mark_not_eliminable (SET_SRC (x), mem_mode);
return;
@@ -863,7 +863,7 @@ mark_not_eliminable (rtx x, machine_mode mem_mode)
}
}
-\f
+
/* Scan INSN and eliminate all eliminable hard registers in it.
@@ -1047,7 +1047,7 @@ eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
&& GET_CODE (XEXP (SET_SRC (set), 0)) == PLUS)
{
rtx reg1, reg2, op1, op2;
-
+
reg1 = op1 = XEXP (XEXP (SET_SRC (set), 0), 0);
reg2 = op2 = XEXP (SET_SRC (set), 1);
if (GET_CODE (reg1) == SUBREG)
diff --git a/gcc/lra-int.h b/gcc/lra-int.h
index 2f1450b345c..e88cd5cb957 100644
--- a/gcc/lra-int.h
+++ b/gcc/lra-int.h
@@ -414,7 +414,7 @@ extern void lra_eliminate (bool, bool);
extern void lra_eliminate_reg_if_possible (rtx *);
-\f
+
/* Return the hard register which given pseudo REGNO assigned to.
Negative value means that the register got memory or we don't know
diff --git a/gcc/lra-lives.cc b/gcc/lra-lives.cc
index f7a7066055a..62b3601dd73 100644
--- a/gcc/lra-lives.cc
+++ b/gcc/lra-lives.cc
@@ -380,7 +380,7 @@ mark_regno_dead (int regno, machine_mode mode)
}
}
-\f
+
/* This page contains code for making global live analysis of pseudos.
The code works only when pseudo live info is changed on a BB
@@ -506,7 +506,7 @@ finish_live_solver (void)
bitmap_clear (&all_hard_regs_bitmap);
}
-\f
+
/* Insn currently scanned. */
static rtx_insn *curr_insn;
@@ -1328,7 +1328,7 @@ compress_live_ranges (void)
}
}
-\f
+
/* The number of the current live range pass. */
int lra_live_range_iter;
diff --git a/gcc/lra-remat.cc b/gcc/lra-remat.cc
index 681dcf36331..0f60e09e964 100644
--- a/gcc/lra-remat.cc
+++ b/gcc/lra-remat.cc
@@ -162,7 +162,7 @@ get_remat_bb_data_by_index (int index)
return &remat_bb_data[index];
}
-\f
+
/* Hash table for the candidates. Different insns (e.g. structurally
the same insns or even insns with different unused output regs) can
@@ -247,7 +247,7 @@ finish_cand_table (void)
htab_delete (cand_table);
}
-\f
+
/* Return true if X contains memory or some UNSPEC. We cannot just
check insn operands as memory or unspec might be not an operand
@@ -456,7 +456,7 @@ create_cands (void)
int dst_regno = REGNO (dstreg);
rtx_insn *insn2 = regno_potential_cand[src_regno].insn;
- if (insn2 != NULL
+ if (insn2 != NULL
&& dst_regno >= FIRST_PSEUDO_REGISTER
&& reg_renumber[dst_regno] < 0
&& BLOCK_FOR_INSN (insn2) == BLOCK_FOR_INSN (insn))
@@ -496,7 +496,7 @@ create_cands (void)
free (regno_potential_cand);
}
-\f
+
/* Create and initialize BB data. */
static void
@@ -607,7 +607,7 @@ finish_remat_bb_data (void)
free (remat_bb_data);
}
-\f
+
/* Update changed_regs, dead_regs, subreg_regs of BB from INSN. */
static void
@@ -649,7 +649,7 @@ calculate_local_reg_remat_bb_data (void)
set_bb_regs (bb, insn);
}
-\f
+
/* Return true if REG overlaps an input operand or non-input hard register of
INSN. Basically the function returns false if we can move rematerialization
@@ -787,7 +787,7 @@ calculate_gen_cands (void)
EXECUTE_IF_SET_IN_BITMAP (gen_insns, 0, uid, bi)
{
rtx_insn *insn2 = lra_insn_recog_data[uid]->insn;
-
+
cand = insn_to_cand[INSN_UID (insn2)];
gcc_assert (cand != NULL);
/* Ignore the reload insn. */
@@ -801,14 +801,14 @@ calculate_gen_cands (void)
bitmap_set_bit (&temp_bitmap, uid);
}
}
-
+
if (CALL_P (insn))
{
function_abi callee_abi = insn_callee_abi (insn);
EXECUTE_IF_SET_IN_BITMAP (gen_insns, 0, uid, bi)
{
rtx_insn *insn2 = lra_insn_recog_data[uid]->insn;
-
+
cand = insn_to_cand[INSN_UID (insn2)];
gcc_assert (cand != NULL);
if (call_used_input_regno_present_p (callee_abi, insn2))
@@ -827,10 +827,10 @@ calculate_gen_cands (void)
bitmap_set_bit (gen_insns, INSN_UID (insn));
}
}
- }
+ }
}
-\f
+
/* The common transfer function used by the DF equation solver to
propagate (partial) availability info BB_IN to BB_OUT through block
@@ -886,7 +886,7 @@ cand_trans_fun (int bb_index, bitmap bb_in, bitmap bb_out)
&bb_info->gen_cands, bb_in, &temp_bitmap);
}
-\f
+
/* The transfer function used by the DF equation solver to propagate
partial candidate availability info through block with BB_INDEX
@@ -925,14 +925,14 @@ cand_pav_con_fun_n (edge e)
basic_block bb = e->dest;
remat_bb_data_t bb_info;
bitmap bb_pavin, pred_pavout;
-
+
bb_info = get_remat_bb_data (bb);
bb_pavin = &bb_info->pavin_cands;
pred_pavout = &get_remat_bb_data (pred)->pavout_cands;
return bitmap_ior_into (bb_pavin, pred_pavout);
}
-\f
+
/* The transfer function used by the DF equation solver to propagate
candidate availability info through block with BB_INDEX according
@@ -971,7 +971,7 @@ cand_av_con_fun_n (edge e)
basic_block bb = e->dest;
remat_bb_data_t bb_info;
bitmap bb_avin, pred_avout;
-
+
bb_info = get_remat_bb_data (bb);
bb_avin = &bb_info->avin_cands;
pred_avout = &get_remat_bb_data (pred)->avout_cands;
@@ -998,7 +998,7 @@ calculate_global_remat_bb_data (void)
df_get_postorder (DF_FORWARD), df_get_n_blocks (DF_FORWARD));
}
-\f
+
/* Setup sp offset attribute to SP_OFFSET for all INSNS. */
static void
@@ -1043,7 +1043,7 @@ update_scratch_ops (rtx_insn *remat_insn)
"scratch pseudo copy");
ira_register_new_scratch_op (remat_insn, i, id->icode);
}
-
+
}
/* Insert rematerialization insns using the data-flow data calculated
@@ -1128,7 +1128,7 @@ do_remat (void)
/* Check clobbers do not kill something living. */
gcc_assert (REG_P (saved_op));
- int ignore_regno = REGNO (saved_op);
+ int ignore_regno = REGNO (saved_op);
dst_hard_regno = dst_regno < FIRST_PSEUDO_REGISTER
? dst_regno : reg_renumber[dst_regno];
@@ -1175,7 +1175,7 @@ do_remat (void)
if (ok_p)
{
rtx remat_pat = copy_insn (PATTERN (cand->insn));
-
+
start_sequence ();
emit_insn (remat_pat);
remat_insn = get_insns ();
@@ -1201,7 +1201,7 @@ do_remat (void)
EXECUTE_IF_SET_IN_BITMAP (avail_cands, 0, cid, bi)
{
cand = all_cands[cid];
-
+
/* Ignore the reload insn. */
if (src_regno == cand->reload_regno
&& dst_regno == cand->regno)
@@ -1217,7 +1217,7 @@ do_remat (void)
EXECUTE_IF_SET_IN_BITMAP (avail_cands, 0, cid, bi)
{
cand = all_cands[cid];
-
+
if (call_used_input_regno_present_p (callee_abi, cand->insn))
bitmap_set_bit (&temp_bitmap, cand->index);
}
@@ -1289,7 +1289,7 @@ do_remat (void)
return changed_p;
}
-\f
+
/* Current number of rematerialization iteration. */
int lra_rematerialization_iter;
diff --git a/gcc/lra-spills.cc b/gcc/lra-spills.cc
index a8d7e60acd3..ef4a4cbd77a 100644
--- a/gcc/lra-spills.cc
+++ b/gcc/lra-spills.cc
@@ -417,7 +417,7 @@ remove_pseudos (rtx *loc, rtx_insn *insn)
const char *fmt;
enum rtx_code code;
bool res = false;
-
+
if (*loc == NULL_RTX)
return res;
code = GET_CODE (*loc);
@@ -505,7 +505,7 @@ spill_pseudos (void)
FOR_BB_INSNS_SAFE (bb, insn, curr)
{
bool removed_pseudo_p = false;
-
+
if (bitmap_bit_p (changed_insns, INSN_UID (insn)))
{
rtx *link_loc, link;
@@ -824,7 +824,7 @@ lra_final_code_change (void)
delete_insn (insn);
continue;
}
-
+
lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
struct lra_insn_reg *reg;
@@ -832,7 +832,7 @@ lra_final_code_change (void)
if (reg->regno >= FIRST_PSEUDO_REGISTER
&& lra_reg_info [reg->regno].nrefs == 0)
break;
-
+
if (reg != NULL)
{
/* Pseudos still can be in debug insns in some very rare
@@ -849,7 +849,7 @@ lra_final_code_change (void)
delete_insn (insn);
continue;
}
-
+
struct lra_static_insn_data *static_id = id->insn_static_data;
bool insn_change_p = false;
diff --git a/gcc/lra.cc b/gcc/lra.cc
index f7fdd601e71..8feb6457692 100644
--- a/gcc/lra.cc
+++ b/gcc/lra.cc
@@ -69,9 +69,9 @@ along with GCC; see the file COPYING3. If not see
| Spilled pseudo | -------------------
| to memory |<----| Rematerialization |
| substitution | -------------------
- ----------------
+ ----------------
| No susbtitions
- V
+ V
-------------------------
| Hard regs substitution, |
| devirtalization, and |------> Finish
@@ -462,7 +462,7 @@ lra_emit_add (rtx x, rtx y, rtx z)
if (! ok_p)
{
rtx_insn *insn;
-
+
delete_insns_since (last);
/* Generate x = disp; x = x + base; x = x + index_scale. */
emit_move_insn (x, disp);
@@ -497,7 +497,7 @@ lra_emit_move (rtx x, rtx y)
{
int old;
rtx_insn *insn;
-
+
if (GET_CODE (y) != PLUS)
{
if (rtx_equal_p (x, y))
@@ -536,7 +536,7 @@ lra_update_dups (lra_insn_recog_data_t id, signed char *nops)
*id->dup_loc[i] = *id->operand_loc[nop];
}
-\f
+
/* This page contains code dealing with info about registers in the
insns. */
@@ -589,7 +589,7 @@ finish_insn_regs (void)
lra_insn_reg_pool.release ();
}
-\f
+
/* This page contains code dealing LRA insn info (or in other words
LRA internal insn representation). */
@@ -1291,7 +1291,7 @@ lra_set_used_insn_alternative_by_uid (int uid, int alt)
data->used_insn_alternative = alt;
}
-\f
+
/* This page contains code dealing with common register info and
pseudo copies. */
@@ -1436,7 +1436,7 @@ lra_get_copy (int n)
return copy_vec[n];
}
-\f
+
/* This page contains code dealing with info about registers in
insns. */
@@ -1626,7 +1626,7 @@ lra_update_insn_regno_info (rtx_insn *insn)
struct lra_static_insn_data *static_data;
enum rtx_code code;
rtx link;
-
+
if (! INSN_P (insn))
return;
data = lra_get_insn_recog_data (insn);
@@ -1669,7 +1669,7 @@ lra_get_insn_regs (int uid)
return data->regs;
}
-\f
+
/* Recursive hash function for RTL X. */
hashval_t
@@ -1757,7 +1757,7 @@ lra_rtx_hash (rtx x)
return val;
}
-\f
+
/* This page contains code dealing with stack of the insns which
should be processed by the next constraint pass. */
@@ -1885,7 +1885,7 @@ lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
if (! JUMP_P (insn))
{
rtx_insn *last;
-
+
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file, " %s after:\n", title);
@@ -1904,7 +1904,7 @@ lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
/* Put output reload insns on successor BBs: */
edge_iterator ei;
edge e;
-
+
FOR_EACH_EDGE (e, ei, BLOCK_FOR_INSN (insn)->succs)
if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
{
@@ -1952,7 +1952,7 @@ lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
remove_note (insn, note);
}
}
-\f
+
/* Replace all references to register OLD_REGNO in *LOC with pseudo
register NEW_REG. Try to simplify subreg of constant if SUBREG_P.
@@ -1986,7 +1986,7 @@ lra_substitute_pseudo (rtx *loc, int old_regno, rtx new_reg, bool subreg_p,
*loc = subst;
return true;
}
-
+
}
else if (code == REG && (int) REGNO (x) == old_regno)
{
@@ -2073,7 +2073,7 @@ lra_substitute_pseudo_within_insn (rtx_insn *insn, int old_regno,
DEBUG_INSN_P (insn));
}
-\f
+
/* Return new register of the same mode as ORIGINAL of class ALL_REGS.
Used in ira_remove_scratches. */
@@ -2298,7 +2298,7 @@ lra (FILE *f)
lra_dump_file = f;
lra_asm_error_p = false;
lra_pmode_pseudo = gen_reg_rtx (Pmode);
-
+
timevar_push (TV_LRA);
/* Make sure that the last insn is a note. Some subsequent passes
@@ -2424,7 +2424,7 @@ lra (FILE *f)
else
{
bool spill_p = !lra_assign (fails_p);
-
+
if (lra_undo_inheritance ())
live_p = false;
if (spill_p && ! fails_p)
diff --git a/gcc/lto-cgraph.cc b/gcc/lto-cgraph.cc
index eef5ea1d061..8c00df19402 100644
--- a/gcc/lto-cgraph.cc
+++ b/gcc/lto-cgraph.cc
@@ -420,7 +420,7 @@ lto_output_node (struct lto_simple_output_block *ob, struct cgraph_node *node,
if (boundary_p && node->analyzed
&& node->get_partitioning_class () == SYMBOL_PARTITION)
{
- /* Inline clones cannot be part of boundary.
+ /* Inline clones cannot be part of boundary.
gcc_assert (!node->inlined_to);
FIXME: At the moment they can be, when partition contains an inline
@@ -497,7 +497,7 @@ lto_output_node (struct lto_simple_output_block *ob, struct cgraph_node *node,
if (node->same_comdat_group)
{
ref = LCC_NOT_FOUND;
- for (struct symtab_node *n = node->same_comdat_group;
+ for (struct symtab_node *n = node->same_comdat_group;
ref == LCC_NOT_FOUND && n != node; n = n->same_comdat_group)
ref = lto_symtab_encoder_lookup (encoder, n);
}
@@ -580,7 +580,7 @@ lto_output_node (struct lto_simple_output_block *ob, struct cgraph_node *node,
thunk_info::get (node)->stream_out (ob);
}
-/* Output the varpool NODE to OB.
+/* Output the varpool NODE to OB.
If NODE is not in SET, then NODE is a boundary. */
static void
@@ -658,7 +658,7 @@ lto_output_varpool_node (struct lto_simple_output_block *ob, varpool_node *node,
if (node->same_comdat_group)
{
ref = LCC_NOT_FOUND;
- for (struct symtab_node *n = node->same_comdat_group;
+ for (struct symtab_node *n = node->same_comdat_group;
ref == LCC_NOT_FOUND && n != node; n = n->same_comdat_group)
ref = lto_symtab_encoder_lookup (encoder, n);
}
@@ -676,7 +676,7 @@ lto_output_varpool_node (struct lto_simple_output_block *ob, varpool_node *node,
LDPR_NUM_KNOWN, node->resolution);
}
-/* Output the varpool NODE to OB.
+/* Output the varpool NODE to OB.
If NODE is not in SET, then NODE is a boundary. */
static void
@@ -695,7 +695,7 @@ lto_output_ref (struct lto_simple_output_block *ob, struct ipa_ref *ref,
nref = lto_symtab_encoder_lookup (encoder, ref->referred);
gcc_assert (nref != LCC_NOT_FOUND);
streamer_write_hwi_stream (ob->main_stream, nref);
-
+
node = dyn_cast <cgraph_node *> (ref->referring);
if (node)
{
@@ -835,7 +835,7 @@ select_what_to_stream (void)
means that we need to insert the nodes in specific order. This order is
ignored by the partitioning logic earlier. */
-lto_symtab_encoder_t
+lto_symtab_encoder_t
compute_ltrans_boundary (lto_symtab_encoder_t in_encoder)
{
struct cgraph_edge *edge;
@@ -1548,7 +1548,7 @@ input_edge (class lto_input_block *ib, vec<symtab_node *> nodes,
/* Read a cgraph from IB using the info in FILE_DATA. */
-static vec<symtab_node *>
+static vec<symtab_node *>
input_cgraph_1 (struct lto_file_decl_data *file_data,
class lto_input_block *ib)
{
@@ -1651,7 +1651,7 @@ input_refs (class lto_input_block *ib,
omp_lto_input_declare_variant_alt (ib, cnode, nodes);
}
}
-
+
/* Input profile_info from IB. */
static void
input_profile_summary (class lto_input_block *ib,
@@ -1756,7 +1756,7 @@ input_symtab (void)
ib = lto_create_simple_input_block (file_data, LTO_section_symtab_nodes,
&data, &len);
- if (!ib)
+ if (!ib)
fatal_error (input_location,
"cannot find LTO cgraph in %s", file_data->file_name);
input_profile_summary (ib, file_data);
@@ -1989,7 +1989,7 @@ output_node_opt_summary (struct output_block *ob,
struct bitpack_d bp;
bp = bitpack_create (ob->main_stream);
clone_info *info = clone_info::get (node);
-
+
bp_pack_value (&bp, (info && info->param_adjustments != NULL), 1);
streamer_write_bitpack (&bp);
if (ipa_param_adjustments *adjustments
diff --git a/gcc/lto-streamer-in.cc b/gcc/lto-streamer-in.cc
index 03cb41cfa16..ad8353f6e56 100644
--- a/gcc/lto-streamer-in.cc
+++ b/gcc/lto-streamer-in.cc
@@ -588,7 +588,7 @@ lto_location_cache::input_location_and_block (location_t *loc,
/* This optimization saves location cache operations during gimple
streaming. */
-
+
if (current_file == stream_file
&& current_line == stream_line
&& current_col == stream_col
@@ -1825,7 +1825,7 @@ lto_input_scc (class lto_input_block *ib, class data_in *data_in,
/* Read reference to tree from IB and DATA_IN.
This is used for streaming tree bodies where we know that
- the tree is already in cache or is indexable and
+ the tree is already in cache or is indexable and
must be matched with stream_write_tree_ref. */
tree
diff --git a/gcc/lto-streamer-out.cc b/gcc/lto-streamer-out.cc
index 0bca530313c..538bfc53a32 100644
--- a/gcc/lto-streamer-out.cc
+++ b/gcc/lto-streamer-out.cc
@@ -459,7 +459,7 @@ get_symbol_initial_value (lto_symtab_encoder_t encoder, tree expr)
/* Output reference to tree T to the stream.
- Assume that T is already in encoder cache.
+ Assume that T is already in encoder cache.
This is used to stream tree bodies where we know the DFS walk arranged
everything to cache. Must be matched with stream_read_tree_ref. */
diff --git a/gcc/lto-streamer.cc b/gcc/lto-streamer.cc
index 4968fd13413..7c8c2ece3f4 100644
--- a/gcc/lto-streamer.cc
+++ b/gcc/lto-streamer.cc
@@ -135,10 +135,10 @@ lto_get_section_name (int section_type, const char *name,
and merging should be ok here. */
if (section_type == LTO_section_opts)
strcpy (post, "");
- else if (f != NULL)
+ else if (f != NULL)
sprintf (post, "." HOST_WIDE_INT_PRINT_HEX_PURE, f->id);
else
- sprintf (post, "." HOST_WIDE_INT_PRINT_HEX_PURE, get_random_seed (false));
+ sprintf (post, "." HOST_WIDE_INT_PRINT_HEX_PURE, get_random_seed (false));
char *res = concat (section_name_prefix, sep, add, post, NULL);
if (buffer)
free (buffer);
diff --git a/gcc/lto-streamer.h b/gcc/lto-streamer.h
index d544dabe184..4458944e94f 100644
--- a/gcc/lto-streamer.h
+++ b/gcc/lto-streamer.h
@@ -300,7 +300,7 @@ public:
would bring it out of sync with libcpp linemap); point to current
one. */
static lto_location_cache *current_cache;
-
+
private:
static int cmp_loc (const void *pa, const void *pb);
@@ -540,9 +540,9 @@ struct lto_out_decl_state
typedef struct lto_out_decl_state *lto_out_decl_state_ptr;
-/* Compact representation of a index <-> resolution pair. Unpacked to an
+/* Compact representation of a index <-> resolution pair. Unpacked to an
vector later. */
-struct res_pair
+struct res_pair
{
ld_plugin_symbol_resolution_t res;
unsigned index;
diff --git a/gcc/lto-wrapper.cc b/gcc/lto-wrapper.cc
index 11c4d1b38a4..73d6f1c4733 100644
--- a/gcc/lto-wrapper.cc
+++ b/gcc/lto-wrapper.cc
@@ -285,7 +285,7 @@ merge_and_complain (vec<cl_decoded_option> &decoded_options,
cf_protection_option = foption;
}
}
-
+
/* The following does what the old LTO option code did,
union all target and a selected set of common options. */
for (i = 0; i < fdecoded_options.length (); ++i)
@@ -474,7 +474,7 @@ merge_and_complain (vec<cl_decoded_option> &decoded_options,
decoded_options[existing_opt].value = 1;
}
break;
-
+
case OPT_foffload_abi_:
if (existing_opt == -1)
@@ -510,7 +510,7 @@ merge_and_complain (vec<cl_decoded_option> &decoded_options,
It would be good to warn on mismatches, but it is bit hard to do as
we do not know what nothing translates to. */
-
+
for (unsigned int j = 0; j < decoded_options.length ();)
if (decoded_options[j].opt_index == OPT_fPIC
|| decoded_options[j].opt_index == OPT_fpic)
@@ -1474,7 +1474,7 @@ run_gcc (unsigned argc, char *argv[])
}
if ((p = strrchr (argv[i], '@'))
- && p != argv[i]
+ && p != argv[i]
&& sscanf (p, "@%li%n", &loffset, &consumed) >= 1
&& strlen (p) == (unsigned int) consumed)
{
@@ -1805,7 +1805,7 @@ cont1:
obstack_ptr_grow (&argv_obstack, "-o");
obstack_ptr_grow (&argv_obstack, flto_out);
}
- else
+ else
{
const char *list_option = "-fltrans-output-list=";
@@ -1883,7 +1883,7 @@ cont1:
{
for (i = 0; i < ltoobj_argc; ++i)
if (early_debug_object_names[i] != NULL)
- printf ("%s\n", early_debug_object_names[i]);
+ printf ("%s\n", early_debug_object_names[i]);
}
/* These now belong to collect2. */
free (flto_out);
@@ -2012,7 +2012,7 @@ cont:
if (! save_temps)
fprintf (mstream, "\t@-touch -r \"%s\" \"%s.tem\" > /dev/null "
"2>&1 && mv \"%s.tem\" \"%s\"\n",
- input_name, input_name, input_name, input_name);
+ input_name, input_name, input_name, input_name);
}
else
{
@@ -2046,7 +2046,7 @@ cont:
fclose (mstream);
if (!jobserver)
{
- /* Avoid passing --jobserver-fd= and similar flags
+ /* Avoid passing --jobserver-fd= and similar flags
unless jobserver mode is explicitly enabled. */
putenv (xstrdup ("MAKEFLAGS="));
putenv (xstrdup ("MFLAGS="));
@@ -2092,7 +2092,7 @@ cont:
{
for (i = 0; i < ltoobj_argc; ++i)
if (early_debug_object_names[i] != NULL)
- printf ("%s\n", early_debug_object_names[i]);
+ printf ("%s\n", early_debug_object_names[i]);
}
nr = 0;
free (ltrans_priorities);
diff --git a/gcc/lto/lang-specs.h b/gcc/lto/lang-specs.h
index 53431bdebd7..19b220bc024 100644
--- a/gcc/lto/lang-specs.h
+++ b/gcc/lto/lang-specs.h
@@ -19,6 +19,6 @@ along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* LTO contributions to the "compilers" array in gcc.cc. */
-
+
{"@lto", "lto1 %(cc1_options) %i %{!fsyntax-only:%(invoke_as)}",
/*cpp_spec=*/NULL, /*combinable=*/1, /*needs_preprocessing=*/0},
diff --git a/gcc/lto/lto-lang.cc b/gcc/lto/lto-lang.cc
index 7018dfae4a5..775f3516733 100644
--- a/gcc/lto/lto-lang.cc
+++ b/gcc/lto/lto-lang.cc
@@ -488,7 +488,7 @@ handle_type_generic_attribute (tree *node, tree ARG_UNUSED (name),
{
/* Ensure we have a function type. */
gcc_assert (TREE_CODE (*node) == FUNCTION_TYPE);
-
+
/* Ensure we have a variadic function. */
gcc_assert (!prototype_p (*node) || stdarg_p (*node));
diff --git a/gcc/lto/lto-object.cc b/gcc/lto/lto-object.cc
index 329bbc71fd6..a7354cbc7ab 100644
--- a/gcc/lto/lto-object.cc
+++ b/gcc/lto/lto-object.cc
@@ -148,7 +148,7 @@ fail_errmsg:
error ("%s: %s", fname, errmsg);
else
error ("%s: %s: %s", fname, errmsg, xstrerror (err));
-
+
if (lo->fd != -1)
lto_obj_file_close ((lto_file *) lo);
free (lo);
diff --git a/gcc/lto/lto-partition.cc b/gcc/lto/lto-partition.cc
index b96d1dd473d..473486ab239 100644
--- a/gcc/lto/lto-partition.cc
+++ b/gcc/lto/lto-partition.cc
@@ -218,7 +218,7 @@ add_symbol_to_partition_1 (ltrans_partition part, symtab_node *node)
}
/* If symbol NODE is really part of other symbol's definition (i.e. it is
- internal label, thunk, alias or so), return the outer symbol.
+ internal label, thunk, alias or so), return the outer symbol.
When add_symbol_to_partition_1 is called on the outer symbol it must
eventually add NODE, too. */
static symtab_node *
@@ -258,7 +258,7 @@ add_symbol_to_partition (ltrans_partition part, symtab_node *node)
/* If we have duplicated symbol contained in something we cannot duplicate,
we are very badly screwed. The other way is possible, so we do not
- assert this in add_symbol_to_partition_1.
+ assert this in add_symbol_to_partition_1.
Be lax about comdats; they may or may not be duplicated and we may
end up in need to duplicate keyed comdat because it has unkeyed alias. */
@@ -410,7 +410,7 @@ account_reference_p (symtab_node *n1, symtab_node *n2)
otherwise. Do not account references to external symbols: they will
never become local. Finally do not account references to duplicated
symbols: they will be always local. */
- if (n1 == n2
+ if (n1 == n2
|| !n2->definition
|| n2->get_partitioning_class () != SYMBOL_PARTITION)
return false;
@@ -564,7 +564,7 @@ lto_balanced_map (int n_lto_partitions, int max_partition_size)
if (!symbol_partitioned_p (order[i]))
add_symbol_to_partition (partition, order[i]);
-
+
/* Once we added a new node to the partition, we also want to add
all referenced variables unless they was already added into some
@@ -572,7 +572,7 @@ lto_balanced_map (int n_lto_partitions, int max_partition_size)
add_symbol_to_partition adds possibly multiple nodes and
variables that are needed to satisfy needs of ORDER[i].
We remember last visited cgraph and varpool node from last iteration
- of outer loop that allows us to process every new addition.
+ of outer loop that allows us to process every new addition.
At the same time we compute size of the boundary into COST. Every
callgraph or IPA reference edge leaving the partition contributes into
@@ -723,7 +723,7 @@ lto_balanced_map (int n_lto_partitions, int max_partition_size)
Later we stop building partition if its size is 9/8 of the target wight. */
if (partition->insns < partition_size * 7 / 8
|| best_cost == -1
- || (!cost
+ || (!cost
|| ((sreal)best_internal * (sreal) cost
< ((sreal) internal * (sreal)best_cost))))
{
@@ -848,7 +848,7 @@ must_not_rename (symtab_node *node, const char *name)
name);
return true;
}
- /* Avoid mangling of already mangled clones.
+ /* Avoid mangling of already mangled clones.
??? should have a flag whether a symbol has a 'private' name already,
since we produce some symbols like that i.e. for global constructors
that are not really clones.
@@ -1012,7 +1012,7 @@ promote_symbol (symtab_node *node)
IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (node->decl)));
/* Promoting a symbol also promotes all transparent aliases with exception
- of weakref where the visibility flags are always wrong and set to
+ of weakref where the visibility flags are always wrong and set to
!PUBLIC. */
ipa_ref *ref;
for (unsigned i = 0; node->iterate_direct_aliases (i, ref); i++)
@@ -1183,7 +1183,7 @@ lto_promote_cross_file_statics (void)
delete lto_clone_numbers;
}
-/* Rename statics in the whole unit in the case that
+/* Rename statics in the whole unit in the case that
we do -flto-partition=none. */
void
diff --git a/gcc/lto/lto-symtab.cc b/gcc/lto/lto-symtab.cc
index f631016b923..0583da544ca 100644
--- a/gcc/lto/lto-symtab.cc
+++ b/gcc/lto/lto-symtab.cc
@@ -551,7 +551,7 @@ lto_symtab_merge_p (tree prevailing, tree decl)
return false;
}
gcc_checking_assert (TREE_CHAIN (prevailing) == TREE_CHAIN (decl));
-
+
if (TREE_CODE (prevailing) == FUNCTION_DECL)
{
if (fndecl_built_in_p (prevailing) != fndecl_built_in_p (decl))
@@ -713,7 +713,7 @@ lto_symtab_merge_decls_2 (symtab_node *first, bool diagnosed_p)
|| TREE_CODE (TREE_TYPE (decl)) != METHOD_TYPE
|| !TYPE_METHOD_BASETYPE (TREE_TYPE (decl))
|| !odr_type_p (TYPE_METHOD_BASETYPE (TREE_TYPE (decl)))
- || !odr_type_violation_reported_p
+ || !odr_type_violation_reported_p
(TYPE_METHOD_BASETYPE (TREE_TYPE (decl))))
diag = warning_at (DECL_SOURCE_LOCATION (decl),
OPT_Wodr,
@@ -982,7 +982,7 @@ lto_symtab_merge_symbols (void)
{
symtab->symtab_initialize_asm_name_hash ();
- /* Do the actual merging.
+ /* Do the actual merging.
At this point we invalidate hash translating decls into symtab nodes
because after removing one of duplicate decls the hash is not correcly
updated to the other duplicate. */
@@ -992,7 +992,7 @@ lto_symtab_merge_symbols (void)
&& !node->previous_sharing_asm_name)
lto_symtab_merge_symbols_1 (node);
- /* Resolve weakref aliases whose target are now in the compilation unit.
+ /* Resolve weakref aliases whose target are now in the compilation unit.
also re-populate the hash translating decls into symtab nodes*/
FOR_EACH_SYMBOL (node)
{
@@ -1065,7 +1065,7 @@ lto_symtab_merge_symbols (void)
&& node2 != node)
lto_varpool_replace_node (dyn_cast <varpool_node *> (node2),
vnode);
-
+
/* Abstract functions may have duplicated cgraph nodes attached;
remove them. */
diff --git a/gcc/m2/mc-boot/GDebug.h b/gcc/m2/mc-boot/GDebug.h
index cfeef7567f7..ff18488c08a 100644
--- a/gcc/m2/mc-boot/GDebug.h
+++ b/gcc/m2/mc-boot/GDebug.h
@@ -59,7 +59,7 @@ EXTERN void Debug_Halt (const char *Message_, unsigned int _Message_high, unsign
/*
DebugString - writes a string to the debugging device (Scn.Write).
- It interprets
+ It interprets
as carriage return, linefeed.
*/
diff --git a/gcc/m2/mc-boot/GFormatStrings.h b/gcc/m2/mc-boot/GFormatStrings.h
index 668a2fdb955..9ba0f5c34b1 100644
--- a/gcc/m2/mc-boot/GFormatStrings.h
+++ b/gcc/m2/mc-boot/GFormatStrings.h
@@ -84,7 +84,7 @@ EXTERN DynamicStrings_String FormatStrings_Sprintf3 (DynamicStrings_String fmt,
EXTERN DynamicStrings_String FormatStrings_Sprintf4 (DynamicStrings_String fmt, const unsigned char *w1_, unsigned int _w1_high, const unsigned char *w2_, unsigned int _w2_high, const unsigned char *w3_, unsigned int _w3_high, const unsigned char *w4_, unsigned int _w4_high);
/*
- HandleEscape - translates \a, \b, \e, \f,
+ HandleEscape - translates \a, \b, \e, \f,
, \r, \x[hex] \[octal]
into their respective ascii codes. It also converts
\[any] into a single [any] character.
diff --git a/gcc/m2/pge-boot/GDebug.h b/gcc/m2/pge-boot/GDebug.h
index cfeef7567f7..ff18488c08a 100644
--- a/gcc/m2/pge-boot/GDebug.h
+++ b/gcc/m2/pge-boot/GDebug.h
@@ -59,7 +59,7 @@ EXTERN void Debug_Halt (const char *Message_, unsigned int _Message_high, unsign
/*
DebugString - writes a string to the debugging device (Scn.Write).
- It interprets
+ It interprets
as carriage return, linefeed.
*/
diff --git a/gcc/m2/pge-boot/GFormatStrings.h b/gcc/m2/pge-boot/GFormatStrings.h
index 668a2fdb955..9ba0f5c34b1 100644
--- a/gcc/m2/pge-boot/GFormatStrings.h
+++ b/gcc/m2/pge-boot/GFormatStrings.h
@@ -84,7 +84,7 @@ EXTERN DynamicStrings_String FormatStrings_Sprintf3 (DynamicStrings_String fmt,
EXTERN DynamicStrings_String FormatStrings_Sprintf4 (DynamicStrings_String fmt, const unsigned char *w1_, unsigned int _w1_high, const unsigned char *w2_, unsigned int _w2_high, const unsigned char *w3_, unsigned int _w3_high, const unsigned char *w4_, unsigned int _w4_high);
/*
- HandleEscape - translates \a, \b, \e, \f,
+ HandleEscape - translates \a, \b, \e, \f,
, \r, \x[hex] \[octal]
into their respective ascii codes. It also converts
\[any] into a single [any] character.
diff --git a/gcc/mode-switching.cc b/gcc/mode-switching.cc
index 2d2818f5674..1151de58d87 100644
--- a/gcc/mode-switching.cc
+++ b/gcc/mode-switching.cc
@@ -59,7 +59,7 @@ along with GCC; see the file COPYING3. If not see
priority mode, till for each entity all modes are exhausted.
More details can be found in the code of optimize_mode_switching. */
-\f
+
/* This structure contains the information for each insn which requires
either single or double mode to be set.
MODE is the mode this insn must be executed in.
@@ -867,7 +867,7 @@ optimize_mode_switching (void)
}
#endif /* OPTIMIZE_MODE_SWITCHING */
-\f
+
namespace {
const pass_data pass_data_mode_switching =
diff --git a/gcc/modulo-sched.cc b/gcc/modulo-sched.cc
index 26752213d19..2e502df1701 100644
--- a/gcc/modulo-sched.cc
+++ b/gcc/modulo-sched.cc
@@ -94,7 +94,7 @@ along with GCC; see the file COPYING3. If not see
using a certain 'count' register and (2) the loop count can be
adjusted by modifying this register prior to the loop.
TODO: Rely on cfgloop analysis instead. */
-\f
+
/* This page defines partial-schedule structures and functions for
modulo scheduling. */
@@ -178,7 +178,7 @@ struct partial_schedule
trying to schedule a node in a full row; that is, to avoid running
through futile DFA state transitions. */
int *rows_length;
-
+
/* The earliest absolute cycle of an insn in the partial schedule. */
int min_cycle;
@@ -203,7 +203,7 @@ void set_row_column_for_ps (partial_schedule_ptr);
static void ps_insert_empty_row (partial_schedule_ptr, int, sbitmap);
static int compute_split_row (sbitmap, int, int, int, ddg_node_ptr);
-\f
+
/* This page defines constants and structures for the modulo scheduling
driver. */
@@ -214,7 +214,7 @@ static void permute_partial_schedule (partial_schedule_ptr, rtx_insn *);
static int calculate_stage_count (partial_schedule_ptr, int);
static void calculate_must_precede_follow (ddg_node_ptr, int, int,
int, int, sbitmap, sbitmap, sbitmap);
-static int get_sched_window (partial_schedule_ptr, ddg_node_ptr,
+static int get_sched_window (partial_schedule_ptr, ddg_node_ptr,
sbitmap, int, int *, int *, int *);
static bool try_scheduling_node_in_cycle (partial_schedule_ptr, int, int,
sbitmap, int *, sbitmap, sbitmap);
@@ -240,7 +240,7 @@ typedef struct node_sched_params
u will precede v if column (u) < column (v). */
int column;
} *node_sched_params_ptr;
-\f
+
/* The following three functions are copied from the current scheduler
code in order to use sched_analyze() for computing the dependencies.
They are used when initializing the sched_info structure. */
@@ -693,7 +693,7 @@ schedule_reg_moves (partial_schedule_ptr ps)
int distances[2];
sbitmap distance1_uses;
rtx set = single_set (u->insn);
-
+
/* Skip instructions that do not set a register. */
if (set && !REG_P (SET_DEST (set)))
continue;
@@ -730,7 +730,7 @@ schedule_reg_moves (partial_schedule_ptr ps)
target regsiter rather then the inc'ed register. */
gcc_assert (!autoinc_var_is_used_p (u->insn, e->dest->insn));
}
-
+
if (nreg_moves4e)
{
gcc_assert (e->distance < 2);
@@ -866,7 +866,7 @@ reset_sched_times (partial_schedule_ptr ps, int amount)
fprintf (dump_file, " (branch)");
fprintf (dump_file, "\n");
}
-
+
gcc_assert (SCHED_TIME (u) >= ps->min_cycle);
gcc_assert (SCHED_TIME (u) <= ps->max_cycle);
@@ -874,7 +874,7 @@ reset_sched_times (partial_schedule_ptr ps, int amount)
update_node_sched_params (u, ii, normalized_time, new_min_cycle);
}
}
-
+
/* Permute the insns according to their order in PS, from row 0 to
row ii-1, and position them right before LAST. This schedules
the insns of the loop kernel. */
@@ -1677,11 +1677,11 @@ sms_schedule (void)
{
/* Rotate the partial schedule to have the branch in row ii-1. */
int amount = SCHED_TIME (g->closing_branch->cuid) - (ps->ii - 1);
-
+
reset_sched_times (ps, amount);
rotate_partial_schedule (ps, amount);
}
-
+
set_columns_for_ps (ps);
min_cycle = PS_MIN_CYCLE (ps) - SMODULO (PS_MIN_CYCLE (ps), ps->ii);
@@ -1716,7 +1716,7 @@ sms_schedule (void)
ps->ii, stage_count);
print_partial_schedule (ps, dump_file);
}
-
+
if (count_init)
{
if (adjust_inplace)
@@ -1749,7 +1749,7 @@ sms_schedule (void)
scheduling passes don't touch it. */
if (! flag_resched_modulo_sched)
mark_loop_unsched (loop);
-
+
/* The life-info is not valid any more. */
df_set_bb_dirty (g->bb);
@@ -2202,8 +2202,8 @@ sms_schedule_by_order (ddg_ptr g, int mii, int maxii, int *nodes_order)
{
sbitmap tmp_precede, tmp_follow;
- set_must_precede_follow (&tmp_follow, must_follow,
- &tmp_precede, must_precede,
+ set_must_precede_follow (&tmp_follow, must_follow,
+ &tmp_precede, must_precede,
c, start, end, step);
success =
try_scheduling_node_in_cycle (ps, u, c,
@@ -2419,11 +2419,11 @@ verify_partial_schedule (partial_schedule_ptr ps, sbitmap sched_nodes)
for (row = 0; row < ps->ii; row++)
{
int length = 0;
-
+
for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row)
{
int u = crr_insn->id;
-
+
length++;
gcc_assert (bitmap_bit_p (sched_nodes, u));
/* ??? Test also that all nodes of sched_nodes are in ps, perhaps by
@@ -2431,12 +2431,12 @@ verify_partial_schedule (partial_schedule_ptr ps, sbitmap sched_nodes)
gcc_assert (SCHED_TIME (u) >= ps->min_cycle);
gcc_assert (SCHED_TIME (u) <= ps->max_cycle);
}
-
+
gcc_assert (ps->rows_length[row] == length);
}
}
-\f
+
/* This page implements the algorithm for ordering the nodes of a DDG
for modulo scheduling, activated through the
"int sms_order_nodes (ddg_ptr, int mii, int * result)" API. */
@@ -2818,7 +2818,7 @@ order_nodes_in_scc (ddg_ptr g, sbitmap nodes_ordered, sbitmap scc,
return pos;
}
-\f
+
/* This page contains functions for manipulating partial-schedules during
modulo scheduling. */
@@ -2922,7 +2922,7 @@ print_partial_schedule (partial_schedule_ptr ps, FILE *dump)
fprintf (dump, "%d (branch), ", INSN_UID (insn));
else
fprintf (dump, "%d, ", INSN_UID (insn));
-
+
ps_i = ps_i->next_in_row;
}
}
@@ -2943,14 +2943,14 @@ create_ps_insn (int id, int cycle)
}
-/* Removes the given PS_INSN from the partial schedule. */
-static void
+/* Removes the given PS_INSN from the partial schedule. */
+static void
remove_node_from_ps (partial_schedule_ptr ps, ps_insn_ptr ps_i)
{
int row;
gcc_assert (ps && ps_i);
-
+
row = SMODULO (ps_i->cycle, ps->ii);
if (! ps_i->prev_in_row)
{
@@ -2965,8 +2965,8 @@ remove_node_from_ps (partial_schedule_ptr ps, ps_insn_ptr ps_i)
if (ps_i->next_in_row)
ps_i->next_in_row->prev_in_row = ps_i->prev_in_row;
}
-
- ps->rows_length[row] -= 1;
+
+ ps->rows_length[row] -= 1;
free (ps_i);
return;
}
@@ -3015,7 +3015,7 @@ ps_insn_find_column (partial_schedule_ptr ps, ps_insn_ptr ps_i,
/* The closing branch must be the last in the row. */
if (JUMP_P (ps_rtl_insn (ps, next_ps_i->id)))
return false;
-
+
last_in_row = next_ps_i;
}
@@ -3040,7 +3040,7 @@ ps_insn_find_column (partial_schedule_ptr ps, ps_insn_ptr ps_i,
ps->rows[row] = ps_i;
return true;
}
-
+
/* Now insert the node after INSERT_AFTER_PSI. */
if (! last_must_precede)
@@ -3271,7 +3271,7 @@ calculate_stage_count (partial_schedule_ptr ps, int rotation_amount)
int stage_count = CALC_STAGE_COUNT (-1, new_min_cycle, ps->ii);
/* The calculation of stage count is done adding the number of stages
- before cycle zero and after cycle zero. */
+ before cycle zero and after cycle zero. */
stage_count += CALC_STAGE_COUNT (new_max_cycle, 0, ps->ii);
return stage_count;
@@ -3299,7 +3299,7 @@ rotate_partial_schedule (partial_schedule_ptr ps, int start_cycle)
for (row = 0; row < last_row; row++)
{
ps->rows[row] = ps->rows[row + 1];
- ps->rows_length[row] = ps->rows_length[row + 1];
+ ps->rows_length[row] = ps->rows_length[row + 1];
}
ps->rows[last_row] = first_row;
@@ -3311,7 +3311,7 @@ rotate_partial_schedule (partial_schedule_ptr ps, int start_cycle)
}
#endif /* INSN_SCHEDULING */
-\f
+
/* Run instruction scheduler. */
/* Perform SMS module scheduling. */
diff --git a/gcc/objc/objc-act.cc b/gcc/objc/objc-act.cc
index 10591bb75f1..ef584c99534 100644
--- a/gcc/objc/objc-act.cc
+++ b/gcc/objc/objc-act.cc
@@ -406,7 +406,7 @@ objc_init (void)
default:
objc_default_ivar_visibility = OBJC_IVAR_VIS_PROTECTED;
}
-
+
/* Generate general types and push runtime-specific decls to file scope. */
synth_module_prologue ();
@@ -3944,7 +3944,7 @@ static GTY(()) objc_map_t interface_map;
static void
interface_hash_init (void)
{
- interface_map = objc_map_alloc_ggc (200);
+ interface_map = objc_map_alloc_ggc (200);
}
static tree
@@ -5243,7 +5243,7 @@ check_duplicates (tree method, int methods, int is_class)
/* We have two or more methods with the same name but different
types. */
first_method = TREE_VEC_ELT (method, 0);
-
+
/* But just how different are those types? If
-Wno-strict-selector-match is specified, we shall not complain if
the differences are solely among types with identical size and
@@ -5253,15 +5253,15 @@ check_duplicates (tree method, int methods, int is_class)
for (i = 0; i < (size_t) TREE_VEC_LENGTH (method); i++)
if (!comp_proto_with_proto (first_method, TREE_VEC_ELT (method, i), 0))
goto issue_warning;
-
+
return first_method;
}
-
+
issue_warning:
if (methods)
{
bool type = TREE_CODE (first_method) == INSTANCE_METHOD_DECL;
-
+
warning_at (input_location, 0,
"multiple methods named %<%c%E%> found",
(is_class ? '+' : '-'),
@@ -5273,7 +5273,7 @@ check_duplicates (tree method, int methods, int is_class)
else
{
bool type = TREE_CODE (first_method) == INSTANCE_METHOD_DECL;
-
+
warning_at (input_location, 0,
"multiple selectors named %<%c%E%> found",
(is_class ? '+' : '-'),
@@ -5282,11 +5282,11 @@ check_duplicates (tree method, int methods, int is_class)
(type ? '-' : '+'),
identifier_to_locale (gen_method_decl (first_method)));
}
-
+
for (i = 0; i < (size_t) TREE_VEC_LENGTH (method); i++)
{
bool type = TREE_CODE (TREE_VEC_ELT (method, i)) == INSTANCE_METHOD_DECL;
-
+
inform (DECL_SOURCE_LOCATION (TREE_VEC_ELT (method, i)), "also found %<%c%s%>",
(type ? '-' : '+'),
identifier_to_locale (gen_method_decl (TREE_VEC_ELT (method, i))));
@@ -5474,7 +5474,7 @@ lookup_method_in_hash_lists (tree sel_name, int is_class)
if (!is_class)
method_prototype = objc_map_get (instance_method_map, sel_name);
-
+
if (method_prototype == OBJC_MAP_NOT_FOUND)
{
method_prototype = objc_map_get (class_method_map, sel_name);
@@ -5602,7 +5602,7 @@ objc_finish_message_expr (tree receiver, tree sel_name, tree method_params,
/* We set class_tree to the identifier for 'Class' if this is a
class method, and to NULL_TREE if not. */
class_tree = (IS_CLASS (rtype) ? objc_class_name : NULL_TREE);
-
+
/* 'rprotos' is the list of protocols that the receiver
supports. */
rprotos = (TYPE_HAS_OBJC_INFO (TREE_TYPE (rtype))
@@ -5674,11 +5674,11 @@ objc_finish_message_expr (tree receiver, tree sel_name, tree method_params,
there are protocols attached to the type, we can
still look up the method in the protocols. Ie, we
are in the following case:
-
+
@class MyClass;
MyClass<MyProtocol> *x;
[x method];
-
+
If 'MyProtocol' has the method 'method', we can check
and retrieve the method prototype. */
method_prototype
@@ -5846,7 +5846,7 @@ objc_finish_message_expr (tree receiver, tree sel_name, tree method_params,
return retval;
}
-\f
+
/* This routine creates a static variable used to implement @protocol(MyProtocol)
expression. This variable will be initialized to global protocol_t meta-data
@@ -5983,7 +5983,7 @@ insert_method_into_method_map (bool class_method, tree method)
else
{
tree new_entry;
-
+
/* If an entry already exists, it's more complicated. We'll
have to check whether the method prototype is the same or
not. */
@@ -5997,7 +5997,7 @@ insert_method_into_method_map (bool class_method, tree method)
/* If not, create a vector to store both the method already
in the map, and the new one that we are adding. */
new_entry = make_tree_vec (2);
-
+
TREE_VEC_ELT (new_entry, 0) = existing_entry;
TREE_VEC_ELT (new_entry, 1) = method;
}
@@ -6022,11 +6022,11 @@ insert_method_into_method_map (bool class_method, tree method)
prototype, and very few, if any, will have more than
2! */
new_entry = make_tree_vec (TREE_VEC_LENGTH (existing_entry) + 1);
-
+
/* Copy the methods from the existing vector. */
for (i = 0; i < (size_t) TREE_VEC_LENGTH (existing_entry); i++)
TREE_VEC_ELT (new_entry, i) = TREE_VEC_ELT (existing_entry, i);
-
+
/* Add the new method at the end. */
TREE_VEC_ELT (new_entry, i) = method;
}
@@ -6036,7 +6036,7 @@ insert_method_into_method_map (bool class_method, tree method)
}
}
-\f
+
static tree
lookup_method (tree mchain, tree method)
{
@@ -6631,7 +6631,7 @@ objc_is_public (tree expr, tree identifier)
return 1;
}
-\f
+
/* Make sure all methods in CHAIN (a list of method declarations from
an @interface or a @protocol) are in IMPLEMENTATION (the
implementation context). This is used to check for example that
@@ -6938,7 +6938,7 @@ check_protocols (tree proto_list, const char *type, tree name)
check_protocol (p, type, name);
}
}
-\f
+
/* Make sure that the class CLASS_NAME is defined CODE says which kind
of thing CLASS_NAME ought to be. It can be CLASS_INTERFACE_TYPE,
CLASS_IMPLEMENTATION_TYPE, CATEGORY_INTERFACE_TYPE, or
@@ -9278,7 +9278,7 @@ gen_method_decl (tree method)
return errbuf;
}
-\f
+
/* Debug info. */
@@ -9624,7 +9624,7 @@ objc_lookup_ivar (tree other, tree id)
warning (warn_shadow_ivar ? OPT_Wshadow_ivar : OPT_Wshadow,
"local declaration of %qE hides instance variable", id);
}
-
+
return other;
}
diff --git a/gcc/objc/objc-encoding.cc b/gcc/objc/objc-encoding.cc
index 9abc6b0b249..22b65acfe82 100644
--- a/gcc/objc/objc-encoding.cc
+++ b/gcc/objc/objc-encoding.cc
@@ -843,7 +843,7 @@ encode_field_decl (tree field_decl)
encode_field (field_decl,
obstack_object_size (&util_obstack),
OBJC_ENCODE_DONT_INLINE_DEFS);
-
+
/* Null terminate string. */
obstack_1grow (&util_obstack, 0);
diff --git a/gcc/objc/objc-map.cc b/gcc/objc/objc-map.cc
index 963a5582d72..8de47f422b0 100644
--- a/gcc/objc/objc-map.cc
+++ b/gcc/objc/objc-map.cc
@@ -58,9 +58,9 @@ objc_map_alloc_ggc (size_t initial_capacity)
objc_map_t map = ggc_cleared_alloc<objc_map_private> ();
if (map == NULL)
OUT_OF_MEMORY;
-
+
initial_capacity = next_power_of_two (initial_capacity);
-
+
map->number_of_slots = initial_capacity;
map->mask = initial_capacity - 1;
map->maximum_load_factor = 70;
@@ -71,7 +71,7 @@ objc_map_alloc_ggc (size_t initial_capacity)
if (map->slots == NULL)
OUT_OF_MEMORY;
-
+
if (map->values == NULL)
OUT_OF_MEMORY;
@@ -100,12 +100,12 @@ objc_map_private_resize (objc_map_t map, size_t new_number_of_slots)
tree *old_slots = map->slots;
tree *old_values = map->values;
size_t i, old_number_of_slots = map->number_of_slots;
-
+
if (new_number_of_slots < (map->number_of_non_empty_slots))
new_number_of_slots = 2 * map->number_of_non_empty_slots;
new_number_of_slots = next_power_of_two (new_number_of_slots);
-
+
map->number_of_slots = new_number_of_slots;
map->mask = map->number_of_slots - 1;
map->max_number_of_non_empty_slots = (map->number_of_slots * map->maximum_load_factor) / 100;
@@ -124,7 +124,7 @@ objc_map_private_resize (objc_map_t map, size_t new_number_of_slots)
if (old_slots[i] != OBJC_MAP_PRIVATE_EMPTY_SLOT)
{
size_t k = IDENTIFIER_HASH_VALUE (old_slots[i]) & map->mask;
-
+
if (map->slots[k] == OBJC_MAP_PRIVATE_EMPTY_SLOT)
{
map->slots[k] = old_slots[i];
diff --git a/gcc/objc/objc-map.h b/gcc/objc/objc-map.h
index efcf04fc82c..a9e82041adf 100644
--- a/gcc/objc/objc-map.h
+++ b/gcc/objc/objc-map.h
@@ -146,14 +146,14 @@ objc_map_get (objc_map_t map, /* struct tree_identifier * */tree key)
if (map->slots[i] == key)
return map->values[i];
-
+
while (1)
{
i = (i + j) & map->mask;
-
+
if (map->slots[i] == OBJC_MAP_PRIVATE_EMPTY_SLOT)
return OBJC_MAP_NOT_FOUND;
-
+
if (map->slots[i] == key)
return map->values[i];
@@ -180,7 +180,7 @@ void objc_map_put (objc_map_t map, /*struct tree_identifier * */tree key, tree v
objc_map_private_grow (map);
i = hash & map->mask;
-
+
while (1)
{
if (map->slots[i] == OBJC_MAP_PRIVATE_EMPTY_SLOT)
@@ -272,7 +272,7 @@ objc_map_iterator_move_to_next (objc_map_t map, objc_map_iterator_t *i)
void *slot;
if (*i == map->number_of_slots)
return OBJC_MAP_FAILURE;
-
+
slot = map->slots[*i];
*i = *i + 1;
if (slot != OBJC_MAP_PRIVATE_EMPTY_SLOT)
diff --git a/gcc/objc/objc-next-runtime-abi-01.cc b/gcc/objc/objc-next-runtime-abi-01.cc
index 8d41886902b..df93022c900 100644
--- a/gcc/objc/objc-next-runtime-abi-01.cc
+++ b/gcc/objc/objc-next-runtime-abi-01.cc
@@ -2842,7 +2842,7 @@ make_err_class:
return eh_id;
}
-/* For NeXT ABI 0 and 1, the personality routines are just those of the
+/* For NeXT ABI 0 and 1, the personality routines are just those of the
underlying language. */
static tree
diff --git a/gcc/objcp/objcp-decl.cc b/gcc/objcp/objcp-decl.cc
index 6db262bdcbb..7a0dafa119d 100644
--- a/gcc/objcp/objcp-decl.cc
+++ b/gcc/objcp/objcp-decl.cc
@@ -1,4 +1,4 @@
-/* Process the ObjC-specific declarations and variables for
+/* Process the ObjC-specific declarations and variables for
the Objective-C++ compiler.
Copyright (C) 2005-2022 Free Software Foundation, Inc.
Contributed by Ziemowit Laski <zlaski@apple.com>
@@ -29,7 +29,7 @@ along with GCC; see the file COPYING3. If not see
/* Hacks to simulate start_struct() and finish_struct(). */
-tree
+tree
objcp_start_struct (location_t loc ATTRIBUTE_UNUSED,
enum tree_code code ATTRIBUTE_UNUSED, tree name)
{
@@ -48,7 +48,7 @@ objcp_start_struct (location_t loc ATTRIBUTE_UNUSED,
return begin_class_definition (s);
}
-tree
+tree
objcp_finish_struct (location_t loc ATTRIBUTE_UNUSED,
tree t, tree fieldlist, tree attributes)
{
@@ -89,7 +89,7 @@ objcp_xref_tag (enum tree_code code ATTRIBUTE_UNUSED, tree name)
int
objcp_comptypes (tree type1, tree type2)
-{
+{
return comptypes (type1, type2, COMPARE_STRICT);
}
diff --git a/gcc/objcp/objcp-decl.h b/gcc/objcp/objcp-decl.h
index d9a5c485199..09149ad5869 100644
--- a/gcc/objcp/objcp-decl.h
+++ b/gcc/objcp/objcp-decl.h
@@ -1,4 +1,4 @@
-/* Process the ObjC-specific declarations and variables for
+/* Process the ObjC-specific declarations and variables for
the Objective-C++ compiler.
Copyright (C) 2005-2022 Free Software Foundation, Inc.
Contributed by Ziemowit Laski <zlaski@apple.com>
@@ -32,7 +32,7 @@ extern int objcp_comptypes (tree, tree);
extern tree objcp_begin_compound_stmt (int);
extern tree objcp_end_compound_stmt (tree, int);
-/* Now "cover up" the corresponding C++ functions if required (NB: the
+/* Now "cover up" the corresponding C++ functions if required (NB: the
OBJCP_ORIGINAL_FUNCTION macro, shown below, can still be used to
invoke the original C++ functions if needed). */
#ifdef OBJCP_REMAP_FUNCTIONS
diff --git a/gcc/objcp/objcp-lang.cc b/gcc/objcp/objcp-lang.cc
index fa754028773..1a4fc656a2a 100644
--- a/gcc/objcp/objcp-lang.cc
+++ b/gcc/objcp/objcp-lang.cc
@@ -38,7 +38,7 @@ static void objcxx_init_ts (void);
#define LANG_HOOKS_NAME "GNU Objective-C++"
#undef LANG_HOOKS_INIT
#define LANG_HOOKS_INIT objc_init
-#undef LANG_HOOKS_GIMPLIFY_EXPR
+#undef LANG_HOOKS_GIMPLIFY_EXPR
#define LANG_HOOKS_GIMPLIFY_EXPR objc_gimplify_expr
#undef LANG_HOOKS_INIT_TS
#define LANG_HOOKS_INIT_TS objcxx_init_ts
diff --git a/gcc/omp-expand.cc b/gcc/omp-expand.cc
index c7ef41924d6..eb2d7d6755d 100644
--- a/gcc/omp-expand.cc
+++ b/gcc/omp-expand.cc
@@ -489,7 +489,7 @@ gimple_build_cond_empty (tree cond)
Add CHILD_FNDECL to decl chain of the supercontext of the block
ENTRY_BLOCK - this is the block which originally contained the
code from which CHILD_FNDECL was created.
-
+
Together, these actions ensure that the debug info for the outlined
function will be emitted with the correct lexical scope. */
diff --git a/gcc/omp-general.h b/gcc/omp-general.h
index 74e30c5e313..3ae1889f832 100644
--- a/gcc/omp-general.h
+++ b/gcc/omp-general.h
@@ -33,7 +33,7 @@ enum oacc_loop_flags {
OLF_GANG_STATIC = 1u << 3, /* Gang partitioning is static (has op). */
OLF_TILE = 1u << 4, /* Tiled loop. */
OLF_REDUCTION = 1u << 5, /* Reduction loop. */
-
+
/* Explicitly specified loop axes. */
OLF_DIM_BASE = 6,
OLF_DIM_GANG = 1u << (OLF_DIM_BASE + GOMP_DIM_GANG),
diff --git a/gcc/omp-low.cc b/gcc/omp-low.cc
index fef41a013ec..cfbf84d31f4 100644
--- a/gcc/omp-low.cc
+++ b/gcc/omp-low.cc
@@ -4377,7 +4377,7 @@ scan_omp (gimple_seq *body_p, omp_context *ctx)
walk_gimple_seq_mod (body_p, scan_omp_1_stmt, scan_omp_1_op, &wi);
input_location = saved_location;
}
-\f
+
/* Re-gimplification and code generation routines. */
/* Remove omp_member_access_dummy_var variables from gimple_bind_vars
@@ -8419,7 +8419,7 @@ lower_oacc_head_mark (location_t loc, tree ddvar, tree clauses,
}
if (tag & OLF_TILE)
- /* Tiling could use all 3 levels. */
+ /* Tiling could use all 3 levels. */
levels = 3;
else
{
@@ -8447,7 +8447,7 @@ lower_oacc_head_mark (location_t loc, tree ddvar, tree clauses,
}
/* Emit an OpenACC lopp head or tail marker to SEQ. LEVEL is the
- partitioning level of the enclosed region. */
+ partitioning level of the enclosed region. */
static void
lower_oacc_loop_marker (location_t loc, tree ddvar, bool head,
@@ -8557,7 +8557,7 @@ maybe_catch_exception (gimple_seq body)
return gimple_seq_alloc_with_stmt (g);
}
-\f
+
/* Routines to lower OMP directives into OMP-GIMPLE. */
/* If ctx is a worksharing context inside of a cancellable parallel
@@ -14764,7 +14764,7 @@ make_pass_lower_omp (gcc::context *ctxt)
{
return new pass_lower_omp (ctxt);
}
-\f
+
/* The following is a utility to diagnose structured block violations.
It is not part of the "omplower" pass, as that's invoked too late. It
should be invoked by the respective front ends after gimplification. */
@@ -15079,6 +15079,6 @@ make_pass_diagnose_omp_blocks (gcc::context *ctxt)
{
return new pass_diagnose_omp_blocks (ctxt);
}
-\f
+
#include "gt-omp-low.h"
diff --git a/gcc/omp-offload.cc b/gcc/omp-offload.cc
index 3bd144e9ccf..fb48ad27bcc 100644
--- a/gcc/omp-offload.cc
+++ b/gcc/omp-offload.cc
@@ -749,7 +749,7 @@ oacc_xform_loop (gcall *call)
/* Transform a GOACC_TILE call. Determines the element loop span for
the specified loop of the nest. This is 1 if we're not tiling.
-
+
GOACC_TILE (collapse_count, loop_no, tile_arg, gwv_tile, gwv_element); */
static void
@@ -1393,7 +1393,7 @@ oacc_loop_process (oacc_loop *loop, int fn_level)
tree e_mask_arg = build_int_cst (unsigned_type_node, loop->e_mask);
tree chunk_arg = loop->chunk_size;
gcall *call;
-
+
for (ix = 0; loop->ifns.iterate (ix, &call); ix++)
{
switch (gimple_call_internal_fn (call))
@@ -1472,7 +1472,7 @@ oacc_loop_fixed_partitions (oacc_loop *loop, unsigned outer_mask)
bool auto_par = (loop->flags & OLF_AUTO) != 0;
bool seq_par = (loop->flags & OLF_SEQ) != 0;
bool tiling = (loop->flags & OLF_TILE) != 0;
-
+
this_mask = ((loop->flags >> OLF_DIM_BASE)
& (GOMP_DIM_MASK (GOMP_DIM_MAX) - 1));
@@ -1627,7 +1627,7 @@ oacc_loop_auto_partitions (oacc_loop *loop, unsigned outer_mask,
/* Find the first outermost available partition. */
while (this_mask <= outer_mask)
this_mask <<= 1;
-
+
/* Grab two axes if tiling, and we've not assigned anything */
if (tiling && !(loop->mask | loop->e_mask))
this_mask |= this_mask << 1;
@@ -2161,7 +2161,7 @@ execute_oacc_device_lower ()
oacc_xform_tile (call);
rescan = true;
break;
-
+
case IFN_GOACC_LOOP:
oacc_xform_loop (call);
rescan = true;
@@ -2503,7 +2503,7 @@ make_pass_oacc_device_lower (gcc::context *ctxt)
return new pass_oacc_device_lower (ctxt);
}
-\f
+
/* Rewrite GOMP_SIMT_ENTER_ALLOC call given by GSI and remove the preceding
GOMP_SIMT_ENTER call identifying the privatized variables, which are
turned to structure fields and receive a DECL_VALUE_EXPR accordingly.
diff --git a/gcc/optabs.cc b/gcc/optabs.cc
index cf22bfec3f5..82dd75f874f 100644
--- a/gcc/optabs.cc
+++ b/gcc/optabs.cc
@@ -58,7 +58,7 @@ static rtx emit_conditional_move_1 (rtx, rtx, rtx, rtx, machine_mode);
/* Debug facility for use in GDB. */
void debug_optab_libfuncs (void);
-\f
+
/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
the result of operation CODE applied to OP0 (and OP1 if it is a binary
operation). OP0_MODE is OP0's mode.
@@ -167,7 +167,7 @@ add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0,
return 1;
}
-\f
+
/* Given two input operands, OP0 and OP1, determine what the correct from_mode
for a widening operation would be. In most cases this would be OP0, but if
that's a constant it'll be VOIDmode, which isn't useful. */
@@ -191,7 +191,7 @@ widened_mode (machine_mode to_mode, rtx op0, rtx op1)
return result;
}
-\f
+
/* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
not actually do a sign-extend or zero-extend, but can leave the
@@ -231,7 +231,7 @@ widen_operand (rtx op, machine_mode mode, machine_mode oldmode,
emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
return result;
}
-\f
+
/* Expand vector widening operations.
There are two different classes of operations handled here:
@@ -787,7 +787,7 @@ expand_doubleword_shift (scalar_int_mode op1_mode, optab binoptab,
emit_label (done_label);
return true;
}
-\f
+
/* Subroutine of expand_binop. Perform a double word multiplication of
operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
as the target's word_mode. This function return NULL_RTX if anything
@@ -1247,7 +1247,7 @@ expand_doubleword_divmod (machine_mode mode, rtx op0, rtx op1, rtx *rem,
*rem = rem1;
return quot1;
}
-\f
+
/* Wrapper around expand_binop which takes an rtx code to specify
the operation to perform, not an optab pointer. All other
arguments are the same. */
@@ -2297,7 +2297,7 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
delete_insns_since (entry_last);
return 0;
}
-\f
+
/* Expand a binary operator which has both signed and unsigned forms.
UOPTAB is the optab for unsigned operations, and SOPTAB is for
signed operations.
@@ -2353,7 +2353,7 @@ sign_expand_binop (machine_mode mode, optab uoptab, optab soptab,
swap_optab_enable (soptab, mode, true);
return temp;
}
-\f
+
/* Generate code to perform an operation specified by UNOPPTAB
on operand OP0, with two results to TARG0 and TARG1.
We assume that the order of the operands for the instruction
@@ -2424,7 +2424,7 @@ expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
delete_insns_since (entry_last);
return 0;
}
-\f
+
/* Generate code to perform an operation specified by BINOPTAB
on operands OP0 and OP1, with two results to TARG1 and TARG2.
We assume that the order of the operands for the instruction
@@ -2555,7 +2555,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
return true;
}
-\f
+
/* Wrapper around expand_unop which takes an rtx code to specify
the operation to perform, not an optab pointer. All other
arguments are the same. */
@@ -3627,7 +3627,7 @@ expand_unop (machine_mode mode, optab unoptab, rtx op0, rtx target,
return 0;
}
-\f
+
/* Emit code to compute the absolute value of OP0, with result to
TARGET if convenient. (TARGET may be 0.) The return value says
where the result actually is to be found.
@@ -4024,7 +4024,7 @@ expand_copysign (rtx op0, rtx op1, rtx target)
}
if (fmt->signbit_ro >= 0
- && (CONST_DOUBLE_AS_FLOAT_P (op0)
+ && (CONST_DOUBLE_AS_FLOAT_P (op0)
|| (optab_handler (neg_optab, mode) != CODE_FOR_nothing
&& optab_handler (abs_optab, mode) != CODE_FOR_nothing)))
{
@@ -4039,7 +4039,7 @@ expand_copysign (rtx op0, rtx op1, rtx target)
return expand_copysign_bit (mode, op0, op1, target,
fmt->signbit_rw, op0_is_abs);
}
-\f
+
/* Generate an instruction whose insn-code is INSN_CODE,
with two operands: an output TARGET and an input OP0.
TARGET *must* be nonzero, and the output is always stored there.
@@ -4084,7 +4084,7 @@ emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code)
bool ok = maybe_emit_unop_insn (icode, target, op0, code);
gcc_assert (ok);
}
-\f
+
struct no_conflict_data
{
rtx target;
@@ -4126,7 +4126,7 @@ no_conflict_move_test (rtx dest, const_rtx set, void *p0)
p->must_stay = true;
}
-\f
+
/* Emit code to make a call to a constant function or a library call.
INSNS is a list containing all insns emitted in the call.
@@ -4243,7 +4243,7 @@ emit_libcall_block (rtx_insn *insns, rtx target, rtx result, rtx equiv)
{
emit_libcall_block_1 (insns, target, result, equiv, false);
}
-\f
+
/* Nonzero if we can perform a comparison of mode MODE straightforwardly.
PURPOSE describes how this comparison will be used. CODE is the rtx
comparison code we will be using.
@@ -4737,7 +4737,7 @@ validate_test_and_branch (tree val, rtx *ptest, machine_mode *pmode, optab *res)
COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
It will be potentially converted into an unsigned variant based on
UNSIGNEDP to select a proper jump instruction.
-
+
PROB is the probability of jumping to LABEL. If the comparison is against
zero then VAL contains the expression from which the non-zero RTL is
derived. */
@@ -4927,7 +4927,7 @@ prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
*pmode = cmp_mode;
}
-\f
+
/* Generate code to indirectly jump to a location given in the rtx LOC. */
void
@@ -4943,7 +4943,7 @@ emit_indirect_jump (rtx loc)
emit_barrier ();
}
}
-\f
+
/* Emit a conditional move instruction if the machine supports one for that
condition and machine mode.
@@ -5279,7 +5279,7 @@ emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
delete_insns_since (last);
return NULL_RTX;
}
-\f
+
/* These functions attempt to generate an insn body, rather than
emitting the insn, but if the gen function already emits them, we
make no attempt to turn them back into naked patterns. */
@@ -5422,7 +5422,7 @@ have_sub2_insn (rtx x, rtx y)
return 1;
}
-\f
+
/* Generate the body of an insn to extend Y (with mode MFROM)
into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
@@ -5433,7 +5433,7 @@ gen_extend_insn (rtx x, rtx y, machine_mode mto,
enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
return GEN_FCN (icode) (x, y);
}
-\f
+
/* Generate code to convert FROM to floating point
and store in TO. FROM must be fixed point and not VOIDmode.
UNSIGNEDP nonzero means regard FROM as unsigned.
@@ -5642,7 +5642,7 @@ expand_float (rtx to, rtx from, int unsignedp)
convert_move (to, target, 0);
}
}
-\f
+
/* Generate code to convert FROM to fixed point and store in TO. FROM
must be floating point. */
@@ -5956,7 +5956,7 @@ expand_sfix_optab (rtx to, rtx from, convert_optab tab)
return false;
}
-\f
+
/* Report whether we have an instruction to perform the operation
specified by CODE on operands of mode MODE. */
int
@@ -6644,7 +6644,7 @@ expand_mult_highpart (machine_mode mode, rtx op0, rtx op1,
return expand_vec_perm_const (mode, m1, m2, sel, BLKmode, target);
}
-\f
+
/* Helper function to find the MODE_CC set in a sync_compare_and_swap
pattern. */
@@ -6719,7 +6719,7 @@ expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
/* This function tries to emit an atomic_exchange intruction. VAL is written
to *MEM using memory model MODEL. The previous contents of *MEM are returned,
using TARGET if possible. */
-
+
static rtx
maybe_emit_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
{
@@ -6760,7 +6760,7 @@ maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
icode = optab_handler (sync_lock_test_and_set_optab, mode);
/* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
- exists, and the memory model is stronger than acquire, add a release
+ exists, and the memory model is stronger than acquire, add a release
barrier before the instruction. */
if (is_mm_seq_cst (model) || is_mm_release (model) || is_mm_acq_rel (model))
@@ -6799,12 +6799,12 @@ maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
return NULL_RTX;
}
-/* This function tries to implement an atomic exchange operation using a
+/* This function tries to implement an atomic exchange operation using a
compare_and_swap loop. VAL is written to *MEM. The previous contents of
*MEM are returned, using TARGET if possible. No memory model is required
since a compare_and_swap loop is seq-cst. */
-static rtx
+static rtx
maybe_emit_compare_and_swap_exchange_loop (rtx target, rtx mem, rtx val)
{
machine_mode mode = GET_MODE (mem);
@@ -6854,9 +6854,9 @@ maybe_emit_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
/* This function expands the legacy _sync_lock test_and_set operation which is
generally an atomic exchange. Some limited targets only allow the
- constant 1 to be stored. This is an ACQUIRE operation.
+ constant 1 to be stored. This is an ACQUIRE operation.
- TARGET is an optional place to stick the return value.
+ TARGET is an optional place to stick the return value.
MEM is where VAL is stored. */
rtx
@@ -6948,7 +6948,7 @@ expand_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
is not exactly one. */
if (targetm.atomic_test_and_set_trueval != 1)
ret = emit_store_flag_force (target, NE, ret, const0_rtx, mode, 0, 1);
-
+
return ret;
}
@@ -7194,7 +7194,7 @@ expand_asm_reg_clobber_mem_blockage (HARD_REG_SET regs)
emit_insn (gen_rtx_PARALLEL (VOIDmode, v));
}
-/* This routine will either emit the mem_thread_fence pattern or issue a
+/* This routine will either emit the mem_thread_fence pattern or issue a
sync_synchronize to generate a fence for memory model MEMMODEL. */
void
@@ -7384,7 +7384,7 @@ struct atomic_op_functions
};
-/* Fill in structure pointed to by OP with the various optab entries for an
+/* Fill in structure pointed to by OP with the various optab entries for an
operation of type CODE. */
static void
@@ -7458,7 +7458,7 @@ get_atomic_op_for_code (struct atomic_op_functions *op, enum rtx_code code)
/* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
using memory order MODEL. If AFTER is true the operation needs to return
- the value of *MEM after the operation, otherwise the previous value.
+ the value of *MEM after the operation, otherwise the previous value.
TARGET is an optional place to place the result. The result is unused if
it is const0_rtx.
Return the result if there is a better sequence, otherwise NULL_RTX. */
@@ -7491,7 +7491,7 @@ maybe_optimize_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
return NULL_RTX;
}
-/* Try to emit an instruction for a specific operation varaition.
+/* Try to emit an instruction for a specific operation varaition.
OPTAB contains the OP functions.
TARGET is an optional place to return the result. const0_rtx means unused.
MEM is the memory location to operate on.
@@ -7500,7 +7500,7 @@ maybe_optimize_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
MODEL is the memory model, if used.
AFTER is true if the returned result is the value after the operation. */
-static rtx
+static rtx
maybe_emit_op (const struct atomic_op_functions *optab, rtx target, rtx mem,
rtx val, bool use_memmodel, enum memmodel model, bool after)
{
@@ -7554,17 +7554,17 @@ maybe_emit_op (const struct atomic_op_functions *optab, rtx target, rtx mem,
return (target == const0_rtx ? const0_rtx : ops[0].value);
return NULL_RTX;
-}
+}
/* This function expands an atomic fetch_OP or OP_fetch operation:
TARGET is an option place to stick the return value. const0_rtx indicates
- the result is unused.
+ the result is unused.
atomically fetch MEM, perform the operation with VAL and return it to MEM.
CODE is the operation being performed (OP)
MEMMODEL is the memory model variant to use.
AFTER is true to return the result of the operation (OP_fetch).
- AFTER is false to return the value before the operation (fetch_OP).
+ AFTER is false to return the value before the operation (fetch_OP).
This function will *only* generate instructions if there is a direct
optab. No compare and swap loops or libcalls will be generated. */
@@ -7653,7 +7653,7 @@ expand_atomic_fetch_op_no_fallback (rtx target, rtx mem, rtx val,
/* This function expands an atomic fetch_OP or OP_fetch operation:
TARGET is an option place to stick the return value. const0_rtx indicates
- the result is unused.
+ the result is unused.
atomically fetch MEM, perform the operation with VAL and return it to MEM.
CODE is the operation being performed (OP)
MEMMODEL is the memory model variant to use.
@@ -7675,7 +7675,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
result = expand_atomic_fetch_op_no_fallback (target, mem, val, code, model,
after);
-
+
if (result)
return result;
@@ -7747,7 +7747,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
start_sequence ();
/* If the result is used, get a register for it. */
- if (!unused_result)
+ if (!unused_result)
{
if (!target || !register_operand (target, mode))
target = gen_reg_rtx (mode);
@@ -7766,7 +7766,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
}
else
- t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX, true,
+ t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX, true,
OPTAB_LIB_WIDEN);
/* For after, copy the value now. */
@@ -7781,7 +7781,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
return NULL_RTX;
}
-\f
+
/* Return true if OPERAND is suitable for operand number OPNO of
instruction ICODE. */
@@ -7792,7 +7792,7 @@ insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
|| (insn_data[(int) icode].operand[opno].predicate
(operand, insn_data[(int) icode].operand[opno].mode)));
}
-\f
+
/* TARGET is a target of a multiword operation that we are going to
implement as a series of word-mode operations. Return true if
TARGET is suitable for this purpose. */
diff --git a/gcc/optabs.h b/gcc/optabs.h
index 7ab2a85e818..2e4d36b4c0d 100644
--- a/gcc/optabs.h
+++ b/gcc/optabs.h
@@ -353,7 +353,7 @@ extern void expand_mem_signal_fence (enum memmodel);
rtx expand_atomic_load (rtx, rtx, enum memmodel);
rtx expand_atomic_store (rtx, rtx, enum memmodel, bool);
-rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
+rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
bool);
extern void expand_asm_reg_clobber_mem_blockage (HARD_REG_SET);
diff --git a/gcc/opts-common.cc b/gcc/opts-common.cc
index c3ede438ac0..21eb3d90e99 100644
--- a/gcc/opts-common.cc
+++ b/gcc/opts-common.cc
@@ -1001,7 +1001,7 @@ opts_concat (const char *first, ...)
diagnostics or set state outside of these variables. */
void
-decode_cmdline_options_to_array (unsigned int argc, const char **argv,
+decode_cmdline_options_to_array (unsigned int argc, const char **argv,
unsigned int lang_mask,
struct cl_decoded_option **decoded_options,
unsigned int *decoded_options_count)
@@ -1196,7 +1196,7 @@ keep:
/* We put the last -fdiagnostics-color= at the first position
after argv[0] so it can take effect immediately. */
memmove (new_decoded_options + 2, new_decoded_options + 1,
- sizeof (struct cl_decoded_option)
+ sizeof (struct cl_decoded_option)
* (new_decoded_options_count - 1));
new_decoded_options[1] = old_decoded_options[fdiagnostics_color_idx];
new_decoded_options_count++;
@@ -1251,7 +1251,7 @@ handle_option (struct gcc_options *opts,
handlers->target_option_override_hook))
return false;
}
-
+
return true;
}
@@ -1667,21 +1667,21 @@ set_option (struct gcc_options *opts, struct gcc_options *opts_set,
case CLVC_BIT_SET:
if ((value != 0) == (option->var_type == CLVC_BIT_SET))
{
- if (option->cl_host_wide_int)
+ if (option->cl_host_wide_int)
*(HOST_WIDE_INT *) flag_var |= option->var_value;
- else
+ else
*(int *) flag_var |= option->var_value;
}
else
{
- if (option->cl_host_wide_int)
+ if (option->cl_host_wide_int)
*(HOST_WIDE_INT *) flag_var &= ~option->var_value;
- else
+ else
*(int *) flag_var &= ~option->var_value;
}
if (set_flag_var)
{
- if (option->cl_host_wide_int)
+ if (option->cl_host_wide_int)
*(HOST_WIDE_INT *) set_flag_var |= option->var_value;
else
*(int *) set_flag_var |= option->var_value;
@@ -1771,21 +1771,21 @@ option_enabled (int opt_idx, unsigned lang_mask, void *opts)
}
case CLVC_EQUAL:
- if (option->cl_host_wide_int)
+ if (option->cl_host_wide_int)
return *(HOST_WIDE_INT *) flag_var == option->var_value;
else
return *(int *) flag_var == option->var_value;
case CLVC_BIT_CLEAR:
- if (option->cl_host_wide_int)
+ if (option->cl_host_wide_int)
return (*(HOST_WIDE_INT *) flag_var & option->var_value) == 0;
else
return (*(int *) flag_var & option->var_value) == 0;
case CLVC_BIT_SET:
- if (option->cl_host_wide_int)
+ if (option->cl_host_wide_int)
return (*(HOST_WIDE_INT *) flag_var & option->var_value) != 0;
- else
+ else
return (*(int *) flag_var & option->var_value) != 0;
case CLVC_SIZE:
diff --git a/gcc/opts-global.cc b/gcc/opts-global.cc
index d07838490fd..699779fbf61 100644
--- a/gcc/opts-global.cc
+++ b/gcc/opts-global.cc
@@ -268,7 +268,7 @@ init_options_once (void)
void
decode_cmdline_options_to_array_default_mask (unsigned int argc,
- const char **argv,
+ const char **argv,
struct cl_decoded_option **decoded_options,
unsigned int *decoded_options_count)
{
diff --git a/gcc/opts.cc b/gcc/opts.cc
index 9ba47d7deaa..deeb0807059 100644
--- a/gcc/opts.cc
+++ b/gcc/opts.cc
@@ -367,7 +367,7 @@ add_comma_separated_to_vector (void **pvec, const char *arg)
char *w;
char *token_start;
vec<char_p> *v = (vec<char_p> *) *pvec;
-
+
vec_check_alloc (v, 1);
/* We never free this string. */
@@ -2841,7 +2841,7 @@ common_handle_option (struct gcc_options *opts,
case OPT_fdiagnostics_show_location_:
diagnostic_prefixing_rule (dc) = (diagnostic_prefixing_rule_t) value;
break;
-
+
case OPT_fdiagnostics_show_caret:
dc->show_caret = value;
break;
@@ -3142,7 +3142,7 @@ common_handle_option (struct gcc_options *opts,
}
else
value = opts->x_dwarf_version;
-
+
/* FALLTHRU */
case OPT_gdwarf_:
if (value < 2 || value > 5)
diff --git a/gcc/opts.h b/gcc/opts.h
index 9959a440ca1..5f4ca733a2f 100644
--- a/gcc/opts.h
+++ b/gcc/opts.h
@@ -365,7 +365,7 @@ extern bool enum_value_to_arg (const struct cl_enum_arg *enum_args,
const char **argp, int value,
unsigned int lang_mask);
extern void decode_cmdline_options_to_array (unsigned int argc,
- const char **argv,
+ const char **argv,
unsigned int lang_mask,
struct cl_decoded_option **decoded_options,
unsigned int *decoded_options_count);
@@ -374,7 +374,7 @@ extern void init_options_struct (struct gcc_options *opts,
struct gcc_options *opts_set);
extern void init_opts_obstack (void);
extern void decode_cmdline_options_to_array_default_mask (unsigned int argc,
- const char **argv,
+ const char **argv,
struct cl_decoded_option **decoded_options,
unsigned int *decoded_options_count);
extern void set_default_handlers (struct cl_option_handlers *handlers,
diff --git a/gcc/passes.cc b/gcc/passes.cc
index 91d560720c3..5481342eaad 100644
--- a/gcc/passes.cc
+++ b/gcc/passes.cc
@@ -340,7 +340,7 @@ rest_of_type_compilation (tree type, int toplev)
timevar_pop (TV_SYMOUT);
}
-\f
+
void
pass_manager::
diff --git a/gcc/plugin.cc b/gcc/plugin.cc
index 142f3fa4131..fe5a0fc3577 100644
--- a/gcc/plugin.cc
+++ b/gcc/plugin.cc
@@ -276,7 +276,7 @@ parse_plugin_arg_opt (const char *arg)
}
else if (*ptr == '=')
{
- if (!key_parsed)
+ if (!key_parsed)
{
key_len = len;
len = 0;
diff --git a/gcc/pointer-query.cc b/gcc/pointer-query.cc
index 5b05e9bedf8..25dae4fdaa9 100644
--- a/gcc/pointer-query.cc
+++ b/gcc/pointer-query.cc
@@ -238,7 +238,7 @@ gimple_call_return_array (gimple *stmt, offset_int offrng[2], bool *past_end,
offrng[1] = aref.sizrng[1] - 1;
else
offrng[1] = HOST_WIDE_INT_M1U;
-
+
offrng[0] = 0;
return gimple_call_arg (stmt, 0);
}
@@ -332,7 +332,7 @@ get_size_range (range_query *query, tree exp, gimple *stmt, tree range[2],
if (range_type == VR_VARYING)
{
if (integral)
- {
+ {
/* Use the full range of the type of the expression when
no value range information is available. */
range[0] = TYPE_MIN_VALUE (exptype);
diff --git a/gcc/postreload-gcse.cc b/gcc/postreload-gcse.cc
index 1f374eacff5..edf5c83b769 100644
--- a/gcc/postreload-gcse.cc
+++ b/gcc/postreload-gcse.cc
@@ -73,7 +73,7 @@ along with GCC; see the file COPYING3. If not see
and replace the load with a copy from this register to the loaded
register.
*/
-\f
+
/* Keep statistics of this pass. */
static struct
@@ -149,7 +149,7 @@ expr_hasher::equal (const expr *exp1, const expr *exp2)
/* The table itself. */
static hash_table<expr_hasher> *expr_table;
-\f
+
static struct obstack expr_obstack;
@@ -229,7 +229,7 @@ static vec<modify_pair> *canon_modify_mem_list;
/* Vector of simple bitmaps indexed by block number. Each component sbitmap
indicates which expressions are transparent through the block. */
static sbitmap *transp;
-\f
+
/* Helpers for memory allocation/freeing. */
static void alloc_mem (void);
@@ -269,7 +269,7 @@ static void eliminate_partially_redundant_load (basic_block,
rtx_insn *,
struct expr *);
static void eliminate_partially_redundant_loads (void);
-\f
+
/* Allocate memory for the CUID mapping array and register/memory
tracking tables. */
@@ -355,7 +355,7 @@ free_mem (void)
free (modify_mem_list);
free (canon_modify_mem_list);
}
-\f
+
/* Insert expression X in INSN in the hash TABLE.
If it is already present, record it as the last occurrence in INSN's
@@ -426,7 +426,7 @@ insert_expr_in_table (rtx x, rtx_insn *insn)
cur_expr->avail_occr = avail_occr;
}
}
-\f
+
/* Lookup pattern PAT in the expression hash table.
The result is a pointer to the table entry, or NULL if not found. */
@@ -455,7 +455,7 @@ lookup_expr_in_table (rtx pat)
else
return (*slot);
}
-\f
+
/* Dump all expressions and occurrences that are currently in the
expression hash table to FILE. */
@@ -498,7 +498,7 @@ dump_hash_table (FILE *file)
}
fprintf (file, "\n");
}
-\f
+
/* Return true if register X is recorded as being set by an instruction
whose CUID is greater than the one given. */
@@ -586,7 +586,7 @@ oprs_unchanged_p (rtx x, rtx_insn *insn, bool after_insn)
return 1;
}
-\f
+
/* Used for communication between find_mem_conflicts and
load_killed_in_block_p. Nonzero if find_mem_conflicts finds a
@@ -618,7 +618,7 @@ find_mem_conflicts (rtx dest, const_rtx setter ATTRIBUTE_UNUSED,
if (true_dependence (dest, GET_MODE (dest), mem_op))
mems_conflict_p = 1;
}
-\f
+
/* Return nonzero if the expression in X (a memory reference) is killed
in the current basic block before (if AFTER_INSN is false) or after
@@ -666,7 +666,7 @@ load_killed_in_block_p (int uid_limit, rtx x, bool after_insn)
}
return 0;
}
-\f
+
/* Record register first/last/block set information for REGNO in INSN. */
@@ -749,7 +749,7 @@ reset_opr_set_tables (void)
obstack_free (&modifies_mem_obstack, modifies_mem_obstack_bottom);
modifies_mem_list = NULL;
}
-\f
+
/* Record things set by INSN.
This data is used by oprs_unchanged_p. */
@@ -785,7 +785,7 @@ record_opr_changes (rtx_insn *insn)
record_last_mem_set_info (insn);
}
}
-\f
+
/* Scan the pattern of INSN and add an entry to the hash TABLE.
After reload we are interested in loads/stores only. */
@@ -844,7 +844,7 @@ hash_scan_set (rtx_insn *insn)
}
}
}
-\f
+
/* Create hash table of memory expressions available at end of basic
blocks. Basically you should think of this hash table as the
@@ -879,7 +879,7 @@ compute_hash_table (void)
hash_scan_set (insn);
}
}
-\f
+
/* Check if register REG is killed in any insn waiting to be inserted on
edge E. This function is required to check that our data flow analysis
@@ -913,7 +913,7 @@ reg_used_on_edge (rtx reg, edge e)
return false;
}
-\f
+
/* Return the loaded/stored register of a load/store instruction. */
static rtx
@@ -1414,7 +1414,7 @@ gcse_after_reload_main (rtx f ATTRIBUTE_UNUSED)
free_mem ();
}
-\f
+
static unsigned int
rest_of_handle_gcse2 (void)
diff --git a/gcc/postreload.cc b/gcc/postreload.cc
index fb392651e1b..78aad0ad810 100644
--- a/gcc/postreload.cc
+++ b/gcc/postreload.cc
@@ -648,7 +648,7 @@ reload_cse_simplify_operands (rtx_insn *insn, rtx testreg)
return apply_change_group ();
}
-\f
+
/* If reload couldn't use reg+reg+offset addressing, try to use reg+reg
addressing now.
This code might also be useful when reload gave up on reg+reg addressing
@@ -823,7 +823,7 @@ reload_combine_closest_single_use (unsigned regno, int ruid_limit)
retval = NULL;
for (i = use_idx; i < RELOAD_COMBINE_MAX_USES; i++)
{
- struct reg_use *use = reg_state[regno].reg_use + i;
+ struct reg_use *use = reg_state[regno].reg_use + i;
int this_ruid = use->ruid;
if (this_ruid >= ruid_limit)
continue;
@@ -856,7 +856,7 @@ fixup_debug_insns (rtx reg, rtx replacement, rtx_insn *from, rtx_insn *to)
if (!DEBUG_BIND_INSN_P (insn))
continue;
-
+
t = INSN_VAR_LOCATION_LOC (insn);
t = simplify_replace_rtx (t, reg, replacement);
validate_change (insn, &INSN_VAR_LOCATION_LOC (insn), t, 0);
@@ -1612,7 +1612,7 @@ reload_combine_note_use (rtx *xp, rtx_insn *insn, int ruid, rtx containing_mem)
}
}
}
-\f
+
/* See if we can reduce the cost of a constant by replacing a move
with an add. We track situations in which a register is set to a
constant or to a register plus a constant. */
@@ -1778,7 +1778,7 @@ move2add_use_add2_insn (scalar_int_mode mode, rtx reg, rtx sym, rtx off,
if (costs_lt_p (&newcst, &oldcst, speed)
&& have_add2_insn (reg, new_src))
- changed = validate_change (insn, &SET_SRC (pat), tem, 0);
+ changed = validate_change (insn, &SET_SRC (pat), tem, 0);
else if (sym == NULL_RTX && mode != BImode)
{
scalar_int_mode narrow_mode;
@@ -2304,7 +2304,7 @@ move2add_note_store (rtx dst, const_rtx set, void *data)
reg_mode[regno] = VOIDmode;
}
}
-\f
+
namespace {
const pass_data pass_data_postreload_cse =
diff --git a/gcc/predict.cc b/gcc/predict.cc
index 851117e5fac..4a87278d3a6 100644
--- a/gcc/predict.cc
+++ b/gcc/predict.cc
@@ -204,7 +204,7 @@ maybe_hot_edge_p (edge e)
/* Return true if COUNT is considered to be never executed in function FUN
or if function FUN is considered so in the static profile. */
-
+
static bool
probably_never_executed (struct function *fun, profile_count count)
{
@@ -1544,7 +1544,7 @@ is_comparison_with_loop_invariant_p (gcond *stmt, class loop *loop,
op0 = gimple_cond_lhs (stmt);
op1 = gimple_cond_rhs (stmt);
- if ((TREE_CODE (op0) != SSA_NAME && TREE_CODE (op0) != INTEGER_CST)
+ if ((TREE_CODE (op0) != SSA_NAME && TREE_CODE (op0) != INTEGER_CST)
|| (TREE_CODE (op1) != SSA_NAME && TREE_CODE (op1) != INTEGER_CST))
return false;
if (!simple_iv (loop, loop_containing_stmt (stmt), op0, &iv0, true))
@@ -2361,7 +2361,7 @@ guess_outgoing_edge_probabilities (basic_block bb)
bb_estimate_probability_locally (bb);
combine_predictions_for_insn (BB_END (bb), bb);
}
-\f
+
static tree expr_expected_value (tree, bitmap, enum br_predictor *predictor,
HOST_WIDE_INT *probability);
@@ -2652,7 +2652,7 @@ expr_expected_value (tree expr, bitmap visited,
op0, code, op1, visited, predictor,
probability);
}
-\f
+
/* Return probability of a PREDICTOR. If the predictor has variable
probability return passed PROBABILITY. */
@@ -3164,7 +3164,7 @@ tree_guess_outgoing_edge_probabilities (basic_block bb)
delete bb_predictions;
bb_predictions = NULL;
}
-\f
+
/* Filter function predicate that returns true for a edge predicate P
if its edge is equal to DATA. */
@@ -3294,7 +3294,7 @@ predict_paths_leading_to_edge (edge e, enum br_predictor pred,
else
maybe_predict_edge (e, pred, taken);
}
-\f
+
/* This is used to carry information about basic blocks. It is
attached to the AUX field of the standard CFG block. */
@@ -3414,7 +3414,7 @@ propagate_freq (basic_block head, bitmap tovisit,
bb->index, cyclic_probability.to_double (),
max_cyclic_prob.to_double (),
frequency.to_double ());
-
+
cyclic_probability = max_cyclic_prob;
}
else if (dump_file)
@@ -3576,7 +3576,7 @@ drop_profile (struct cgraph_node *node, profile_count call_count)
for (e = node->indirect_calls; e; e = e->next_callee)
e->count = gimple_bb (e->call_stmt)->count;
node->count = ENTRY_BLOCK_PTR_FOR_FN (fn)->count;
-
+
profile_status_for_fn (fn)
= (flag_guess_branch_prob ? PROFILE_GUESSED : PROFILE_ABSENT);
node->frequency
@@ -3590,7 +3590,7 @@ drop_profile (struct cgraph_node *node, profile_count call_count)
call counts going to 0-count functions, and drop the profile to guessed
so that we can use the estimated probabilities and avoid optimizing only
for size.
-
+
The other case where the profile may be missing is when the routine
is not going to be emitted to the object file, e.g. for "extern template"
class methods. Those will be marked DECL_EXTERNAL. Emit a warning in
@@ -3985,7 +3985,7 @@ estimate_bb_frequencies (bool force)
}
}
tmp = tmp * freq_max + sreal (1, -1);
- profile_count count = profile_count::from_gcov_type (tmp.to_int ());
+ profile_count count = profile_count::from_gcov_type (tmp.to_int ());
/* If we have profile feedback in which this function was never
executed, then preserve this info. */
@@ -4384,7 +4384,7 @@ force_edge_cold (edge e, bool impossible)
count_sum += e2->count ();
if (e2->probability.initialized_p ())
prob_sum += e2->probability;
- else
+ else
uninitialized_exit = true;
}
@@ -4450,7 +4450,7 @@ force_edge_cold (edge e, bool impossible)
}
}
/* FIXME: Implement RTL path. */
- else
+ else
found = true;
if (!found)
{
diff --git a/gcc/pretty-print.cc b/gcc/pretty-print.cc
index 7d294717f50..663e3a0d466 100644
--- a/gcc/pretty-print.cc
+++ b/gcc/pretty-print.cc
@@ -850,7 +850,7 @@ pp_write_text_to_stream (pretty_printer *pp)
Flush the formatted text of pretty-printer PP onto the attached stream.
Replace characters in PPF that have special meaning in a GraphViz .dot
file.
-
+
This routine is not very fast, but it doesn't have to be as this is only
be used by routines dumping intermediate representations in graph form. */
@@ -1381,7 +1381,7 @@ pp_format (pretty_printer *pp, text_info *text)
case 'Z':
{
int *v = va_arg (*text->args_ptr, int *);
- unsigned len = va_arg (*text->args_ptr, unsigned);
+ unsigned len = va_arg (*text->args_ptr, unsigned);
for (unsigned i = 0; i < len; ++i)
{
@@ -1939,7 +1939,7 @@ pp_end_quote (pretty_printer *pp, bool show_color)
pp_string (pp, close_quote);
}
-\f
+
/* The string starting at P has LEN (at least 1) bytes left; if they
start with a valid UTF-8 sequence, return the length of that
sequence and set *VALUE to the value of that sequence, and
@@ -2423,10 +2423,10 @@ test_pp_format ()
}
/* Verify %Z. */
- int v[] = { 1, 2, 3 };
+ int v[] = { 1, 2, 3 };
ASSERT_PP_FORMAT_3 ("1, 2, 3 12345678", "%Z %x", v, 3, 0x12345678);
- int v2[] = { 0 };
+ int v2[] = { 0 };
ASSERT_PP_FORMAT_3 ("0 12345678", "%Z %x", v2, 1, 0x12345678);
/* Verify that combinations work, along with unformatted text. */
diff --git a/gcc/print-tree.cc b/gcc/print-tree.cc
index 1f3afcbbc86..cd4b6d146f0 100644
--- a/gcc/print-tree.cc
+++ b/gcc/print-tree.cc
@@ -214,7 +214,7 @@ indent_to (FILE *file, int column)
for (i = 0; i < column; i++)
fprintf (file, " ");
}
-\f
+
/* Print the node NODE in full on file FILE, preceded by PREFIX,
starting in column INDENT. */
diff --git a/gcc/profile-count.cc b/gcc/profile-count.cc
index d05fef3fb00..817ce330d2f 100644
--- a/gcc/profile-count.cc
+++ b/gcc/profile-count.cc
@@ -343,7 +343,7 @@ profile_count::to_sreal_scale (profile_count in, bool *known) const
&& !ipa().nonzero_p ())
return 0;
}
- else
+ else
/* We can handle correctly 0 IPA count within locally estimated
profile, but otherwise we are lost and this should not happen. */
gcc_checking_assert (!ipa ().initialized_p () || !ipa ().nonzero_p ());
diff --git a/gcc/profile-count.h b/gcc/profile-count.h
index 0739e26fe74..ab086e7536f 100644
--- a/gcc/profile-count.h
+++ b/gcc/profile-count.h
@@ -756,7 +756,7 @@ public:
if (other.ipa ().nonzero_p ()
&& !(ipa () == *this))
return false;
-
+
return ipa_p () == other.ipa_p ();
}
@@ -1036,7 +1036,7 @@ public:
return *this;
}
- /* Return true when value is not zero and can be used for scaling.
+ /* Return true when value is not zero and can be used for scaling.
This is different from *this > 0 because that requires counter to
be IPA. */
bool nonzero_p () const
diff --git a/gcc/profile.cc b/gcc/profile.cc
index a71800d5ce6..530eb7da0e2 100644
--- a/gcc/profile.cc
+++ b/gcc/profile.cc
@@ -194,10 +194,10 @@ instrument_values (histogram_values values)
}
}
}
-\f
-/* Computes hybrid profile for all matching entries in da_file.
-
+
+/* Computes hybrid profile for all matching entries in da_file.
+
CFG_CHECKSUM is the precomputed checksum for the CFG. */
static gcov_type *
@@ -413,7 +413,7 @@ cmp_stats (const void *ptr1, const void *ptr2)
/* Compute the branch probabilities for the various branches.
- Annotate them accordingly.
+ Annotate them accordingly.
CFG_CHECKSUM is the precomputed checksum for the CFG. */
@@ -862,7 +862,7 @@ sort_hist_values (histogram_value hist)
}
}
/* Load value histograms values whose description is stored in VALUES array
- from .gcda file.
+ from .gcda file.
CFG_CHECKSUM is the precomputed checksum for the CFG. */
@@ -1381,7 +1381,7 @@ branch_prob (bool thunk)
/* Compute two different checksums. Note that we want to compute
the checksum in only once place, since it depends on the shape
- of the control flow which can change during
+ of the control flow which can change during
various transformations. */
if (thunk)
{
@@ -1557,7 +1557,7 @@ branch_prob (bool thunk)
compute_function_frequency ();
}
}
-\f
+
/* Union find algorithm implementation for the basic blocks using
aux fields. */
@@ -1591,7 +1591,7 @@ union_groups (basic_block bb1, basic_block bb2)
bb1g->aux = bb2g;
}
-\f
+
/* This function searches all of the edges in the program flow graph, and puts
as many bad edges as possible onto the spanning tree. Bad edges include
abnormals edges, which can't be instrumented at the moment. Since it is
@@ -1650,7 +1650,7 @@ find_spanning_tree (struct edge_list *el)
clear_aux_for_blocks ();
}
-\f
+
/* Perform file-level initialization for branch-prob processing. */
void
diff --git a/gcc/range-op.cc b/gcc/range-op.cc
index ec75e07bc8a..0feea97c6d1 100644
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -1507,7 +1507,7 @@ public:
relation_kind rel) const;
} op_minus;
-void
+void
operator_minus::wi_fold (irange &r, tree type,
const wide_int &lh_lb, const wide_int &lh_ub,
const wide_int &rh_lb, const wide_int &rh_ub) const
@@ -1860,7 +1860,7 @@ operator_mult::wi_op_overflows (wide_int &res, tree type,
return overflow;
}
-void
+void
operator_mult::wi_fold (irange &r, tree type,
const wide_int &lh_lb, const wide_int &lh_ub,
const wide_int &rh_lb, const wide_int &rh_ub) const
@@ -4253,7 +4253,7 @@ pointer_and_operator::wi_fold (irange &r, tree type,
// whether the expression evaluates to non-NULL.
if (wi_zero_p (type, lh_lb, lh_ub) || wi_zero_p (type, lh_lb, lh_ub))
r = range_zero (type);
- else
+ else
r.set_varying (type);
}
@@ -4320,7 +4320,7 @@ pointer_or_operator::wi_fold (irange &r, tree type,
else
r.set_varying (type);
}
-\f
+
// Return a pointer to the range_operator instance, if there is one
// associated with tree_code CODE.
diff --git a/gcc/read-rtl.cc b/gcc/read-rtl.cc
index 8cb25aebdbb..6ea499d7830 100644
--- a/gcc/read-rtl.cc
+++ b/gcc/read-rtl.cc
@@ -133,7 +133,7 @@ static void one_time_initialization (void);
/* Global singleton. */
rtx_reader *rtx_reader_ptr = NULL;
-\f
+
/* The mode and code iterator structures. */
static struct iterator_group modes, codes, ints, substs;
@@ -1074,7 +1074,7 @@ initialize_iterators (void)
upper_ptr = add_map_value (upper_ptr, i, copy);
}
}
-\f
+
#ifdef GENERATOR_FILE
/* Process a define_conditions directive, starting with the optional
diff --git a/gcc/real.cc b/gcc/real.cc
index 126695bf2e2..3930f3fda28 100644
--- a/gcc/real.cc
+++ b/gcc/real.cc
@@ -121,7 +121,7 @@ real_isdenormal (const REAL_VALUE_TYPE *r)
{
return r->cl == rvc_normal && (r->sig[SIGSZ-1] & SIG_MSB) == 0;
}
-\f
+
/* Initialize R with a positive zero. */
static inline void
@@ -160,7 +160,7 @@ get_inf (REAL_VALUE_TYPE *r, int sign)
r->sign = sign;
}
-\f
+
/* Right-shift the significand of A by N bits; put the result in the
significand of R. If any one bits are shifted out, return true. */
@@ -520,7 +520,7 @@ normalize (REAL_VALUE_TYPE *r)
}
}
}
-\f
+
/* Calculate R = A + (SUBTRACT_P ? -B : B). Return true if the
result may be inexact due to a loss of precision. */
@@ -1260,7 +1260,7 @@ real_isnan (const REAL_VALUE_TYPE *r)
return (r->cl == rvc_nan);
}
-/* Determine whether a floating-point value X is a signaling NaN. */
+/* Determine whether a floating-point value X is a signaling NaN. */
bool real_issignaling_nan (const REAL_VALUE_TYPE *r)
{
return real_isnan (r) && r->signalling;
@@ -1415,7 +1415,7 @@ real_can_shorten_arithmetic (machine_mode imode, machine_mode tmode)
&& !MODE_COMPOSITE_P (tmode)
&& !MODE_COMPOSITE_P (imode));
}
-\f
+
/* Render R as an integer. */
HOST_WIDE_INT
@@ -2681,7 +2681,7 @@ real_2expN (REAL_VALUE_TYPE *r, int n, format_helper fmt)
decimal_real_convert (r, fmt, r);
}
-\f
+
static void
round_for_format (const struct real_format *fmt, REAL_VALUE_TYPE *r)
{
@@ -2958,7 +2958,7 @@ real_hash (const REAL_VALUE_TYPE *r)
return h;
}
-\f
+
/* IEEE single-precision format. */
static void encode_ieee_single (const struct real_format *fmt,
@@ -3178,7 +3178,7 @@ const struct real_format spu_single_format =
false,
"spu_single"
};
-\f
+
/* IEEE double-precision format. */
static void encode_ieee_double (const struct real_format *fmt,
@@ -3435,7 +3435,7 @@ const struct real_format motorola_double_format =
true,
"motorola_double"
};
-\f
+
/* IEEE extended real format. This comes in three flavors: Intel's as
a 12 byte image, Intel's as a 16 byte image, and Motorola's. Intel
12- and 16-byte images may be big- or little endian; Motorola's is
@@ -3851,7 +3851,7 @@ const struct real_format ieee_extended_intel_96_round_53_format =
false,
"ieee_extended_intel_96_round_53"
};
-\f
+
/* IBM 128-bit extended precision format: a pair of IEEE double precision
numbers whose sum is equal to the extended precision value. The number
with greater magnitude is first. This format has the same magnitude
@@ -3965,7 +3965,7 @@ const struct real_format mips_extended_format =
"mips_extended"
};
-\f
+
/* IEEE quad precision format. */
static void encode_ieee_quad (const struct real_format *fmt,
@@ -4252,7 +4252,7 @@ const struct real_format mips_quad_format =
true,
"mips_quad"
};
-\f
+
/* Descriptions of VAX floating point formats can be found beginning at
http://h71000.www7.hp.com/doc/73FINAL/4515/4515pro_013.html#f_floating_point_format
@@ -4600,7 +4600,7 @@ const struct real_format vax_g_format =
false,
"vax_g"
};
-\f
+
/* Encode real R into a single precision DFP value in BUF. */
static void
encode_decimal_single (const struct real_format *fmt ATTRIBUTE_UNUSED,
@@ -4726,7 +4726,7 @@ const struct real_format decimal_quad_format =
false,
"decimal_quad"
};
-\f
+
/* Encode half-precision floats. This routine is used both for the IEEE
ARM alternative encodings. */
static void
@@ -5026,7 +5026,7 @@ const struct real_format arm_bfloat_half_format =
"arm_bfloat_half"
};
-\f
+
/* A synthetic "format" for internal arithmetic. It's the size of the
internal significand minus the two bits needed for proper rounding.
The encode and decode routines exist only to satisfy our paranoia
@@ -5073,7 +5073,7 @@ const struct real_format real_internal_format =
false,
"real_internal"
};
-\f
+
/* Calculate X raised to the integer exponent N in format FMT and store
the result in R. Return true if the result may be inexact due to
loss of precision. The algorithm is the classic "left-to-right binary
@@ -5591,6 +5591,6 @@ build_sinatan_real (REAL_VALUE_TYPE * r, tree type)
mpfr_sqrt (mpfr_c, mpfr_c, MPFR_RNDZ);
real_from_mpfr (r, mpfr_c, fmt, MPFR_RNDZ);
-
+
mpfr_clears (mpfr_const1, mpfr_c, mpfr_maxval, NULL);
}
diff --git a/gcc/real.h b/gcc/real.h
index dd41c65d786..b49d26616d3 100644
--- a/gcc/real.h
+++ b/gcc/real.h
@@ -396,7 +396,7 @@ extern const struct real_format arm_bfloat_half_format;
/* Determine whether a floating-point value X is a NaN. */
#define REAL_VALUE_ISNAN(x) real_isnan (&(x))
-/* Determine whether a floating-point value X is a signaling NaN. */
+/* Determine whether a floating-point value X is a signaling NaN. */
#define REAL_VALUE_ISSIGNALING_NAN(x) real_issignaling_nan (&(x))
/* Determine whether a floating-point value X is negative. */
@@ -462,7 +462,7 @@ extern int real_exponent (const REAL_VALUE_TYPE *);
extern void real_ldexp (REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *, int);
/* **** End of software floating point emulator interface macros **** */
-\f
+
/* Constant real values 0, 1, 2, -1 and 0.5. */
extern REAL_VALUE_TYPE dconst0;
@@ -554,6 +554,6 @@ extern void real_from_integer (REAL_VALUE_TYPE *, format_helper,
/* Fills r with the largest value such that 1 + r*r won't overflow.
This is used in both sin (atan (x)) and cos (atan(x)) optimizations. */
-extern void build_sinatan_real (REAL_VALUE_TYPE *, tree);
+extern void build_sinatan_real (REAL_VALUE_TYPE *, tree);
#endif /* ! GCC_REAL_H */
diff --git a/gcc/recog.cc b/gcc/recog.cc
index 200cf4214f1..d2aac7e30b4 100644
--- a/gcc/recog.cc
+++ b/gcc/recog.cc
@@ -110,7 +110,7 @@ init_recog (void)
volatile_ok = 1;
}
-\f
+
/* Return true if labels in asm operands BODY are LABEL_REFs. */
static bool
@@ -176,7 +176,7 @@ check_asm_operands (rtx x)
return 1;
}
-\f
+
/* Static data for the next two routines. */
struct change_t
@@ -357,7 +357,7 @@ insn_invalid_p (rtx_insn *insn, bool in_group)
clobbers. */
int icode = recog (pat, insn,
(GET_CODE (pat) == SET
- && ! reload_completed
+ && ! reload_completed
&& ! reload_in_progress)
? &num_clobbers : 0);
int is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0;
@@ -1506,7 +1506,7 @@ general_operand (rtx op, machine_mode mode)
integer modes need the same number of hard registers, the
size of floating point mode can be less than the integer
mode. */
- && ! lra_in_progress
+ && ! lra_in_progress
&& paradoxical_subreg_p (op))
return false;
@@ -1536,7 +1536,7 @@ general_operand (rtx op, machine_mode mode)
return false;
}
-\f
+
/* Return true if OP is a valid memory address for a memory reference
of mode MODE.
@@ -1906,7 +1906,7 @@ comparison_operator (rtx op, machine_mode mode)
return ((mode == VOIDmode || GET_MODE (op) == mode)
&& COMPARISON_P (op));
}
-\f
+
/* If BODY is an insn body that uses ASM_OPERANDS, return it. */
rtx
@@ -2336,7 +2336,7 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints)
return result;
}
-\f
+
/* Given an rtx *P, if it is a sum containing an integer constant term,
return the location (type rtx *) of the pointer to that constant term.
Otherwise, return a null pointer. */
@@ -2382,7 +2382,7 @@ find_constant_term_loc (rtx *p)
return 0;
}
-\f
+
/* Return true if OP is a memory reference whose address contains
no side effects and remains valid after the addition of a positive
integer less than the size of the object being referenced.
@@ -2528,7 +2528,7 @@ mode_dependent_address_p (rtx addr, addr_space_t addrspace)
return targetm.mode_dependent_address_p (addr, addrspace);
}
-\f
+
/* Return true if boolean attribute ATTR is supported. */
static bool
@@ -2713,7 +2713,7 @@ constrain_operands_cached (rtx_insn *insn, int strict)
else
return 1;
}
-\f
+
/* Analyze INSN and fill in recog_data. */
void
@@ -3368,10 +3368,10 @@ reg_fits_class_p (const_rtx operand, reg_class_t cl, int offset,
/* Regno must not be a pseudo register. Offset may be negative. */
return (HARD_REGISTER_NUM_P (regno)
&& HARD_REGISTER_NUM_P (regno + offset)
- && in_hard_reg_set_p (reg_class_contents[(int) cl], mode,
+ && in_hard_reg_set_p (reg_class_contents[(int) cl], mode,
regno + offset));
}
-\f
+
/* Split single instruction. Helper function for split_all_insns and
split_all_insns_noflow. Return last insn in the sequence if successful,
or NULL if unsuccessful. */
@@ -3548,7 +3548,7 @@ split_all_insns_noflow (void)
}
return 0;
}
-\f
+
struct peep2_insn_data
{
rtx_insn *insn;
@@ -4323,7 +4323,7 @@ if_test_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn)
return true;
}
-\f
+
static unsigned int
rest_of_handle_peephole2 (void)
{
diff --git a/gcc/ree.cc b/gcc/ree.cc
index 98bd80efd7b..a76d08b11a5 100644
--- a/gcc/ree.cc
+++ b/gcc/ree.cc
@@ -890,7 +890,7 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state)
generated more than one insn.
This generates garbage since we throw away the insn when we're
- done, only to recreate it later if this test was successful.
+ done, only to recreate it later if this test was successful.
Make sure to get the mode from the extension (cand->insn). This
is different than in the code to emit the copy as we have not
diff --git a/gcc/reg-stack.cc b/gcc/reg-stack.cc
index 635b5825333..e51c53265a0 100644
--- a/gcc/reg-stack.cc
+++ b/gcc/reg-stack.cc
@@ -151,7 +151,7 @@
asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
*/
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -271,7 +271,7 @@ static bool subst_stack_regs (rtx_insn *, stack_ptr);
static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
static void print_stack (FILE *, stack_ptr);
static rtx_insn *next_flags_user (rtx_insn *, int &);
-\f
+
/* Return nonzero if any stack register is mentioned somewhere within PAT. */
static int
@@ -332,7 +332,7 @@ stack_regs_mentioned (const_rtx insn)
return test == 1;
}
-\f
+
static rtx ix86_flags_rtx;
static rtx_insn *
@@ -360,7 +360,7 @@ next_flags_user (rtx_insn *insn, int &debug_seen)
}
return NULL;
}
-\f
+
/* Reorganize the stack into ascending numbers, before this insn. */
static void
@@ -407,7 +407,7 @@ pop_stack (stack_ptr regstack, int regno)
}
}
}
-\f
+
/* Return a pointer to the REG expression within PAT. If PAT is not a
REG, possible enclosed by a conversion rtx, return the inner part of
PAT that stopped the search. */
@@ -459,7 +459,7 @@ get_true_reg (rtx *pat)
return pat;
}
}
-\f
+
/* Set if we find any malformed asms in a function. */
static bool any_malformed_asm;
@@ -669,7 +669,7 @@ check_asm_stack_operands (rtx_insn *insn)
return 1;
}
-\f
+
/* Calculate the number of inputs and outputs in BODY, an
asm_operands. N_OPERANDS is the total number of operands, and
N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
@@ -706,7 +706,7 @@ stack_result (tree decl)
return result != 0 && STACK_REG_P (result) ? result : 0;
}
-\f
+
/*
* This section deals with stack register substitution, and forms the second
@@ -767,7 +767,7 @@ get_hard_regnum (stack_ptr regstack, rtx reg)
return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
}
-\f
+
/* Emit an insn to pop virtual register REG before or after INSN.
REGSTACK is the stack state after INSN and is updated to reflect this
pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
@@ -821,7 +821,7 @@ emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg,
return pop_insn;
}
-\f
+
/* Emit an insn before or after INSN to swap virtual register REG with
the top of stack. REGSTACK is the stack state before the swap, and
is updated to reflect the swap. A swap insn is represented as a
@@ -1004,7 +1004,7 @@ emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
else
emit_insn_before (swap_rtx, insn);
}
-\f
+
/* Emit an insns before INSN to swap virtual register SRC1 with
the top of stack and virtual register SRC2 with second stack
slot. REGSTACK is the stack state before the swaps, and
@@ -1046,7 +1046,7 @@ swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
}
-\f
+
/* Handle a move to or from a stack register in PAT, which is in INSN.
REGSTACK is the current stack. Return whether a control flow insn
was deleted in the process. */
@@ -1219,7 +1219,7 @@ move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
return move_for_stack_reg (insn, regstack, pat);
}
-\f
+
/* Swap the condition on a branch, if there is one. Return true if we
found a condition to swap. False if the condition was not used as
such. */
@@ -1470,7 +1470,7 @@ compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack,
}
}
}
-\f
+
/* Substitute hardware stack regs in debug insn INSN, using stack
layout REGSTACK. If we can't find a hardware stack reg for any of
the REGs in it, reset the debug insn. */
@@ -2138,7 +2138,7 @@ subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
return control_flow_insn_deleted;
}
-\f
+
/* Substitute hard regnums for any stack regs in INSN, which has
N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
before the insn, and is updated with changes made here.
@@ -2426,7 +2426,7 @@ callee_clobbers_any_stack_reg (const function_abi & callee_abi)
return false;
}
-\f
+
/* Substitute stack hard reg numbers for stack virtual registers in
INSN. Non-stack register numbers are not changed. REGSTACK is the
current stack content. Insns may be emitted as needed to arrange the
@@ -2535,7 +2535,7 @@ subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
return control_flow_insn_deleted;
}
-\f
+
/* Change the organization of the stack so that it fits a new basic
block. Some registers might have to be popped, but there can never be
a register live in the new block that is not now live.
@@ -2762,7 +2762,7 @@ change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
BB_END (current_block) = PREV_INSN (insn);
}
}
-\f
+
/* Print stack configuration. */
static void
@@ -2784,7 +2784,7 @@ print_stack (FILE *file, stack_ptr s)
fputs ("]\n", file);
}
}
-\f
+
/* This function was doing life analysis. We now let the regular live
code do it's job, so we only need to check some extra invariants
that reg-stack expects. Primary among these being that all registers
@@ -3331,7 +3331,7 @@ convert_regs (void)
if (dump_file)
fputc ('\n', dump_file);
}
-\f
+
/* Convert register usage from "flat" register file usage to a "stack
register file. FILE is the dump file, if used.
@@ -3434,7 +3434,7 @@ reg_to_stack (void)
return true;
}
#endif /* STACK_REGS */
-\f
+
namespace {
const pass_data pass_data_stack_regs =
diff --git a/gcc/regcprop.cc b/gcc/regcprop.cc
index f426f4fedcd..7790a294d8f 100644
--- a/gcc/regcprop.cc
+++ b/gcc/regcprop.cc
@@ -249,7 +249,7 @@ struct kill_set_value_data
struct value_data *vd;
rtx ignore_set_reg;
};
-
+
/* Called through note_stores. If X is set, not clobbered, kill its
current value and install it as the root of its own value list. */
@@ -821,7 +821,7 @@ copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
break;
continue;
}
-
+
extract_constrain_insn (insn);
preprocess_constraints (insn);
@@ -1269,7 +1269,7 @@ validate_value_data (struct value_data *vd)
vd->e[i].next_regno);
}
-\f
+
namespace {
const pass_data pass_data_cprop_hardreg =
diff --git a/gcc/reginfo.cc b/gcc/reginfo.cc
index 24f612bed59..6633f7a3884 100644
--- a/gcc/reginfo.cc
+++ b/gcc/reginfo.cc
@@ -59,7 +59,7 @@ public:
subreg_shape shape;
HARD_REG_SET simplifiable_regs;
};
-\f
+
struct target_hard_regs default_target_hard_regs;
struct target_regs default_target_regs;
#if SWITCHABLE_TARGET
@@ -264,7 +264,7 @@ init_reg_sets_1 (void)
for (i = 0; i < N_REG_CLASSES; i++)
{
bool any_nonfixed = false;
- for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
+ for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
{
reg_class_size[i]++;
@@ -738,11 +738,11 @@ globalize_reg (tree decl, int i)
if (global_regs[i])
{
auto_diagnostic_group d;
- warning_at (loc, 0,
+ warning_at (loc, 0,
"register of %qD used for multiple global register variables",
decl);
inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
- "conflicts with %qD", global_regs_decl[i]);
+ "conflicts with %qD", global_regs_decl[i]);
return;
}
@@ -773,7 +773,7 @@ globalize_reg (tree decl, int i)
reinit_regs ();
}
-\f
+
/* Structure used to record preferences of given pseudo. */
struct reg_pref
@@ -839,7 +839,7 @@ reg_allocno_class (int regno)
return (enum reg_class) reg_pref[regno].allocnoclass;
}
-\f
+
/* Allocate space for reg info and initilize it. */
static void
@@ -965,7 +965,7 @@ make_pass_reginfo_init (gcc::context *ctxt)
return new pass_reginfo_init (ctxt);
}
-\f
+
/* Set up preferred, alternate, and allocno classes for REGNO as
PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
@@ -982,7 +982,7 @@ setup_reg_classes (int regno,
reg_pref[regno].allocnoclass = allocnoclass;
}
-\f
+
/* This is the `regscan' pass of the compiler, run just before cse and
again just before loop. It finds the first and last use of each
pseudo-register. */
@@ -1132,7 +1132,7 @@ reg_scan_mark_refs (rtx x, rtx_insn *insn)
}
}
}
-\f
+
/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
is also in C2. */
@@ -1156,7 +1156,7 @@ reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
reg_class_contents[(int) c2]));
}
-\f
+
inline hashval_t
simplifiable_subregs_hasher::hash (const simplifiable_subreg *value)
{
diff --git a/gcc/regrename.cc b/gcc/regrename.cc
index 0867b8e555c..c28c924c76f 100644
--- a/gcc/regrename.cc
+++ b/gcc/regrename.cc
@@ -931,7 +931,7 @@ regrename_analyze (bitmap bb_mask, bool include_all_block_p)
if (!range_overlaps_hard_reg_set_p (live, chain->regno,
chain->nregs))
continue;
-
+
n_succs_used++;
dest_ri = (class bb_rename_info *)e->dest->aux;
@@ -955,7 +955,7 @@ regrename_analyze (bitmap bb_mask, bool include_all_block_p)
printed = true;
fprintf (dump_file,
" merging chains %d (->%d) and %d (->%d) [%s]\n",
- k, incoming_chain->id, j, chain->id,
+ k, incoming_chain->id, j, chain->id,
reg_names[incoming_chain->regno]);
}
@@ -1947,7 +1947,7 @@ build_def_use (basic_block bb)
return true;
}
-\f
+
/* Initialize the register renamer. If INSN_INFO is true, ensure that
insn_rr is nonnull. */
void
@@ -1988,7 +1988,7 @@ regrename_optimize (void)
return 0;
}
-\f
+
namespace {
const pass_data pass_data_regrename =
diff --git a/gcc/regs.h b/gcc/regs.h
index d0f029f7749..e9451506357 100644
--- a/gcc/regs.h
+++ b/gcc/regs.h
@@ -310,7 +310,7 @@ in_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode,
unsigned int end_regno;
gcc_assert (HARD_REGISTER_NUM_P (regno));
-
+
if (!TEST_HARD_REG_BIT (regs, regno))
return false;
diff --git a/gcc/reload.cc b/gcc/reload.cc
index d079bc120d5..098a062289f 100644
--- a/gcc/reload.cc
+++ b/gcc/reload.cc
@@ -122,11 +122,11 @@ static inline bool
small_register_class_p (reg_class_t rclass)
{
return (reg_class_size [(int) rclass] == 1
- || (reg_class_size [(int) rclass] >= 1
+ || (reg_class_size [(int) rclass] >= 1
&& targetm.class_likely_spilled_p (rclass)));
}
-\f
+
/* All reloads of the current insn are recorded here. See reload.h for
comments. */
int n_reloads;
@@ -299,7 +299,7 @@ push_reg_equiv_alt_mem (int regno, rtx mem)
= alloc_EXPR_LIST (REG_EQUIV, mem,
reg_equiv_alt_mem_list (regno));
}
-\f
+
/* Determine if any secondary reloads are needed for loading (if IN_P is
nonzero) or storing (if IN_P is zero) X to or from a reload register of
register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
@@ -548,7 +548,7 @@ scratch_reload_class (enum insn_code icode)
gcc_assert (rclass != NO_REGS);
return rclass;
}
-\f
+
/* Return a memory location that will be used to copy X in mode MODE.
If we haven't already made a location for this mode in this insn,
call find_reloads_address on the location being returned. */
@@ -625,7 +625,7 @@ clear_secondary_mem (void)
{
memset (secondary_memlocs, 0, sizeof secondary_memlocs);
}
-\f
+
/* Find the largest class which has at least one register valid in
mode INNER, and which for every such register, that register number
@@ -729,7 +729,7 @@ find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED,
#endif
return best_class;
}
-\f
+
/* Return the number of a previously made reload that can be combined with
a new one, or n_reloads if none of the existing reloads can be used.
OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
@@ -1667,7 +1667,7 @@ dup_replacements (rtx *dup_loc, rtx *orig_loc)
push_replacement (dup_loc, r->what, r->mode);
}
}
-\f
+
/* Transfer all replacements that used to be in reload FROM to be in
reload TO. */
@@ -1680,7 +1680,7 @@ transfer_replacements (int to, int from)
if (replacements[i].what == from)
replacements[i].what = to;
}
-\f
+
/* IN_RTX is the value loaded by a reload that we now decided to inherit,
or a subpart of it. If we have any replacements registered for IN_RTX,
cancel the reloads that were supposed to load them.
@@ -1718,7 +1718,7 @@ remove_address_replacements (rtx in_rtx)
}
return something_changed;
}
-\f
+
/* If there is only one output reload, and it is not for an earlyclobber
operand, try to combine it with a (logically unrelated) input reload
to reduce the number of reload registers needed.
@@ -1906,7 +1906,7 @@ combine_reloads (void)
return;
}
}
-\f
+
/* Try to find a reload register for an in-out reload (expressions IN and OUT).
See if one of IN and OUT is a register that may be used;
this is desirable since a spill-register won't be needed.
@@ -1994,7 +1994,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
However, we only ignore IN in its role as this reload.
If the insn uses IN elsewhere and it contains OUT,
that counts. We can't be sure it's the "same" operand
- so it might not go through this reload.
+ so it might not go through this reload.
We also need to avoid using OUT if it, or part of it, is a
fixed register. Modifying such registers, even transiently,
@@ -2101,7 +2101,7 @@ find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
return value;
}
-\f
+
/* This page contains subroutines used mainly for determining
whether the IN or an OUT of a reload can serve as the
reload register. */
@@ -2175,7 +2175,7 @@ strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED,
return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
#endif
}
-\f
+
/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
if they are the same hard reg, and has special hacks for
autoincrement and autodecrement.
@@ -2363,7 +2363,7 @@ operands_match_p (rtx x, rtx y)
}
return 1 + success_2;
}
-\f
+
/* Describe the range of registers or memory referenced by X.
If X is a register, set REG_FLAG and put the first register
number into START and the last plus one into END.
@@ -2573,7 +2573,7 @@ safe_from_earlyclobber (rtx op, rtx clobber)
early_data = decompose (clobber);
return immune_p (op, clobber, early_data);
}
-\f
+
/* Main entry point of this file: search the body of INSN
for values that need reloading and record them with push_reload.
REPLACE nonzero means record also where the values occur
@@ -4643,7 +4643,7 @@ alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
}
return false;
}
-\f
+
/* Scan X for memory references and scan the addresses for reloading.
Also checks for references to "constant" regs that we want to eliminate
and replaces them with the values they stand for.
@@ -5268,7 +5268,7 @@ find_reloads_address (machine_mode mode, rtx *memrefloc, rtx ad,
return find_reloads_address_1 (mode, as, ad, 0, MEM, SCRATCH, loc,
opnum, type, ind_levels, insn);
}
-\f
+
/* Find all pseudo regs appearing in AD
that are eliminable in favor of equivalent values
and do not have hard regs; replace them by their equivalents.
@@ -5335,7 +5335,7 @@ subst_reg_equivs (rtx ad, rtx_insn *insn)
XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
return ad;
}
-\f
+
/* Compute the sum of X and Y, making canonicalizations assumed in an
address, namely: sum constant integers, surround the sum of two
constants with a CONST, put the constant as the second operand, and
@@ -5380,7 +5380,7 @@ form_sum (machine_mode mode, rtx x, rtx y)
return gen_rtx_PLUS (mode, x, y);
}
-\f
+
/* If ADDR is a sum containing a pseudo register that should be
replaced with a constant (from reg_equiv_constant),
return the result of doing so, and also apply the associative
@@ -5439,7 +5439,7 @@ subst_indexed_address (rtx addr)
}
return addr;
}
-\f
+
/* Update the REG_INC notes for an insn. It updates all REG_INC
notes for the instruction which refer to REGNO the to refer
to the reload number.
@@ -5462,7 +5462,7 @@ update_auto_inc_notes (rtx_insn *insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUS
&& (int) REGNO (XEXP (link, 0)) == regno)
push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
}
-\f
+
/* Record the pseudo registers we must reload into hard registers in a
subexpression of a would-be memory address, X referring to a value
in mode MODE. (This function is not called if the address we find
@@ -6066,7 +6066,7 @@ find_reloads_address_1 (machine_mode mode, addr_space_t as,
#undef REG_OK_FOR_CONTEXT
return 0;
}
-\f
+
/* X, which is found at *LOC, is a part of an address that needs to be
reloaded into a register of class RCLASS. If X is a constant, or if
X is a PLUS that contains a constant, check that the constant is a
@@ -6113,7 +6113,7 @@ find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
mode, VOIDmode, 0, 0, opnum, type);
}
-\f
+
/* X, a subreg of a pseudo, is a part of an address that needs to be
reloaded, and the pseusdo is equivalent to a memory location.
@@ -6234,7 +6234,7 @@ find_reloads_subreg_address (rtx x, int opnum, enum reload_type type,
return tem;
}
-\f
+
/* Substitute into the current INSN the registers into which we have reloaded
the things that need reloading. The array `replacements'
contains the locations of all pointers that must be changed
@@ -6306,7 +6306,7 @@ subst_reloads (rtx_insn *insn)
gcc_assert (rld[r->what].optional);
}
}
-\f
+
/* Make a copy of any replacements being done into X and move those
copies to locations in Y, a copy of X. */
@@ -6361,7 +6361,7 @@ move_replacements (rtx *x, rtx *y)
if (replacements[i].where == x)
replacements[i].where = y;
}
-\f
+
/* If LOC was scheduled to be replaced by something, return the replacement.
Otherwise, return *LOC. */
@@ -6407,7 +6407,7 @@ find_replacement (rtx *loc)
return *loc;
}
-\f
+
/* Return nonzero if register in range [REGNO, ENDREGNO)
appears either explicitly or implicitly in X
other than being stored into (except for earlyclobber operands).
@@ -6636,7 +6636,7 @@ refers_to_mem_for_reload_p (rtx x)
return 0;
}
-\f
+
/* Check the insns before INSN to see if there is a suitable register
containing the same value as GOAL.
If OTHER is -1, look for a register in class RCLASS.
@@ -7093,7 +7093,7 @@ find_equiv_reg (rtx goal, rtx_insn *insn, enum reg_class rclass, int other,
}
}
}
-\f
+
/* Find a place where INCED appears in an increment or decrement operator
within X, and return the amount INCED is incremented or decremented by.
The value is always positive. */
@@ -7149,7 +7149,7 @@ find_inc_amount (rtx x, rtx inced)
return 0;
}
-\f
+
/* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
REG_INC note in insn INSN. REGNO must refer to a hard register. */
diff --git a/gcc/reload1.cc b/gcc/reload1.cc
index 6fe22d8b81f..c441a7bec67 100644
--- a/gcc/reload1.cc
+++ b/gcc/reload1.cc
@@ -77,7 +77,7 @@ along with GCC; see the file COPYING3. If not see
reload needs, spilling, assigning reload registers to use for
fixing up each insn, and generating the new insns to copy values
into the reload registers. */
-\f
+
struct target_reload default_target_reload;
#if SWITCHABLE_TARGET
struct target_reload *this_target_reload = &default_target_reload;
@@ -247,7 +247,7 @@ static bool need_dce;
/* List of all insns needing reloads. */
static class insn_chain *insns_need_reload;
-\f
+
/* This structure is used to record information about register eliminations.
Each array entry describes one possible way of eliminating a register
in favor of another. If there is more than one way of eliminating a
@@ -313,9 +313,9 @@ static poly_int64_pod (*offsets_at)[NUM_ELIMINABLE_REGS];
vec<reg_equivs_t, va_gc> *reg_equivs;
-/* Stack of addresses where an rtx has been changed. We can undo the
+/* Stack of addresses where an rtx has been changed. We can undo the
changes by popping items off the stack and restoring the original
- value at each location.
+ value at each location.
We use this simplistic undo capability rather than copy_rtx as copy_rtx
will not make a deep copy of a normally sharable rtx, such as
@@ -329,7 +329,7 @@ static vec<rtx_p> substitute_stack;
/* Number of labels in the current function. */
static int num_labels;
-\f
+
static void replace_pseudos_in (rtx *, machine_mode, rtx);
static void maybe_fix_stack_asms (void);
static void copy_reloads (class insn_chain *);
@@ -400,7 +400,7 @@ static bool gen_reload_chain_without_interm_reg_p (int, int);
static int reloads_conflict (int, int);
static rtx_insn *gen_reload (rtx, rtx, int, enum reload_type);
static rtx_insn *emit_insn_if_valid_for_reload (rtx);
-\f
+
/* Initialize the reload pass. This is called at the beginning of compilation
and may be called again if the target is reinitialized. */
@@ -648,7 +648,7 @@ grow_reg_equivs (void)
reg_equivs->quick_insert (i, ze);
}
-\f
+
/* Global variables used by reload and its subroutines. */
/* The current basic block while in calculate_elim_costs_all_insns. */
@@ -1405,7 +1405,7 @@ maybe_fix_stack_asms (void)
#endif
}
-\f
+
/* Copy the global variables n_reloads and rld into the corresponding elts
of CHAIN. */
static void
@@ -1540,7 +1540,7 @@ calculate_needs_all_insns (int global)
}
*pprev_reload = 0;
}
-\f
+
/* This function is called from the register allocator to set up estimates
for the cost of eliminating pseudos which have REG_EQUIV equivalences to
an invariant. The structure is similar to calculate_needs_all_insns. */
@@ -1638,7 +1638,7 @@ calculate_elim_costs_all_insns (void)
offsets_at = NULL;
offsets_known_at = NULL;
}
-\f
+
/* Comparison function for qsort to decide which of two reloads
should be handled first. *P1 and *P2 are the reload numbers. */
@@ -1673,7 +1673,7 @@ reload_reg_class_lower (const void *r1p, const void *r2p)
so that the results of qsort leave nothing to chance. */
return r1 - r2;
}
-\f
+
/* The cost of spilling each hard reg. */
static int spill_cost[FIRST_PSEUDO_REGISTER];
@@ -1759,7 +1759,7 @@ order_regs_for_reload (class insn_chain *chain)
}
CLEAR_REG_SET (&pseudos_counted);
}
-\f
+
/* Vector of reload-numbers showing the order in which the reloads should
be processed. */
static short reload_order[MAX_RELOADS];
@@ -2018,7 +2018,7 @@ select_reload_regs (void)
chain = chain->next_need_reload)
find_reload_regs (chain);
}
-\f
+
/* Delete all insns that were inserted by emit_caller_save_insns during
this iteration. */
static void
@@ -2049,7 +2049,7 @@ delete_caller_save_insns (void)
c = c->next;
}
}
-\f
+
/* Handle the failure to find a register to spill.
INSN should be one of the insns which needed this particular spill reg. */
@@ -2073,7 +2073,7 @@ spill_failure (rtx_insn *insn, enum reg_class rclass)
fatal_insn ("this is the insn:", insn);
}
}
-\f
+
/* Delete an unneeded INSN and any previous insns who sole purpose is loading
data that is dead in INSN. */
@@ -2305,7 +2305,7 @@ mark_home_live (int regno)
if (reg_renumber[regno] >= 0)
mark_home_live_1 (regno, PSEUDO_REGNO_MODE (regno));
}
-\f
+
/* This function handles the tracking of elimination offsets around branches.
X is a piece of RTL being scanned.
@@ -2458,7 +2458,7 @@ set_label_offsets (rtx x, rtx_insn *insn, int initial_p)
break;
}
}
-\f
+
/* This function examines every reg that occurs in X and adjusts the
costs for its elimination which are gathered by IRA. INSN is the
insn in which X occurs. We do not recurse into MEM expressions. */
@@ -3182,7 +3182,7 @@ check_eliminable_occurrences (rtx x)
}
}
}
-\f
+
/* Scan INSN and eliminate all eliminable registers in it.
If REPLACE is nonzero, do the replacement destructively. Also
@@ -4137,7 +4137,7 @@ free_reg_equiv (void)
free_EXPR_LIST_list (®_equiv_alt_mem_list (i));
vec_free (reg_equivs);
}
-\f
+
/* Kick all pseudos out of hard register REGNO.
If CANT_ELIMINATE is nonzero, it means that we are doing this spill
@@ -4322,7 +4322,7 @@ finish_spills (int global)
return something_changed;
}
-\f
+
/* Find all paradoxical subregs within X and update reg_max_ref_mode. */
static void
@@ -4407,7 +4407,7 @@ strip_paradoxical_subreg (rtx *op_ptr, rtx *other_ptr)
*other_ptr = tem;
return true;
}
-\f
+
/* A subroutine of reload_as_needed. If INSN has a REG_EH_REGION note,
examine all of the reload insns between PREV and NEXT exclusive, and
annotate all that may trap. */
@@ -4878,7 +4878,7 @@ forget_marked_reloads (regset regs)
reg_last_reload_reg[reg] = 0;
}
}
-\f
+
/* The following HARD_REG_SETs indicate when each hard register is
used for a reload of various parts of the current insn. */
@@ -5272,7 +5272,7 @@ reload_reg_reaches_end_p (unsigned int regno, int reloadnum)
if (regno >= REGNO (reg) && regno < END_REGNO (reg))
return 0;
}
-
+
switch (type)
{
case RELOAD_OTHER:
@@ -5422,7 +5422,7 @@ reload_reg_rtx_reaches_end_p (rtx reg, int reloadnum)
return false;
return true;
}
-\f
+
/* Returns whether R1 and R2 are uniquely chained: the value of one
is used by the other, and that value is not used by any other
@@ -5670,7 +5670,7 @@ reloads_conflict (int r1, int r2)
gcc_unreachable ();
}
}
-\f
+
/* Indexed by reload number, 1 if incoming value
inherited from previous insns. */
static char reload_inherited[MAX_RELOADS];
@@ -5983,7 +5983,7 @@ conflicts_with_override (rtx x)
return 1;
return 0;
}
-\f
+
/* Give an error message saying we failed to find a reload for INSN,
and clear out reload R. */
static void
@@ -6188,7 +6188,7 @@ allocate_reload_reg (class insn_chain *chain ATTRIBUTE_UNUSED, int r,
return set_reload_reg (i, r);
}
-\f
+
/* Initialize all the tables needed to allocate reload registers.
CHAIN is the insn currently being processed; SAVE_RELOAD_REG_RTX
is the array we use to restore the reg_rtx field for every reload. */
@@ -6923,7 +6923,7 @@ choose_reload_regs (class insn_chain *chain)
remove its related reloads. */
else if (rld[r].in
&& rld[r].out != rld[r].in
- && (tem = replaced_subreg (rld[r].in), REG_P (tem))
+ && (tem = replaced_subreg (rld[r].in), REG_P (tem))
&& REGNO (tem) < FIRST_PSEUDO_REGISTER
&& (targetm.secondary_memory_needed
(rld[r].inmode, REGNO_REG_CLASS (REGNO (tem)),
@@ -7012,7 +7012,7 @@ deallocate_reload_reg (int r)
rld[r].mode);
reload_spill_index[r] = -1;
}
-\f
+
/* These arrays are filled by emit_reload_insns and its subroutines. */
static rtx_insn *input_reload_insns[MAX_RECOG_OPERANDS];
static rtx_insn *other_input_address_reload_insns = 0;
@@ -7225,7 +7225,7 @@ emit_input_reload_insns (class insn_chain *chain, struct reload *rl,
/* Store into the reload register instead of the pseudo. */
SET_DEST (PATTERN (temp)) = reloadreg;
- /* Verify that resulting insn is valid.
+ /* Verify that resulting insn is valid.
Note that we have replaced the destination of TEMP with
RELOADREG. If TEMP references RELOADREG within an
@@ -8376,7 +8376,7 @@ emit_reload_insns (class insn_chain *chain)
}
reg_reloaded_dead |= reg_reloaded_died;
}
-\f
+
/* Go through the motions to emit INSN and test if it is strictly valid.
Return the emitted insn if valid, else return NULL. */
@@ -8631,7 +8631,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
return last ? NEXT_INSN (last) : get_insns ();
}
-\f
+
/* Delete a previously made output-reload whose result we now believe
is not needed. First we double-check.
@@ -8958,7 +8958,7 @@ delete_address_reloads_1 (rtx_insn *dead_insn, rtx x, rtx_insn *current_insn)
reg_reloaded_contents[REGNO (dst)] = -1;
delete_insn (prev);
}
-\f
+
/* Output reload-insns to reload VALUE into RELOADREG.
VALUE is an autoincrement or autodecrement RTX whose operand
is a register or memory location;
diff --git a/gcc/reorg.cc b/gcc/reorg.cc
index ed32c91c3fa..a608594c34f 100644
--- a/gcc/reorg.cc
+++ b/gcc/reorg.cc
@@ -108,7 +108,7 @@ along with GCC; see the file COPYING3. If not see
#include "resource.h"
#include "tree-pass.h"
-\f
+
/* First, some functions that were used before GCC got a control flow graph.
These functions are now only used here in reorg.cc, and have therefore
been moved here to avoid inadvertent misuse elsewhere in the compiler. */
@@ -145,7 +145,7 @@ skip_consecutive_labels (rtx label_or_return)
return label;
}
-\f
+
/* Insns which have delay slots that have not yet been filled. */
static struct obstack unfilled_slots_obstack;
@@ -221,7 +221,7 @@ static void fill_slots_from_thread (rtx_jump_insn *, rtx, rtx, rtx,
static void fill_eager_delay_slots (void);
static void relax_delay_slots (rtx_insn *);
static void make_return_insns (rtx_insn *);
-\f
+
/* A wrapper around next_active_insn which takes care to return ret_rtx
unchanged. */
@@ -232,7 +232,7 @@ first_active_target_insn (rtx insn)
return insn;
return next_active_insn (as_a <rtx_insn *> (insn));
}
-\f
+
/* Return true iff INSN is a simplejump, or any kind of return insn. */
static bool
@@ -242,7 +242,7 @@ simplejump_or_return_p (rtx insn)
&& (simplejump_p (as_a <rtx_insn *> (insn))
|| ANY_RETURN_P (PATTERN (insn))));
}
-\f
+
/* Return TRUE if this insn should stop the search for insn to fill delay
slots. LABELS_P indicates that labels should terminate the search.
In all cases, jumps terminate the search. */
@@ -284,7 +284,7 @@ stop_search_p (rtx_insn *insn, int labels_p)
gcc_unreachable ();
}
}
-\f
+
/* Return TRUE if any resources are marked in both RES1 and RES2 or if either
resource set contains a volatile memory reference. Otherwise, return FALSE. */
@@ -335,7 +335,7 @@ insn_sets_resource_p (rtx insn, struct resources *res,
: MARK_SRC_DEST));
return resource_conflicts_p (&insn_sets, res);
}
-\f
+
/* Find a label at the end of the function or before a RETURN. If there
is none, try to make one. If that fails, returns 0.
@@ -460,7 +460,7 @@ find_end_label (rtx kind)
return *plabel;
}
-\f
+
/* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
the pattern of INSN with the SEQUENCE.
@@ -553,7 +553,7 @@ add_to_delay_list (rtx_insn *insn, vec<rtx_insn *> *delay_list)
delay_list->safe_push (insn);
}
-\f
+
/* Delete INSN from the delay slot of the insn that it is in, which may
produce an insn with no delay slots. Return the new insn. */
@@ -613,7 +613,7 @@ delete_from_delay_slot (rtx_insn *insn)
return trial;
}
-\f
+
/* Delete INSN, a JUMP_INSN. */
static void
@@ -621,7 +621,7 @@ delete_scheduled_jump (rtx_insn *insn)
{
delete_related_insns (insn);
}
-\f
+
/* Counters for delay-slot filling. */
#define NUM_REORG_FUNCTIONS 2
@@ -642,7 +642,7 @@ note_delay_statistics (int slots_filled, int index)
slots_filled = MAX_DELAY_HISTOGRAM;
num_filled_delays[index][slots_filled][reorg_pass_number]++;
}
-\f
+
/* Optimize the following cases:
1. When a conditional branch skips over only one instruction,
@@ -743,7 +743,7 @@ optimize_skip (rtx_jump_insn *insn, vec<rtx_insn *> *delay_list)
INSN_ANNULLED_BRANCH_P (insn) = 1;
}
}
-\f
+
/* Encode and return branch direction and prediction information for
INSN assuming it will jump to LABEL.
@@ -963,7 +963,7 @@ check_annul_list_true_false (int annul_true_p,
return 1;
}
-\f
+
/* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
the condition tested by INSN is CONDITION and the resources shown in
OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
@@ -1118,7 +1118,7 @@ steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
FOR_EACH_VEC_ELT (new_delay_list, i, temp)
add_to_delay_list (temp, delay_list);
}
-\f
+
/* Similar to steal_delay_list_from_target except that SEQ is on the
fallthrough path of INSN. Here we only do something if the delay insn
of SEQ is an unconditional branch. In that case we steal its delay slot
@@ -1190,7 +1190,7 @@ steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
if (used_annul)
*pannul_p = 1;
}
-\f
+
/* Try merging insns starting at THREAD which match exactly the insns in
INSN's delay list.
@@ -1308,12 +1308,12 @@ try_merge_delay_insns (rtx_insn *insn, rtx_insn *thread)
TRIAL's delay list. */
for (int j = 1; j < i; j++)
mark_set_resources (XVECEXP (pat, 0, j),
- &modified, 0, MARK_SRC_DEST_CALL);
+ &modified, 0, MARK_SRC_DEST_CALL);
if (! insn_references_resource_p (dtrial, &set, true)
&& ! insn_sets_resource_p (dtrial, &set, true)
&& ! insn_sets_resource_p (dtrial, &needed, true)
&& rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
- /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
+ /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
resource modified between them (only dtrial is checked because
next_to_match and dtrial shall to be equal in order to hit
this line) */
@@ -1377,7 +1377,7 @@ try_merge_delay_insns (rtx_insn *insn, rtx_insn *thread)
INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
}
}
-\f
+
/* See if INSN is redundant with an insn in front of TARGET. Often this
is called when INSN is a candidate for a delay slot of TARGET.
DELAY_LIST are insns that will be placed in delay slots of TARGET in front
@@ -1598,7 +1598,7 @@ redundant_insn (rtx insn, rtx_insn *target, const vec<rtx_insn *> &delay_list)
return 0;
}
-\f
+
/* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
is nonzero, we are allowed to fall into this thread; otherwise, we are
@@ -1644,7 +1644,7 @@ own_thread_p (rtx thread, rtx label, int allow_fallthrough)
return 1;
}
-\f
+
/* Called when INSN is being moved from a location near the target of a jump.
We leave a marker of the form (use (INSN)) immediately in front of WHERE
for mark_target_live_regs. These markers will be deleted at the end.
@@ -1765,7 +1765,7 @@ update_reg_unused_notes (rtx_insn *insn, rtx other_insn)
remove_note (insn, link);
}
}
-\f
+
static vec <rtx> sibling_labels;
/* Return the label before INSN, or put a new label there. If SIBLING is
@@ -2199,7 +2199,7 @@ fill_simple_delay_slots (int non_jumps_p)
note_delay_statistics (slots_filled, 0);
}
}
-\f
+
/* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
return the ultimate label reached by any such chain of jumps.
Return a suitable return rtx if the chain ultimately leads to a
@@ -2753,7 +2753,7 @@ fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
}
}
}
-\f
+
/* Make another attempt to find insns to place in delay slots.
We previously looked for insns located in front of the delay insn
@@ -2880,7 +2880,7 @@ fill_eager_delay_slots (void)
note_delay_statistics (slots_filled, 1);
}
}
-\f
+
static void delete_computation (rtx_insn *insn);
/* Recursively delete prior insns that compute the value (used only by INSN
@@ -3059,7 +3059,7 @@ switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
return false;
}
-\f
+
/* Once we have tried two ways to fill a delay slot, make a pass over the
code to try to improve the results and to do such things as more jump
threading. */
@@ -3307,7 +3307,7 @@ relax_delay_slots (rtx_insn *first)
We know "trial" is an insn here as it is the output of
next_real_nondebug_insn () above. */
update_block (as_a <rtx_insn *> (trial), tmp);
-
+
/* Now emit a label before the special USE insn, and
redirect our jump to the new label. */
target_label = get_label_before (PREV_INSN (tmp), target_label);
@@ -3330,7 +3330,7 @@ relax_delay_slots (rtx_insn *first)
rtx temp_label = JUMP_LABEL (trial_seq->insn (0));
if (ANY_RETURN_P (temp_label))
temp_label = find_end_label (temp_label);
-
+
if (temp_label
&& redirect_with_delay_slots_safe_p (delay_jump_insn,
temp_label, insn))
@@ -3466,7 +3466,7 @@ relax_delay_slots (rtx_insn *first)
next = next_active_insn (insn);
}
}
-\f
+
/* Look for filled jumps to the end of function label. We can try to convert
them into RETURN insns if the insns in the delay slot are valid for the
@@ -3616,7 +3616,7 @@ make_return_insns (rtx_insn *first)
fill_simple_delay_slots (1);
fill_simple_delay_slots (0);
}
-\f
+
/* Try to find insns to place in delay slots. */
static void
@@ -3832,7 +3832,7 @@ dbr_schedule (rtx_insn *first)
free (uid_to_ruid);
crtl->dbr_scheduled_p = true;
}
-\f
+
/* Run delay slot optimization. */
static unsigned int
rest_of_handle_delay_slots (void)
diff --git a/gcc/resource.cc b/gcc/resource.cc
index 65d60395610..74627e9b355 100644
--- a/gcc/resource.cc
+++ b/gcc/resource.cc
@@ -73,14 +73,14 @@ static HARD_REG_SET current_live_regs;
Also only used by the next two functions. */
static HARD_REG_SET pending_dead_regs;
-\f
+
static void update_live_status (rtx, const_rtx, void *);
static int find_basic_block (rtx_insn *, int);
static rtx_insn *next_insn_no_annul (rtx_insn *);
static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*,
rtx *, int, struct resources,
struct resources);
-\f
+
/* Utility function called from mark_target_live_regs via note_stores.
It deadens any CLOBBERed registers and livens any SET registers. */
@@ -156,7 +156,7 @@ find_basic_block (rtx_insn *insn, int search_limit)
return -1;
}
-\f
+
/* Similar to next_insn, but ignores insns in the delay slots of
an annulled branch. */
@@ -189,7 +189,7 @@ next_insn_no_annul (rtx_insn *insn)
return insn;
}
-\f
+
/* Given X, some rtl, and RES, a pointer to a `struct resource', mark
which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
is TRUE, resources used by the called routine will be included for
@@ -406,7 +406,7 @@ mark_referenced_resources (rtx x, struct resources *res,
break;
}
}
-\f
+
/* A subroutine of mark_target_live_regs. Search forward from TARGET
looking for registers that are set before they are used. These are dead.
Stop after passing a few conditional jumps, and/or a small
@@ -596,7 +596,7 @@ find_dead_or_set_registers (rtx_insn *target, struct resources *res,
return jump_insn;
}
-\f
+
/* Given X, a part of an insn, and a pointer to a `struct resource',
RES, indicate which resources are modified by the insn. If
MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
@@ -808,7 +808,7 @@ mark_set_resources (rtx x, struct resources *res, int in_dest,
break;
}
}
-\f
+
/* Return TRUE if INSN is a return, possibly with a filled delay slot. */
static bool
@@ -1132,7 +1132,7 @@ mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resource
if (tinfo != NULL)
tinfo->live_regs = res->regs;
}
-\f
+
/* Initialize the resources required by mark_target_live_regs ().
This should be invoked before the first call to mark_target_live_regs. */
@@ -1215,7 +1215,7 @@ init_resource_info (rtx_insn *epilogue_insn)
if (LABEL_P (BB_HEAD (bb)))
BLOCK_FOR_INSN (BB_HEAD (bb)) = bb;
}
-\f
+
/* Free up the resources allocated to mark_target_live_regs (). This
should be invoked after the last call to mark_target_live_regs (). */
@@ -1254,7 +1254,7 @@ free_resource_info (void)
if (LABEL_P (BB_HEAD (bb)))
BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL;
}
-\f
+
/* Clear any hashed information that we have stored for INSN. */
void
@@ -1303,7 +1303,7 @@ incr_ticks_for_insn (rtx_insn *insn)
if (b != -1)
bb_ticks[b]++;
}
-\f
+
/* Add TRIAL to the set of resources used at the end of the current
function. */
void
diff --git a/gcc/rtl.cc b/gcc/rtl.cc
index 0748427c8d4..a0c7268501c 100644
--- a/gcc/rtl.cc
+++ b/gcc/rtl.cc
@@ -36,7 +36,7 @@ along with GCC; see the file COPYING3. If not see
# include "diagnostic-core.h"
#endif
-\f
+
/* Indexed by rtx code, gives number of operands for an rtx with that code.
Does NOT include rtx header data (code and links). */
@@ -153,7 +153,7 @@ static size_t rtx_alloc_sizes[(int) LAST_AND_UNUSED_RTX_CODE];
static size_t rtvec_alloc_counts;
static size_t rtvec_alloc_sizes;
-\f
+
/* Allocate an rtx vector of N elements.
Store the length, and initialize all elements to zero. */
@@ -258,7 +258,7 @@ cwi_output_hex (FILE *outfile, const_rtx x)
fprintf (outfile, HOST_WIDE_INT_PRINT_PADDED_HEX, CWI_ELT (x, i));
}
-\f
+
/* Return true if ORIG is a sharable CONST. */
bool
@@ -403,14 +403,14 @@ shallow_copy_rtx (const_rtx orig MEM_STAT_DECL)
}
return copy;
}
-\f
+
/* Nonzero when we are generating CONCATs. */
int generating_concat_p;
/* Nonzero when we are expanding trees to RTL. */
int currently_expanding_to_rtl;
-\f
+
/* Same as rtx_equal_p, but call CB on each pair of rtx if CB is not NULL.
When the callback returns true, we continue with the new pair.
@@ -868,7 +868,7 @@ dump_rtx_statistics (void)
SIZE_AMOUNT (total_sizes));
fprintf (stderr, "-----------------------------------------------\n");
}
-\f
+
#if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007)
/* Disable warnings about missing quoting in GCC diagnostics for
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f9057123127..68a8aa44fc1 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -121,7 +121,7 @@ extern const enum rtx_class rtx_class[NUM_RTX_CODE];
extern const unsigned char rtx_code_size[NUM_RTX_CODE];
extern const unsigned char rtx_next[NUM_RTX_CODE];
-\f
+
/* The flags and bitfields of an ADDR_DIFF_VEC. BASE is the base label
relative to which the offsets are calculated, as explained in rtl.def. */
struct addr_diff_vec_flags
@@ -1393,7 +1393,7 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
#define XC3EXP(RTX, N, C1, C2, C3) (RTL_CHECKC3 (RTX, N, C1, C2, C3).rt_rtx)
-\f
+
/* Methods of rtx_expr_list. */
@@ -1908,7 +1908,7 @@ set_label_ref_label (rtx ref, rtx_insn *label)
{
XCEXP (ref, 0, LABEL_REF) = label;
}
-\f
+
/* For a REG rtx, REGNO extracts the register number. REGNO can only
be used on RHS. Use SET_REGNO to change the value. */
#define REGNO(RTX) (rhs_regno(RTX))
@@ -2906,7 +2906,7 @@ do { \
#ifndef USE_STORE_PRE_DECREMENT
#define USE_STORE_PRE_DECREMENT(MODE) HAVE_PRE_DECREMENT
#endif
-\f
+
/* Nonzero when we are generating CONCATs. */
extern int generating_concat_p;
@@ -4503,7 +4503,7 @@ extern void simplify_using_condition (rtx, rtx *, bitmap);
extern unsigned int compute_alignments (void);
extern void update_alignments (vec<rtx> &);
extern int asm_str_count (const char *templ);
-\f
+
struct rtl_hooks
{
rtx (*gen_lowpart) (machine_mode, rtx);
@@ -4600,7 +4600,7 @@ word_register_operation_p (const_rtx x)
case SIGN_EXTRACT:
case ZERO_EXTRACT:
return false;
-
+
default:
return true;
}
diff --git a/gcc/rtlanal.cc b/gcc/rtlanal.cc
index e69d2e8a9f5..57dd0726285 100644
--- a/gcc/rtlanal.cc
+++ b/gcc/rtlanal.cc
@@ -77,7 +77,7 @@ rtx_subrtx_bound_info rtx_nonconst_subrtx_bounds[NUM_RTX_CODE];
static unsigned int
num_sign_bit_copies_in_rep[MAX_MODE_INT + 1][MAX_MODE_INT + 1];
-\f
+
/* Store X into index I of ARRAY. ARRAY is known to have at least I
elements. Return the new base of ARRAY. */
@@ -814,7 +814,7 @@ rtx_addr_varies_p (const_rtx x, bool for_alias)
}
return 0;
}
-\f
+
/* Return the CALL in X if there is one. */
rtx
@@ -847,7 +847,7 @@ get_call_fndecl (const rtx_insn *insn)
return NULL_TREE;
}
-\f
+
/* Return the value of the integer term in X, if one is apparent;
otherwise return 0.
Only obvious integer terms are detected.
@@ -886,7 +886,7 @@ get_related_value (const_rtx x)
return XEXP (x, 0);
return 0;
}
-\f
+
/* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
to somewhere in the same object or object_block as SYMBOL. */
@@ -972,7 +972,7 @@ get_args_size (const_rtx x)
gcc_checking_assert (REG_NOTE_KIND (x) == REG_ARGS_SIZE);
return rtx_to_poly_int64 (XEXP (x, 0));
}
-\f
+
/* Return the number of places FIND appears within X. If COUNT_DEST is
zero, we do not count occurrences inside the destination of a SET. */
@@ -1038,7 +1038,7 @@ count_occurrences (const_rtx x, const_rtx find, int count_dest)
return count;
}
-\f
+
/* Return TRUE if OP is a register or subreg of a register that
holds an unsigned quantity. Otherwise, return FALSE. */
@@ -1057,7 +1057,7 @@ unsigned_reg_p (rtx op)
return false;
}
-\f
+
/* Nonzero if register REG appears somewhere within IN.
Also works if REG is not a register; in this case it checks
for a subexpression of IN that is Lisp "equal" to REG. */
@@ -1120,7 +1120,7 @@ reg_mentioned_p (const_rtx reg, const_rtx in)
}
return 0;
}
-\f
+
/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
no CODE_LABEL insn. */
@@ -1155,7 +1155,7 @@ reg_used_between_p (const_rtx reg, const rtx_insn *from_insn,
return 1;
return 0;
}
-\f
+
/* Nonzero if the old value of X, a register, is referenced in BODY. If X
is entirely replaced by a new value and the only use is as a SET_DEST,
we do not consider it a reference. */
@@ -1228,7 +1228,7 @@ reg_referenced_p (const_rtx x, const_rtx body)
return 0;
}
}
-\f
+
/* Nonzero if register REG is set or clobbered in an insn between
FROM_INSN and TO_INSN (exclusive of those two). */
@@ -1426,7 +1426,7 @@ read_modify_subreg_p (const_rtx x)
gcc_checking_assert (ordered_p (isize, osize));
return (maybe_gt (isize, osize) && maybe_gt (isize, regsize));
}
-\f
+
/* Helper function for set_of. */
struct set_of_data
{
@@ -1540,7 +1540,7 @@ record_hard_reg_uses (rtx *px, void *data)
{
find_all_hard_regs (*px, (HARD_REG_SET *) data);
}
-\f
+
/* Given an INSN, return a SET expression if this insn has only a single SET.
It may also have CLOBBERs, USEs, or SET whose output
will not be used, which we ignore. */
@@ -1625,7 +1625,7 @@ multiple_sets (const_rtx insn)
/* Either zero or one SET. */
return 0;
}
-\f
+
/* Return nonzero if the destination of SET equals the source
and there are no side effects. */
@@ -1692,7 +1692,7 @@ set_noop_p (const_rtx set)
return (REG_P (src) && REG_P (dst)
&& REGNO (src) == REGNO (dst));
}
-\f
+
/* Return nonzero if an insn consists only of SETs, each of which only sets a
value to itself. */
@@ -1731,7 +1731,7 @@ noop_move_p (const rtx_insn *insn)
}
return 0;
}
-\f
+
/* Return nonzero if register in range [REGNO, ENDREGNO)
appears either explicitly or implicitly in X
@@ -1931,7 +1931,7 @@ reg_overlap_mentioned_p (const_rtx x, const_rtx in)
return 0;
}
}
-\f
+
/* Call FUN on each register or MEM that is stored into or clobbered by X.
(X would be the pattern of an insn). DATA is an arbitrary pointer,
ignored by note_stores, but passed to FUN.
@@ -1995,7 +1995,7 @@ note_stores (const rtx_insn *insn,
note_pattern_stores (XEXP (link, 0), fun, data);
note_pattern_stores (PATTERN (insn), fun, data);
}
-\f
+
/* Like notes_stores, but call FUN for each expression that is being
referenced in PBODY, a pointer to the PATTERN of an insn. We only call
FUN for each expression, not any interior subexpressions. FUN receives a
@@ -2384,7 +2384,7 @@ vec_rtx_properties_base::grow (ptrdiff_t start)
ref_iter = ref_begin + start;
ref_end = ref_begin + new_elems;
}
-\f
+
/* Return nonzero if X's old contents don't survive after INSN.
This will be true if X is a register and X dies in INSN or because
INSN entirely sets X.
@@ -2687,7 +2687,7 @@ find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno)
return 0;
}
-\f
+
/* Return true if KIND is an integer REG_NOTE. */
static bool
@@ -2907,7 +2907,7 @@ remove_node_from_insn_list (const rtx_insn *node, rtx_insn_list **listp)
temp = temp->next ();
}
}
-\f
+
/* Nonzero if X contains any volatile instructions. These are instructions
which may cause unpredictable machine state instructions, and thus no
instructions or register uses should be moved or combined across them.
@@ -3100,7 +3100,7 @@ side_effects_p (const_rtx x)
}
return 0;
}
-\f
+
/* Return nonzero if evaluating rtx X might cause a trap.
FLAGS controls how to consider MEMs. A nonzero means the context
of the access may have changed from the original, such that the
@@ -3327,7 +3327,7 @@ may_trap_or_fault_p (const_rtx x)
{
return may_trap_p_1 (x, 1);
}
-\f
+
/* Replace any occurrence of FROM in X with TO. The function does
not enter into CONST_DOUBLE for the replace.
@@ -3403,7 +3403,7 @@ replace_rtx (rtx x, rtx from, rtx to, bool all_regs)
return x;
}
-\f
+
/* Replace occurrences of the OLD_LABEL in *LOC with NEW_LABEL. Also track
the change in LABEL_NUSES if UPDATE_LABEL_NUSES. */
@@ -3654,7 +3654,7 @@ computed_jump_p (const rtx_insn *insn)
return 0;
}
-\f
+
/* MEM has a PRE/POST-INC/DEC/MODIFY address X. Extract the operands of
the equivalent add insn and pass the result to FN, using DATA as the
@@ -3728,7 +3728,7 @@ for_each_inc_dec (rtx x,
return 0;
}
-\f
+
/* Searches X for any reference to REGNO, returning the rtx of the
reference found if any. Otherwise, returns NULL_RTX. */
@@ -4506,7 +4506,7 @@ label_is_jump_target_p (const_rtx label, const rtx_insn *jump_insn)
return false;
}
-\f
+
/* Return an estimate of the cost of computing rtx X.
One use is in cse, to decide which expression to keep in the hash table.
Another is in rtl generation, to pick the cheapest way to multiply.
@@ -4628,7 +4628,7 @@ get_full_rtx_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno,
c->size = rtx_cost (x, mode, outer, opno, false);
}
-\f
+
/* Return cost of address expression X.
Expect that X is properly formed address reference.
@@ -4655,7 +4655,7 @@ default_address_cost (rtx x, machine_mode, addr_space_t, bool speed)
{
return rtx_cost (x, Pmode, MEM, 0, speed);
}
-\f
+
unsigned HOST_WIDE_INT
nonzero_bits (const_rtx x, machine_mode mode)
@@ -5240,7 +5240,7 @@ nonzero_bits1 (const_rtx x, scalar_int_mode mode, const_rtx known_x,
/* See the macro definition above. */
#undef cached_num_sign_bit_copies
-\f
+
/* Return true if num_sign_bit_copies1 might recurse into both operands
of X. */
@@ -6170,7 +6170,7 @@ truncated_to_mode (machine_mode mode, const_rtx x)
return false;
}
-\f
+
/* Return true if RTX code CODE has a single sequence of zero or more
"e" operands and no rtvec operands. Initialize its rtx_all_subrtx_bounds
entry in that case. */
@@ -6220,7 +6220,7 @@ init_rtlanal (void)
init_num_sign_bit_copies_in_rep ();
}
-\f
+
/* Check whether this is a constant pool constant. */
bool
constant_pool_constant_p (rtx x)
@@ -6228,7 +6228,7 @@ constant_pool_constant_p (rtx x)
x = avoid_constant_pool_reference (x);
return CONST_DOUBLE_P (x);
}
-\f
+
/* If M is a bitmask that selects a field of low-order bits within an item but
not the entire word, return the length of the field. Return -1 otherwise.
M is used in machine mode MODE. */
@@ -6259,7 +6259,7 @@ get_address_mode (rtx mem)
return as_a <scalar_int_mode> (mode);
return targetm.addr_space.address_mode (MEM_ADDR_SPACE (mem));
}
-\f
+
/* Split up a CONST_DOUBLE or integer constant rtx
into two rtx's for single words,
storing in *FIRST the word that comes first in memory in the target
diff --git a/gcc/rtlhooks.cc b/gcc/rtlhooks.cc
index 989d3c98807..b0051f8c38a 100644
--- a/gcc/rtlhooks.cc
+++ b/gcc/rtlhooks.cc
@@ -31,7 +31,7 @@ along with GCC; see the file COPYING3. If not see
#include "rtlhooks-def.h"
#include "explow.h"
#include "target.h"
-\f
+
/* For speed, we will copy the RTX hooks struct member-by-member
instead of doing indirect calls. For these reason, we initialize
@@ -130,4 +130,4 @@ gen_lowpart_if_possible (machine_mode mode, rtx x)
else
return 0;
}
-\f
+
diff --git a/gcc/sbitmap.h b/gcc/sbitmap.h
index 751d28c2c9e..8f4e09c16e6 100644
--- a/gcc/sbitmap.h
+++ b/gcc/sbitmap.h
@@ -96,7 +96,7 @@ struct simple_bitmap_def
/* Return the number of bits in BITMAP. */
#define SBITMAP_SIZE(BITMAP) ((BITMAP)->n_bits)
-/* Verify that access at INDEX in bitmap MAP is valid. */
+/* Verify that access at INDEX in bitmap MAP is valid. */
static inline void
bitmap_check_index (const_sbitmap map, int index)
@@ -105,7 +105,7 @@ bitmap_check_index (const_sbitmap map, int index)
gcc_checking_assert ((unsigned int)index < map->n_bits);
}
-/* Verify that bitmaps A and B have same size. */
+/* Verify that bitmaps A and B have same size. */
static inline void
bitmap_check_sizes (const_sbitmap a, const_sbitmap b)
diff --git a/gcc/sched-deps.cc b/gcc/sched-deps.cc
index 08877b344b6..fc2f4cb0c2a 100644
--- a/gcc/sched-deps.cc
+++ b/gcc/sched-deps.cc
@@ -19,7 +19,7 @@ for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -496,7 +496,7 @@ static enum DEPS_ADJUST_RESULT add_or_update_dep_1 (dep_t, bool, rtx, rtx);
static void check_dep (dep_t, bool);
-\f
+
/* Return nonzero if a load of the memory reference MEM can cause a trap. */
static int
@@ -512,7 +512,7 @@ deps_may_trap_p (const_rtx mem)
}
return rtx_addr_can_trap_p (addr);
}
-\f
+
/* Find the condition under which INSN is executed. If REV is not NULL,
it is set to TRUE when the returned comparison should be reversed
@@ -615,7 +615,7 @@ sched_has_condition_p (const rtx_insn *insn)
return !! sched_get_condition_with_rev (insn, NULL);
}
-\f
+
/* Return nonzero if conditions COND1 and COND2 can never be both true. */
static int
@@ -659,7 +659,7 @@ sched_insns_conditions_mutex_p (const rtx_insn *insn1, const rtx_insn *insn2)
}
return false;
}
-\f
+
/* Return true if INSN can potentially be speculated with type DS. */
bool
@@ -1226,7 +1226,7 @@ add_or_update_dep_1 (dep_t new_dep, bool resolved_p,
case DEP_PRESENT:
dep_t present_dep;
sd_iterator_def sd_it;
-
+
present_dep = sd_find_dep_between_no_cache (DEP_PRO (new_dep),
DEP_CON (new_dep),
resolved_p, &sd_it);
@@ -1550,7 +1550,7 @@ add_dependence (rtx_insn *con, rtx_insn *pro, enum reg_note dep_type)
REG_DEP_TRUE, false);
}
}
-
+
add_dependence_1 (con, pro, dep_type);
}
@@ -1692,7 +1692,7 @@ chain_to_prev_insn (rtx_insn *insn)
&& ! sched_insns_conditions_mutex_p (insn, prev_nonnote))
add_dependence (insn, prev_nonnote, REG_DEP_ANTI);
}
-\f
+
/* Process an insn's memory dependencies. There are four kinds of
dependencies:
@@ -1795,7 +1795,7 @@ flush_pending_lists (class deps_desc *deps, rtx_insn *insn, int for_read,
}
mark_as_hard = false;
}
-\f
+
/* Instruction which dependencies we are analyzing. */
static rtx_insn *cur_insn = NULL;
@@ -1919,7 +1919,7 @@ ds_to_dt (ds_t ds)
}
}
-\f
+
/* Functions for computation of info needed for register pressure
sensitive insn scheduling. */
@@ -2236,7 +2236,7 @@ init_insn_reg_pressure_info (rtx_insn *insn)
}
-\f
+
/* Internal variable for sched_analyze_[12] () functions.
If it is nonzero, this means that sched_analyze_[12] looks
@@ -2668,7 +2668,7 @@ sched_analyze_2 (class deps_desc *deps, rtx x, rtx_insn *insn)
{
ds_t ds = set_dep_weak (DEP_ANTI, BEGIN_CONTROL,
MAX_DEP_WEAK);
-
+
note_dep (u->insn (), ds);
}
else
@@ -3894,7 +3894,7 @@ sched_free_deps (rtx_insn *head, rtx_insn *tail, bool resolved_p)
sd_finish_insn (insn);
}
}
-\f
+
/* Initialize variables for region data dependence analysis.
When LAZY_REG_LAST is true, do not allocate reg_last array
of class deps_desc immediately. */
diff --git a/gcc/sched-ebb.cc b/gcc/sched-ebb.cc
index 3eb6a24f187..04ffe45bbe4 100644
--- a/gcc/sched-ebb.cc
+++ b/gcc/sched-ebb.cc
@@ -18,7 +18,7 @@ for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see
#include "cfgbuild.h"
#include "sched-int.h"
-\f
+
#ifdef INSN_SCHEDULING
/* The number of insns to be scheduled in total. */
@@ -303,7 +303,7 @@ static struct haifa_sched_info ebb_sched_info =
/* We can create new blocks in begin_schedule_ready (). */
| NEW_BBS
};
-\f
+
/* Returns the earliest block in EBB currently being processed where a
"similar load" 'insn2' is found, and hence LOAD_INSN can move
speculatively into the found block. All the following must hold:
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index ab3ad99cdeb..05ea5ac2694 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -756,7 +756,7 @@ struct _haifa_deps_insn_data
unsigned int cant_move : 1;
};
-\f
+
/* Bits used for storing values of the fields in the following
structure. */
#define INCREASE_BITS 8
@@ -1011,7 +1011,7 @@ extern vec<haifa_deps_insn_data_def> h_d_i_d;
(RECOVERY_BLOCK (INSN) != NULL \
&& RECOVERY_BLOCK (INSN) != EXIT_BLOCK_PTR_FOR_FN (cfun))
-\f
+
/* Dep status (aka ds_t) of the link encapsulates all information for a given
dependency, including everything that is needed for speculative scheduling.
@@ -1158,7 +1158,7 @@ enum SPEC_TYPES_OFFSETS {
/* Set if a dependency is cancelled via speculation. */
#define DEP_CANCELLED (DEP_POSTPONED << 1)
-\f
+
/* This represents the results of calling sched-deps.cc functions,
which modify dependencies. */
enum DEPS_ADJUST_RESULT {
@@ -1428,13 +1428,13 @@ extern void concat_note_lists (rtx_insn *, rtx_insn **);
extern rtx_insn *sched_emit_insn (rtx);
extern rtx_insn *get_ready_element (int);
extern int number_in_ready (void);
-\f
+
/* Types and functions in sched-ebb.cc. */
extern basic_block schedule_ebb (rtx_insn *, rtx_insn *, bool);
extern void schedule_ebbs_init (void);
extern void schedule_ebbs_finish (void);
-\f
+
/* Types and functions in sched-rgn.cc. */
/* A region is the main entity for interblock scheduling: insns
diff --git a/gcc/sched-rgn.cc b/gcc/sched-rgn.cc
index f2751f62450..e93f9ef5d9d 100644
--- a/gcc/sched-rgn.cc
+++ b/gcc/sched-rgn.cc
@@ -42,7 +42,7 @@ along with GCC; see the file COPYING3. If not see
computed (dominators, reachability, etc.), data dependences and
priorities are computed, and (3) block level: insns in the block
are actually scheduled. */
-\f
+
#include "config.h"
#include "system.h"
#include "coretypes.h"
@@ -2059,7 +2059,7 @@ is_exception_free (rtx_insn *insn, int bb_src, int bb_trg)
return flag_schedule_speculative_load_dangerous;
}
-\f
+
/* The number of insns from the current block scheduled so far. */
static int sched_target_n_insns;
/* The number of insns from the current block to be scheduled in total. */
@@ -2776,7 +2776,7 @@ free_pending_lists (void)
free_INSN_LIST_list (&bb_deps[bb].pending_jump_insns);
}
}
-\f
+
/* Print dependences for debugging starting from FROM_BB.
Callable from debugger. */
/* Print dependences for debugging starting from FROM_BB.
@@ -2967,7 +2967,7 @@ dump_rgn_dependencies_dot (const char *fname)
fclose (fp);
}
-\f
+
/* Returns true if all the basic blocks of the current region have
NOTE_DISABLE_SCHED_OF_BLOCK which means not to schedule that region. */
bool
@@ -3701,7 +3701,7 @@ advance_target_bb (basic_block bb, rtx_insn *insn)
}
#endif
-\f
+
/* Run instruction scheduler. */
static unsigned int
rest_of_handle_live_range_shrinkage (void)
diff --git a/gcc/sel-sched-dump.cc b/gcc/sel-sched-dump.cc
index b4eef8803df..a348429e199 100644
--- a/gcc/sel-sched-dump.cc
+++ b/gcc/sel-sched-dump.cc
@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see
#include "sel-sched-ir.h"
#include "sel-sched-dump.h"
#include "print-rtl.h"
-\f
+
/* These variables control high-level pretty printing. */
static int sel_dump_cfg_flags = SEL_DUMP_CFG_FLAGS;
@@ -58,7 +58,7 @@ bool sched_dump_to_dot_p = false;
/* Controls how insns from a fence list should be dumped. */
static int dump_flist_insn_flags = (DUMP_INSN_UID | DUMP_INSN_BBN
| DUMP_INSN_SEQNO);
-\f
+
/* The variable used to hold the value of sched_dump when temporarily
switching dump output to the other source, e.g. the .dot file. */
@@ -81,7 +81,7 @@ restore_dump (void)
sched_dump = saved_sched_dump;
saved_sched_dump = NULL;
}
-\f
+
/* Functions for dumping instructions, av sets, and exprs. */
@@ -582,7 +582,7 @@ sel_print_insn (const rtx_insn *insn, int aligned ATTRIBUTE_UNUSED)
return buf;
}
-\f
+
/* Functions for pretty printing of CFG. */
/* FIXME: Using pretty-print here could simplify this stuff. */
@@ -945,7 +945,7 @@ sel_debug_cfg_1 (int flags)
sel_dump_cfg_fileno = t2;
sel_dump_cfg_p = t1;
}
-\f
+
/* Dumps av_set AV to stderr. */
DEBUG_FUNCTION void
debug_av_set (av_set_t av)
diff --git a/gcc/sel-sched-dump.h b/gcc/sel-sched-dump.h
index 2a207cefda2..4f4febbc216 100644
--- a/gcc/sel-sched-dump.h
+++ b/gcc/sel-sched-dump.h
@@ -191,7 +191,7 @@ extern void debug_insn (insn_t);
/* When this flag is on, we are dumping to the .dot file.
When it is off, we are dumping to log. */
extern bool sched_dump_to_dot_p;
-\f
+
/* Functions from sel-sched-dump.cc. */
extern void sel_print (const char *fmt, ...) ATTRIBUTE_PRINTF_1;
diff --git a/gcc/sel-sched-ir.cc b/gcc/sel-sched-ir.cc
index 9241987d4fd..15ca074b2ba 100644
--- a/gcc/sel-sched-ir.cc
+++ b/gcc/sel-sched-ir.cc
@@ -71,7 +71,7 @@ static sbitmap bbs_in_loop_rgns = NULL;
/* CFG hooks that are saved before changing create_basic_block hook. */
static struct cfg_hooks orig_cfg_hooks;
-\f
+
/* Array containing reverse topological index of function basic blocks,
indexed by BB->INDEX. */
@@ -132,7 +132,7 @@ rtx_insn *exit_insn = NULL;
/* TRUE if while scheduling current region, which is loop, its preheader
was removed. */
bool preheader_removed = false;
-\f
+
/* Forward static declarations. */
static void fence_clear (fence_t);
@@ -159,7 +159,7 @@ static void invalidate_av_set (basic_block);
static void extend_insn_data (void);
static void sel_init_new_insn (insn_t, int, int = -1);
static void finish_insns (void);
-\f
+
/* Various list functions. */
/* Copy an instruction list L. */
@@ -323,7 +323,7 @@ def_list_add (def_list_t *dl, insn_t original_insn,
d->orig_insn = original_insn;
d->crossed_call_abis = crossed_call_abis;
}
-\f
+
/* Functions to work with target contexts. */
@@ -422,7 +422,7 @@ reset_target_context (tc_t tc, bool clean_p)
clear_target_context (tc);
init_target_context (tc, clean_p);
}
-\f
+
/* Functions to work with dependence contexts.
Dc (aka deps context, aka deps_t, aka class deps_desc *) is short for dependence
context. It accumulates information about processed insns to decide if
@@ -514,7 +514,7 @@ advance_deps_context (deps_t dc, insn_t insn)
sched_deps_info = &advance_deps_context_sched_deps_info;
deps_analyze_insn (dc, insn);
}
-\f
+
/* Functions to work with DFA states. */
@@ -559,7 +559,7 @@ state_create_copy (state_t from)
state_copy (to, from);
return to;
}
-\f
+
/* Functions to work with fences. */
@@ -890,7 +890,7 @@ add_dirty_fence_to_fences (flist_tail_t new_fences, insn_t succ, fence_t fence)
FENCE_STARTS_CYCLE_P (fence),
FENCE_AFTER_STALL_P (fence));
}
-\f
+
/* Functions to work with regset and nop pools. */
@@ -1012,7 +1012,7 @@ free_regset_pool (void)
regset_pool.diff = 0;
}
-\f
+
/* Functions to work with nop pools. NOP insns are used as temporary
placeholders of the insns being scheduled to allow correct update of
@@ -1074,7 +1074,7 @@ free_nop_pool (void)
free (nop_pool.v);
nop_pool.v = NULL;
}
-\f
+
/* Skip unspec to support ia64 speculation. Called from rtx_equal_p_cb.
The callback is given two rtxes XX and YY and writes the new rtxes
@@ -1333,7 +1333,7 @@ sel_vinsn_cost (vinsn_t vi)
return cost;
}
-\f
+
/* Functions for insn emitting. */
@@ -1429,7 +1429,7 @@ sel_move_insn (expr_t expr, int seqno, insn_t after)
return insn;
}
-\f
+
/* Functions to work with right-hand sides. */
/* Search for a hash value determined by UID/NEW_VINSN in a sorted vector
@@ -1607,7 +1607,7 @@ vinsn_equal_p (vinsn_t x, vinsn_t y)
return rtx_equal_p_cb (VINSN_PATTERN (x), VINSN_PATTERN (y), repcf);
}
-\f
+
/* Functions for working with expressions. */
@@ -2045,7 +2045,7 @@ mark_unavailable_targets (av_set_t join_set, av_set_t av_set, regset lv_set)
if (av_set_lookup (av_set, EXPR_VINSN (expr)) == NULL)
set_unavailable_target_for_expr (expr, lv_set);
}
-\f
+
/* Returns true if REG (at least partially) is present in REGS. */
bool
@@ -2391,7 +2391,7 @@ av_set_code_motion_filter (av_set_t *avp, av_set_t av)
EXPR_HISTORY_OF_CHANGES (expr2));
}
-\f
+
/* Dependence hooks to initialize insn data. */
@@ -2769,7 +2769,7 @@ deps_init_id (idata_t id, insn_t insn, bool force_unique_p)
deps_init_id_data.id = NULL;
}
-\f
+
struct sched_scan_info_def
{
/* This hook notifies scheduler frontend to extend its internal per basic
@@ -3112,7 +3112,7 @@ sel_finish_global_and_expr (void)
finish_insns ();
}
-\f
+
/* In the below hooks, we merely calculate whether or not a dependence
exists, and in what part of insn. However, we will need more data
@@ -3444,7 +3444,7 @@ has_dependence_p (expr_t expr, insn_t pred, ds_t **has_dep_pp)
return ds;
}
-\f
+
/* Dependence hooks implementation that checks dependence latency constraints
on the insns being scheduled. The entry point for these routines is
@@ -3568,7 +3568,7 @@ tick_check_p (expr_t expr, deps_t dc, fence_t fence)
return cycles_left >= 0 ? cycles_left : 0;
}
-\f
+
/* Functions to work with insns. */
@@ -3662,7 +3662,7 @@ verify_backedges (void)
gcc_assert (n <= 1);
}
}
-\f
+
/* Functions to work with control flow. */
@@ -4147,7 +4147,7 @@ get_seqno_by_preds (rtx_insn *insn)
return seqno;
}
-\f
+
/* Extend pass-scope data structures for basic blocks. */
void
@@ -4184,7 +4184,7 @@ finish_region_bb_info (void)
{
sel_region_bb_info.release ();
}
-\f
+
/* Data for each insn in current region. */
vec<sel_insn_data_def> s_i_d;
@@ -4349,7 +4349,7 @@ sel_init_new_insn (insn_t insn, int flags, int old_seqno)
gcc_assert (CONTAINING_RGN (BLOCK_NUM (insn))
== CONTAINING_RGN (BB_TO_BLOCK (0)));
}
-\f
+
/* Functions to init/finish work with lv sets. */
@@ -4517,7 +4517,7 @@ get_av_level (insn_t insn)
return av_level;
}
-\f
+
/* Variables to work with control-flow graph. */
@@ -4894,7 +4894,7 @@ bb_ends_ebb_p (basic_block bb)
if (e)
{
gcc_assert (e->dest == next_bb);
-
+
return false;
}
@@ -5041,7 +5041,7 @@ free_sched_pools (void)
}
free (succs_info_pool.stack);
}
-\f
+
/* Returns a position in RGN where BB can be inserted retaining
topological order. */
@@ -5730,7 +5730,7 @@ sel_unregister_cfg_hooks (void)
set_cfg_hooks (orig_cfg_hooks);
}
-\f
+
/* Emit an insn rtx based on PATTERN. If a jump insn is wanted,
LABEL is where this jump should be directed. */
@@ -5928,7 +5928,7 @@ sel_setup_sched_infos (void)
sel_set_sched_flags ();
}
-\f
+
/* Adds basic block BB to region RGN at the position *BB_ORD_INDEX,
*BB_ORD_INDEX after that is increased. */
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index b36f2caa2b8..ae461d77240 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -352,7 +352,7 @@ struct _list_node
void *data;
} u;
};
-\f
+
/* _list_t functions.
All of _*list_* functions are used through accessor macros, thus
@@ -397,7 +397,7 @@ _list_clear (_list_t *l)
while (*l)
_list_remove (l);
}
-\f
+
/* List iterator backend. */
struct _list_iterator
@@ -456,7 +456,7 @@ _list_iter_remove_nofree (_list_iterator *ip)
for (_list_iter_start (&(I), (LP), true); \
_list_iter_cond_##TYPE (*(I).lp, &(ELEM)); \
_list_iter_next (&(I)))
-\f
+
/* _xlist_t functions. */
@@ -501,7 +501,7 @@ _list_iter_cond_x (_xlist_t l, rtx *xp)
typedef _list_iterator _xlist_iterator;
#define _FOR_EACH_X(X, I, L) _FOR_EACH (x, (X), (I), (L))
#define _FOR_EACH_X_1(X, I, LP) _FOR_EACH_1 (x, (X), (I), (LP))
-\f
+
/* ilist_t functions. */
@@ -545,7 +545,7 @@ _list_iter_cond_insn (ilist_t l, insn_t *ip)
typedef _list_iterator ilist_iterator;
#define FOR_EACH_INSN(INSN, I, L) _FOR_EACH (insn, (INSN), (I), (L))
#define FOR_EACH_INSN_1(INSN, I, LP) _FOR_EACH_1 (insn, (INSN), (I), (LP))
-\f
+
/* Av set iterators. */
typedef _list_iterator av_set_iterator;
@@ -563,7 +563,7 @@ _list_iter_cond_expr (av_set_t av, expr_t *exprp)
return false;
}
-\f
+
/* Def list iterators. */
typedef _list_t def_list_t;
@@ -585,7 +585,7 @@ _list_iter_cond_def (def_list_t def_list, def_t *def)
return false;
}
-\f
+
/* InstructionData. Contains information about insn pattern. */
struct idata_def
@@ -686,7 +686,7 @@ struct vinsn_def
#define VINSN_REG_CLOBBERS(VI) (IDATA_REG_CLOBBERS (VINSN_ID (VI)))
#define VINSN_COUNT(VI) ((VI)->count)
#define VINSN_MAY_TRAP_P(VI) ((VI)->may_trap_p)
-\f
+
/* An entry of the hashtable describing transformations happened when
moving up through an insn. */
@@ -871,7 +871,7 @@ extern rtx_insn *exit_insn;
: (LOOP)->aux))
extern bitmap blocks_to_reschedule;
-\f
+
/* A variable to track which part of rtx we are scanning in
sched-deps.cc: sched_analyze_insn (). */
@@ -882,7 +882,7 @@ enum deps_where_t
DEPS_IN_RHS,
DEPS_IN_NOWHERE
};
-\f
+
/* Per basic block data for the whole CFG. */
struct sel_global_bb_info_def
@@ -972,7 +972,7 @@ extern bool preheader_removed;
#define MAX_WS (param_selsched_max_lookahead)
extern regset sel_all_regs;
-\f
+
/* Successor iterator backend. */
struct succ_iterator
@@ -1068,7 +1068,7 @@ inner_loop_header_p (basic_block bb)
}
/* Return exit edges of LOOP, filtering out edges with the same dest bb. */
-static inline vec<edge>
+static inline vec<edge>
get_loop_exit_edges_unique_dests (const class loop *loop)
{
vec<edge> edges = vNULL;
@@ -1122,7 +1122,7 @@ sel_bb_empty_or_nop_p (basic_block bb)
traverse all of them and if any of them turns out to be another loop header
(after skipping empty BBs), add its loop exits to the resulting vector
as well. */
-static inline vec<edge>
+static inline vec<edge>
get_all_loop_exits (basic_block bb)
{
vec<edge> exits = vNULL;
@@ -1495,7 +1495,7 @@ bb_next_bb (basic_block bb)
}
}
-\f
+
/* Functions that are used in sel-sched.cc. */
diff --git a/gcc/sel-sched.cc b/gcc/sel-sched.cc
index cb1cf75bfe4..406251a7f13 100644
--- a/gcc/sel-sched.cc
+++ b/gcc/sel-sched.cc
@@ -254,7 +254,7 @@ bool bookkeeping_p;
/* Maximum number of insns that are eligible for renaming. */
int max_insns_to_rename;
-\f
+
/* Definitions of local types and macros. */
@@ -328,7 +328,7 @@ struct reg_rename
/* A global structure that contains the needed information about harg
regs. */
static struct hard_regs_data sel_hrd;
-\f
+
/* This structure holds local data used in code_motion_path_driver hooks on
the same or adjacent levels of recursion. Here we keep those parameters
@@ -533,7 +533,7 @@ static int stat_renamed_scheduled;
/* The number of substitutions made during scheduling. */
static int stat_substitutions_total;
-\f
+
/* Forward declarations of static functions. */
static bool rtx_ok_for_substitution_p (rtx, rtx);
@@ -553,7 +553,7 @@ static void sel_sched_region_2 (int);
static av_set_t compute_av_set_inside_bb (insn_t, ilist_t, int, bool);
static void debug_state (state_t);
-\f
+
/* Functions that work with fences. */
@@ -690,7 +690,7 @@ extract_new_fences_from (flist_t old_fences, flist_tail_t new_fences,
}
}
}
-\f
+
/* Functions to support substitution. */
@@ -824,7 +824,7 @@ rtx_ok_for_substitution_p (rtx what, rtx where)
{
return (count_occurrences_equiv (what, where) > 0);
}
-\f
+
/* Functions to support register renaming. */
@@ -1200,7 +1200,7 @@ mark_unavailable_hard_regs (def_t def, struct reg_rename *reg_rename_p,
Pmode, FRAME_POINTER_REGNUM);
if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
- add_to_hard_reg_set (®_rename_p->unavailable_hard_regs,
+ add_to_hard_reg_set (®_rename_p->unavailable_hard_regs,
Pmode, HARD_FRAME_POINTER_REGNUM);
}
@@ -1723,7 +1723,7 @@ find_best_reg_for_expr (expr_t expr, blist_t bnds, bool *is_orig_reg_p)
return reg_ok;
}
-\f
+
/* Return true if dependence described by DS can be overcomed. */
static bool
@@ -1946,7 +1946,7 @@ undo_transformations (av_set_t *av_ptr, rtx_insn *insn)
av_set_union_and_clear (av_ptr, &new_set, NULL);
}
-\f
+
/* Moveup_* helpers for code motion and computing av sets. */
@@ -2671,7 +2671,7 @@ equal_after_moveup_path_p (expr_t expr, ilist_t path, expr_t expr_vliw)
clear_expr (tmp);
return res;
}
-\f
+
/* Functions that compute av and lv sets. */
@@ -3181,7 +3181,7 @@ update_data_sets (rtx_insn *insn)
compute_av_set (insn, NULL, 0, 0);
}
}
-\f
+
/* Helper for move_op () and find_used_regs ().
Return speculation type for which a check should be created on the place
@@ -3302,7 +3302,7 @@ find_used_regs (insn_t insn, av_set_t orig_ops, regset used_regs,
return true;
}
-\f
+
/* Functions to choose the best insn from available ones. */
@@ -4421,7 +4421,7 @@ find_best_expr (av_set_t *av_vliw_ptr, blist_t bnds, fence_t fence,
return best;
}
-\f
+
/* Functions that implement the core of the scheduler. */
@@ -6710,7 +6710,7 @@ move_op (insn_t insn, av_set_t orig_ops, expr_t expr_vliw,
return res;
}
-\f
+
/* Functions that work with regions. */
@@ -7292,7 +7292,7 @@ sel_region_finish (bool reset_sched_cycles_p)
max_issue_size = 0;
}
-\f
+
/* Functions that implement the scheduler driver. */
diff --git a/gcc/sese.cc b/gcc/sese.cc
index 13992a06660..072bb8346e3 100644
--- a/gcc/sese.cc
+++ b/gcc/sese.cc
@@ -456,7 +456,7 @@ scalar_evolution_in_region (const sese_l ®ion, loop_p loop, tree t)
bool
sese_trivially_empty_bb_p (basic_block bb)
-{
+{
gimple_stmt_iterator gsi;
for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
diff --git a/gcc/shrink-wrap.cc b/gcc/shrink-wrap.cc
index b8d7b557130..7922f4a2d73 100644
--- a/gcc/shrink-wrap.cc
+++ b/gcc/shrink-wrap.cc
@@ -705,7 +705,7 @@ try_shrink_wrapping (edge *entry_edge, rtx_insn *prologue_seq)
if (frame_pointer_needed)
add_to_hard_reg_set (&set_up_by_prologue.set, Pmode,
HARD_FRAME_POINTER_REGNUM);
- if (pic_offset_table_rtx
+ if (pic_offset_table_rtx
&& (unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
add_to_hard_reg_set (&set_up_by_prologue.set, Pmode,
PIC_OFFSET_TABLE_REGNUM);
@@ -939,7 +939,7 @@ try_shrink_wrapping (edge *entry_edge, rtx_insn *prologue_seq)
if (dump_file)
fprintf (dump_file, "Duplicated %d to %d\n", bb->index, dup->index);
-
+
if (num == profile_count::zero () || den.nonzero_p ())
bb->count = bb->count.apply_scale (num, den);
dup->count -= bb->count;
@@ -1026,7 +1026,7 @@ try_shrink_wrapping (edge *entry_edge, rtx_insn *prologue_seq)
free_dominance_info (CDI_DOMINATORS);
}
-\f
+
/* Separate shrink-wrapping
Instead of putting all of the prologue and epilogue in one spot, we
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 7fb1e97fbea..183a6d49b63 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -48,7 +48,7 @@ along with GCC; see the file COPYING3. If not see
((((HOST_WIDE_INT) low) < 0) ? HOST_WIDE_INT_M1 : HOST_WIDE_INT_0)
static bool plus_minus_operand_p (const_rtx);
-\f
+
/* Negate I, which satisfies poly_int_rtx_p. MODE is the mode of I. */
static rtx
@@ -168,7 +168,7 @@ val_signbit_known_clear_p (machine_mode mode, unsigned HOST_WIDE_INT val)
val &= HOST_WIDE_INT_1U << (width - 1);
return val == 0;
}
-\f
+
/* Make a binary operation by properly ordering the operands and
seeing if the expression folds. */
@@ -190,7 +190,7 @@ simplify_context::simplify_gen_binary (rtx_code code, machine_mode mode,
return gen_rtx_fmt_ee (code, mode, op0, op1);
}
-\f
+
/* If X is a MEM referencing the constant pool, return the real value.
Otherwise return X. */
rtx
@@ -255,7 +255,7 @@ avoid_constant_pool_reference (rtx x)
return x;
}
-\f
+
/* Simplify a MEM based on its attributes. This is the default
delegitimize_address target hook, and it's recommended that every
overrider call it. */
@@ -346,7 +346,7 @@ delegitimize_mem_from_attrs (rtx x)
return x;
}
-\f
+
/* Make a unary operation by first seeing if it folds and otherwise making
the specified operation. */
@@ -396,7 +396,7 @@ simplify_context::simplify_gen_relational (rtx_code code, machine_mode mode,
return gen_rtx_fmt_ee (code, mode, op0, op1);
}
-\f
+
/* If FN is NULL, replace all occurrences of OLD_RTX in X with copy_rtx (DATA)
and simplify the result. If FN is non-NULL, call this callback on each
X, if it returns non-NULL, replace X with its return value and simplify the
@@ -561,7 +561,7 @@ simplify_replace_rtx (rtx x, const_rtx old_rtx, rtx new_rtx)
{
return simplify_replace_fn_rtx (x, old_rtx, 0, new_rtx);
}
-\f
+
/* Try to simplify a MODE truncation of OP, which has OP_MODE.
Only handle cases where the truncated value is inherently an rvalue.
@@ -874,7 +874,7 @@ simplify_context::simplify_truncation (machine_mode mode, rtx op,
return NULL_RTX;
}
-\f
+
/* Try to simplify a unary operation CODE whose output mode is to be
MODE with input operand OP whose mode was originally OP_MODE.
Return zero if no simplification can be made. */
@@ -2130,7 +2130,7 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
return immed_wide_int_const (result, result_mode);
}
- else if (CONST_DOUBLE_AS_FLOAT_P (op)
+ else if (CONST_DOUBLE_AS_FLOAT_P (op)
&& SCALAR_FLOAT_MODE_P (mode)
&& SCALAR_FLOAT_MODE_P (GET_MODE (op)))
{
@@ -2273,7 +2273,7 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
return NULL_RTX;
}
-\f
+
/* Subroutine of simplify_binary_operation to simplify a binary operation
CODE that can commute with byte swapping, with result mode MODE and
operating on OP0 and OP1. CODE is currently one of AND, IOR or XOR.
@@ -2544,7 +2544,7 @@ relational_result (machine_mode mode, machine_mode cmp_mode, rtx res)
return res;
}
-
+
/* Simplify a logical operation CODE with result mode MODE, operating on OP0
and OP1, which should be both relational operations. Return 0 if no such
simplification is possible. */
@@ -4701,10 +4701,10 @@ simplify_ashift:
unsigned int n_elts, in_n_elts;
if ((GET_CODE (trueop0) == CONST_VECTOR
- || CONST_SCALAR_INT_P (trueop0)
+ || CONST_SCALAR_INT_P (trueop0)
|| CONST_DOUBLE_AS_FLOAT_P (trueop0))
&& (GET_CODE (trueop1) == CONST_VECTOR
- || CONST_SCALAR_INT_P (trueop1)
+ || CONST_SCALAR_INT_P (trueop1)
|| CONST_DOUBLE_AS_FLOAT_P (trueop1))
&& GET_MODE_NUNITS (mode).is_constant (&n_elts)
&& GET_MODE_NUNITS (op0_mode).is_constant (&in_n_elts))
@@ -4904,7 +4904,7 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode,
}
if (SCALAR_FLOAT_MODE_P (mode)
- && CONST_DOUBLE_AS_FLOAT_P (op0)
+ && CONST_DOUBLE_AS_FLOAT_P (op0)
&& CONST_DOUBLE_AS_FLOAT_P (op1)
&& mode == GET_MODE (op0) && mode == GET_MODE (op1))
{
@@ -5216,7 +5216,7 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode,
case US_PLUS:
result = wi::add (pop0, pop1, UNSIGNED, &overflow);
- clamp_unsigned_saturation:
+ clamp_unsigned_saturation:
if (overflow != wi::OVF_NONE)
result = wi::max_value (GET_MODE_PRECISION (int_mode), UNSIGNED);
break;
@@ -5312,7 +5312,7 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode,
}
-\f
+
/* Return a positive integer if X should sort after Y. The value
returned is 1 if and only if X and Y are both regs. */
@@ -6511,7 +6511,7 @@ simplify_context::simplify_merge_mask (rtx x, rtx mask, int op)
return NULL_RTX;
}
-\f
+
/* Simplify CODE, an operation with result mode MODE and three operands,
OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
a constant. Return 0 if no simplifications is possible. */
@@ -7986,7 +7986,7 @@ test_scalar_int_ext_ops2 (machine_mode bmode, machine_mode mmode,
lowpart_subreg (bmode, mreg, mmode),
bmode),
simplify_gen_unary (TRUNCATE, smode, mreg, mmode));
-}
+}
/* Verify some simplifications involving scalar expressions. */
@@ -8286,7 +8286,7 @@ test_vec_merge (machine_mode mode)
/* Intermediate binary op. */
rtx binop = gen_rtx_PLUS (mode, vm1, vm2);
- ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op0, op2),
+ ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op0, op2),
simplify_merge_mask (binop, mask1, 0));
ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op1, op3),
simplify_merge_mask (binop, mask1, 1));
diff --git a/gcc/ssa-iterators.h b/gcc/ssa-iterators.h
index 43c9b861440..61dcde85560 100644
--- a/gcc/ssa-iterators.h
+++ b/gcc/ssa-iterators.h
@@ -403,19 +403,19 @@ has_single_use (const_tree var)
const ssa_use_operand_t *const head = &(SSA_NAME_IMM_USE_NODE (var));
const ssa_use_operand_t *ptr;
bool single = false;
-
+
for (ptr = head->next; ptr != head; ptr = ptr->next)
if (USE_STMT(ptr) && !is_gimple_debug (USE_STMT (ptr)))
{
if (single)
return false;
- else
+ else
single = true;
}
return single;
}
-
+
/* If VAR has only a single immediate nondebug use, return true, and
set USE_P and STMT to the use pointer and stmt of occurrence. */
static inline bool
diff --git a/gcc/ssa.h b/gcc/ssa.h
index 87c2a59e2ca..3316701b21b 100644
--- a/gcc/ssa.h
+++ b/gcc/ssa.h
@@ -29,6 +29,6 @@ along with GCC; see the file COPYING3. If not see
#include "range.h"
#include "tree-ssanames.h"
#include "tree-phinodes.h"
-#include "ssa-iterators.h"
+#include "ssa-iterators.h"
#endif /* GCC_SSA_H */
diff --git a/gcc/stmt.cc b/gcc/stmt.cc
index 82a3e1035ec..ac58d14c278 100644
--- a/gcc/stmt.cc
+++ b/gcc/stmt.cc
@@ -53,7 +53,7 @@ along with GCC; see the file COPYING3. If not see
#include "dumpfile.h"
#include "builtins.h"
-\f
+
/* Functions and data structures for expanding case statements. */
/* Case label structure, used to hold info on labels within case
@@ -81,10 +81,10 @@ public:
/* Label to jump to when node matches. */
tree m_code_label;
};
-\f
+
static bool check_unique_operand_names (tree, tree, tree);
static char *resolve_operand_name_1 (char *, tree, tree, tree);
-\f
+
/* Return the rtx-label that corresponds to a LABEL_DECL,
creating it if necessary. */
@@ -135,7 +135,7 @@ emit_jump (rtx label)
emit_jump_insn (targetm.gen_jump (label));
emit_barrier ();
}
-\f
+
/* Handle goto statements and the labels that they can go to. */
/* Specify the location in the RTL code of a label LABEL,
@@ -173,7 +173,7 @@ expand_label (tree label)
if (DECL_NONLOCAL (label) || FORCED_LABEL (label))
maybe_set_first_label_num (label_r);
}
-\f
+
/* Parse the output constraint pointed to by *CONSTRAINT_P. It is the
OPERAND_NUMth output operand, indexed from zero. There are NINPUTS
inputs and NOUTPUTS outputs to this extended-asm. Upon return,
@@ -666,7 +666,7 @@ resolve_operand_name_1 (char *p, tree outputs, tree inputs, tree labels)
return p;
}
-\f
+
/* Generate RTL to return directly from the current function.
(That is, we bypass any return value.) */
@@ -695,7 +695,7 @@ do_jump_if_equal (machine_mode mode, rtx op0, rtx op1, rtx_code_label *label,
do_compare_rtx_and_jump (op0, op1, EQ, unsignedp, mode,
NULL_RTX, NULL, label, prob);
}
-\f
+
/* Return the sum of probabilities of outgoing edges of basic block BB. */
static profile_probability
@@ -736,7 +736,7 @@ conditional_probability (profile_probability target_prob,
Then, a table with the target labels is emitted.
The process is unaware of the CFG. The caller has to fix up
- the CFG itself. This is done in cfgexpand.cc. */
+ the CFG itself. This is done in cfgexpand.cc. */
static void
emit_case_dispatch_table (tree index_expr, tree index_type,
@@ -1027,7 +1027,7 @@ expand_case (gswitch *stmt)
DISPATCH_INDEX is the index expression to switch on. It should be a
memory or register operand.
-
+
DISPATCH_TABLE is a set of case labels. The set should be sorted in
ascending order, be contiguous, starting with value 0, and contain only
single-valued case labels. */
@@ -1115,4 +1115,4 @@ expand_sjlj_dispatch_table (rtx dispatch_index,
free_temp_slots ();
}
-\f
+
diff --git a/gcc/stor-layout.cc b/gcc/stor-layout.cc
index 45bf2d18639..6845299f392 100644
--- a/gcc/stor-layout.cc
+++ b/gcc/stor-layout.cc
@@ -59,7 +59,7 @@ static void place_union_field (record_layout_info, tree);
static int excess_unit_span (HOST_WIDE_INT, HOST_WIDE_INT, HOST_WIDE_INT,
HOST_WIDE_INT, tree);
extern void debug_rli (record_layout_info);
-\f
+
/* Given a size SIZE that may not be a constant, return a SAVE_EXPR
to serve as the actual size-expression for a type or decl. */
@@ -292,7 +292,7 @@ finalize_size_functions (void)
vec_free (size_functions);
}
-\f
+
/* Return a machine mode of class MCLASS with SIZE bits of precision,
if one exists. The mode may have padding bits as well the SIZE
value bits. If LIMIT is nonzero, disregard modes wider than
@@ -598,7 +598,7 @@ mode_for_array (tree elem_type, tree size)
}
return mode_for_size_tree (size, MODE_INT, limit_p).else_blk ();
}
-\f
+
/* Subroutine of layout_decl: Force alignment required for the data type.
But if the decl itself wants greater alignment, don't override that. */
@@ -831,7 +831,7 @@ relayout_decl (tree decl)
layout_decl (decl, 0);
}
-\f
+
/* Begin laying out type T, which may be a RECORD_TYPE, UNION_TYPE, or
QUAL_UNION_TYPE. Return a pointer to a struct record_layout_info which
is to be passed to all other layout functions for this record. It is the
@@ -2301,7 +2301,7 @@ finish_record_layout (record_layout_info rli, int free_p)
free (rli);
}
}
-\f
+
/* Finish processing a builtin RECORD_TYPE type TYPE. It's name is
NAME, its fields are chained in reverse on FIELDS.
@@ -2687,7 +2687,7 @@ min_align_of_type (tree type)
}
return align / BITS_PER_UNIT;
}
-\f
+
/* Create and return a type for signed integers of PRECISION bits. */
tree
@@ -2713,7 +2713,7 @@ make_unsigned_type (int precision)
fixup_unsigned_type (type);
return type;
}
-\f
+
/* Create and return a type for fract of PRECISION bits, UNSIGNEDP,
and SATP. */
@@ -2833,7 +2833,7 @@ initialize_sizetypes (void)
sbitsizetype = make_signed_type (TYPE_PRECISION (bitsizetype));
TYPE_NAME (sbitsizetype) = get_identifier ("sbitsizetype");
}
-\f
+
/* TYPE is an integral type, i.e., an INTEGRAL_TYPE, ENUMERAL_TYPE
or BOOLEAN_TYPE. Set TYPE_MIN_VALUE and TYPE_MAX_VALUE
for TYPE, based on the PRECISION and whether or not the TYPE
@@ -2892,7 +2892,7 @@ fixup_unsigned_type (tree type)
/* Lay out the type: set its alignment, size, etc. */
layout_type (type);
}
-\f
+
/* Construct an iterator for a bitfield that spans BITSIZE bits,
starting at BITPOS.
diff --git a/gcc/store-motion.cc b/gcc/store-motion.cc
index b21b34f223d..e240c2c2674 100644
--- a/gcc/store-motion.cc
+++ b/gcc/store-motion.cc
@@ -244,7 +244,7 @@ print_store_motion_mems (FILE * file)
fprintf (file, "\n");
}
-\f
+
/* Return zero if some of the registers in list X are killed
due to set of registers in bitmap REGS_SET. */
@@ -1210,7 +1210,7 @@ one_store_motion_pass (void)
return (n_stores_deleted > 0 || n_stores_created > 0);
}
-\f
+
static unsigned int
execute_rtl_store_motion (void)
{
diff --git a/gcc/stringpool.cc b/gcc/stringpool.cc
index 46aff39d7d5..7f4e9418d17 100644
--- a/gcc/stringpool.cc
+++ b/gcc/stringpool.cc
@@ -138,7 +138,7 @@ stringpool_statistics (void)
{
ht_dump_statistics (ident_hash);
}
-\f
+
/* Mark an identifier for GC. */
static int
@@ -234,7 +234,7 @@ gt_pch_nx (unsigned char *x, gt_pointer_operator op, void *cookie)
{
op (x, NULL, cookie);
}
-\f
+
/* Handle saving and restoring the string pool for PCH. */
/* SPD is saved in the PCH file and holds the information needed
diff --git a/gcc/symtab.cc b/gcc/symtab.cc
index cfc8b793531..de1159a9a3a 100644
--- a/gcc/symtab.cc
+++ b/gcc/symtab.cc
@@ -331,7 +331,7 @@ symbol_table::change_decl_assembler_name (tree decl, tree name)
&& IDENTIFIER_TRANSPARENT_ALIAS
(DECL_ASSEMBLER_NAME (alias->decl)));
- TREE_CHAIN (DECL_ASSEMBLER_NAME (alias->decl)) =
+ TREE_CHAIN (DECL_ASSEMBLER_NAME (alias->decl)) =
ultimate_transparent_alias_target
(DECL_ASSEMBLER_NAME (node->decl));
}
@@ -1133,7 +1133,7 @@ symtab_node::verify_base (void)
error ("node has invalid order %i", order);
error_found = true;
}
-
+
if (symtab->state != LTO_STREAMING)
{
hashed_node = symtab_node::get (decl);
@@ -2131,7 +2131,7 @@ symtab_node::nonzero_address ()
target is used only via the alias.
We may walk references and look for strong use, but we do not know
if this strong use will survive to final binary, so be
- conservative here.
+ conservative here.
??? Maybe we could do the lookup during late optimization that
could be useful to eliminate the NULL pointer checks in LTO
programs. */
@@ -2186,7 +2186,7 @@ symtab_node::nonzero_address ()
/* Return 0 if symbol is known to have different address than S2,
Return 1 if symbol is known to have same address as S2,
- return -1 otherwise.
+ return -1 otherwise.
If MEMORY_ACCESSED is true, assume that both memory pointer to THIS
and S2 is going to be accessed. This eliminates the situations when
@@ -2261,7 +2261,7 @@ symtab_node::equal_address_to (symtab_node *s2, bool memory_accessed)
/* If we have a non-interposable definition of at least one of the symbols
and the other symbol is different, we know other unit cannot interpose
- it to the first symbol; all aliases of the definition needs to be
+ it to the first symbol; all aliases of the definition needs to be
present in the current unit. */
if (((really_binds_local1 || really_binds_local2)
/* If we have both definitions and they are different, we know they
@@ -2456,7 +2456,7 @@ symtab_node::definition_alignment ()
/* Return symbol used to separate symbol name from suffix. */
-char
+char
symbol_table::symbol_suffix_separator ()
{
#ifndef NO_DOT_IN_LABEL
diff --git a/gcc/system.h b/gcc/system.h
index 5eaeb9d2d03..797d718acc5 100644
--- a/gcc/system.h
+++ b/gcc/system.h
@@ -56,8 +56,8 @@ along with GCC; see the file COPYING3. If not see
the names to 64bit capable functions for LARGE_FILES support. These
redefs are pointless here so we can override them. */
-#undef fopen
-#undef freopen
+#undef fopen
+#undef freopen
#define fopen(PATH, MODE) fopen_unlocked (PATH, MODE)
#define fdopen(FILDES, MODE) fdopen_unlocked (FILDES, MODE)
@@ -403,7 +403,7 @@ extern int errno;
/* This macro rounds x down to the y boundary. */
#define ROUND_DOWN(x,y) ((x) & ~((y) - 1))
-
+
#ifdef HAVE_SYS_WAIT_H
#include <sys/wait.h>
#endif
diff --git a/gcc/target-hooks-macros.h b/gcc/target-hooks-macros.h
index 8ce06e88dd3..f75f7747c1c 100644
--- a/gcc/target-hooks-macros.h
+++ b/gcc/target-hooks-macros.h
@@ -26,7 +26,7 @@
#ifndef DEFHOOKPODX
#define DEFHOOKPODX(NAME, TYPE, INIT) DEFHOOKPOD (NAME, 0, TYPE, INIT)
#endif
-
+
/* HOOKSTRUCT(FRAGMENT): Declarator fragments to encapsulate all the
members into a struct gcc_target, which in turn contains several
sub-structs. */
@@ -56,7 +56,7 @@
the paragraph with @end deftypefn / deftypevr as appropriate, and marking
the next autogenerated hook with @hook <hookname>.
In both these cases, leave the DOC string empty, i.e. "".
- Sometimes, for some historic reason the function declaration
+ Sometimes, for some historic reason the function declaration
has to be documented differently
than what it is. In that case, use DEFHOOK_UNDOC to suppress auto-generation
of documentation. DEFHOOK_UNDOC takes a DOC string which it ignores, so
diff --git a/gcc/targhooks.cc b/gcc/targhooks.cc
index fe0116521fe..2ae6223a1c6 100644
--- a/gcc/targhooks.cc
+++ b/gcc/targhooks.cc
@@ -1714,7 +1714,7 @@ void
default_addr_space_diagnose_usage (addr_space_t, location_t)
{
}
-
+
/* The default hook for TARGET_ADDR_SPACE_CONVERT. This hook should never be
called for targets with only a generic address space. */
@@ -2092,7 +2092,7 @@ reg_class_t
default_preferred_reload_class (rtx x ATTRIBUTE_UNUSED,
reg_class_t rclass)
{
-#ifdef PREFERRED_RELOAD_CLASS
+#ifdef PREFERRED_RELOAD_CLASS
return (reg_class_t) PREFERRED_RELOAD_CLASS (x, (enum reg_class) rclass);
#else
return rclass;
diff --git a/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate.h b/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate.h
index 5ba0ab0dc1f..1b7db7c7d74 100644
--- a/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate.h
+++ b/gcc/testsuite/c-c++-common/dfp/func-vararg-alternate.h
@@ -31,7 +31,7 @@ compare (double r, double s, unsigned int *p, unsigned int *q, int n, int line)
for (j = 0; j < n; j++)
printf (" %08x", q[j]);
printf (" %10.2g\n\n", s);
-
+
return;
}
#else
diff --git a/gcc/testsuite/g++.dg/abi/lambda-sig1.h b/gcc/testsuite/g++.dg/abi/lambda-sig1.h
index a8b77ae0ebf..ea0485a7d42 100644
--- a/gcc/testsuite/g++.dg/abi/lambda-sig1.h
+++ b/gcc/testsuite/g++.dg/abi/lambda-sig1.h
@@ -1,6 +1,6 @@
-template<typename T, unsigned I> struct X
+template<typename T, unsigned I> struct X
{
- void Fn ()
+ void Fn ()
{
{
auto v1 = []<typename U> (U) {};
@@ -11,7 +11,7 @@ template<typename T, unsigned I> struct X
v2 (1);
v3 (1, 2);
}
- if constexpr (I)
+ if constexpr (I)
{
auto v1 = []<typename U> (U) {};
auto v2 = [] (T) {};
@@ -30,7 +30,7 @@ template<typename T, unsigned I> struct X
v2 (1);
v3 (1, 2);
}
-
+
};
};
diff --git a/gcc/testsuite/g++.dg/abi/lambda-tpl1.h b/gcc/testsuite/g++.dg/abi/lambda-tpl1.h
index 376c3f6a2f4..a3500528f73 100644
--- a/gcc/testsuite/g++.dg/abi/lambda-tpl1.h
+++ b/gcc/testsuite/g++.dg/abi/lambda-tpl1.h
@@ -34,7 +34,7 @@ template<int I> inline void Fn ()
l (1);
}
-void f ()
+void f ()
{
l_auto (1);
l_tpl (1);
diff --git a/gcc/testsuite/g++.dg/abi/pr39188-1.h b/gcc/testsuite/g++.dg/abi/pr39188-1.h
index ece67daae1e..159a818b994 100644
--- a/gcc/testsuite/g++.dg/abi/pr39188-1.h
+++ b/gcc/testsuite/g++.dg/abi/pr39188-1.h
@@ -1,7 +1,7 @@
inline int
f (int x)
{
- static union
+ static union
{
int i;
};
diff --git a/gcc/testsuite/g++.dg/abi/pr39188-2.h b/gcc/testsuite/g++.dg/abi/pr39188-2.h
index 6ff5f49dbf3..9fcc63f4e89 100644
--- a/gcc/testsuite/g++.dg/abi/pr39188-2.h
+++ b/gcc/testsuite/g++.dg/abi/pr39188-2.h
@@ -2,7 +2,7 @@ template<typename T>
T
f (T x)
{
- static union
+ static union
{
T i;
};
diff --git a/gcc/testsuite/g++.dg/abi/pr39188-3.h b/gcc/testsuite/g++.dg/abi/pr39188-3.h
index e0c9f619c2e..d0de6d7ec8e 100644
--- a/gcc/testsuite/g++.dg/abi/pr39188-3.h
+++ b/gcc/testsuite/g++.dg/abi/pr39188-3.h
@@ -1,7 +1,7 @@
static int
f (int x)
{
- static union
+ static union
{
int i;
};
diff --git a/gcc/testsuite/g++.dg/asan/dejagnu-gtest.h b/gcc/testsuite/g++.dg/asan/dejagnu-gtest.h
index 1c0fc8edfa7..a5dc0b2d579 100644
--- a/gcc/testsuite/g++.dg/asan/dejagnu-gtest.h
+++ b/gcc/testsuite/g++.dg/asan/dejagnu-gtest.h
@@ -13,7 +13,7 @@ struct dejagnu_gtest_test
{
const char *name;
void (*fn) (void);
- struct dejagnu_gtest_test *next;
+ struct dejagnu_gtest_test *next;
};
struct dejagnu_gtest_test *dejagnu_gtest_test_first, *dejagnu_gtest_test_last;
int dejagnu_gtest_test_death_num, dejagnu_gtest_test_death_cur_num;
diff --git a/gcc/testsuite/g++.dg/compat/break/vbase10.h b/gcc/testsuite/g++.dg/compat/break/vbase10.h
index f418d1e56a4..0864caa8555 100644
--- a/gcc/testsuite/g++.dg/compat/break/vbase10.h
+++ b/gcc/testsuite/g++.dg/compat/break/vbase10.h
@@ -9,4 +9,4 @@ struct B {
};
struct C : public A, public virtual B {
-};
+};
diff --git a/gcc/testsuite/g++.dg/compat/eh/ctor2.h b/gcc/testsuite/g++.dg/compat/eh/ctor2.h
index c6b9f40f8d9..f44ce3f2358 100644
--- a/gcc/testsuite/g++.dg/compat/eh/ctor2.h
+++ b/gcc/testsuite/g++.dg/compat/eh/ctor2.h
@@ -5,7 +5,7 @@ struct VBase
~VBase();
};
-struct StreamBase
+struct StreamBase
{
virtual ~StreamBase() {}
};
@@ -13,7 +13,7 @@ struct StreamBase
struct Stream : public virtual VBase, public StreamBase
{
Stream();
- virtual ~Stream() {}
+ virtual ~Stream() {}
};
struct DerivedStream : public Stream
diff --git a/gcc/testsuite/g++.dg/coroutines/coro.h b/gcc/testsuite/g++.dg/coroutines/coro.h
index 491177f0cfd..3dedbb612c6 100644
--- a/gcc/testsuite/g++.dg/coroutines/coro.h
+++ b/gcc/testsuite/g++.dg/coroutines/coro.h
@@ -34,7 +34,7 @@ template<typename _R, typename...> struct coroutine_traits {
// 21.11.2 coroutine handle
template <typename Promise = void> struct coroutine_handle;
-template <>
+template <>
struct coroutine_handle<void> {
public:
// 21.11.2.1 construct/reset
@@ -81,7 +81,7 @@ struct coroutine_handle : coroutine_handle<> {
using coroutine_handle<>::coroutine_handle;
static coroutine_handle from_promise(_Promise &p) {
coroutine_handle __self;
- __self.__fr_ptr =
+ __self.__fr_ptr =
__builtin_coro_promise((char *)&p, __alignof(_Promise), true);
return __self;
}
diff --git a/gcc/testsuite/g++.dg/coroutines/coro1-refs-and-ctors.h b/gcc/testsuite/g++.dg/coroutines/coro1-refs-and-ctors.h
index dd45a0e1f81..2eb2ccf8a62 100644
--- a/gcc/testsuite/g++.dg/coroutines/coro1-refs-and-ctors.h
+++ b/gcc/testsuite/g++.dg/coroutines/coro1-refs-and-ctors.h
@@ -50,7 +50,7 @@ struct coro1 {
void return_value (int v) {
PRINTF ("return_value (%d)\n", v);
vv = v;
-
+
}
void unhandled_exception() { PRINT ("** unhandled exception"); }
@@ -113,7 +113,7 @@ struct coro1 {
void await_suspend(coro::coroutine_handle<>) const noexcept { PRINT ("susp-always-susp-intprt");}
int await_resume() const noexcept { PRINT ("susp-always-resume-intprt"); return x;}
};
-
+
/* This returns the square of the int that it was constructed with. */
struct suspend_always_longprtsq {
long x;
diff --git a/gcc/testsuite/g++.dg/coroutines/coro1-ret-int-yield-int.h b/gcc/testsuite/g++.dg/coroutines/coro1-ret-int-yield-int.h
index 826519e8a46..3445b529ed7 100644
--- a/gcc/testsuite/g++.dg/coroutines/coro1-ret-int-yield-int.h
+++ b/gcc/testsuite/g++.dg/coroutines/coro1-ret-int-yield-int.h
@@ -57,7 +57,7 @@ struct coro1 {
int await_resume() const noexcept { PRINT ("susp-always-resume-intprt"); return x;}
#endif
};
-
+
/* This returns the square of the int that it was constructed with. */
struct suspend_always_longprtsq {
long x;
diff --git a/gcc/testsuite/g++.dg/coroutines/ramp-return.h b/gcc/testsuite/g++.dg/coroutines/ramp-return.h
index f41a07dafbe..0f809b1d04e 100644
--- a/gcc/testsuite/g++.dg/coroutines/ramp-return.h
+++ b/gcc/testsuite/g++.dg/coroutines/ramp-return.h
@@ -39,7 +39,7 @@ struct promise {
void unhandled_exception() { std::terminate(); }
};
-template <typename T>
+template <typename T>
struct task {
using promise_type = promise<T>;
std::coroutine_handle<promise<T>> _handle;
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-mangle-1.h b/gcc/testsuite/g++.dg/cpp1y/lambda-mangle-1.h
index c91ce0186d8..c359b16ef50 100644
--- a/gcc/testsuite/g++.dg/cpp1y/lambda-mangle-1.h
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-mangle-1.h
@@ -46,7 +46,7 @@ inline void Foo ()
auto lambda_3 = [](auto *, auto *) { };
int *i;
-
+
eat (i, lambda_1);
eat (i, lambda_2);
@@ -59,9 +59,9 @@ template<typename X> void Bar ()
auto lambda_1 = [](X *, float *, float *) { };
auto lambda_2 = [](X *, auto *, auto *) { };
auto lambda_3 = [](X *, auto *...) {};
-
+
int *i;
-
+
eat (i, lambda_1);
eat (i, lambda_2);
eat (i, lambda_3);
diff --git a/gcc/testsuite/g++.dg/lto/20090311-1.h b/gcc/testsuite/g++.dg/lto/20090311-1.h
index 389d94f0054..8d33637a87c 100644
--- a/gcc/testsuite/g++.dg/lto/20090311-1.h
+++ b/gcc/testsuite/g++.dg/lto/20090311-1.h
@@ -1,6 +1,6 @@
typedef unsigned long uint32;
typedef int JSIntn;
-#define JS_DLL_CALLBACK
+#define JS_DLL_CALLBACK
typedef JSIntn JSBool;
typedef struct JSContext JSContext;
typedef struct JSObject JSObject;
diff --git a/gcc/testsuite/g++.dg/modules/auto-1.h b/gcc/testsuite/g++.dg/modules/auto-1.h
index f8ae751df32..dc7c7d5d3e9 100644
--- a/gcc/testsuite/g++.dg/modules/auto-1.h
+++ b/gcc/testsuite/g++.dg/modules/auto-1.h
@@ -4,9 +4,9 @@ template <typename T> auto frob (T t)
return t;
}
-struct Bob
+struct Bob
{
- operator auto ()
+ operator auto ()
{
return 0;
}
diff --git a/gcc/testsuite/g++.dg/modules/deferred-1.h b/gcc/testsuite/g++.dg/modules/deferred-1.h
index dc0fd782a80..e0f9ae459e0 100644
--- a/gcc/testsuite/g++.dg/modules/deferred-1.h
+++ b/gcc/testsuite/g++.dg/modules/deferred-1.h
@@ -3,7 +3,7 @@ struct _Iterator
{
private:
static void mover (const _Iterator &arg = {}) noexcept (noexcept (arg));
-
+
public:
_Iterator() = default;
diff --git a/gcc/testsuite/g++.dg/modules/merge-11.h b/gcc/testsuite/g++.dg/modules/merge-11.h
index 87342e18880..80e44c2afd9 100644
--- a/gcc/testsuite/g++.dg/modules/merge-11.h
+++ b/gcc/testsuite/g++.dg/modules/merge-11.h
@@ -9,7 +9,7 @@ class __is_nt_convertible_helper<_From, false>
{
template<typename> static int __test (int);
template<typename> static void __test(...);
-
+
public:
using type = decltype(__test<_From>(0));
};
diff --git a/gcc/testsuite/g++.dg/modules/merge-4.h b/gcc/testsuite/g++.dg/modules/merge-4.h
index 842fedc5718..975d2918d3f 100644
--- a/gcc/testsuite/g++.dg/modules/merge-4.h
+++ b/gcc/testsuite/g++.dg/modules/merge-4.h
@@ -1,6 +1,6 @@
-template<typename T> struct Bob
+template<typename T> struct Bob
{
- struct M
+ struct M
{
int m;
};
diff --git a/gcc/testsuite/g++.dg/modules/pmf-1.h b/gcc/testsuite/g++.dg/modules/pmf-1.h
index e4c99f5e6f1..c9b12d4e7da 100644
--- a/gcc/testsuite/g++.dg/modules/pmf-1.h
+++ b/gcc/testsuite/g++.dg/modules/pmf-1.h
@@ -1,5 +1,5 @@
-struct X
+struct X
{
int mfn ();
};
diff --git a/gcc/testsuite/g++.dg/modules/pr98531-1.h b/gcc/testsuite/g++.dg/modules/pr98531-1.h
index 62d4c1d1f90..73d13200d6b 100644
--- a/gcc/testsuite/g++.dg/modules/pr98531-1.h
+++ b/gcc/testsuite/g++.dg/modules/pr98531-1.h
@@ -7,7 +7,7 @@ struct __waiters
static __waiters &_S_for()
{
static __waiters w;
-
+
return w;
}
};
diff --git a/gcc/testsuite/g++.dg/modules/pr98531-2.h b/gcc/testsuite/g++.dg/modules/pr98531-2.h
index 62d4c1d1f90..73d13200d6b 100644
--- a/gcc/testsuite/g++.dg/modules/pr98531-2.h
+++ b/gcc/testsuite/g++.dg/modules/pr98531-2.h
@@ -7,7 +7,7 @@ struct __waiters
static __waiters &_S_for()
{
static __waiters w;
-
+
return w;
}
};
diff --git a/gcc/testsuite/g++.dg/modules/pr98531-3.h b/gcc/testsuite/g++.dg/modules/pr98531-3.h
index a1a2f8a2e02..5a69fa3ee4c 100644
--- a/gcc/testsuite/g++.dg/modules/pr98531-3.h
+++ b/gcc/testsuite/g++.dg/modules/pr98531-3.h
@@ -7,7 +7,7 @@ struct __waiters
static __waiters &_S_for()
{
static __waiters w[2];
-
+
return w[0];
}
};
diff --git a/gcc/testsuite/g++.dg/modules/pr99425-1.h b/gcc/testsuite/g++.dg/modules/pr99425-1.h
index de167a64331..aa539c67807 100644
--- a/gcc/testsuite/g++.dg/modules/pr99425-1.h
+++ b/gcc/testsuite/g++.dg/modules/pr99425-1.h
@@ -1,5 +1,5 @@
template<typename T>
-struct make_signed
+struct make_signed
{
using type = int;
};
diff --git a/gcc/testsuite/g++.dg/modules/tmpl-part-req-1.h b/gcc/testsuite/g++.dg/modules/tmpl-part-req-1.h
index 09de42923da..0c29d3d30fd 100644
--- a/gcc/testsuite/g++.dg/modules/tmpl-part-req-1.h
+++ b/gcc/testsuite/g++.dg/modules/tmpl-part-req-1.h
@@ -10,6 +10,6 @@ requires true
struct Trait<_Iterator, void>
{
template<typename _Iter> struct __diff {};
-
+
template<typename _Iter> requires true struct __diff<_Iter> {};
};
diff --git a/gcc/testsuite/g++.dg/modules/tmpl-part-req-2.h b/gcc/testsuite/g++.dg/modules/tmpl-part-req-2.h
index 0ca05933b11..c2abdb5bb66 100644
--- a/gcc/testsuite/g++.dg/modules/tmpl-part-req-2.h
+++ b/gcc/testsuite/g++.dg/modules/tmpl-part-req-2.h
@@ -10,7 +10,7 @@ requires true && true
struct Trait<_Iterator, void>
{
template<typename _Iter> struct __cat {};
-
+
template<typename _Iter> requires true struct __cat<_Iter> {};
};
@@ -19,6 +19,6 @@ requires true
struct Trait<_Iterator, void>
{
template<typename _Iter> struct __diff {};
-
+
template<typename _Iter> requires true struct __diff<_Iter> {};
};
diff --git a/gcc/testsuite/g++.dg/modules/tpl-alias-1.h b/gcc/testsuite/g++.dg/modules/tpl-alias-1.h
index 00f2d9b5b2b..20f83a5d5ad 100644
--- a/gcc/testsuite/g++.dg/modules/tpl-alias-1.h
+++ b/gcc/testsuite/g++.dg/modules/tpl-alias-1.h
@@ -44,7 +44,7 @@ struct _Deque_iterator
{
template<typename _CvTp>
using __iter = _Deque_iterator<_CvTp&, __ptr_rebind<_Ptr, _CvTp>>;
-
+
typedef __ptr_rebind<_Ptr, long> _Elt_pointer;
typedef __ptr_rebind<_Ptr, _Elt_pointer> _Map_pointer;
};
@@ -59,7 +59,7 @@ struct _Deque_base
typedef typename _Alloc_traits::pointer _Ptr;
typedef _Deque_iterator<long&, _Ptr> iterator;
-
+
typedef typename iterator::_Map_pointer _Map_pointer;
};
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/test-unwind.h b/gcc/testsuite/g++.dg/torture/stackalign/test-unwind.h
index ff560278493..a6799b2a443 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/test-unwind.h
+++ b/gcc/testsuite/g++.dg/torture/stackalign/test-unwind.h
@@ -49,7 +49,7 @@ copy (char *p, int size)
int g_edi __attribute__((externally_visible)) =INIT_EDI;
int g_esi __attribute__((externally_visible)) =INIT_ESI;
-int g_ebx __attribute__((externally_visible)) = INIT_EBX;
+int g_ebx __attribute__((externally_visible)) = INIT_EBX;
int g_ebp __attribute__((externally_visible));
int g_esp __attribute__((externally_visible));
int g_ebp_save __attribute__((externally_visible));
diff --git a/gcc/testsuite/g++.dg/vect/pr60729.cc b/gcc/testsuite/g++.dg/vect/pr60729.cc
index 78afa8b3831..70153448110 100644
--- a/gcc/testsuite/g++.dg/vect/pr60729.cc
+++ b/gcc/testsuite/g++.dg/vect/pr60729.cc
@@ -1,9 +1,9 @@
// { dg-do compile }
// { dg-additional-options "-ftrapv" }
-void doSomething(int dim, double *Y, double *A)
+void doSomething(int dim, double *Y, double *A)
{
- for (int k=0; k<dim; k++)
+ for (int k=0; k<dim; k++)
Y[k] += __builtin_fabs (A[k]);
}
diff --git a/gcc/testsuite/g++.dg/vect/pr70729-nest.cc b/gcc/testsuite/g++.dg/vect/pr70729-nest.cc
index 0da0b4d73f5..bd8557e4b45 100644
--- a/gcc/testsuite/g++.dg/vect/pr70729-nest.cc
+++ b/gcc/testsuite/g++.dg/vect/pr70729-nest.cc
@@ -17,7 +17,7 @@ public:
Vec (int n) : isize (n) {data = (T*)my_alloc (isize*sizeof (T));}
~Vec () {my_free(data);}
- Vec& operator = (const Vec& other)
+ Vec& operator = (const Vec& other)
{
if (this != &other)
__builtin_memcpy (data, other.data, isize*sizeof (T));
@@ -33,7 +33,7 @@ public:
int size () const {return isize;}
};
-template <typename T>
+template <typename T>
class Cl
{
public:
@@ -54,7 +54,7 @@ struct Ss
Ss (int n1, int n2): S_n(n1), S_m(n2), v1(n1, n2)
{
C1 = new float[n1 * 3];
- C2 = new float[n2 * 4];
+ C2 = new float[n2 * 4];
}
~Ss () { delete C1; delete C2;}
@@ -75,5 +75,5 @@ void Ss::foo (int n)
}
}
}
-
+
// { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { xfail *-*-* } } }
diff --git a/gcc/testsuite/g++.dg/vect/pr70729.cc b/gcc/testsuite/g++.dg/vect/pr70729.cc
index 88d46553e5a..b27c2c306f9 100644
--- a/gcc/testsuite/g++.dg/vect/pr70729.cc
+++ b/gcc/testsuite/g++.dg/vect/pr70729.cc
@@ -16,7 +16,7 @@ public:
Vec (int n) : isize (n) {data = (T*)my_alloc (isize*sizeof (T));}
~Vec () {my_free(data);}
- Vec& operator = (const Vec& other)
+ Vec& operator = (const Vec& other)
{
if (this != &other)
__builtin_memcpy (data, other.data, isize*sizeof (T));
@@ -32,7 +32,7 @@ public:
int size () const {return isize;}
};
-template <typename T>
+template <typename T>
class Cl
{
public:
@@ -53,7 +53,7 @@ struct Ss
Ss (int n1, int n2): S_n(n1), S_m(n2), v1(n1, n2)
{
C1 = new float[n1 * 3];
- C2 = new float[n2 * 4];
+ C2 = new float[n2 * 4];
}
~Ss () { delete C1; delete C2;}
@@ -69,5 +69,5 @@ void Ss::foo (float *in, float w)
C1[S_n + i] += w1;
}
}
-
+
// { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { xfail *-*-* } } }
diff --git a/gcc/testsuite/g++.dg/vect/pr87914.cc b/gcc/testsuite/g++.dg/vect/pr87914.cc
index c692ffaaab0..eb3f31219cc 100644
--- a/gcc/testsuite/g++.dg/vect/pr87914.cc
+++ b/gcc/testsuite/g++.dg/vect/pr87914.cc
@@ -35,7 +35,7 @@ int main()
unsigned arr2[16]
= { 0x20c04080, 0x10e060a0, 0xb030d050, 0x8808f070u,
0x28c84888, 0x10ea60a2, 0xb03cd05f, 0x8848f070u,
- 0x24c44484, 0x10e660aa, 0xb034d05f, 0x8808f078u,
+ 0x24c44484, 0x10e660aa, 0xb034d05f, 0x8808f078u,
0x2ccc4c8c, 0x10ee60a6, 0xb03ad05f, 0x8808fc70u };
test_reverseBits (arr);
diff --git a/gcc/testsuite/g++.dg/vect/slp-pr50413.cc b/gcc/testsuite/g++.dg/vect/slp-pr50413.cc
index 3e11c34d5c6..cfe1f0fc036 100644
--- a/gcc/testsuite/g++.dg/vect/slp-pr50413.cc
+++ b/gcc/testsuite/g++.dg/vect/slp-pr50413.cc
@@ -13,7 +13,7 @@ STRUCT_128;
typedef union uint128_bitmap
{
STRUCT_128 uint128;
-
+
struct
{
UInt64 b00 : 1;
@@ -156,7 +156,7 @@ void shift(unsigned char t)
V.uint128.uint64_lower = (V.uint128.uint64_lower >> 1);
V.bitmap.b63 = V.bitmap.b64;
V.uint128.uint64_upper = (V.uint128.uint64_upper >> 1);
-
+
V.bitmap.b96 = t;
}
--git a/gcc/testsuite/g++.dg/warn/pragma-system_header1.h b/gcc/testsuite/g++.dg/warn/pragma-system_header1.h
index 684c6bf12ba..95baeb128e5 100644
--- a/gcc/testsuite/g++.dg/warn/pragma-system_header1.h
+++ b/gcc/testsuite/g++.dg/warn/pragma-system_header1.h
@@ -2,6 +2,6 @@
template <typename T>
int g() { double d = 0.1; return d; }
-
+
template <typename T>
T h() { double d = 0.1; return d; }
--git a/gcc/testsuite/g++.dg/warn/pragma-system_header2.h b/gcc/testsuite/g++.dg/warn/pragma-system_header2.h
index aa4f0e94d4c..809f8b5473c 100644
--- a/gcc/testsuite/g++.dg/warn/pragma-system_header2.h
+++ b/gcc/testsuite/g++.dg/warn/pragma-system_header2.h
@@ -1,5 +1,5 @@
template <typename T>
int g() { double d = 0.1; return d; }
-
+
template <typename T>
T h() { double d = 0.1; return d; }
diff --git a/gcc/testsuite/g++.old-deja/g++.abi/vtable3.h b/gcc/testsuite/g++.old-deja/g++.abi/vtable3.h
index ef02456f20b..c7dce10fdaa 100644
--- a/gcc/testsuite/g++.old-deja/g++.abi/vtable3.h
+++ b/gcc/testsuite/g++.old-deja/g++.abi/vtable3.h
@@ -17,7 +17,7 @@ int Test (DERIVED *d, int expect)
void *full_b = dynamic_cast <void *> (b);
void *full_d = dynamic_cast <void *> (d);
A *ap = static_cast <A *> (b);
-
+
if (full_b != full_d)
{
fail++;
@@ -27,7 +27,7 @@ int Test (DERIVED *d, int expect)
}
DERIVED *dynamic_d = dynamic_cast <DERIVED *> (b);
-
+
if (dynamic_d != d)
{
fail++;
@@ -37,9 +37,9 @@ int Test (DERIVED *d, int expect)
}
b->Baz (static_cast <void *> (ap));
-
+
int res = b->Foo (static_cast <void *> (d));
-
+
if (res != expect)
{
fail++;
diff --git a/gcc/testsuite/gcc.dg/analyzer/taint-CVE-2020-13143.h b/gcc/testsuite/gcc.dg/analyzer/taint-CVE-2020-13143.h
index 0ba023539af..23ebef8b93d 100644
--- a/gcc/testsuite/gcc.dg/analyzer/taint-CVE-2020-13143.h
+++ b/gcc/testsuite/gcc.dg/analyzer/taint-CVE-2020-13143.h
@@ -1,5 +1,5 @@
/* Shared header for the various taint-CVE-2020-13143.h tests.
-
+
"gadget_dev_desc_UDC_store in drivers/usb/gadget/configfs.c in the
Linux kernel 3.16 through 5.6.13 relies on kstrdup without considering
the possibility of an internal '\0' value, which allows attackers to
diff --git a/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h b/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h
index 52c57d02b70..0785b34e101 100644
--- a/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h
+++ b/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h
@@ -1,6 +1,6 @@
/* Various integration tests for setjmp-handling expect a precise
multiline output.
-
+
The outputs from -fdiagnostics-path-format=inline-events for such
setjmp tests are dependent on whether setjmp is a macro or a function
(and whether that macro is defined in a system header).
diff --git a/gcc/testsuite/gcc.dg/builtins-config.h b/gcc/testsuite/gcc.dg/builtins-config.h
index 5e27c1deb33..1e6148e2163 100644
--- a/gcc/testsuite/gcc.dg/builtins-config.h
+++ b/gcc/testsuite/gcc.dg/builtins-config.h
@@ -26,7 +26,7 @@
/* Windows doesn't have the entire C99 runtime. */
#elif (defined(__APPLE__) && defined(__ppc__) \
&& ! defined (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__))
-/* MacOS versions before 10.3 don't have many C99 functions.
+/* MacOS versions before 10.3 don't have many C99 functions.
But, if you're including this file, you probably want to test the
newer behavior, so: */
#error forgot to set -mmacosx-version-min.
diff --git a/gcc/testsuite/gcc.dg/compat/compat-common.h b/gcc/testsuite/gcc.dg/compat/compat-common.h
index 4b3fb9c14ca..65b1b89e05a 100644
--- a/gcc/testsuite/gcc.dg/compat/compat-common.h
+++ b/gcc/testsuite/gcc.dg/compat/compat-common.h
@@ -3,7 +3,7 @@
indication of whether each individual check passed or failed.
When DBG is defined, each check is shown by a dot (pass) or 'F'
(fail) rather than aborting as soon as a failure is detected. */
-
+
#ifdef DBG
#include <stdio.h>
#define DEBUG_INIT setbuf (stdout, NULL);
diff --git a/gcc/testsuite/gcc.dg/compat/struct-align-2.h b/gcc/testsuite/gcc.dg/compat/struct-align-2.h
index f94fe57e134..1c66ab2e018 100644
--- a/gcc/testsuite/gcc.dg/compat/struct-align-2.h
+++ b/gcc/testsuite/gcc.dg/compat/struct-align-2.h
@@ -1,6 +1,6 @@
/* Define several variants of struct epoll_event from the Linux kernel,
specifying various attributes that affect alignment and size.
-
+
This test was developed for systems for which int is 32 bits and
long long is 64 bits; it might need to be disabled for systems where
either of those is not true. */
diff --git a/gcc/testsuite/gcc.dg/cpp/mi2a.h b/gcc/testsuite/gcc.dg/cpp/mi2a.h
index e3f53b6cb2e..4d7dab0d477 100644
--- a/gcc/testsuite/gcc.dg/cpp/mi2a.h
+++ b/gcc/testsuite/gcc.dg/cpp/mi2a.h
@@ -1,5 +1,5 @@
/* Test for overly eager multiple include optimization.
- Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
+ Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
Problem noted by Tom Tromey <tromey@cygnus.com>. */
#include "mi2c.h"
diff --git a/gcc/testsuite/gcc.dg/cpp/mi2b.h b/gcc/testsuite/gcc.dg/cpp/mi2b.h
index 1d9a8b9b1c5..9a40162c015 100644
--- a/gcc/testsuite/gcc.dg/cpp/mi2b.h
+++ b/gcc/testsuite/gcc.dg/cpp/mi2b.h
@@ -1,5 +1,5 @@
/* Test for overly eager multiple include optimization.
- Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
+ Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
Problem noted by Tom Tromey <tromey@cygnus.com>. */
#define need_x
diff --git a/gcc/testsuite/gcc.dg/cpp/mi2c.h b/gcc/testsuite/gcc.dg/cpp/mi2c.h
index 521792bee2f..3273ed72066 100644
--- a/gcc/testsuite/gcc.dg/cpp/mi2c.h
+++ b/gcc/testsuite/gcc.dg/cpp/mi2c.h
@@ -1,5 +1,5 @@
/* Test for overly eager multiple include optimization.
- Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
+ Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
Problem noted by Tom Tromey <tromey@cygnus.com>. */
#ifdef need_x
#undef need_x
diff --git a/gcc/testsuite/gcc.dg/cpp/trad/mi2a.h b/gcc/testsuite/gcc.dg/cpp/trad/mi2a.h
index e3f53b6cb2e..4d7dab0d477 100644
--- a/gcc/testsuite/gcc.dg/cpp/trad/mi2a.h
+++ b/gcc/testsuite/gcc.dg/cpp/trad/mi2a.h
@@ -1,5 +1,5 @@
/* Test for overly eager multiple include optimization.
- Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
+ Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
Problem noted by Tom Tromey <tromey@cygnus.com>. */
#include "mi2c.h"
diff --git a/gcc/testsuite/gcc.dg/cpp/trad/mi2b.h b/gcc/testsuite/gcc.dg/cpp/trad/mi2b.h
index 1d9a8b9b1c5..9a40162c015 100644
--- a/gcc/testsuite/gcc.dg/cpp/trad/mi2b.h
+++ b/gcc/testsuite/gcc.dg/cpp/trad/mi2b.h
@@ -1,5 +1,5 @@
/* Test for overly eager multiple include optimization.
- Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
+ Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
Problem noted by Tom Tromey <tromey@cygnus.com>. */
#define need_x
diff --git a/gcc/testsuite/gcc.dg/cpp/trad/mi2c.h b/gcc/testsuite/gcc.dg/cpp/trad/mi2c.h
index 521792bee2f..3273ed72066 100644
--- a/gcc/testsuite/gcc.dg/cpp/trad/mi2c.h
+++ b/gcc/testsuite/gcc.dg/cpp/trad/mi2c.h
@@ -1,5 +1,5 @@
/* Test for overly eager multiple include optimization.
- Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
+ Problem distilled from glibc 2.0.7's time.h, sys/time.h, timebits.h.
Problem noted by Tom Tromey <tromey@cygnus.com>. */
#ifdef need_x
#undef need_x
diff --git a/gcc/testsuite/gcc.dg/pthread-init-common.h b/gcc/testsuite/gcc.dg/pthread-init-common.h
index 723d997c99e..2a73f415a00 100644
--- a/gcc/testsuite/gcc.dg/pthread-init-common.h
+++ b/gcc/testsuite/gcc.dg/pthread-init-common.h
@@ -1,4 +1,4 @@
-/*
+/*
* Common code for the pthread-init-*.c tests.
*
* Origin: Kaveh Ghazi (ghazi@caip.rutgers.edu) 9/27/2006.
diff --git a/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.h b/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.h
index 22c05084ee7..5c852ca7809 100644
--- a/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.h
+++ b/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.h
@@ -49,8 +49,8 @@ simulate_thread_done ()
on a typical case, but not drag the test time out too much if a
hostile condition is interferring. */
-
-/* Define the threshold instruction count to start pausing the hostile
+
+/* Define the threshold instruction count to start pausing the hostile
thread. To avoid huge potential log files when things are not going well,
set this number very low. If a test specifically requires that the forward
progress guarantee is made, this number should be raised by the testcase. */
@@ -59,7 +59,7 @@ simulate_thread_done ()
#endif
/* Define the length of pause in cycles for the hostile thread to pause to
- allow forward progress to be made. If this number is too low, a
+ allow forward progress to be made. If this number is too low, a
compare_and_swap loop may not have time to finish, especially on a
128 bit operation. */
#if !defined (HOSTILE_THREAD_PAUSE)
diff --git a/gcc/testsuite/gcc.dg/tg-tests.h b/gcc/testsuite/gcc.dg/tg-tests.h
index 0cf1f645258..e9838e25cd7 100644
--- a/gcc/testsuite/gcc.dg/tg-tests.h
+++ b/gcc/testsuite/gcc.dg/tg-tests.h
@@ -129,7 +129,7 @@ main_tests (void)
volatile float f;
volatile double d;
volatile long double ld;
-
+
/* Test NaN. */
f = __builtin_nanf(""); d = __builtin_nan(""); ld = __builtin_nanl("");
foo(f, d, ld, /*unord=*/ 1, /*isnan=*/ 1, /*isinf=*/ 0, /*isfin=*/ 0, /*isnorm=*/ 0, FP_NAN);
diff --git a/gcc/testsuite/gcc.dg/torture/pr35771.h b/gcc/testsuite/gcc.dg/torture/pr35771.h
index 7b921c41ba9..2ca0eaa122d 100644
--- a/gcc/testsuite/gcc.dg/torture/pr35771.h
+++ b/gcc/testsuite/gcc.dg/torture/pr35771.h
@@ -16,7 +16,7 @@ do_test (void)
{
unaligned x;
TYPE y = { 0 };
- x = y;
+ x = y;
y = foo (y, y, y, y, y, y, y, y, 1, 2, 3, 4, 5, 6, -1, x);
if (__builtin_memcmp (&y, &x, sizeof (y)) != 0)
abort ();
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp.h b/gcc/testsuite/gcc.dg/tree-ssa/vrp.h
index 079013a8101..62a7510a372 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vrp.h
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp.h
@@ -15,7 +15,7 @@ extern void link_error(void);
if (v < min) link_error(); \
if (v > max) link_error(); \
if (v < min || v > max) link_error (); \
- } while (0)
+ } while (0)
#define CHECK_ANTI_RANGE(expr, min, max) \
do { \
__typeof__ (expr) v = (expr); \
diff --git a/gcc/testsuite/gcc.dg/vect/tree-vect.h b/gcc/testsuite/gcc.dg/vect/tree-vect.h
index c4b81441216..9a866424bc6 100644
--- a/gcc/testsuite/gcc.dg/vect/tree-vect.h
+++ b/gcc/testsuite/gcc.dg/vect/tree-vect.h
@@ -90,4 +90,4 @@ check_vect (void)
which might be exposed by system headers related to signal.h on some
targets, notably VxWorks. */
#undef OFFSET
-
+
diff --git a/gcc/testsuite/gcc.dg/vect/tsvc/tsvc.h b/gcc/testsuite/gcc.dg/vect/tsvc/tsvc.h
index 75494c24cfa..8d71e9b73c6 100644
--- a/gcc/testsuite/gcc.dg/vect/tsvc/tsvc.h
+++ b/gcc/testsuite/gcc.dg/vect/tsvc/tsvc.h
@@ -203,7 +203,7 @@ void init(int** ip, real_t* s1, real_t* s2){
posix_memalign ((void*)&xx, ARRAY_ALIGNMENT, LEN_1D*sizeof(real_t));
posix_memalign ((void*)ip, ARRAY_ALIGNMENT, LEN_1D*sizeof(real_t));
# endif
-#endif
+#endif
for (int i = 0; i < LEN_1D; i = i+5){
(*ip)[i] = (i+4);
@@ -1088,7 +1088,7 @@ real_t calc_checksum(const char * name)
}
}
-real_t get_expected_result(const char * name)
+real_t get_expected_result(const char * name)
{
if (!strcmp(name, "s000")) {
return 512075584.f;
diff --git a/gcc/testsuite/gcc.dg/vmx/harness.h b/gcc/testsuite/gcc.dg/vmx/harness.h
index faea3e97dba..93c38667bcc 100644
--- a/gcc/testsuite/gcc.dg/vmx/harness.h
+++ b/gcc/testsuite/gcc.dg/vmx/harness.h
@@ -18,7 +18,7 @@ check (int result, const char *name)
printf ("fail %s\n", name);
}
}
-
+
int
main (void)
{
diff --git a/gcc/testsuite/gcc.misc-tests/dhry.h b/gcc/testsuite/gcc.misc-tests/dhry.h
index 3e04260dd5c..130c2d30207 100644
--- a/gcc/testsuite/gcc.misc-tests/dhry.h
+++ b/gcc/testsuite/gcc.misc-tests/dhry.h
@@ -3,9 +3,9 @@
*
* "DHRYSTONE" Benchmark Program
* -----------------------------
- *
+ *
* Version: C, Version 2.1
- *
+ *
* File: dhry.h (part 1 of 3)
*
* Date: May 25, 1988
@@ -33,12 +33,12 @@
*
* Collection of Results:
* Reinhold Weicker (address see above) and
- *
+ *
* Rick Richardson
* PC Research. Inc.
* 94 Apple Orchard Drive
* Tinton Falls, NJ 07724
- * Phone: (201) 389-8963 (9-17 EST)
+ * Phone: (201) 389-8963 (9-17 EST)
* Usenet: ...!uunet!pcrat!rick
*
* Please send results to Rick Richardson and/or Reinhold Weicker.
@@ -91,7 +91,7 @@
* version previously distributed by Reinhold Weicker.
*
* At several places in the benchmark, code has been added,
- * but within the measurement loop only in branches that
+ * but within the measurement loop only in branches that
* are not executed. The intention is that optimizing compilers
* should be prevented from moving code out of the measurement
* loop, or from removing code altogether. Since the statements
@@ -101,7 +101,7 @@
* still hold. Except for sophisticated optimizing compilers,
* execution times for this version should be the same as
* for previous versions.
- *
+ *
* Since it has proven difficult to subtract the time for the
* measurement loop overhead in a correct way, the loop check
* has been made a part of the benchmark. This does have
@@ -151,7 +151,7 @@
* -DTIME
* The "times" function of UNIX (returning process times)
* or the "time" function (returning wallclock time)
- * is used for measurement.
+ * is used for measurement.
* For single user machines, "time ()" is adequate. For
* multi-user machines where you cannot get single-user
* access, use the "times ()" function. If you have
@@ -198,23 +198,23 @@
* different from the Ada version.]
*
* The following program contains statements of a high level programming
- * language (here: C) in a distribution considered representative:
+ * language (here: C) in a distribution considered representative:
*
* assignments 52 (51.0 %)
* control statements 33 (32.4 %)
* procedure, function calls 17 (16.7 %)
*
* 103 statements are dynamically executed. The program is balanced with
- * respect to the three aspects:
+ * respect to the three aspects:
*
* - statement type
* - operand type
* - operand locality
- * operand global, local, parameter, or constant.
+ * operand global, local, parameter, or constant.
*
- * The combination of these three aspects is balanced only approximately.
+ * The combination of these three aspects is balanced only approximately.
*
- * 1. Statement Type:
+ * 1. Statement Type:
* ----------------- number
*
* V1 = V2 9
@@ -258,9 +258,9 @@
* library procedure 1
* X = F (...)
* function call 6
- * user function 5
- * library function 1
- * --
+ * user function 5
+ * library function 1
+ * --
* 17 17
* ---
* 103
@@ -274,10 +274,10 @@
* number approximate
* percentage
*
- * Arithmetic 32 50.8
+ * Arithmetic 32 50.8
*
- * + 21 33.3
- * - 7 11.1
+ * + 21 33.3
+ * - 7 11.1
* * 3 4.8
* / (int div) 1 1.6
*
@@ -295,7 +295,7 @@
* && (AND-THEN) 1 1.6
* | (OR) 1 1.6
* ! (NOT) 2 3.2
- *
+ *
* -- -----
* 63 100.1
*
@@ -315,10 +315,10 @@
* 242 100.0 %
*
* When there is an access path leading to the final operand (e.g. a record
- * component), only the final data type on the access path is counted.
+ * component), only the final data type on the access path is counted.
*
*
- * 4. Operand Locality:
+ * 4. Operand Locality:
* -------------------
* number approximate
* percentage
@@ -396,7 +396,7 @@
#include <string.h>
/* for strcpy, strcmp */
-#define Null 0
+#define Null 0
/* Value of a Null pointer */
#define true 1
#define false 0
@@ -409,7 +409,7 @@ typedef char Str_30 [31];
typedef int Arr_1_Dim [50];
typedef int Arr_2_Dim [50] [50];
-typedef struct record
+typedef struct record
{
struct record *Ptr_Comp;
Enumeration Discr;
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h b/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h
index 08b75f7b1a1..01d6e595e11 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-constants.h
@@ -7,10 +7,10 @@ const int32x4_t i32x4_constvec2 = { 2101, 2102, 2103, 2104};
#define ELEM(INDEX) .val[INDEX]
-const int32x4x2_t i32x4x2_constvec1 = {ELEM(0) = {0xaddebccb,11,12,13},
+const int32x4x2_t i32x4x2_constvec1 = {ELEM(0) = {0xaddebccb,11,12,13},
ELEM(1) = {14, 15, 16, 17} };
-const int32x4x2_t i32x4x2_constvec2 = { ELEM(0) = {0xaadebcca,11,12,13},
+const int32x4x2_t i32x4x2_constvec2 = { ELEM(0) = {0xaadebcca,11,12,13},
ELEM(1) = {140, 15, 16, 17}};
const int32x4x3_t i32x4x3_constvec1 = { ELEM(0) = {0xabbccdde,8, 9, 10},
@@ -24,7 +24,7 @@ const float32x4x2_t f32x4x2_constvec1 =
{ ELEM(0) = { 7.101f, 0.201f, 0.301f, 0.401f} ,
ELEM(1) = { 8.101f, 0.501f, 0.601f, 0.701f} };
-const float32x4x2_t f32x4x2_constvec2 =
+const float32x4x2_t f32x4x2_constvec2 =
{ ELEM(0) = { 11.99f , 11.21f, 1.27f, 8.74f},
ELEM(1) = { 13.45f , 1.23f ,1.24f, 1.26f}};
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-common.h b/gcc/testsuite/gcc.target/avr/pr71151-common.h
index 43379be5d2c..9742301d2a7 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-common.h
+++ b/gcc/testsuite/gcc.target/avr/pr71151-common.h
@@ -2,7 +2,7 @@ volatile char y;
volatile char g;
__attribute__((section(SECTION_NAME)))
-void foo(char x)
+void foo(char x)
{
switch (x)
{
diff --git a/gcc/testsuite/gcc.target/avr/torture/addr-space-1.h b/gcc/testsuite/gcc.target/avr/torture/addr-space-1.h
index 322a5b8b3b6..68aadcc4a8f 100644
--- a/gcc/testsuite/gcc.target/avr/torture/addr-space-1.h
+++ b/gcc/testsuite/gcc.target/avr/torture/addr-space-1.h
@@ -77,7 +77,7 @@ int main (void)
abort();
if (strcmp ((const char*) V2.str[1], "YYY..YYY"))
abort();
-
+
exit (0);
return 0;
}
diff --git a/gcc/testsuite/gcc.target/avr/torture/addr-space-2.h b/gcc/testsuite/gcc.target/avr/torture/addr-space-2.h
index c95a1631ab0..fb5c5b48d07 100644
--- a/gcc/testsuite/gcc.target/avr/torture/addr-space-2.h
+++ b/gcc/testsuite/gcc.target/avr/torture/addr-space-2.h
@@ -8,7 +8,7 @@ typedef struct T
} tree;
/*
- abcd
+ abcd
/ \
ab cd
/ \ / \
@@ -71,7 +71,7 @@ static void
test3 (const __as tree *pt)
{
tree t = *pt;
-
+
if (t.val != '*')
abort();
@@ -100,7 +100,7 @@ int main (void)
__asm ("" : "+r" (t));
test2 (t);
test3 (t);
-
+
exit (0);
return 0;
}
diff --git a/gcc/testsuite/gcc.target/i386/aes-avx-check.h b/gcc/testsuite/gcc.target/i386/aes-avx-check.h
index f2a4ead4014..74976b5d043 100644
--- a/gcc/testsuite/gcc.target/i386/aes-avx-check.h
+++ b/gcc/testsuite/gcc.target/i386/aes-avx-check.h
@@ -18,7 +18,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/aes-check.h b/gcc/testsuite/gcc.target/i386/aes-check.h
index 7e794423e47..a2193543879 100644
--- a/gcc/testsuite/gcc.target/i386/aes-check.h
+++ b/gcc/testsuite/gcc.target/i386/aes-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/amx-check.h b/gcc/testsuite/gcc.target/i386/amx-check.h
index 27dd37bf993..199c1026610 100644
--- a/gcc/testsuite/gcc.target/i386/amx-check.h
+++ b/gcc/testsuite/gcc.target/i386/amx-check.h
@@ -27,8 +27,8 @@
be changed in the future. */
typedef struct __tile_config
{
- uint8_t palette_id;
- uint8_t start_row;
+ uint8_t palette_id;
+ uint8_t start_row;
uint8_t reserved_0[14];
uint16_t colsb[8]; /* Colum size of each tmm register in bytes */
uint16_t reserved_1[8];
diff --git a/gcc/testsuite/gcc.target/i386/avx-check.h b/gcc/testsuite/gcc.target/i386/avx-check.h
index 666eff50780..0e50206c50a 100644
--- a/gcc/testsuite/gcc.target/i386/avx-check.h
+++ b/gcc/testsuite/gcc.target/i386/avx-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/avx512-check.h b/gcc/testsuite/gcc.target/i386/avx512-check.h
index 0ad9064f637..10c396aadf3 100644
--- a/gcc/testsuite/gcc.target/i386/avx512-check.h
+++ b/gcc/testsuite/gcc.target/i386/avx512-check.h
@@ -107,7 +107,7 @@ main ()
#endif
return 0;
}
-
+
#ifdef DEBUG
printf ("SKIPPED\n");
#endif
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h b/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h
index efece198e51..a0339a058a9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h
+++ b/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h
@@ -18,13 +18,13 @@
#undef MASK_VALUE
#undef MASK_ALL_ONES
#define MASK_TYPE __mmask32
-#define MASK_VALUE 0xA6BAAB6A
+#define MASK_VALUE 0xA6BAAB6A
#define MASK_ALL_ONES 0xFFFFFFFFu
-#elif SIZE <= 64
+#elif SIZE <= 64
#undef MASK_TYPE
#undef MASK_VALUE
#undef MASK_ALL_ONES
#define MASK_TYPE __mmask64
-#define MASK_VALUE 0xA6BAA6BAB6AB6ABB
+#define MASK_VALUE 0xA6BAA6BAB6AB6ABB
#define MASK_ALL_ONES 0xFFFFFFFFFFFFFFFFull
#endif
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
index 69948f8ee4f..5051985c95d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
@@ -1,6 +1,6 @@
/* This file is used for emulation of avx512fp16 runtime tests. To
verify the correctness of _Float16 type calculation, the idea is
- convert _Float16 to float and do emulation using float instructions.
+ convert _Float16 to float and do emulation using float instructions.
_Float16 type should not be emulate or check by itself. */
#include "avx512f-helper.h"
@@ -17,7 +17,7 @@
/* Useful macros. */
#define NOINLINE __attribute__((noinline,noclone))
#define _ROUND_NINT (_MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC)
-#define _ROUND_CUR 8
+#define _ROUND_CUR 8
#define AVX512F_MAX_ELEM 512 / 32
/* Structure for _Float16 emulation */
@@ -50,7 +50,7 @@ V512 src1, src2, src3, src3f;
int n_errs = 0;
/* Helper function for packing/unpacking ph operands. */
-void NOINLINE
+void NOINLINE
unpack_ph_2twops(V512 src, V512 *op1, V512 *op2)
{
V512 v1;
@@ -233,11 +233,11 @@ init_dest(V512 * res, V512 * exp)
#undef SI
#undef DF
#undef H_HF
-#undef NET_MASK
-#undef NET_CMASK
+#undef NET_MASK
+#undef NET_CMASK
#undef MASK_VALUE
#undef HALF_MASK
-#undef ZMASK_VALUE
+#undef ZMASK_VALUE
#define NET_MASK 0xffff
#define NET_CMASK 0xff
#define MASK_VALUE 0xcccc
@@ -254,10 +254,10 @@ init_dest(V512 * res, V512 * exp)
#undef DF
#undef SI
#undef H_HF
-#undef NET_MASK
-#undef NET_CMASK
-#undef MASK_VALUE
-#undef ZMASK_VALUE
+#undef NET_MASK
+#undef NET_CMASK
+#undef MASK_VALUE
+#undef ZMASK_VALUE
#undef HALF_MASK
#define NET_MASK 0xff
#define NET_CMASK 0xff
diff --git a/gcc/testsuite/gcc.target/i386/fma4-check.h b/gcc/testsuite/gcc.target/i386/fma4-check.h
index 33cd9628c04..5fbdcfb82c0 100644
--- a/gcc/testsuite/gcc.target/i386/fma4-check.h
+++ b/gcc/testsuite/gcc.target/i386/fma4-check.h
@@ -15,7 +15,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (0x80000001, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/fma_main.h b/gcc/testsuite/gcc.target/i386/fma_main.h
index 24464ab508b..c91d2275d9f 100644
--- a/gcc/testsuite/gcc.target/i386/fma_main.h
+++ b/gcc/testsuite/gcc.target/i386/fma_main.h
@@ -15,7 +15,7 @@ TYPE m2[32] = {
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33
};
TYPE m3[32] = {
- 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
+ 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34
};
TYPE m4[32];
diff --git a/gcc/testsuite/gcc.target/i386/l_fma_main.h b/gcc/testsuite/gcc.target/i386/l_fma_main.h
index a9dc5cd20e5..07c287abad3 100644
--- a/gcc/testsuite/gcc.target/i386/l_fma_main.h
+++ b/gcc/testsuite/gcc.target/i386/l_fma_main.h
@@ -15,7 +15,7 @@ TYPE m2[32] = {
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33
};
TYPE m3[32] = {
- 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
+ 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34
};
TYPE m4[32];
diff --git a/gcc/testsuite/gcc.target/i386/m128-check.h b/gcc/testsuite/gcc.target/i386/m128-check.h
index e90e1f02d32..69aac55874b 100644
--- a/gcc/testsuite/gcc.target/i386/m128-check.h
+++ b/gcc/testsuite/gcc.target/i386/m128-check.h
@@ -73,7 +73,7 @@ typedef union
#ifdef DEBUG
#define PRINTF printf
#else
-#define PRINTF(...)
+#define PRINTF(...)
#endif
#define CHECK_EXP(UNION_TYPE, VALUE_TYPE, FMT) \
@@ -169,7 +169,7 @@ CHECK_FP_ARRAY (f, float, ESP_FLOAT, "%f")
union ieee754_float
{
float d;
- struct
+ struct
{
unsigned long frac : 23;
unsigned exp : 8;
@@ -182,7 +182,7 @@ union ieee754_float
union ieee754_double
{
double d;
- struct
+ struct
{
unsigned long frac1 : 32;
unsigned long frac0 : 20;
diff --git a/gcc/testsuite/gcc.target/i386/m256-check.h b/gcc/testsuite/gcc.target/i386/m256-check.h
index da039841f5b..4c9fbab1494 100644
--- a/gcc/testsuite/gcc.target/i386/m256-check.h
+++ b/gcc/testsuite/gcc.target/i386/m256-check.h
@@ -49,25 +49,25 @@ typedef union
__m256i x;
unsigned char a[32];
} union256i_ub;
-
+
typedef union
{
__m256i x;
unsigned short a[16];
} union256i_uw;
-
+
typedef union
{
__m256i x;
unsigned int a[8];
} union256i_ud;
-
+
typedef union
{
__m256i x;
unsigned long long a[4];
} union256i_uq;
-
+
CHECK_EXP (union256i_b, char, "%d")
CHECK_EXP (union256i_w, short, "%d")
CHECK_EXP (union256i_d, int, "0x%x")
diff --git a/gcc/testsuite/gcc.target/i386/m512-check.h b/gcc/testsuite/gcc.target/i386/m512-check.h
index 68e74fce68d..9638eab13b0 100644
--- a/gcc/testsuite/gcc.target/i386/m512-check.h
+++ b/gcc/testsuite/gcc.target/i386/m512-check.h
@@ -42,19 +42,19 @@ typedef union
__m512i x;
unsigned char a[64];
} union512i_ub;
-
+
typedef union
{
__m512i x;
unsigned short a[32];
} union512i_uw;
-
+
typedef union
{
__m512i x;
unsigned int a[16];
} union512i_ud;
-
+
typedef union
{
__m512i x;
@@ -89,7 +89,7 @@ CHECK_EXP (union512i_ub, unsigned char, "%d")
CHECK_EXP (union512i_uw, unsigned short, "%d")
CHECK_EXP (union512i_ud, unsigned int, "0x%x")
CHECK_EXP (union512i_uq, unsigned long long, "0x%llx")
-
+
CHECK_FP_EXP (union512, float, ESP_FLOAT, "%f")
CHECK_FP_EXP (union512d, double, ESP_DOUBLE, "%f")
diff --git a/gcc/testsuite/gcc.target/i386/mmx-3dnow-check.h b/gcc/testsuite/gcc.target/i386/mmx-3dnow-check.h
index 4f2f7f3ac40..38fe0a74b0a 100644
--- a/gcc/testsuite/gcc.target/i386/mmx-3dnow-check.h
+++ b/gcc/testsuite/gcc.target/i386/mmx-3dnow-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (0x80000001, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/mmx-check.h b/gcc/testsuite/gcc.target/i386/mmx-check.h
index faf9b876f38..91580103c0f 100644
--- a/gcc/testsuite/gcc.target/i386/mmx-check.h
+++ b/gcc/testsuite/gcc.target/i386/mmx-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h b/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h
index 5eed2e2203c..436b8112d0d 100644
--- a/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h
+++ b/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h
@@ -18,7 +18,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/pclmul-check.h b/gcc/testsuite/gcc.target/i386/pclmul-check.h
index 7526cbe2ddf..ad652a7d576 100644
--- a/gcc/testsuite/gcc.target/i386/pclmul-check.h
+++ b/gcc/testsuite/gcc.target/i386/pclmul-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/rao-helper.h b/gcc/testsuite/gcc.target/i386/rao-helper.h
index df385516f48..309f2f5d441 100644
--- a/gcc/testsuite/gcc.target/i386/rao-helper.h
+++ b/gcc/testsuite/gcc.target/i386/rao-helper.h
@@ -30,7 +30,7 @@ void launch_threads (uint32_t nthreads,
memcpy (thread_state + i, tstate_proto, sizeof (state_t));
thread_state[i].id = i;
pthread_create (threads+i, NULL,
- (void* (*)(void*))worker,
+ (void* (*)(void*))worker,
(void*) (thread_state+i));
}
}
diff --git a/gcc/testsuite/gcc.target/i386/set-v16qi-1.h b/gcc/testsuite/gcc.target/i386/set-v16qi-1.h
index 79556e87460..2926a150237 100644
--- a/gcc/testsuite/gcc.target/i386/set-v16qi-1.h
+++ b/gcc/testsuite/gcc.target/i386/set-v16qi-1.h
@@ -18,7 +18,7 @@ static void
TEST (void)
{
char v[16] =
- {
+ {
-3, 60, 48, 104, -90, 37, -48, 78,
4, 33, 81, 4, -89, 17, 8, 68
};
diff --git a/gcc/testsuite/gcc.target/i386/set-v16qi-2.h b/gcc/testsuite/gcc.target/i386/set-v16qi-2.h
index 9768806c50c..a6047d032c1 100644
--- a/gcc/testsuite/gcc.target/i386/set-v16qi-2.h
+++ b/gcc/testsuite/gcc.target/i386/set-v16qi-2.h
@@ -15,7 +15,7 @@ static void
TEST (void)
{
char v[16] =
- {
+ {
-3, 60, 48, 104, -90, 37, -48, 78,
4, 33, 81, 4, -89, 17, 8, 68
};
diff --git a/gcc/testsuite/gcc.target/i386/sse-check.h b/gcc/testsuite/gcc.target/i386/sse-check.h
index 11b71bc3e97..2adeff417cc 100644
--- a/gcc/testsuite/gcc.target/i386/sse-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sse2-check.h b/gcc/testsuite/gcc.target/i386/sse2-check.h
index fd4a6ce1dbf..15801dddb8a 100644
--- a/gcc/testsuite/gcc.target/i386/sse2-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse2-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sse3-check.h b/gcc/testsuite/gcc.target/i386/sse3-check.h
index 5a0a0b1a02e..2347dd2a9e3 100644
--- a/gcc/testsuite/gcc.target/i386/sse3-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse3-check.h
@@ -16,10 +16,10 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
-
+
/* Run SSE3 test only if host has SSE3 support. */
if ((ecx & bit_SSE3) && sse_os_support ())
do_test ();
diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-check.h b/gcc/testsuite/gcc.target/i386/sse4_1-check.h
index 788f65d61cb..aa33b400bb5 100644
--- a/gcc/testsuite/gcc.target/i386/sse4_1-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse4_1-check.h
@@ -18,7 +18,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-check.h b/gcc/testsuite/gcc.target/i386/sse4_2-check.h
index c33cd1b4986..3866f5a4a2d 100644
--- a/gcc/testsuite/gcc.target/i386/sse4_2-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse4_2-check.h
@@ -17,7 +17,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-crc32.h b/gcc/testsuite/gcc.target/i386/sse4_2-crc32.h
index c0bcd16cca1..a172173dd3c 100644
--- a/gcc/testsuite/gcc.target/i386/sse4_2-crc32.h
+++ b/gcc/testsuite/gcc.target/i386/sse4_2-crc32.h
@@ -21,7 +21,7 @@ shift_mem_by1 (unsigned char* buf, int len)
}
static void
-do_div (unsigned char* buf, unsigned char* div)
+do_div (unsigned char* buf, unsigned char* div)
{
int i;
for (i = 0; i < 5; i++)
@@ -54,7 +54,7 @@ calc_rem (unsigned char* buf, int len)
for (i = 0; i < len - 32; i++)
{
- if ((div_buf[4] & 0x80))
+ if ((div_buf[4] & 0x80))
do_div (div_buf, divisor.c);
shift_mem_by1 (divident, disp);
}
@@ -63,7 +63,7 @@ calc_rem (unsigned char* buf, int len)
return ret.i;
}
-static void
+static void
reverse_bits (unsigned char *src, int len)
{
unsigned char buf[MAX_BUF];
@@ -84,23 +84,23 @@ reverse_bits (unsigned char *src, int len)
src[i] = buf[i];
}
-static void
+static void
shift_mem ( unsigned char *src, unsigned char *dst, int len, int shft)
{
int disp = shft / 8;
int i;
-
+
memset (dst, 0, len + disp);
for (i = 0; i < len; i++)
dst[i + disp] = src[i];
}
-static void
+static void
xor_mem (unsigned char *src, unsigned char *dst, int len)
{
int disp = len / 8;
int i;
-
+
for (i = 0; i < disp; i++)
dst[i] ^= src[i];
}
@@ -122,7 +122,7 @@ compute_crc32 (DST_T crc, SRC_T inp)
xor_sz = 32 + crc_sh;
memcpy (crcbuf, &crc, sizeof (DST_T));
memcpy (inbuf, &inp, sizeof (SRC_T));
-
+
reverse_bits (crcbuf, 4);
reverse_bits (inbuf, sizeof (SRC_T));
@@ -132,7 +132,7 @@ compute_crc32 (DST_T crc, SRC_T inp)
xor_mem (tmp1, tmp2, xor_sz);
ret.i = calc_rem (tmp2, xor_sz);
-
+
reverse_bits (ret.c, 4);
return (DST_T)ret.i;
@@ -143,7 +143,7 @@ compute_crc32 (DST_T crc, SRC_T inp)
static void
sse4_2_test (void)
{
- DST_T dst[NUM];
+ DST_T dst[NUM];
SRC_T src[NUM];
int i;
diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpstr.h b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpstr.h
index 999b5c8edab..f44c2e63794 100644
--- a/gcc/testsuite/gcc.target/i386/sse4_2-pcmpstr.h
+++ b/gcc/testsuite/gcc.target/i386/sse4_2-pcmpstr.h
@@ -55,7 +55,7 @@ override_invalid (unsigned char res[16][16], int la, int lb,
}
}
-static void
+static void
calc_matrix (__m128i a, int la, __m128i b, int lb, const int mode,
unsigned char res[16][16])
{
@@ -118,7 +118,7 @@ calc_matrix (__m128i a, int la, __m128i b, int lb, const int mode,
override_invalid (res, la, lb, mode, (mode & 1) == 0 ? 16 : 8);
}
-static int
+static int
calc_res (__m128i a, int la, __m128i b, int lb, const int mode)
{
unsigned char mtx[16][16];
@@ -136,7 +136,7 @@ calc_res (__m128i a, int la, __m128i b, int lb, const int mode)
if (la > dim)
la = dim;
-
+
if (lb > dim)
lb = dim;
@@ -171,7 +171,7 @@ calc_res (__m128i a, int la, __m128i b, int lb, const int mode)
for (j = 0, k = i; j < dim - i && k < dim; j++, k++)
val &= mtx[k][j];
-
+
if (val)
res |= (1 << i);
else
@@ -284,7 +284,7 @@ cmp_indexed (__m128i a, int la, __m128i b, int lb,
int i, ndx;
int dim = (mode & 1) == 0 ? 16 : 8;
int r2;
-
+
r2 = calc_res (a, la, b, lb, mode);
ndx = dim;
@@ -311,7 +311,7 @@ cmp_indexed (__m128i a, int la, __m128i b, int lb,
return ndx;
}
-static __m128i
+static __m128i
cmp_masked (__m128i a, int la, __m128i b, int lb,
const int mode, int *res2)
{
@@ -355,7 +355,7 @@ cmp_masked (__m128i a, int la, __m128i b, int lb,
return ret.x;
}
-static int
+static int
calc_str_len (__m128i a, const int mode)
{
union
@@ -410,7 +410,7 @@ cmp_ii (__m128i *a, __m128i *b, const int mode, int *flags)
index = cmp_indexed (*a, la, *b, lb, mode, &res2);
- if (flags != NULL)
+ if (flags != NULL)
*flags = cmp_flags (*a, la, *b, lb, mode, res2, 1);
return index;
diff --git a/gcc/testsuite/gcc.target/i386/sse4_2-popcnt.h b/gcc/testsuite/gcc.target/i386/sse4_2-popcnt.h
index ce06ba1b8d0..36d046a841e 100644
--- a/gcc/testsuite/gcc.target/i386/sse4_2-popcnt.h
+++ b/gcc/testsuite/gcc.target/i386/sse4_2-popcnt.h
@@ -33,7 +33,7 @@ sse4_2_test (void)
}
for (i=0; i < NUM; i++)
- {
+ {
res = POPCNT (vals[i]);
if (res != compute_popcnt (vals[i]))
abort ();
diff --git a/gcc/testsuite/gcc.target/i386/sse4a-check.h b/gcc/testsuite/gcc.target/i386/sse4a-check.h
index d43b4b222b1..d7ea307f598 100644
--- a/gcc/testsuite/gcc.target/i386/sse4a-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse4a-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (0x80000001, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/ssse3-check.h b/gcc/testsuite/gcc.target/i386/ssse3-check.h
index 3ca79333c7f..1b74fabd4b2 100644
--- a/gcc/testsuite/gcc.target/i386/ssse3-check.h
+++ b/gcc/testsuite/gcc.target/i386/ssse3-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/i386/ssse3-vals.h b/gcc/testsuite/gcc.target/i386/ssse3-vals.h
index 048ca911c09..6ffcd63e87f 100644
--- a/gcc/testsuite/gcc.target/i386/ssse3-vals.h
+++ b/gcc/testsuite/gcc.target/i386/ssse3-vals.h
@@ -56,5 +56,5 @@ static int vals [256] __attribute__ ((aligned(16))) =
0x0511ad1b, 0xf996b44c, 0xb5ead756, 0xc022138d, 0x6172adf1, 0xa4a0a3b4,
0x8c2977b8, 0xa8e482ed, 0x04fcdd6b, 0x3f7b85d4, 0x4fca1e46, 0xa392ddca,
0x569fc791, 0x346a706c, 0x543bf3eb, 0x895b3cde, 0x2146bb80, 0x26b3c168,
- 0x929998db, 0x1ea472c9, 0x7207b36b, 0x6a8f10d4
+ 0x929998db, 0x1ea472c9, 0x7207b36b, 0x6a8f10d4
};
diff --git a/gcc/testsuite/gcc.target/i386/xop-check.h b/gcc/testsuite/gcc.target/i386/xop-check.h
index 395abe8766d..1f549a8c1ab 100644
--- a/gcc/testsuite/gcc.target/i386/xop-check.h
+++ b/gcc/testsuite/gcc.target/i386/xop-check.h
@@ -16,7 +16,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (0x80000001, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/msp430/mul_main.h b/gcc/testsuite/gcc.target/msp430/mul_main.h
index b45059dd64d..b22dbecea3e 100644
--- a/gcc/testsuite/gcc.target/msp430/mul_main.h
+++ b/gcc/testsuite/gcc.target/msp430/mul_main.h
@@ -69,7 +69,7 @@ main (void)
#endif
abort ();
}
-
+
return 0;
}
diff --git a/gcc/testsuite/gcc.target/powerpc/m128-check.h b/gcc/testsuite/gcc.target/powerpc/m128-check.h
index a3088e0c247..d1363b23be0 100644
--- a/gcc/testsuite/gcc.target/powerpc/m128-check.h
+++ b/gcc/testsuite/gcc.target/powerpc/m128-check.h
@@ -80,7 +80,7 @@ typedef union
#ifdef DEBUG
#define PRINTF printf
#else
-#define PRINTF(...)
+#define PRINTF(...)
#endif
#define CHECK_EXP(UNION_TYPE, VALUE_TYPE, FMT) \
@@ -174,7 +174,7 @@ CHECK_FP_ARRAY (f, float, ESP_FLOAT, "%f")
union ieee754_float
{
float d;
- struct
+ struct
{
unsigned long frac : 23;
unsigned exp : 8;
@@ -187,7 +187,7 @@ union ieee754_float
union ieee754_double
{
double d;
- struct
+ struct
{
unsigned long frac1 : 32;
unsigned long frac0 : 20;
diff --git a/gcc/testsuite/gcc.target/powerpc/recip-test2.h b/gcc/testsuite/gcc.target/powerpc/recip-test2.h
index 3ec356cdfd8..87ba8339c13 100644
--- a/gcc/testsuite/gcc.target/powerpc/recip-test2.h
+++ b/gcc/testsuite/gcc.target/powerpc/recip-test2.h
@@ -43,7 +43,7 @@ static TYPE NAME (div_output) [DIV_SIZE] __attribute__((__aligned__(32)));
static TYPE NAME (rsqrt_expected)[RSQRT_SIZE] __attribute__((__aligned__(32)));
static TYPE NAME (rsqrt_output) [RSQRT_SIZE] __attribute__((__aligned__(32)));
-\f
+
/*
* Crack a floating point number into sign bit, exponent, and mantissa.
*/
@@ -63,7 +63,7 @@ NAME (crack) (TYPE number, unsigned int *p_sign, unsigned *p_exponent, UNS_TYPE
return;
}
-\f
+
/*
* Prevent optimizer from eliminating + 0.0 to remove -0.0.
*/
@@ -158,7 +158,7 @@ NAME (math_diff) (TYPE a, TYPE b, int bits)
return -1;
}
-\f
+
/*
* Turn off inlining to make code inspection easier.
*/
@@ -173,7 +173,7 @@ static void NAME (check_div) (const char *) __attribute__((__noinline__));
static void NAME (check_rsqrt) (const char *) __attribute__((__noinline__));
static void NAME (run) (void) __attribute__((__noinline__));
-\f
+
/*
* Division function that might be vectorized.
*/
@@ -274,7 +274,7 @@ NAME (asm_rsqrt) (void)
}
}
-\f
+
/*
* Functions to abort or report errors.
*/
@@ -286,7 +286,7 @@ static int NAME (max_bits_div) = 0;
static int NAME (max_bits_rsqrt) = 0;
#endif
-\f
+
/*
* Compare the expected value with the value we got.
*/
@@ -389,7 +389,7 @@ NAME (check_rsqrt) (const char *test)
}
}
-\f
+
/*
* Now do everything.
*/
diff --git a/gcc/testsuite/gcc.target/powerpc/ssse3-vals.h b/gcc/testsuite/gcc.target/powerpc/ssse3-vals.h
index 54674fba0c1..401413d6a4b 100644
--- a/gcc/testsuite/gcc.target/powerpc/ssse3-vals.h
+++ b/gcc/testsuite/gcc.target/powerpc/ssse3-vals.h
@@ -79,5 +79,5 @@ static union data {
{ { 0x8c2977b8, 0xa8e482ed, 0x04fcdd6b, 0x3f7b85d4 } },
{ { 0x4fca1e46, 0xa392ddca, 0x569fc791, 0x346a706c } },
{ { 0x543bf3eb, 0x895b3cde, 0x2146bb80, 0x26b3c168 } },
- { { 0x929998db, 0x1ea472c9, 0x7207b36b, 0x6a8f10d4 } }
+ { { 0x929998db, 0x1ea472c9, 0x7207b36b, 0x6a8f10d4 } }
};
--git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-v2.h b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-v2.h
index d1157599ee7..450a0dc951a 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-v2.h
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-v2.h
@@ -67,7 +67,7 @@ deoptimize_ptr (vector TYPE *p)
return p;
}
-\f
+
RTYPE
get_auto_0 (vector TYPE a)
{
@@ -173,7 +173,7 @@ get_auto_15 (vector TYPE a)
#endif
#endif
-\f
+
/* Tests for the normal case of vec_extract where the vector is in a register
and returning the result in a register as a return value. */
#ifdef DISABLE_INLINE_OF_GET_AUTO_N
@@ -235,7 +235,7 @@ do_auto (vector TYPE a)
}
-\f
+
/* Main program to test all of the possibilities. */
int
main (void)
--git a/gcc/testsuite/gcc.target/powerpc/vec-extract.h b/gcc/testsuite/gcc.target/powerpc/vec-extract.h
index a6f2dc48b3d..3643126b945 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-extract.h
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract.h
@@ -63,7 +63,7 @@ deoptimize_ptr (vector TYPE *p)
return p;
}
-\f
+
/* Tests for the normal case of vec_extract where the vector is in a register
and returning the result in a register as a return value. */
RTYPE
@@ -216,7 +216,7 @@ do_auto (vector TYPE a)
}
}
-\f
+
/* Tests for vec_extract of a vector in a register, but storing the result
(there is an optimization where an element can be stored to memory if it is
in the right position to use a scalar store). */
@@ -374,7 +374,7 @@ do_store (vector TYPE a)
}
}
-\f
+
/* Tests for vec_extract where the vector comes from memory (the compiler can
optimize this by doing a scalar load without having to load the whole
vector). */
@@ -528,7 +528,7 @@ do_pointer (vector TYPE *p)
}
}
-\f
+
/* Test for vec_extract where the vector comes from an indexed memory
operation. This is to make sure that if the compiler optimizes vec_extract
from memory to be a scalar load, the address is correctly adjusted. */
@@ -683,7 +683,7 @@ do_indexed (vector TYPE *p, size_t x)
}
}
-\f
+
/* Test for vec_extract where the vector comes from memory using an address
with a pointer and a constant offset. This will occur in ISA 3.0 which
added d-form memory addressing for vectors. */
@@ -838,7 +838,7 @@ do_ptr_plus1 (vector TYPE *p)
}
}
-\f
+
/* Test for vec_extract where the vector comes from a static variable. */
static vector TYPE s;
@@ -993,7 +993,7 @@ do_static (void)
}
}
-\f
+
/* Test for vec_extract where the vector is in a global variable. */
vector TYPE g;
@@ -1148,7 +1148,7 @@ do_global (void)
}
}
-\f
+
/* Main program to test all of the possibilities. */
int
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h b/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h
index e66a27e9afd..12308c3c150 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h
@@ -7,7 +7,7 @@ int
main ()
{
unsigned int eax, ebx, ecx, edx;
-
+
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
return 0;
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/defines.h b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/defines.h
index 892a66eb279..f5f61aad7b7 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/defines.h
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512fp16/defines.h
@@ -122,7 +122,7 @@ typedef long double ldouble;
#ifdef CHECK_FLOAT128
#define CF128_STR "__float128",
#define CF128_SIZ TYPE_SIZE_FLOAT128,
-#define CF128_ALI TYPE_ALIGN_FLOAT128,
+#define CF128_ALI TYPE_ALIGN_FLOAT128,
#define CF128_RET "???",
#else
#define CF128_STR
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/bf16/defines.h b/gcc/testsuite/gcc.target/x86_64/abi/bf16/defines.h
index a4df0b0528d..3131a974d9f 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/bf16/defines.h
+++ b/gcc/testsuite/gcc.target/x86_64/abi/bf16/defines.h
@@ -119,7 +119,7 @@ typedef long double ldouble;
#ifdef CHECK_FLOAT128
#define CF128_STR "__float128",
#define CF128_SIZ TYPE_SIZE_FLOAT128,
-#define CF128_ALI TYPE_ALIGN_FLOAT128,
+#define CF128_ALI TYPE_ALIGN_FLOAT128,
#define CF128_RET "???",
#else
#define CF128_STR
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/defines.h b/gcc/testsuite/gcc.target/x86_64/abi/defines.h
index a32daf69468..cd52479421b 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/defines.h
+++ b/gcc/testsuite/gcc.target/x86_64/abi/defines.h
@@ -104,7 +104,7 @@ typedef long double ldouble;
#ifdef CHECK_FLOAT128
#define CF128_STR "__float128",
#define CF128_SIZ TYPE_SIZE_FLOAT128,
-#define CF128_ALI TYPE_ALIGN_FLOAT128,
+#define CF128_ALI TYPE_ALIGN_FLOAT128,
#define CF128_RET "???",
#else
#define CF128_STR
diff --git a/gcc/testsuite/objc-obj-c++-shared/CF-CFString.h b/gcc/testsuite/objc-obj-c++-shared/CF-CFString.h
index 626001bb1fa..04f0d5bd721 100644
--- a/gcc/testsuite/objc-obj-c++-shared/CF-CFString.h
+++ b/gcc/testsuite/objc-obj-c++-shared/CF-CFString.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1090
# import "GNUStep/CoreFoundation/CFString.h"
-#else
+#else
# import <CoreFoundation/CFString.h>
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/F-NSArray.h b/gcc/testsuite/objc-obj-c++-shared/F-NSArray.h
index 99b6189c103..3aaa5ace1af 100644
--- a/gcc/testsuite/objc-obj-c++-shared/F-NSArray.h
+++ b/gcc/testsuite/objc-obj-c++-shared/F-NSArray.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1090
# import "GNUStep/Foundation/NSArray.h"
-#else
+#else
# import <Foundation/NSArray.h>
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/F-NSAutoreleasePool.h b/gcc/testsuite/objc-obj-c++-shared/F-NSAutoreleasePool.h
index 17599e8dfa0..6d8befd24ce 100644
--- a/gcc/testsuite/objc-obj-c++-shared/F-NSAutoreleasePool.h
+++ b/gcc/testsuite/objc-obj-c++-shared/F-NSAutoreleasePool.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1090
# import "GNUStep/Foundation/NSAutoreleasePool.h"
-#else
+#else
# import <Foundation/NSAutoreleasePool.h>
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/F-NSObject.h b/gcc/testsuite/objc-obj-c++-shared/F-NSObject.h
index a372d607b1d..5d84349d633 100644
--- a/gcc/testsuite/objc-obj-c++-shared/F-NSObject.h
+++ b/gcc/testsuite/objc-obj-c++-shared/F-NSObject.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1090
# import "GNUStep/Foundation/NSObject.h"
-#else
+#else
# import <Foundation/NSObject.h>
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/F-NSString.h b/gcc/testsuite/objc-obj-c++-shared/F-NSString.h
index 5c29398eab7..089eda62fca 100644
--- a/gcc/testsuite/objc-obj-c++-shared/F-NSString.h
+++ b/gcc/testsuite/objc-obj-c++-shared/F-NSString.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1090
# import "GNUStep/Foundation/NSString.h"
-#else
+#else
# import <Foundation/NSString.h>
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/F-NSValue.h b/gcc/testsuite/objc-obj-c++-shared/F-NSValue.h
index fbe2ab34592..ad07d50b513 100644
--- a/gcc/testsuite/objc-obj-c++-shared/F-NSValue.h
+++ b/gcc/testsuite/objc-obj-c++-shared/F-NSValue.h
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1090
# import "GNUStep/Foundation/NSValue.h"
-#else
+#else
# import <Foundation/NSValue.h>
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFArray.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFArray.h
index 0145855dbb4..d34a3f641fb 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFArray.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFArray.h
@@ -1,12 +1,12 @@
/* CFArray.h
-
+
Copyright (C) 2010 Free Software Foundation, Inc.
-
+
Written by: Stefan Bidigaray
Date: January, 2010
-
+
This file is part of CoreBase.
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFAvailability.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFAvailability.h
index 855ff5c48a9..80161bd7a3b 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFAvailability.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFAvailability.h
@@ -1,12 +1,12 @@
/* CFAvailability.h
-
+
Copyright (C) 2017 Free Software Foundation, Inc.
-
+
Written by: Stefan Bidigaray
Date: August, 2017
-
+
This file is part of the GNUstep CoreBase Library.
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFBase.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFBase.h
index 2df7b2925b2..9fd65002861 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFBase.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFBase.h
@@ -1,12 +1,12 @@
/* CFBase.h
-
+
Copyright (C) 2010 Free Software Foundation, Inc.
-
+
Written by: Stefan Bidigaray
Date: January, 2010
-
+
This file is part of the GNUstep CoreBase Library.
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
@@ -403,7 +403,7 @@ CF_EXPORT CFTypeID CFAllocatorGetTypeID (void);
/** \ingroup CFTypeRef
\{
*/
-/* These function will be implemented in CFRuntime.c since they
+/* These function will be implemented in CFRuntime.c since they
require runtime support. */
CF_EXPORT CFStringRef CFCopyDescription (CFTypeRef cf);
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFCharacterSet.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFCharacterSet.h
index 1cb6c66cac8..de80ee93971 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFCharacterSet.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFCharacterSet.h
@@ -1,12 +1,12 @@
/* CFCharacterSet.h
-
+
Copyright (C) 2012 Free Software Foundation, Inc.
-
+
Written by: Stefan Bidigaray
Date: January, 2012
-
+
This file is part of the GNUstep CoreBase Library.
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFData.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFData.h
index 9e98a6969cd..c73afe835d9 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFData.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFData.h
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFDictionary.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFDictionary.h
index adc0dd8c4b0..9b07b3d9542 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFDictionary.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFDictionary.h
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFLocale.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFLocale.h
index 7ae082de886..96314720ad0 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFLocale.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFLocale.h
@@ -1,12 +1,12 @@
/* CFLocale.h
-
+
Copyright (C) 2010 Free Software Foundation, Inc.
-
+
Written by: Stefan Bidigaray
Date: March, 2011
-
+
This file is part of the GNUstep CoreBase Library.
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
@@ -19,8 +19,8 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
@@ -39,18 +39,18 @@ CF_EXTERN_C_BEGIN
/** \defgroup CFLocaleRef CFLocale Reference
\brief CFLocale provides basic functionality for language and/or region
specific operations.
-
+
Locale-sensitive operations, such as collation, calendars and
capitalization, may use CFLocale objects to provide language and/or region
specific functionality.
-
+
CFLocale is "toll-free bridged" to NSLocale.
-
+
\{
*/
typedef const struct __CFLocale *CFLocaleRef;
-/**
+/**
*/
enum
{
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFString.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFString.h
index 42e4967ce90..fe40326d353 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFString.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/CoreFoundation/CFString.h
@@ -1,12 +1,12 @@
/* CFString.h
-
+
Copyright (C) 2010 Free Software Foundation, Inc.
-
+
Written by: Stefan Bidigaray
Date: January, 2010
-
+
This file is part of CoreBase.
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
@@ -19,10 +19,10 @@
You should have received a copy of the GNU Lesser General Public
License along with this library; see the file COPYING.LIB.
- If not, see <http://www.gnu.org/licenses/> or write to the
- Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ If not, see <http://www.gnu.org/licenses/> or write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
-*/
+*/
#ifndef __COREFOUNDATION_CFSTRING_H__
#define __COREFOUNDATION_CFSTRING_H__
@@ -95,7 +95,7 @@ enum CFStringBuiltInEncodings
/** \def CFSTR(x)
\brief Creates a constant string object.
-
+
\note This macro will create the constant string at runtime.
*/
/* The 'pure' attribute tells the compiler that this function will always
@@ -564,10 +564,10 @@ CFStringGetCharacterFromInlineBuffer (CFStringInlineBuffer *buf, CFIndex idx)
else if (idx >= buf->bufferedRangeEnd || idx < buf->bufferedRangeStart)
{
CFRange range;
-
+
if (idx < 0 || idx >= buf->rangeToBuffer.length)
return 0;
-
+
/* Use 16 here so it's efficient to go backwards, too */
buf->bufferedRangeStart = idx - 16;
if (buf->bufferedRangeStart < 0)
@@ -576,13 +576,13 @@ CFStringGetCharacterFromInlineBuffer (CFStringInlineBuffer *buf, CFIndex idx)
buf->bufferedRangeStart + __kCFStringInlineBufferLength;
if (buf->bufferedRangeEnd > buf->rangeToBuffer.length)
buf->bufferedRangeEnd = buf->rangeToBuffer.length;
-
+
range = CFRangeMake (buf->rangeToBuffer.location + buf->bufferedRangeStart,
buf->bufferedRangeEnd - buf->bufferedRangeStart);
-
+
CFStringGetCharacters (buf->theString, range, buf->buffer);
}
-
+
return buf->buffer[(idx - buf->bufferedRangeStart)];
}
/** \} */
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSArray.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSArray.h
index 661e90faf89..6c8139c227c 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSArray.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSArray.h
@@ -306,7 +306,7 @@ DEFINE_BLOCK_TYPE(GSPredicateBlock, BOOL, GS_GENERIC_TYPE(ElementT),
- (GS_GENERIC_TYPE(ElementT)) objectAtIndexedSubscript: (NSUInteger)anIndex;
@end
-\f
+
@interface GS_GENERIC_CLASS(NSMutableArray, ElementT) : NSArray
+ (instancetype) arrayWithCapacity: (NSUInteger)numItems;
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSAutoreleasePool.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSAutoreleasePool.h
index c7ec486ddde..a213ca004bb 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSAutoreleasePool.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSAutoreleasePool.h
@@ -3,24 +3,24 @@
Written by: Andrew Kachites McCallum <mccallum@gnu.ai.mit.edu>
Date: 1995
-
+
This file is part of the GNUstep Base Library.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free
Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
Boston, MA 02111 USA.
- */
+ */
#ifndef __NSAutoreleasePool_h_GNUSTEP_BASE_INCLUDE
#define __NSAutoreleasePool_h_GNUSTEP_BASE_INCLUDE
@@ -35,7 +35,7 @@ extern "C" {
@class NSAutoreleasePool;
@class NSThread;
-\f
+
/**
* Each thread has its own copy of these variables.
<example>
@@ -74,9 +74,9 @@ typedef struct autorelease_thread_vars
memset (TV, 0, sizeof (__typeof__ (*TV)))
-\f
+
/**
- * Each pool holds its objects-to-be-released in a linked-list of
+ * Each pool holds its objects-to-be-released in a linked-list of
these structures.
<example>
{
@@ -95,7 +95,7 @@ typedef struct autorelease_array_list
__unsafe_unretained id objects[0];
} array_list_struct;
-\f
+
/**
* <p>
@@ -134,9 +134,9 @@ typedef struct autorelease_array_list
* <p>
* This mechanism provides a simple but controllable and reasonably
* efficient way of managing temporary objects. An object can be
- * autoreleased and then passed around and used until the topmost
+ * autoreleased and then passed around and used until the topmost
* pool in the stack is destroyed.
- * </p>
+ * </p>
* <p>
* Most methods return objects which are either owned by autorelease
* pools or by the receiver of the method, so the lifetime of the
@@ -179,7 +179,7 @@ typedef struct autorelease_array_list
* </deflist>
*/
NS_AUTOMATED_REFCOUNT_UNAVAILABLE
-@interface NSAutoreleasePool : NSObject
+@interface NSAutoreleasePool : NSObject
{
#if GS_EXPOSE(NSAutoreleasePool) && !__has_feature(objc_arc)
/* For re-setting the current pool when we are dealloc'ed. */
@@ -264,7 +264,7 @@ NS_AUTOMATED_REFCOUNT_UNAVAILABLE
*/
+ (unsigned) autoreleaseCountForObject: (id)anObject;
-/**
+/**
* Return the currently active autorelease pool.
*/
+ (id) currentPool;
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h
index 05888b7d206..4a964eadf91 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSGeometry.h
@@ -1,26 +1,26 @@
/* Interface for NSGeometry routines for GNUStep
* Copyright (C) 1995 Free Software Foundation, Inc.
- *
+ *
* Written by: Adam Fedor <fedor@boulder.colorado.edu>
* Date: 1995,199
- *
+ *
* This file is part of the GNUstep Base Library.
- *
+ *
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
- *
+ *
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Library General Public License for more details.
- *
+ *
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02111 USA.
- */
+ */
#ifndef __NSGeometry_h_GNUSTEP_BASE_INCLUDE
#define __NSGeometry_h_GNUSTEP_BASE_INCLUDE
@@ -171,7 +171,7 @@ static const NSEdgeInsets NSEdgeInsetsZero __attribute__((unused)) = {0.0,0.0,0
*/
#ifdef IN_NSGEOMETRY_M
#define GS_GEOM_SCOPE extern
-#define GS_GEOM_ATTR
+#define GS_GEOM_ATTR
#else
#define GS_GEOM_SCOPE static inline
#define GS_GEOM_ATTR __attribute__((unused))
@@ -440,7 +440,7 @@ GS_GEOM_SCOPE NSRect
NSIntersectionRect (NSRect aRect, NSRect bRect)
{
if (NSMaxX(aRect) <= NSMinX(bRect) || NSMaxX(bRect) <= NSMinX(aRect)
- || NSMaxY(aRect) <= NSMinY(bRect) || NSMaxY(bRect) <= NSMinY(aRect))
+ || NSMaxY(aRect) <= NSMinY(bRect) || NSMaxY(bRect) <= NSMinY(aRect))
{
return NSMakeRect(0.0, 0.0, 0.0, 0.0);
}
@@ -490,7 +490,7 @@ NSEqualPoints(NSPoint aPoint, NSPoint bPoint) GS_GEOM_ATTR;
GS_GEOM_SCOPE BOOL
NSMouseInRect(NSPoint aPoint, NSRect aRect, BOOL flipped) GS_GEOM_ATTR;
-/** Returns 'YES' iff aPoint is inside aRect. */
+/** Returns 'YES' iff aPoint is inside aRect. */
GS_GEOM_SCOPE BOOL
NSMouseInRect(NSPoint aPoint, NSRect aRect, BOOL flipped)
{
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
index 189af80436a..2accb4a6336 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h
@@ -279,7 +279,7 @@ DEFINE_BLOCK_TYPE(NSComparator, NSComparisonResult, id, id);
#endif
/**
- * Declare the foundation export macro as an alias to GS_EXPORT
+ * Declare the foundation export macro as an alias to GS_EXPORT
*/
#define FOUNDATION_EXPORT GS_EXPORT
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObject.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObject.h
index 35647eadab6..16355222d75 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObject.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObject.h
@@ -3,26 +3,26 @@
Written by: Andrew Kachites McCallum <mccallum@gnu.ai.mit.edu>
Date: 1995
-
+
This file is part of the GNUstep Base Library.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free
Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
Boston, MA 02111 USA.
AutogsdocSource: NSObject.m
- */
+ */
#ifndef __NSObject_h_GNUSTEP_BASE_INCLUDE
#define __NSObject_h_GNUSTEP_BASE_INCLUDE
@@ -65,7 +65,7 @@ extern "C" {
* Returns the class of the receiver. If the receiver is a proxy, then this
* may return the class of the proxy target. Use -isProxy to determine whether
* the receiver is a proxy. If you wish to find the real class of the
- * receiver, ignoring proxies, then use object_getClass().
+ * receiver, ignoring proxies, then use object_getClass().
*/
- (Class) class;
/**
@@ -108,7 +108,7 @@ extern "C" {
* Calling this method is rarely the correct thing to do. In most cases, a
* subclass can be substituted for a superclass, so you should never need to
* check that an object is really an instance of a specific class and not a
- * subclass.
+ * subclass.
*/
- (BOOL) isMemberOfClass: (Class)aClass;
/**
@@ -415,7 +415,7 @@ GS_ROOT_CLASS @interface NSObject <NSObject>
* -beginContentAccess message to the receiver when it is created and an
* -endContentAccess message when it is destroyed. This prevents an object
* that implements the NSDiscardableContent protocol from having its contents
- * discarded for as long as the proxy exists.
+ * discarded for as long as the proxy exists.
*
* On systems using the GNUstep runtime, messages send to the proxy will be
* slightly slower than direct messages. With the GCC runtime, they will be
@@ -551,7 +551,7 @@ GS_EXPORT NSRecursiveLock *gnustep_global_lock;
/**
* The NSDiscardableContent protocol is used by objects which encapsulate data
* which may be discarded if resource constraints are exceeded. These
- * constraints are typically, but not always, related memory.
+ * constraints are typically, but not always, related memory.
*/
@protocol NSDiscardableContent
@@ -578,7 +578,7 @@ GS_EXPORT NSRecursiveLock *gnustep_global_lock;
/**
* Returns YES if the contents of the object have been discarded, either via a
* call to -discardContentIfPossible while the object is not in use, or by some
- * implementation dependent mechanism.
+ * implementation dependent mechanism.
*/
- (BOOL) isContentDiscarded;
@end
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSRange.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSRange.h
index 845d44ac2d5..50f7a557c9c 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSRange.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSRange.h
@@ -1,26 +1,26 @@
-/*
+/*
* Copyright (C) 1995,1999 Free Software Foundation, Inc.
- *
+ *
* Written by: Adam Fedor <fedor@boulder.colorado.edu>
* Date: 1995
- *
+ *
* This file is part of the GNUstep Base Library.
- *
+ *
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
- *
+ *
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Library General Public License for more details.
- *
+ *
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02111 USA.
- */
+ */
#ifndef __NSRange_h_GNUSTEP_BASE_INCLUDE
#define __NSRange_h_GNUSTEP_BASE_INCLUDE
@@ -114,28 +114,28 @@ NSMaxRange(NSRange range) GS_RANGE_ATTR;
/** Returns top end of range (location + length). */
GS_RANGE_SCOPE NSUInteger
-NSMaxRange(NSRange range)
+NSMaxRange(NSRange range)
{
return range.location + range.length;
}
-GS_RANGE_SCOPE BOOL
+GS_RANGE_SCOPE BOOL
NSLocationInRange(NSUInteger location, NSRange range) GS_RANGE_ATTR;
/** Returns whether location is greater than or equal to range's location
* and less than its max.
*/
-GS_RANGE_SCOPE BOOL
-NSLocationInRange(NSUInteger location, NSRange range)
+GS_RANGE_SCOPE BOOL
+NSLocationInRange(NSUInteger location, NSRange range)
{
return (location >= range.location) && (location < NSMaxRange(range));
}
/** Convenience method for raising an NSRangeException. */
GS_EXPORT void _NSRangeExceptionRaise (void);
-/* NB: The implementation of _NSRangeExceptionRaise is:
+/* NB: The implementation of _NSRangeExceptionRaise is:
[NSException raise: NSRangeException
- format: @"Range location + length too great"];
+ format: @"Range location + length too great"];
_NSRangeExceptionRaise is defined in NSRange.m so that this
file (NSRange.h) can be included without problems in the
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSString.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSString.h
index 7863d9404f9..6d8fc43875b 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSString.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSString.h
@@ -3,19 +3,19 @@
Written by: Andrew Kachites McCallum <mccallum@gnu.ai.mit.edu>
Date: 1995
-
+
This file is part of the GNUstep Base Library.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free
Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
@@ -80,7 +80,7 @@ calling NSHomeDirectory() to get the home directory, and only saving the
part of the full path after that prefix.
</p>
</chapter>
- */
+ */
#ifndef __NSString_h_GNUSTEP_BASE_INCLUDE
#define __NSString_h_GNUSTEP_BASE_INCLUDE
@@ -98,7 +98,7 @@ extern "C" {
*/
typedef uint16_t unichar;
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_5,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_5,GS_API_LATEST)
#define NSMaximumStringLength (INT_MAX-1)
#endif
@@ -114,20 +114,20 @@ typedef uint16_t unichar;
#define NSMaximumStringLength (INT_MAX-1)
-enum
+enum
{
NSCaseInsensitiveSearch = 1,
NSLiteralSearch = 2,
NSBackwardsSearch = 4,
NSAnchoredSearch = 8,
NSNumericSearch = 64 /* MacOS-X 10.2 */
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_5,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_5,GS_API_LATEST)
,
NSDiacriticInsensitiveSearch = 128,
NSWidthInsensitiveSearch = 256,
NSForcedOrderingSearch = 512
#endif
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_7,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_7,GS_API_LATEST)
,
/**
* Treats the search string as a regular expression. This option may be
@@ -153,7 +153,7 @@ typedef NSUInteger NSStringCompareOptions;
* NSWindowsCP1253StringEncoding, NSWindowsCP1254StringEncoding,
* NSWindowsCP1250StringEncoding, NSISO2022JPStringEncoding,
* NSMacOSRomanStringEncoding, NSProprietaryStringEncoding</code>.</p>
- *
+ *
* <p>Additional encodings available under GNUstep are:
* <code>NSKOI8RStringEncoding, NSISOLatin3StringEncoding,
* NSISOLatin4StringEncoding, NSISOCyrillicStringEncoding,
@@ -213,7 +213,7 @@ typedef enum _NSStringEncoding
NSBIG5StringEncoding, // Traditional chinese
NSKoreanEUCStringEncoding // Korean
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_4,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_4,GS_API_LATEST)
,
NSUTF16BigEndianStringEncoding = 0x90000100,
NSUTF16LittleEndianStringEncoding = 0x94000100,
@@ -227,7 +227,7 @@ enum {
NSOpenStepUnicodeReservedBase = 0xF400
};
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_4,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_4,GS_API_LATEST)
enum {
NSStringEncodingConversionAllowLossy = 1,
NSStringEncodingConversionExternalRepresentation = 2
@@ -302,7 +302,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
encoding: (NSStringEncoding)encoding;
- (id) initWithBytesNoCopy: (void*)bytes
length: (NSUInteger)length
- encoding: (NSStringEncoding)encoding
+ encoding: (NSStringEncoding)encoding
freeWhenDone: (BOOL)flag;
#endif
#if OS_API_VERSION(MAC_OS_X_VERSION_10_4,GS_API_LATEST)
@@ -346,7 +346,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
range: (NSRange)searchRange;
- (NSString*)stringByReplacingOccurrencesOfString: (NSString*)replace
withString: (NSString*)by;
-- (NSString*) stringByReplacingCharactersInRange: (NSRange)aRange
+- (NSString*) stringByReplacingCharactersInRange: (NSRange)aRange
withString: (NSString*)by;
#endif
- (id) initWithCharactersNoCopy: (unichar*)chars
@@ -404,7 +404,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
// Determining Composed Character Sequences
- (NSRange) rangeOfComposedCharacterSequenceAtIndex: (NSUInteger)anIndex;
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_2,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_2,GS_API_LATEST)
/** Returns a copy of the receiver normalised using the KD form.
*/
- (NSString *) decomposedStringWithCompatibilityMapping;
@@ -428,7 +428,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
// Identifying and Comparing Strings
- (NSComparisonResult) compare: (NSString*)aString;
-- (NSComparisonResult) compare: (NSString*)aString
+- (NSComparisonResult) compare: (NSString*)aString
options: (NSUInteger)mask;
- (NSComparisonResult) compare: (NSString*)aString
options: (NSUInteger)mask
@@ -775,9 +775,9 @@ typedef NSUInteger NSStringEncodingConversionOptions;
- (id) initWithContentsOfURL: (NSURL*)url;
- (NSString*) substringWithRange: (NSRange)aRange;
- (NSComparisonResult) caseInsensitiveCompare: (NSString*)aString;
-- (NSComparisonResult) compare: (NSString*)string
- options: (NSUInteger)mask
- range: (NSRange)compareRange
+- (NSComparisonResult) compare: (NSString*)string
+ options: (NSUInteger)mask
+ range: (NSRange)compareRange
locale: (id)locale;
- (NSComparisonResult) localizedCompare: (NSString *)string;
- (NSComparisonResult) localizedCaseInsensitiveCompare: (NSString *)string;
@@ -807,7 +807,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
- (NSString *) stringByRemovingPercentEncoding;
#endif
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_3,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_3,GS_API_LATEST)
/** Not implemented */
- (void) getParagraphStart: (NSUInteger *)startIndex
end: (NSUInteger *)parEndIndex
@@ -817,7 +817,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
- (NSRange) paragraphRangeForRange: (NSRange)range;
#endif
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_5,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_5,GS_API_LATEST)
/**
* Returns YES when scanning the receiver's text from left to right
* finds an initial digit in the range 1-9 or a letter in the set
@@ -840,7 +840,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
#endif
-#if OS_API_VERSION(MAC_OS_X_VERSION_10_10,GS_API_LATEST)
+#if OS_API_VERSION(MAC_OS_X_VERSION_10_10,GS_API_LATEST)
/**
* Returns YES if the receiver contains string, otherwise, NO.
@@ -876,7 +876,7 @@ typedef NSUInteger NSStringEncodingConversionOptions;
- (void) appendString: (NSString*)aString;
- (void) deleteCharactersInRange: (NSRange)range;
- (void) insertString: (NSString*)aString atIndex: (NSUInteger)loc;
-- (void) replaceCharactersInRange: (NSRange)range
+- (void) replaceCharactersInRange: (NSRange)range
withString: (NSString*)aString;
- (NSUInteger) replaceOccurrencesOfString: (NSString*)replace
withString: (NSString*)by
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSValue.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSValue.h
index f194f01a228..2979560b96d 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSValue.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSValue.h
@@ -3,24 +3,24 @@
Written by: Adam Fedor <fedor@boulder.colorado.edu>
Created: 1995
-
+
This file is part of the GNUstep Base Library.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free
Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
Boston, MA 02111 USA.
- */
+ */
#ifndef __NSValue_h_GNUSTEP_BASE_INCLUDE
#define __NSValue_h_GNUSTEP_BASE_INCLUDE
@@ -47,7 +47,7 @@ extern "C" {
*/
@interface NSValue : NSObject <NSCopying, NSCoding>
-// Allocating and Initializing
+// Allocating and Initializing
/**
* Create new instance with specified value (a pointer) of given type, which
@@ -114,7 +114,7 @@ extern "C" {
- (BOOL) isEqualToValue: (NSValue*)other;
#endif /* GS_API_MACOSX */
-// Accessing Data
+// Accessing Data
/**
* Copies bytes from the pointer receiver was initialized with into buffer
@@ -178,7 +178,7 @@ extern "C" {
// Allocating and Initializing
/** New instance from boolean value. */
-+ (NSNumber*) numberWithBool: (BOOL)value;
++ (NSNumber*) numberWithBool: (BOOL)value;
/** New instance from signed char value. */
+ (NSNumber*) numberWithChar: (signed char)value;
/** New instance from double value. */
@@ -231,7 +231,7 @@ extern "C" {
/** Initialize from unsigned short value. */
- (id) initWithUnsignedShort: (unsigned short)value;
-// Accessing Data
+// Accessing Data
/**
* Return value as a BOOL; this will in fact be a char value converted
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSZone.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSZone.h
index 21776f65c3b..0165eb76462 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSZone.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSZone.h
@@ -46,7 +46,7 @@
// Zone statistics (not always maintained).
struct NSZoneStats (*stats)(struct _NSZone *zone);
-
+
size_t gran; // Zone granularity (passed in on initialization)
NSString *name; // Name of zone (default is 'nil')
NSZone *next; // Pointer used for internal management of multiple zones.
@@ -72,7 +72,7 @@ struct _NSZone
BOOL (*check)(struct _NSZone *zone);
BOOL (*lookup)(struct _NSZone *zone, void *ptr);
struct NSZoneStats (*stats)(struct _NSZone *zone);
-
+
size_t gran; // Zone granularity
__unsafe_unretained NSString *name; // Name of zone (default is 'nil')
NSZone *next;
@@ -314,7 +314,7 @@ NSAllocateCollectable(NSUInteger size, NSUInteger options);
/** Reallocate memory to be of a different size and/or to have different
* options settings. The behavior of options is as for
* the NSAllocateCollectable() function.
- */
+ */
GS_EXPORT void *
NSReallocateCollectable(void *ptr, NSUInteger size, NSUInteger options);
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GNUstep.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GNUstep.h
index c3b7f2bd55e..27f943156d6 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GNUstep.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GNUstep.h
@@ -3,24 +3,24 @@
Written by: Nicola Pero <n.pero@mi.flashnet.it>
Date: March, October 2001
-
+
This file is part of GNUstep.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free
Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA.
-*/
+*/
#ifndef __GNUSTEP_GNUSTEP_H_INCLUDED_
#define __GNUSTEP_GNUSTEP_H_INCLUDED_
@@ -36,7 +36,7 @@
/*
* __has_extension has slightly different semantics from __has_feature.
* It evaluates to true if the feature is supported by by clang for the
- * current compilation unit (language and -f switches), regardless of
+ * current compilation unit (language and -f switches), regardless of
* whether it is part of the language standard or just a (non-standard)
* extension.
*/
@@ -58,7 +58,7 @@
#define RETAIN(object) (object)
#endif
#ifndef RELEASE
-#define RELEASE(object)
+#define RELEASE(object)
#endif
#ifndef AUTORELEASE
#define AUTORELEASE(object) (object)
@@ -84,7 +84,7 @@
#define DESTROY(object) object = nil
#endif
-#define IF_NO_GC(X)
+#define IF_NO_GC(X)
#ifndef ENTER_POOL
#define ENTER_POOL @autoreleasepool{do{
@@ -295,7 +295,7 @@ id __object = (object); (__object != nil) ? [__object autorelease] : nil; })
#endif
-
+
/**
* <p>
* This function (macro) is a GNUstep extension.
@@ -362,9 +362,9 @@ id __object = (object); (__object != nil) ? [__object autorelease] : nil; })
* <code>
* NSString *message = GSLocalizedStaticString (@"Hi there",
* @"Greeting");
- *
+ *
* ... some code ...
- *
+ *
* NSLog (NSLocalizedString (message, @""));
* </code>
* </p>
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSConfig.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSConfig.h
index a0e7cc7a409..8194f42a4db 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSConfig.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSConfig.h
@@ -64,7 +64,7 @@
#ifndef __STDC_CONSTANT_MACROS
#define __STDC_CONSTANT_MACROS 1
#endif
-#ifndef __STDC_LIMIT_MACROS
+#ifndef __STDC_LIMIT_MACROS
#define __STDC_LIMIT_MACROS 1
#endif
@@ -196,14 +196,14 @@ typedef gsuaddr gsaddr;
/*
* PTR Limit information replacements for buggy headers
- */
+ */
#if 0
#undef INTPTR_MAX
-#define INTPTR_MAX
+#define INTPTR_MAX
#undef INTPTR_MIN
-#define INTPTR_MIN
+#define INTPTR_MIN
#undef UINTPTR_MAX
-#define UINTPTR_MAX
+#define UINTPTR_MAX
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSObjCRuntime.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSObjCRuntime.h
index 2088ee2e886..2a4c671d291 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSObjCRuntime.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSObjCRuntime.h
@@ -5,19 +5,19 @@
Date: 1995
Written by: Richard Frith-Macdonald <rfm@gnu.org>
Date: 2002
-
+
This file is part of the GNUstep Base Library.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free
Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
@@ -25,7 +25,7 @@
AutogsdocSource: Additions/GSObjCRuntime.m
- */
+ */
#ifndef __GSObjCRuntime_h_GNUSTEP_BASE_INCLUDE
#define __GSObjCRuntime_h_GNUSTEP_BASE_INCLUDE
@@ -451,7 +451,7 @@ GSAutoreleasedBuffer(unsigned size);
GS_EXPORT BOOL
GSPrintf (FILE *fptr, NSString *format, ...);
-\f
+
GS_EXPORT NSArray *
GSObjCAllSubclassesOfClass(Class cls);
@@ -476,7 +476,7 @@ GSLastErrorStr(long error_id) GS_DEPRECATED_FUNC;
#endif
-\f
+
#ifndef GS_MAX_OBJECTS_FROM_STACK
/**
@@ -492,7 +492,7 @@ GSLastErrorStr(long error_id) GS_DEPRECATED_FUNC;
* deallocation when you need to work with a vararg list of objects.<br />
* The objects are unpacked from the vararg list into two 'C' arrays and
* then a code fragment you specify is able to make use of them before
- * that 'C' array is destroyed.
+ * that 'C' array is destroyed.
* </p>
* <p>The firstObject argument is the name of the formal parameter in your
* method or function which precedes the ', ...' denoting variable args.
@@ -572,7 +572,7 @@ GSLastErrorStr(long error_id) GS_DEPRECATED_FUNC;
* deallocation when you need to work with a vararg list of objects.<br />
* The objects are unpacked from the vararg list into a 'C' array and
* then a code fragment you specify is able to make use of them before
- * that 'C' array is destroyed.
+ * that 'C' array is destroyed.
* </p>
* <p>The firstObject argument is the name of the formal parameter in your
* method or function which precedes the ', ...' denoting variable args.
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSVersionMacros.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSVersionMacros.h
index e7cfb5ea880..ed78d3f9648 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSVersionMacros.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/GSVersionMacros.h
@@ -141,7 +141,7 @@
* <p>For OSX compatibility, this macro also supports the use of Apple's
* symbolic constants for version numbering. Their contants are currently
* four digit values (two digits for the major version, one for the minor,
- * and one for the subminor).
+ * and one for the subminor).
* </p>
* <p>The Apple compatibility version macros are currently:
* <ref type="macro" id="MAC_OS_X_VERSION_10_0">MAC_OS_X_VERSION_10_0</ref>,
@@ -262,7 +262,7 @@
#if __clang__
# define GS_UNUSED_IVAR __attribute__((unused))
#else
-# define GS_UNUSED_IVAR
+# define GS_UNUSED_IVAR
#endif
@@ -415,7 +415,7 @@ static inline void gs_consumed(id NS_CONSUMED GS_UNUSED_ARG o) { return; }
#if defined(__clang__) || GS_GCC_MINREQ(4,2)
# define NS_FORMAT_ARGUMENT(A) __attribute__((format_arg(A)))
#else
-# define NS_FORMAT_ARGUMENT(F,A)
+# define NS_FORMAT_ARGUMENT(F,A)
#endif
#endif
@@ -424,7 +424,7 @@ static inline void gs_consumed(id NS_CONSUMED GS_UNUSED_ARG o) { return; }
#if __clang__
# define NS_FORMAT_FUNCTION(F,A) __attribute__((format(__NSString__, F, A)))
#else
-# define NS_FORMAT_FUNCTION(F,A)
+# define NS_FORMAT_FUNCTION(F,A)
#endif
#endif
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSArray+GNUstepBase.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSArray+GNUstepBase.h
index c9b595aa2f6..12c958906e9 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSArray+GNUstepBase.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSArray+GNUstepBase.h
@@ -11,7 +11,7 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
@@ -58,7 +58,7 @@ extern "C" {
* to determine the insertion location for an object. If equal objects
* already exist in the array, they will be located immediately before
* the insertion position.
- * </p>
+ * </p>
* <p>The selector identifies a method returning NSOrderedAscending if
* the receiver is 'less than' the argument, and NSOrderedDescending if
* it is greate.
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSMutableString+GNUstepBase.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSMutableString+GNUstepBase.h
index b3f71909c0c..7d4c81b4c83 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSMutableString+GNUstepBase.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSMutableString+GNUstepBase.h
@@ -11,7 +11,7 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSNumber+GNUstepBase.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSNumber+GNUstepBase.h
index 1bed065303b..4641a6000d8 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSNumber+GNUstepBase.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSNumber+GNUstepBase.h
@@ -11,7 +11,7 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h
index d3b2574341b..7958e462c08 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSObject+GNUstepBase.h
@@ -11,7 +11,7 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
@@ -42,7 +42,7 @@ extern "C" {
/**
WARNING: The -compare: method for NSObject is deprecated
- due to subclasses declaring the same selector with
+ due to subclasses declaring the same selector with
conflicting signatures.
Comparision of arbitrary objects is not just meaningless
but also dangerous as most concrete implementations
@@ -158,7 +158,7 @@ extern "C" {
* set to YES).<br />
* Your class then has two options for performing cleanup when the process
* ends:
- * <p>1. Use the +leak: method to register objects which are simply to be
+ * <p>1. Use the +leak: method to register objects which are simply to be
* retained until the process ends, and then either ignored or released
* depending on the cleanup setting in force. This mechanism is simple
* and should be sufficient for many classes.
diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h
index 48633cde5d7..d9f85e84011 100644
--- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h
+++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/GNUstepBase/NSString+GNUstepBase.h
@@ -11,7 +11,7 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
diff --git a/gcc/testsuite/objc-obj-c++-shared/next-abi.h b/gcc/testsuite/objc-obj-c++-shared/next-abi.h
index 0ffa0fcba17..6d1737e7eeb 100644
--- a/gcc/testsuite/objc-obj-c++-shared/next-abi.h
+++ b/gcc/testsuite/objc-obj-c++-shared/next-abi.h
@@ -40,17 +40,17 @@ along with GCC; see the file COPYING3. If not see
#ifdef __NEXT_RUNTIME__
# if (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1050 || __OBJC2__)
/* We have to use an updated interface for 32bit NeXT to avoid
- * 'deprecated' warnings.
+ * 'deprecated' warnings.
* For 64bit NeXT the ABI is different (and the interfaces 'deprecated'
* for 32bit have been removed).
*/
# define NEXT_OBJC_USE_NEW_INTERFACE 1
# if __OBJC2__ || __LP64__
- /* We have OBJC v2 ABI compiler,
+ /* We have OBJC v2 ABI compiler,
(or, at least, the available NeXT runtime requires one) */
# define NEXT_OBJC_ABI_VERSION 2
# else
- /* We leave it open to define ABI 1 if and when we implement those
+ /* We leave it open to define ABI 1 if and when we implement those
* extensions.
*/
# define NEXT_OBJC_ABI_VERSION 0
diff --git a/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.h b/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.h
index 0068b4a2ae4..d9354821a95 100644
--- a/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.h
+++ b/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class-impl.h
@@ -1,6 +1,6 @@
/* A small NSConstantString implementation for use with the NeXT runtime.
Copyright (C) 2011 Free Software Foundation, Inc.
-
+
Contributed by Iain Sandoe <iains@gcc.gnu.org>
This file is part of GCC.
@@ -26,7 +26,7 @@ along with GCC; see the file COPYING3. If not see
/* On full-fledged Mac OS X systems, NSConstantString is provided
as part of the Foundation framework. However, on bare Darwin systems,
- Foundation is not included, and hence there is no NSConstantString
+ Foundation is not included, and hence there is no NSConstantString
implementation to link against.
This code is derived from the GNU runtime's NXConstantString implementation.
diff --git a/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class.h b/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class.h
index 485e39e6f08..48029fe63a1 100644
--- a/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class.h
+++ b/gcc/testsuite/objc-obj-c++-shared/nsconstantstring-class.h
@@ -23,7 +23,7 @@ along with GCC; see the file COPYING3. If not see
/* On full-fledged Mac OS X systems, NSConstantString is provided
as part of the Foundation framework. However, on bare Darwin systems,
- Foundation is not included, and hence there is no NSConstantString
+ Foundation is not included, and hence there is no NSConstantString
implementation to link against.
This code is derived from the GNU runtime's NXConstantString implementation.
diff --git a/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h b/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h
index 24e5ebab753..879c0a1518b 100644
--- a/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h
+++ b/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h
@@ -597,7 +597,7 @@ objc_layout_structure_next_member (struct objc_struct_layout *layout)
{
int bfld_size = atoi (++type);
int int_align = __alignof__ (int) * BITS_PER_UNIT;
- /* If this bitfield would traverse a word alignment boundary, push it out
+ /* If this bitfield would traverse a word alignment boundary, push it out
to that boundary instead. */
if (layout->record_size % int_align
&& (layout->record_size / int_align
diff --git a/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist.h b/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist.h
index e62944560ec..47b348dd817 100644
--- a/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist.h
+++ b/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-next-encode-assist.h
@@ -30,17 +30,17 @@
#define _C_BYREF 'R'
#define _C_ONEWAY 'V'
#define _C_GCINVISIBLE '!'
-
+
#define _F_CONST 0x01
#define _F_IN 0x01
#define _F_OUT 0x02
#define _F_INOUT 0x03
-#define _F_BYCOPY 0x04
-#define _F_BYREF 0x08
+#define _F_BYCOPY 0x04
+#define _F_BYREF 0x08
#define _F_ONEWAY 0x10
#define _F_GCINVISIBLE 0x20
-/* The NeXT runtimes do not include these functions (at least not through
+/* The NeXT runtimes do not include these functions (at least not through
any public API). They are required for the objc/execute/bf-* and bycopy-3. */
struct objc_struct_layout
@@ -48,7 +48,7 @@ struct objc_struct_layout
const char *original_type;
const char *type;
const char *prev_type;
- unsigned int record_size;
+ unsigned int record_size;
unsigned int record_align;
};
diff --git a/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-types.h b/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-types.h
index 34981edfc77..ba3765254d3 100644
--- a/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-types.h
+++ b/gcc/testsuite/objc-obj-c++-shared/objc-test-suite-types.h
@@ -1,6 +1,6 @@
/* Define test-suite types to minimize conditional test-case source.
Copyright (C) 2011 Free Software Foundation, Inc.
- Contributed by Iain Sandoe
+ Contributed by Iain Sandoe
This file is part of GCC.
diff --git a/gcc/testsuite/objc-obj-c++-shared/runtime.h b/gcc/testsuite/objc-obj-c++-shared/runtime.h
index 4d7d1c30b96..b9269f0736a 100644
--- a/gcc/testsuite/objc-obj-c++-shared/runtime.h
+++ b/gcc/testsuite/objc-obj-c++-shared/runtime.h
@@ -84,7 +84,7 @@ BOOL class_conformsToProtocol (Class class_, Protocol *protocol)
#define protocol_getName(P) [P name]
#define protocol_isEqual(P,Q) [P isEqual: Q]
-struct objc_method_description protocol_getMethodDescription (Protocol *protocol,
+struct objc_method_description protocol_getMethodDescription (Protocol *protocol,
SEL selector,
BOOL requiredMethod,
BOOL instanceMethod)
diff --git a/gcc/testsuite/objc.dg/gnu-encoding/compat-common.h b/gcc/testsuite/objc.dg/gnu-encoding/compat-common.h
index 635e7446d76..6ef8cd39614 100644
--- a/gcc/testsuite/objc.dg/gnu-encoding/compat-common.h
+++ b/gcc/testsuite/objc.dg/gnu-encoding/compat-common.h
@@ -3,7 +3,7 @@
indication of whether each individual check passed or failed.
When DBG is defined, each check is shown by a dot (pass) or 'F'
(fail) rather than aborting as soon as a failure is detected. */
-
+
#ifdef DBG
#include <stdio.h>
#define DEBUG_INIT setbuf (stdout, NULL);
diff --git a/gcc/testsuite/objc/execute/bf-common.h b/gcc/testsuite/objc/execute/bf-common.h
index 43b0d32b7d6..df9bc0fdba5 100644
--- a/gcc/testsuite/objc/execute/bf-common.h
+++ b/gcc/testsuite/objc/execute/bf-common.h
@@ -56,7 +56,7 @@ void compare_structures (Class class, const char* type)
}
i++;
}
-
+
printf ("%d ivars checked\n", i);
}
#else
@@ -107,7 +107,7 @@ void compare_structures (Class class, const char* type)
}
i++;
}
-
+
printf ("%d ivars checked\n", i);
}
#endif
@@ -130,7 +130,7 @@ int main ()
printf ("sizes don't match (computed %d, exact %d)\n", size1, size2);
abort ();
}
-
+
return 0;
}
#include "../../objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h"
diff --git a/gcc/testsuite/objc/execute/class-tests-1.h b/gcc/testsuite/objc/execute/class-tests-1.h
index 65f1f70234e..ae9fdbf4584 100644
--- a/gcc/testsuite/objc/execute/class-tests-1.h
+++ b/gcc/testsuite/objc/execute/class-tests-1.h
@@ -86,21 +86,21 @@ static void test_object_class (Class class)
}
}
-/*
- * Runs all the tests in this file for the specified class
+/*
+ * Runs all the tests in this file for the specified class
*/
-void test_class_with_superclass (const char *class_name,
+void test_class_with_superclass (const char *class_name,
const char *superclass_name)
{
- Class class;
- Class superclass;
+ Class class;
+ Class superclass;
/* class_name must be an existing class */
class = objc_getClass (class_name);
test_is_class (class);
/* But superclass_name can be "", which means `Nil' */
- superclass = objc_getClass (superclass_name);
+ superclass = objc_getClass (superclass_name);
if (superclass != Nil)
{
test_is_class (superclass);
diff --git a/gcc/testsuite/objc/execute/class-tests-2.h b/gcc/testsuite/objc/execute/class-tests-2.h
index 7f6f54000f7..5dd3522b1ce 100644
--- a/gcc/testsuite/objc/execute/class-tests-2.h
+++ b/gcc/testsuite/objc/execute/class-tests-2.h
@@ -5,11 +5,11 @@
/*
* Standard Tests For Methods of Classes and Objects - abort upon
- * failing; return normally if all is well.
+ * failing; return normally if all is well.
*/
/* Test that `class' has an instance method for the selector `selector' */
-void test_that_class_has_instance_method (const char *class_name,
+void test_that_class_has_instance_method (const char *class_name,
SEL selector)
{
Class class = objc_getClass (class_name);
@@ -22,7 +22,7 @@ void test_that_class_has_instance_method (const char *class_name,
}
/* Test that `class' has a class method for the selector `selector' */
-void test_that_class_has_class_method (const char *class_name,
+void test_that_class_has_class_method (const char *class_name,
SEL selector)
{
Class class = objc_getClass (class_name);
@@ -37,7 +37,7 @@ void test_that_class_has_class_method (const char *class_name,
/* Test the accessor methods (called -state and -setState:) on the
object `object'. */
#ifdef TYPE_OF_OBJECT_WITH_ACCESSOR_METHOD
-void test_accessor_method (TYPE_OF_OBJECT_WITH_ACCESSOR_METHOD object,
+void test_accessor_method (TYPE_OF_OBJECT_WITH_ACCESSOR_METHOD object,
int initial_state,
int new_state_0, int expected_result_0,
int new_state_1, int expected_result_1)
@@ -47,20 +47,20 @@ void test_accessor_method (TYPE_OF_OBJECT_WITH_ACCESSOR_METHOD object,
printf ("test_accessor_method (initial state) failed\n");
abort ();
}
-
+
[object setState: new_state_0];
if ([object state] != expected_result_0)
{
printf ("test_accessor_method (new_state_0) failed\n");
abort ();
- }
-
+ }
+
[object setState: new_state_1];
if ([object state] != expected_result_1)
{
printf ("test_accessor_method (new_state_1) failed\n");
abort ();
- }
+ }
}
#endif /* CLASS_WITH_ACCESSOR_METHOD */
diff --git a/gcc/toplev.cc b/gcc/toplev.cc
index 7a379494af3..38454b8f0a3 100644
--- a/gcc/toplev.cc
+++ b/gcc/toplev.cc
@@ -457,7 +457,7 @@ compile_file (void)
if (flag_syntax_only || flag_wpa)
return;
-
+
/* Reset maximum_field_alignment, it can be adjusted by #pragma pack
and this shouldn't influence any types built by the middle-end
from now on (like gcov_info_type). */
@@ -1240,7 +1240,7 @@ process_options (bool no_backend)
global_dc->edit_context_ptr = new edit_context ();
/* Avoid any informative notes in the second run of -fcompare-debug. */
- if (flag_compare_debug)
+ if (flag_compare_debug)
diagnostic_inhibit_notes (global_dc);
if (flag_section_anchors && !target_supports_section_anchors_p ())
@@ -1898,7 +1898,7 @@ target_reinit (void)
to allow target_reinit being called even after prepare_function_start. */
saved_regno_reg_rtx = regno_reg_rtx;
if (saved_regno_reg_rtx)
- {
+ {
saved_x_rtl = *crtl;
memset (crtl, '\0', sizeof (*crtl));
regno_reg_rtx = NULL;
diff --git a/gcc/tracer.cc b/gcc/tracer.cc
index 71a3bb76a8d..5c36b06b009 100644
--- a/gcc/tracer.cc
+++ b/gcc/tracer.cc
@@ -400,7 +400,7 @@ tail_duplicate (void)
return changed;
}
-\f
+
namespace {
const pass_data pass_data_tracer =
diff --git a/gcc/trans-mem.cc b/gcc/trans-mem.cc
index 080b20d7eb6..64461539a1f 100644
--- a/gcc/trans-mem.cc
+++ b/gcc/trans-mem.cc
@@ -153,7 +153,7 @@ static void *expand_regions (struct tm_region *,
void *(*callback)(struct tm_region *, void *),
void *, bool);
-\f
+
/* Return the attributes we want to examine for X, or NULL if it's not
something we examine. We look at function types, but allow pointers
to function types and function decls and peek through. */
@@ -445,7 +445,7 @@ build_tm_abort_call (location_t loc, bool is_outer)
AR_USERABORT
| (is_outer ? AR_OUTERABORT : 0)));
}
-\f
+
/* Map for arbitrary function replacement under TM, as created
by the tm_wrap attribute. */
@@ -561,7 +561,7 @@ tm_malloc_replacement (tree from)
record_tm_replacement (from, to);
}
-\f
+
/* Diagnostics for tm_safe functions/regions. Called by the front end
once we've lowered the function to high-gimple. */
@@ -879,7 +879,7 @@ make_pass_diagnose_tm_blocks (gcc::context *ctxt)
{
return new pass_diagnose_tm_blocks (ctxt);
}
-\f
+
/* Instead of instrumenting thread private memory, we save the
addresses in a log which we later use to save/restore the addresses
upon transaction start/restart.
@@ -1354,7 +1354,7 @@ tm_log_emit_restores (basic_block entry_block, basic_block bb)
}
}
-\f
+
static tree lower_sequence_tm (gimple_stmt_iterator *, bool *,
struct walk_stmt_info *);
static tree lower_sequence_no_tm (gimple_stmt_iterator *, bool *,
@@ -1868,7 +1868,7 @@ make_pass_lower_tm (gcc::context *ctxt)
{
return new pass_lower_tm (ctxt);
}
-\f
+
/* Collect region information for each transaction. */
struct tm_region
@@ -2161,7 +2161,7 @@ make_pass_tm_init (gcc::context *ctxt)
{
return new pass_tm_init (ctxt);
}
-\f
+
/* Add FLAGS to the GIMPLE_TRANSACTION subcode for the transaction region
represented by STATE. */
@@ -2669,7 +2669,7 @@ expand_block_tm (struct tm_region *region, basic_block bb)
uninstrumented code path blocks in the list of basic blocks
returned, false otherwise. */
-static vec<basic_block>
+static vec<basic_block>
get_tm_region_blocks (basic_block entry_block,
bitmap exit_blocks,
bitmap irr_blocks,
@@ -3182,7 +3182,7 @@ make_pass_tm_mark (gcc::context *ctxt)
{
return new pass_tm_mark (ctxt);
}
-\f
+
/* Create an abnormal edge from STMT at iter, splitting the block
as necessary. Adjust *PNEXT as needed for the split block. */
@@ -3371,7 +3371,7 @@ make_pass_tm_edges (gcc::context *ctxt)
{
return new pass_tm_edges (ctxt);
}
-\f
+
/* Helper function for expand_regions. Expand REGION and recurse to
the inner region. Call CALLBACK on each region. CALLBACK returns
NULL to continue the traversal, otherwise a non-null value which
@@ -3424,7 +3424,7 @@ expand_regions (struct tm_region *region,
return retval;
}
-\f
+
/* A unique TM memory operation. */
struct tm_memop
{
@@ -4110,7 +4110,7 @@ make_pass_tm_memopt (gcc::context *ctxt)
return new pass_tm_memopt (ctxt);
}
-\f
+
/* Interprocedual analysis for the creation of transactional clones.
The aim of this pass is to find which functions are referenced in
a non-irrevocable transaction context, and for those over which
diff --git a/gcc/tree-call-cdce.cc b/gcc/tree-call-cdce.cc
index 341b3b9be91..1a6ca915661 100644
--- a/gcc/tree-call-cdce.cc
+++ b/gcc/tree-call-cdce.cc
@@ -36,7 +36,7 @@ along with GCC; see the file COPYING3. If not see
#include "builtins.h"
#include "internal-fn.h"
#include "tree-dfa.h"
-\f
+
/* This pass serves two closely-related purposes:
@@ -189,7 +189,7 @@ check_target_format (tree arg)
return false;
}
-\f
+
/* A helper function to help select calls to pow that are suitable for
conditional DCE transformation. It looks for pow calls that can be
guided with simple conditions. Such calls either have constant base
@@ -381,7 +381,7 @@ can_guard_call_p (gimple *call)
return (!stmt_ends_bb_p (call)
|| find_fallthru_edge (gimple_bb (call)->succs));
}
-\f
+
/* For a comparison code return the comparison code we should use if we don't
HONOR_NANS. */
diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
index 9ecf138cbfd..768036770be 100644
--- a/gcc/tree-cfg.cc
+++ b/gcc/tree-cfg.cc
@@ -3060,7 +3060,7 @@ gimple_split_edge (edge edge_in)
/* Verify properties of the address expression T whose base should be
TREE_ADDRESSABLE if VERIFY_ADDRESSABLE is true. */
-static bool
+static bool
verify_address (tree t, bool verify_addressable)
{
bool old_constant;
@@ -6319,7 +6319,7 @@ gimple_split_block (basic_block bb, void *stmt)
gsi = gsi_for_stmt ((gimple *) stmt);
gsi_next (&gsi);
}
-
+
/* Move everything from GSI to the new basic block. */
if (gsi_end_p (gsi))
return new_bb;
@@ -6514,7 +6514,7 @@ gimple_duplicate_bb (basic_block bb, copy_bb_data *id)
&& (!VAR_P (base) || !DECL_HAS_VALUE_EXPR_P (base)))
DECL_NONSHAREABLE (base) = 1;
}
-
+
/* If requested remap dependence info of cliques brought in
via inlining. */
if (id)
@@ -6784,7 +6784,7 @@ gimple_duplicate_sese_region (edge entry, edge exit,
}
/* Checks if BB is part of the region defined by N_REGION BBS. */
-static bool
+static bool
bb_part_of_region_p (basic_block bb, basic_block* bbs, unsigned n_region)
{
unsigned int n;
@@ -6921,7 +6921,7 @@ gimple_duplicate_sese_tail (edge entry, edge exit,
sorig->probability = exits[1]->probability;
snew = make_edge (switch_bb, nentry_bb, exits[0]->flags);
snew->probability = exits[0]->probability;
-
+
/* Register the new edge from SWITCH_BB in loop exit lists. */
rescan_loop_exit (snew, true, false);
@@ -6936,7 +6936,7 @@ gimple_duplicate_sese_tail (edge entry, edge exit,
e = redirect_edge_and_branch (exits[0], exits[1]->dest);
PENDING_STMT (e) = NULL;
- /* The latch of ORIG_LOOP was copied, and so was the backedge
+ /* The latch of ORIG_LOOP was copied, and so was the backedge
to the original header. We redirect this backedge to EXIT_BB. */
for (i = 0; i < n_region; i++)
if (get_bb_original (region_copy[i]) == orig_loop->latch)
@@ -6955,7 +6955,7 @@ gimple_duplicate_sese_tail (edge entry, edge exit,
}
e = redirect_edge_and_branch (nexits[1], nexits[0]->dest);
PENDING_STMT (e) = NULL;
-
+
/* Anything that is outside of the region, but was dominated by something
inside needs to update dominance info. */
iterate_fix_dominators (CDI_DOMINATORS, doms, false);
@@ -9249,7 +9249,7 @@ struct cfg_hooks gimple_cfg_hooks = {
gimple_lv_add_condition_to_bb, /* lv_add_condition_to_bb */
gimple_lv_adjust_loop_header_phi, /* lv_adjust_loop_header_phi*/
extract_true_false_edges_from_block, /* extract_cond_bb_edges */
- flush_pending_stmts, /* flush_pending_stmts */
+ flush_pending_stmts, /* flush_pending_stmts */
gimple_empty_block_p, /* block_empty_p */
gimple_split_block_before_cond_jump, /* split_block_before_cond_jump */
gimple_account_profile_record,
@@ -9395,7 +9395,7 @@ insert_cond_bb (basic_block bb, gimple *stmt, gimple *cond,
}
-\f
+
/* Given a basic block B which ends with a conditional and has
precisely two successors, determine which of the edges is taken if
the conditional is true and which is taken if the conditional is
@@ -9824,7 +9824,7 @@ maybe_remove_writeonly_store (gimple_stmt_iterator &gsi, gimple *stmt,
bitmap dce_ssa_names)
{
/* Keep access when store has side effect, i.e. in case when source
- is volatile. */
+ is volatile. */
if (!gimple_store_p (stmt)
|| gimple_has_side_effects (stmt)
|| optimize_debug)
diff --git a/gcc/tree-chrec.cc b/gcc/tree-chrec.cc
index f93d8dc406c..d1d0f9ec143 100644
--- a/gcc/tree-chrec.cc
+++ b/gcc/tree-chrec.cc
@@ -132,7 +132,7 @@ chrec_fold_plus_poly_poly (enum tree_code code,
(CHREC_VARIABLE (poly0), left, right);
}
-\f
+
/* Fold the multiplication of two polynomial functions. */
@@ -472,7 +472,7 @@ chrec_fold_multiply (tree type,
}
}
-\f
+
/* Operations. */
@@ -908,7 +908,7 @@ chrec_merge (tree chrec1,
return chrec_dont_know;
}
-\f
+
/* Observers. */
@@ -1406,7 +1406,7 @@ convert_affine_scev (class loop *loop, tree type,
*step = new_step;
return true;
}
-\f
+
/* Convert CHREC for the right hand side of a CHREC.
The increment for a pointer type is always sizetype. */
diff --git a/gcc/tree-chrec.h b/gcc/tree-chrec.h
index 83ec0f58659..226d4abca50 100644
--- a/gcc/tree-chrec.h
+++ b/gcc/tree-chrec.h
@@ -54,7 +54,7 @@ tree_is_chrec (const_tree expr)
return false;
}
-\f
+
enum ev_direction {EV_DIR_GROWS, EV_DIR_DECREASES, EV_DIR_UNKNOWN};
enum ev_direction scev_direction (const_tree);
diff --git a/gcc/tree-complex.cc b/gcc/tree-complex.cc
index ef40511f67d..d1435a1c41a 100644
--- a/gcc/tree-complex.cc
+++ b/gcc/tree-complex.cc
@@ -1820,7 +1820,7 @@ expand_complex_operations_1 (gimple_stmt_iterator *gsi)
}
}
-\f
+
/* Entry point for complex operation lowering during optimization. */
static unsigned int
@@ -1938,7 +1938,7 @@ make_pass_lower_complex (gcc::context *ctxt)
return new pass_lower_complex (ctxt);
}
-\f
+
namespace {
const pass_data pass_data_lower_complex_O0 =
diff --git a/gcc/tree-data-ref.cc b/gcc/tree-data-ref.cc
index 23602518665..703e9c2eced 100644
--- a/gcc/tree-data-ref.cc
+++ b/gcc/tree-data-ref.cc
@@ -164,7 +164,7 @@ ref_contains_union_access_p (tree ref)
return false;
}
-\f
+
/* Dump into FILE all the data references from DATAREFS. */
@@ -3531,7 +3531,7 @@ non_affine_dependence_relation (struct data_dependence_relation *ddr)
DDR_AFFINE_P (ddr) = false;
}
-\f
+
/* This section contains the classic Banerjee tests. */
diff --git a/gcc/tree-data-ref.h b/gcc/tree-data-ref.h
index 50718c0642a..c8d06370830 100644
--- a/gcc/tree-data-ref.h
+++ b/gcc/tree-data-ref.h
@@ -518,7 +518,7 @@ typedef struct data_dependence_relation *ddr_p;
#define DDR_REVERSED_P(DDR) (DDR)->reversed_p
#define DDR_COULD_BE_INDEPENDENT_P(DDR) (DDR)->could_be_independent_p
-\f
+
opt_result dr_analyze_innermost (innermost_loop_behavior *, tree,
class loop *, const gimple *);
extern bool compute_data_dependences_for_loop (class loop *, bool,
diff --git a/gcc/tree-diagnostic.cc b/gcc/tree-diagnostic.cc
index 731e3559cd8..b5386eb0143 100644
--- a/gcc/tree-diagnostic.cc
+++ b/gcc/tree-diagnostic.cc
@@ -187,7 +187,7 @@ maybe_unwind_expanded_macro_loc (diagnostic_context *context,
/* Don't print trace for locations that are reserved or from
within a system header. */
const line_map_ordinary *m = NULL;
- location_t l =
+ location_t l =
linemap_resolve_location (line_table, resolved_def_loc,
LRK_SPELLING_LOCATION, &m);
location_t l0 = l;
@@ -195,7 +195,7 @@ maybe_unwind_expanded_macro_loc (diagnostic_context *context,
l0 = get_location_from_adhoc_loc (line_table, l0);
if (l0 < RESERVED_LOCATION_COUNT || LINEMAP_SYSP (m))
continue;
-
+
/* We need to print the context of the macro definition only
when the locus of the first displayed diagnostic (displayed
before this trace) was inside the definition of the
@@ -203,7 +203,7 @@ maybe_unwind_expanded_macro_loc (diagnostic_context *context,
const int resolved_def_loc_line = SOURCE_LINE (m, l0);
if (ix == 0 && saved_location_line != resolved_def_loc_line)
{
- diagnostic_append_note (context, resolved_def_loc,
+ diagnostic_append_note (context, resolved_def_loc,
"in definition of macro %qs",
linemap_map_get_macro_name (iter->map));
/* At this step, as we've printed the context of the macro
@@ -220,7 +220,7 @@ maybe_unwind_expanded_macro_loc (diagnostic_context *context,
MACRO_MAP_EXPANSION_POINT_LOCATION (iter->map),
LRK_MACRO_DEFINITION_LOCATION, NULL);
- diagnostic_append_note (context, resolved_exp_loc,
+ diagnostic_append_note (context, resolved_exp_loc,
"in expansion of macro %qs",
linemap_map_get_macro_name (iter->map));
}
diff --git a/gcc/tree-eh.cc b/gcc/tree-eh.cc
index 41cf57d2b30..27e5201ef86 100644
--- a/gcc/tree-eh.cc
+++ b/gcc/tree-eh.cc
@@ -2230,7 +2230,7 @@ make_pass_lower_eh (gcc::context *ctxt)
{
return new pass_lower_eh (ctxt);
}
-\f
+
/* Create the multiple edges from an EH_DISPATCH statement to all of
the possible handlers for its EH region. Return true if there's
no fallthru edge; false if there is. */
@@ -2430,7 +2430,7 @@ redirect_eh_dispatch_edge (geh_dispatch *stmt, edge e, basic_block new_bb)
gcc_assert (any_changed);
}
-\f
+
/* Helper function for operation_could_trap_p and stmt_could_throw_p. */
bool
@@ -3136,7 +3136,7 @@ maybe_duplicate_eh_stmt (gimple *new_stmt, gimple *old_stmt)
add_stmt_to_eh_lp (new_stmt, lp_nr);
return true;
}
-\f
+
/* Returns TRUE if oneh and twoh are exception handlers (gimple_try_cleanup of
GIMPLE_TRY) that are similar enough to be considered the same. Currently
this only handles handlers consisting of a single call, as that's the
@@ -3311,7 +3311,7 @@ make_pass_refactor_eh (gcc::context *ctxt)
{
return new pass_refactor_eh (ctxt);
}
-\f
+
/* At the end of gimple optimization, we can lower RESX. */
static bool
@@ -3750,7 +3750,7 @@ sink_clobbers (basic_block bb,
return todo;
}
-/* At the end of inlining, we can lower EH_DISPATCH. Return true when
+/* At the end of inlining, we can lower EH_DISPATCH. Return true when
we have found some duplicate labels and removed some edges. */
static bool
@@ -3799,10 +3799,10 @@ lower_eh_dispatch (basic_block src, geh_dispatch *stmt)
}
do
{
- /* Filter out duplicate labels that arise when this handler
- is shadowed by an earlier one. When no labels are
- attached to the handler anymore, we remove
- the corresponding edge and then we delete unreachable
+ /* Filter out duplicate labels that arise when this handler
+ is shadowed by an earlier one. When no labels are
+ attached to the handler anymore, we remove
+ the corresponding edge and then we delete unreachable
blocks at the end of this pass. */
if (! seen_values.contains (TREE_VALUE (flt_node)))
{
@@ -4007,10 +4007,10 @@ make_pass_lower_eh_dispatch (gcc::context *ctxt)
{
return new pass_lower_eh_dispatch (ctxt);
}
-\f
+
/* Walk statements, see what regions and, optionally, landing pads
are really referenced.
-
+
Returns in R_REACHABLEP an sbitmap with bits set for reachable regions,
and in LP_REACHABLE an sbitmap with bits set for reachable landing pads.
@@ -4896,7 +4896,7 @@ make_pass_cleanup_eh (gcc::context *ctxt)
{
return new pass_cleanup_eh (ctxt);
}
-\f
+
/* Disable warnings about missing quoting in GCC diagnostics for
the verification errors. Their format strings don't follow GCC
diagnostic conventions but are only used for debugging. */
diff --git a/gcc/tree-emutls.cc b/gcc/tree-emutls.cc
index eb3ac9bd2da..09c331c98da 100644
--- a/gcc/tree-emutls.cc
+++ b/gcc/tree-emutls.cc
@@ -339,7 +339,7 @@ new_emutls_decl (tree decl, tree alias_of)
varpool_node::get_create (to);
else if (!alias_of)
varpool_node::add (to);
- else
+ else
{
varpool_node *n;
varpool_node *t = varpool_node::get_for_asmname
@@ -355,7 +355,7 @@ new_emutls_decl (tree decl, tree alias_of)
This only needs to happen for TLS COMMON variables; non-COMMON
variables can be initialized statically. Insert the generated
call statement at the end of PSTMTS. */
-
+
static void
emutls_common_1 (tree tls_decl, tree control_decl, tree *pstmts)
{
@@ -648,7 +648,7 @@ lower_emutls_function_body (struct cgraph_node *node)
{
unsigned int i, nedge;
- /* Lower each of the PHI nodes of the block, as we may have
+ /* Lower each of the PHI nodes of the block, as we may have
propagated &tlsvar into a PHI argument. These loops are
arranged so that we process each edge at once, and each
PHI argument for that edge. */
diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc
index b19eebd2dfb..98fe37f524a 100644
--- a/gcc/tree-if-conv.cc
+++ b/gcc/tree-if-conv.cc
@@ -499,7 +499,7 @@ fold_build_cond_expr (tree type, tree cond, tree rhs, tree lhs)
/* Add condition NC to the predicate list of basic block BB. LOOP is
the loop to be if-converted. Use predicate of cd-equivalent block
- for join bb if it exists: we call basic blocks bb1 and bb2
+ for join bb if it exists: we call basic blocks bb1 and bb2
cd-equivalent if they are executed under the same condition. */
static inline void
@@ -2745,7 +2745,7 @@ combine_blocks (class loop *loop)
}
if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (gimple_phi_result (vphi)))
SSA_NAME_OCCURS_IN_ABNORMAL_PHI (last_vdef) = 1;
- gsi = gsi_for_stmt (vphi);
+ gsi = gsi_for_stmt (vphi);
remove_phi_node (&gsi, true);
}
@@ -2810,7 +2810,7 @@ combine_blocks (class loop *loop)
}
if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (gimple_phi_result (vphi)))
SSA_NAME_OCCURS_IN_ABNORMAL_PHI (last_vdef) = 1;
- gimple_stmt_iterator gsi = gsi_for_stmt (vphi);
+ gimple_stmt_iterator gsi = gsi_for_stmt (vphi);
remove_phi_node (&gsi, true);
}
}
@@ -2883,7 +2883,7 @@ combine_blocks (class loop *loop)
will be if-converted, the new copy of the loop will not,
and the LOOP_VECTORIZED internal call will be guarding which
loop to execute. The vectorizer pass will fold this
- internal call into either true or false.
+ internal call into either true or false.
Note that this function intentionally invalidates profile. Both edges
out of LOOP_VECTORIZED must have 100% probability so the profile remains
diff --git a/gcc/tree-inline.cc b/gcc/tree-inline.cc
index 6cb298180bc..9b99e2c2e9c 100644
--- a/gcc/tree-inline.cc
+++ b/gcc/tree-inline.cc
@@ -779,7 +779,7 @@ remap_decls (tree decls, vec<tree, va_gc> **nonlocalized_list,
gcc_assert (DECL_P (new_var));
DECL_CHAIN (new_var) = new_decls;
new_decls = new_var;
-
+
/* Also copy value-expressions. */
if (VAR_P (new_var) && DECL_HAS_VALUE_EXPR_P (new_var))
{
@@ -1805,7 +1805,7 @@ remap_gimple_stmt (gimple *stmt, copy_body_data *id)
return NULL;
}
}
-
+
/* We do not allow CLOBBERs of handled components. In case
returned value is stored via such handled component, remove
the clobber so stmt verifier is happy. */
@@ -2627,7 +2627,7 @@ copy_edges_for_bb (basic_block bb, profile_count num, profile_count den,
(basic_block) old_edge->dest->aux))
&& (e->flags & EDGE_EH))
e->probability = old_edge->probability;
-
+
FOR_EACH_EDGE (e, ei, copy_stmt_bb->succs)
if (e->flags & EDGE_EH)
{
@@ -3838,7 +3838,7 @@ declare_return_variable (copy_body_data *id, tree return_slot, tree modify_dest,
done:
/* Register the VAR_DECL as the equivalent for the RESULT_DECL; that
way, when the RESULT_DECL is encountered, it will be
- automatically replaced by the VAR_DECL.
+ automatically replaced by the VAR_DECL.
When returning by reference, ensure that RESULT_DECL remaps to
gimple_val. */
@@ -4076,7 +4076,7 @@ inline_forbidden_p (tree fndecl)
return forbidden_p;
}
-\f
+
/* Return false if the function FNDECL cannot be inlined on account of its
attributes, true otherwise. */
static bool
diff --git a/gcc/tree-into-ssa.cc b/gcc/tree-into-ssa.cc
index 067d29698f9..01a4b560578 100644
--- a/gcc/tree-into-ssa.cc
+++ b/gcc/tree-into-ssa.cc
@@ -200,7 +200,7 @@ var_info_hasher::equal (const value_type &p1, const compare_type &p2)
}
-/* Each entry in VAR_INFOS contains an element of type STRUCT
+/* Each entry in VAR_INFOS contains an element of type STRUCT
VAR_INFO_D. */
static hash_table<var_info_hasher> *var_infos;
@@ -1421,7 +1421,7 @@ rewrite_stmt (gimple_stmt_iterator *si)
/* Do not insert debug stmts if the stmt ends the BB. */
if (stmt_ends_bb_p (stmt))
continue;
-
+
tracked_var = target_for_debug_bind (var);
if (tracked_var)
{
diff --git a/gcc/tree-loop-distribution.cc b/gcc/tree-loop-distribution.cc
index 431bd45c522..99db5d7e05c 100644
--- a/gcc/tree-loop-distribution.cc
+++ b/gcc/tree-loop-distribution.cc
@@ -703,7 +703,7 @@ bb_top_order_cmp_r (const void *x, const void *y, void *loop)
|| _loop->get_bb_top_order_index(bb1->index)
!= _loop->get_bb_top_order_index(bb2->index));
- return (_loop->get_bb_top_order_index(bb1->index) -
+ return (_loop->get_bb_top_order_index(bb1->index) -
_loop->get_bb_top_order_index(bb2->index));
}
@@ -1352,7 +1352,7 @@ destroy_loop (class loop *loop)
/* Generates code for PARTITION. Return whether LOOP needs to be destroyed. */
-static bool
+static bool
generate_code_for_partition (class loop *loop,
partition *partition, bool copy_p,
bool keep_lc_phis_p)
diff --git a/gcc/tree-outof-ssa.cc b/gcc/tree-outof-ssa.cc
index 0bf57a4bbc5..d7d835e0c83 100644
--- a/gcc/tree-outof-ssa.cc
+++ b/gcc/tree-outof-ssa.cc
@@ -562,7 +562,7 @@ static inline bool
queue_phi_copy_p (var_map map, tree t)
{
if (TREE_CODE (t) == SSA_NAME)
- {
+ {
if (var_to_partition (map, t) == NO_PARTITION)
return true;
return false;
diff --git a/gcc/tree-parloops.cc b/gcc/tree-parloops.cc
index 4f92c4be7d3..196d57271ec 100644
--- a/gcc/tree-parloops.cc
+++ b/gcc/tree-parloops.cc
@@ -1,6 +1,6 @@
/* Loop autoparallelization.
Copyright (C) 2006-2023 Free Software Foundation, Inc.
- Contributed by Sebastian Pop <pop@cri.ensmp.fr>
+ Contributed by Sebastian Pop <pop@cri.ensmp.fr>
Zdenek Dvorak <dvorakz@suse.cz> and Razya Ladelsky <razya@il.ibm.com>.
This file is part of GCC.
@@ -81,8 +81,8 @@ along with GCC; see the file COPYING3. If not see
-- if there are several parallelizable loops in a function, it may be
possible to generate the threads just once (using synchronization to
ensure that cross-loop dependences are obeyed).
- -- handling of common reduction patterns for outer loops.
-
+ -- handling of common reduction patterns for outer loops.
+
More info can also be found at http://gcc.gnu.org/wiki/AutoParInGCC */
/*
Reduction handling:
@@ -3031,12 +3031,12 @@ gen_parallel_loop (class loop *loop,
/* We should compute a better number-of-iterations value for outer loops.
That is, if we have
-
+
for (i = 0; i < n; ++i)
for (j = 0; j < m; ++j)
...
- we should compute nit = n * m, not nit = n.
+ we should compute nit = n * m, not nit = n.
Also may_be_zero handling would need to be adjusted. */
type = TREE_TYPE (niter->niter);
diff --git a/gcc/tree-predcom.cc b/gcc/tree-predcom.cc
index f85588c722f..95233a1aab3 100644
--- a/gcc/tree-predcom.cc
+++ b/gcc/tree-predcom.cc
@@ -3181,7 +3181,7 @@ pcom_worker::prepare_initializers_chain (chain_p chain)
continue;
gcc_assert (laref->distance > 0);
- chain->inits[n - laref->distance]
+ chain->inits[n - laref->distance]
= PHI_ARG_DEF_FROM_EDGE (laref->stmt, entry);
}
diff --git a/gcc/tree-pretty-print.cc b/gcc/tree-pretty-print.cc
index 7947f9647a1..57e8b4e1ffb 100644
--- a/gcc/tree-pretty-print.cc
+++ b/gcc/tree-pretty-print.cc
@@ -3453,7 +3453,7 @@ dump_generic_node (pretty_printer *pp, tree node, int spc, dump_flags_t flags,
dump_generic_node (pp, TREE_OPERAND (node, 2), spc, flags, false);
pp_string (pp, " > ");
break;
-
+
case VEC_PERM_EXPR:
pp_string (pp, " VEC_PERM_EXPR < ");
dump_generic_node (pp, TREE_OPERAND (node, 0), spc, flags, false);
diff --git a/gcc/tree-scalar-evolution.cc b/gcc/tree-scalar-evolution.cc
index 1410c1ac13f..8bc01479f05 100644
--- a/gcc/tree-scalar-evolution.cc
+++ b/gcc/tree-scalar-evolution.cc
@@ -311,7 +311,7 @@ struct scev_info_hasher : ggc_ptr_hash<scev_info_str>
static GTY (()) hash_table<scev_info_hasher> *scalar_evolution_info;
-\f
+
/* Constructs a new SCEV_INFO_STR structure for VAR and INSTANTIATED_BELOW. */
static inline struct scev_info_str *
@@ -577,7 +577,7 @@ get_scalar_evolution (basic_block instantiated_below, tree scalar)
return res;
}
-\f
+
/* Depth first search algorithm. */
enum t_bool {
@@ -1280,7 +1280,7 @@ scev_dfs::follow_ssa_edge_expr (gimple *at_stmt, tree expr,
return t_false;
}
}
-\f
+
/* This section selects the loops that will be good candidates for the
scalar evolution analysis. For the moment, greedily select all the
@@ -1317,7 +1317,7 @@ get_loop_exit_condition (const class loop *loop)
return res;
}
-\f
+
/* Simplify PEELED_CHREC represented by (init_cond, arg) in LOOP.
Handle below case and return the corresponding POLYNOMIAL_CHREC:
@@ -1919,7 +1919,7 @@ interpret_gimple_assign (class loop *loop, gimple *stmt)
gimple_assign_rhs2 (stmt));
}
-\f
+
/* This section contains all the entry points:
- number_of_iterations_in_loop,
@@ -2838,7 +2838,7 @@ number_of_latch_executions (class loop *loop)
loop->nb_iterations = res;
return res;
}
-\f
+
/* Counters for the stats. */
@@ -2970,7 +2970,7 @@ gather_stats_on_scev_database (void)
dump_chrecs_stats (dump_file, &stats);
}
-\f
+
/* Initialize the analysis of scalar evolutions for LOOPS. */
void
diff --git a/gcc/tree-sra.cc b/gcc/tree-sra.cc
index f0182a45485..1cc1ed83707 100644
--- a/gcc/tree-sra.cc
+++ b/gcc/tree-sra.cc
@@ -1898,7 +1898,7 @@ maybe_add_sra_candidate (tree var)
const char *msg;
tree_node **slot;
- if (!AGGREGATE_TYPE_P (type))
+ if (!AGGREGATE_TYPE_P (type))
{
reject (var, "not aggregate");
return false;
diff --git a/gcc/tree-ssa-alias.cc b/gcc/tree-ssa-alias.cc
index b8f107dfa52..27eaf63e7a0 100644
--- a/gcc/tree-ssa-alias.cc
+++ b/gcc/tree-ssa-alias.cc
@@ -1205,7 +1205,7 @@ access_path_may_continue_p (tree ref_type1, bool end_struct_past_end1,
/* Determine if the two component references REF1 and REF2 which are
based on access types TYPE1 and TYPE2 and of which at least one is based
- on an indirect reference may alias.
+ on an indirect reference may alias.
REF1_ALIAS_SET, BASE1_ALIAS_SET, REF2_ALIAS_SET and BASE2_ALIAS_SET
are the respective alias sets. */
@@ -1328,7 +1328,7 @@ aliasing_component_refs_p (tree ref1,
}
/* If we didn't find a common base, try the other way around. */
- if (cmp_outer <= 0
+ if (cmp_outer <= 0
|| (end_struct_ref1
&& compare_type_sizes (TREE_TYPE (end_struct_ref1), type1) <= 0))
{
@@ -1377,7 +1377,7 @@ aliasing_component_refs_p (tree ref1,
We do not assume that the containers of FIELD1 and FIELD2 are of the
same type or size.
- Return 0 in case the base address of component_refs are same then
+ Return 0 in case the base address of component_refs are same then
FIELD1 and FIELD2 have same address. Note that FIELD1 and FIELD2
may not be of same type or size.
@@ -1409,7 +1409,7 @@ nonoverlapping_component_refs_p_1 (const_tree field1, const_tree field2)
/* ??? Bitfields can overlap at RTL level so punt on them.
FIXME: RTL expansion should be fixed by adjusting the access path
- when producing MEM_ATTRs for MEMs which are wider than
+ when producing MEM_ATTRs for MEMs which are wider than
the bitfields similarly as done in set_mem_attrs_minus_bitpos. */
if (DECL_BIT_FIELD (field1) && DECL_BIT_FIELD (field2))
return -1;
@@ -1848,7 +1848,7 @@ ncr_type_uid (const_tree field)
as the Fortran compiler smuggles type punning into COMPONENT_REFs
for common blocks instead of using unions like everyone else. */
tree type = DECL_FIELD_CONTEXT (field);
- /* With LTO types considered same_type_for_tbaa_p
+ /* With LTO types considered same_type_for_tbaa_p
from different translation unit may not have same
main variant. They however have same TYPE_CANONICAL. */
if (TYPE_CANONICAL (type))
@@ -2032,7 +2032,7 @@ decl_refs_may_alias_p (tree ref1, tree base1,
&& nonoverlapping_refs_since_match_p (NULL, ref1, NULL, ref2, false) == 1)
return false;
- return true;
+ return true;
}
/* Return true if access with BASE is view converted.
@@ -2120,7 +2120,7 @@ indirect_ref_may_alias_decl_p (tree ref1 ATTRIBUTE_UNUSED, tree base1,
use the usual conflict check rather than a subset test.
??? We could introduce -fvery-strict-aliasing when the language
does not allow decls to have a dynamic type that differs from their
- static type. Then we can check
+ static type. Then we can check
!alias_set_subset_of (base1_alias_set, base2_alias_set) instead. */
if (base1_alias_set != base2_alias_set
&& !alias_sets_conflict_p (base1_alias_set, base2_alias_set))
@@ -3420,7 +3420,7 @@ stmt_kills_ref_p (gimple *stmt, ao_ref *ref)
if (res)
break;
/* Remember if we drop an array-ref that we need to
- double-check not being at struct end. */
+ double-check not being at struct end. */
if (TREE_CODE (base) == ARRAY_REF
|| TREE_CODE (base) == ARRAY_RANGE_REF)
innermost_dropped_array_ref = base;
diff --git a/gcc/tree-ssa-ccp.cc b/gcc/tree-ssa-ccp.cc
index 03a984f2adf..0fcf2766957 100644
--- a/gcc/tree-ssa-ccp.cc
+++ b/gcc/tree-ssa-ccp.cc
@@ -247,12 +247,12 @@ debug_lattice_value (ccp_prop_value_t val)
fprintf (stderr, "\n");
}
-/* Extend NONZERO_BITS to a full mask, based on sgn. */
+/* Extend NONZERO_BITS to a full mask, based on sgn. */
static widest_int
extend_mask (const wide_int &nonzero_bits, signop sgn)
{
- return widest_int::from (nonzero_bits, sgn);
+ return widest_int::from (nonzero_bits, sgn);
}
/* Compute a default value for variable VAR and store it in the
@@ -976,7 +976,7 @@ ccp_folder::value_of_expr (tree op, gimple *)
Return TRUE when something was optimized. */
static bool
-ccp_finalize (bool nonzero_p)
+ccp_finalize (bool nonzero_p)
{
bool something_changed;
unsigned i;
@@ -1321,7 +1321,7 @@ value_mask_to_min_max (widest_int *min, widest_int *max,
the value, mask pair *VAL and *MASK to the result. */
void
-bit_value_unop (enum tree_code code, signop type_sgn, int type_precision,
+bit_value_unop (enum tree_code code, signop type_sgn, int type_precision,
widest_int *val, widest_int *mask,
signop rtype_sgn, int rtype_precision,
const widest_int &rval, const widest_int &rmask)
@@ -1483,7 +1483,7 @@ static const unsigned char gray_code_bit_flips[63] = {
and R2TYPE and set the value, mask pair *VAL and *MASK to the result. */
void
-bit_value_binop (enum tree_code code, signop sgn, int width,
+bit_value_binop (enum tree_code code, signop sgn, int width,
widest_int *val, widest_int *mask,
signop r1type_sgn, int r1type_precision,
const widest_int &r1val, const widest_int &r1mask,
diff --git a/gcc/tree-ssa-coalesce.cc b/gcc/tree-ssa-coalesce.cc
index 6e8c39076ca..ad1f798bb92 100644
--- a/gcc/tree-ssa-coalesce.cc
+++ b/gcc/tree-ssa-coalesce.cc
@@ -1498,7 +1498,7 @@ dump_part_var_map (FILE *f, partition part, var_map map)
/* Given SSA_NAMEs NAME1 and NAME2, return true if they are candidates for
coalescing together, false otherwise.
- This must stay consistent with compute_samebase_partition_bases and
+ This must stay consistent with compute_samebase_partition_bases and
compute_optimized_partition_bases. */
bool
diff --git a/gcc/tree-ssa-dom.cc b/gcc/tree-ssa-dom.cc
index 32769c2068a..49de67a2eb3 100644
--- a/gcc/tree-ssa-dom.cc
+++ b/gcc/tree-ssa-dom.cc
@@ -570,7 +570,7 @@ record_edge_info (basic_block bb)
/* Special case comparing booleans against a constant as we
know the value of OP0 on both arms of the branch. i.e., we
- can record an equivalence for OP0 rather than COND.
+ can record an equivalence for OP0 rather than COND.
However, don't do this if the constant isn't zero or one.
Such conditionals will get optimized more thoroughly during
@@ -1839,7 +1839,7 @@ eliminate_redundant_computations (gimple_stmt_iterator* gsi,
/* STMT, a GIMPLE_ASSIGN, may create certain equivalences, in either
the available expressions table or the const_and_copies table.
- Detect and record those equivalences into AVAIL_EXPRS_STACK.
+ Detect and record those equivalences into AVAIL_EXPRS_STACK.
We handle only very simple copy equivalences here. The heavy
lifing is done by eliminate_redundant_computations. */
diff --git a/gcc/tree-ssa-dse.h b/gcc/tree-ssa-dse.h
index 14e5a384c0d..65a8d135a8e 100644
--- a/gcc/tree-ssa-dse.h
+++ b/gcc/tree-ssa-dse.h
@@ -1,4 +1,4 @@
-/* Support routines for dead store elimination.
+/* Support routines for dead store elimination.
Copyright (C) 2019-2023 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc
index 0a7e95683ce..d36fb905828 100644
--- a/gcc/tree-ssa-forwprop.cc
+++ b/gcc/tree-ssa-forwprop.cc
@@ -479,7 +479,7 @@ forward_propagate_into_comparison_1 (gimple *stmt,
Returns 1 if the stmt was modified and 2 if the CFG needs cleanup,
otherwise returns 0. */
-static int
+static int
forward_propagate_into_comparison (gimple_stmt_iterator *gsi)
{
gimple *stmt = gsi_stmt (*gsi);
@@ -1026,7 +1026,7 @@ simplify_gimple_switch_label_vec (gswitch *stmt, tree index_type)
}
else
ei_next (&ei);
- }
+ }
BITMAP_FREE (target_blocks);
}
}
@@ -1794,7 +1794,7 @@ defcodefor_name (tree name, enum tree_code *code, tree *arg1, tree *arg2)
if (code1 == SSA_NAME)
{
def = SSA_NAME_DEF_STMT (name);
-
+
if (def && is_gimple_assign (def)
&& can_propagate_from (def))
{
@@ -2333,7 +2333,7 @@ simplify_count_trailing_zeroes (gimple_stmt_iterator *gsi)
/* Combine an element access with a shuffle. Returns true if there were
any changes made, else it returns false. */
-
+
static bool
simplify_bitfield_ref (gimple_stmt_iterator *gsi)
{
@@ -2467,7 +2467,7 @@ is_combined_permutation_identity (tree mask1, tree mask2)
/* Combine a shuffle with its arguments. Returns 1 if there were any
changes made, 2 if cfg-cleanup needs to run. Else it returns 0. */
-
+
static int
simplify_permutation (gimple_stmt_iterator *gsi)
{
diff --git a/gcc/tree-ssa-ifcombine.cc b/gcc/tree-ssa-ifcombine.cc
index 58a2281eff9..0e53c51f4b9 100644
--- a/gcc/tree-ssa-ifcombine.cc
+++ b/gcc/tree-ssa-ifcombine.cc
@@ -364,7 +364,7 @@ update_profile_after_ifcombine (basic_block inner_cond_bb,
: EDGE_SUCC (outer_cond_bb, 0));
edge inner_taken = EDGE_SUCC (inner_cond_bb, 0);
edge inner_not_taken = EDGE_SUCC (inner_cond_bb, 1);
-
+
if (inner_taken->dest != outer2->dest)
std::swap (inner_taken, inner_not_taken);
gcc_assert (inner_taken->dest == outer2->dest);
@@ -613,7 +613,7 @@ ifcombine_ifandif (basic_block inner_cond_bb, bool inner_inv,
boolean_type_node,
gimple_cond_lhs (outer_cond),
gimple_cond_rhs (outer_cond));
- t = fold_build2_loc (gimple_location (inner_cond),
+ t = fold_build2_loc (gimple_location (inner_cond),
TRUTH_AND_EXPR, boolean_type_node, t1, t2);
if (result_inv)
{
diff --git a/gcc/tree-ssa-live.cc b/gcc/tree-ssa-live.cc
index c179444e8e1..8a912bd88fa 100644
--- a/gcc/tree-ssa-live.cc
+++ b/gcc/tree-ssa-live.cc
@@ -1251,7 +1251,7 @@ calculate_live_ranges (var_map map, bool want_livein)
return live;
}
-\f
+
/* Data structure for compute_live_vars* functions. */
struct compute_live_vars_data {
@@ -1393,7 +1393,7 @@ destroy_live_vars (vec<bitmap_head> &active)
active.release ();
}
-\f
+
/* Output partition map MAP to file F. */
void
diff --git a/gcc/tree-ssa-loop-ch.cc b/gcc/tree-ssa-loop-ch.cc
index ddf025c0cfd..3d0d09d6489 100644
--- a/gcc/tree-ssa-loop-ch.cc
+++ b/gcc/tree-ssa-loop-ch.cc
@@ -324,7 +324,7 @@ public:
/* opt_pass methods: */
bool gate (function *) final override { return flag_tree_ch != 0; }
-
+
/* Initialize and finalize loop structures, copying headers inbetween. */
unsigned int execute (function *) final override;
@@ -364,7 +364,7 @@ public:
return flag_tree_ch != 0
&& (flag_tree_loop_vectorize != 0 || fun->has_force_vectorize_loops);
}
-
+
/* Just copy headers, no initialization/finalization of loop structures. */
unsigned int execute (function *) final override;
@@ -605,7 +605,7 @@ pass_ch::execute (function *fun)
/* Assume an earlier phase has already initialized all the loop structures that
we need here (and perhaps others too), and that these will be finalized by
a later phase. */
-
+
unsigned int
pass_ch_vect::execute (function *fun)
{
diff --git a/gcc/tree-ssa-loop-im.cc b/gcc/tree-ssa-loop-im.cc
index 784f6f04e7d..07693d63725 100644
--- a/gcc/tree-ssa-loop-im.cc
+++ b/gcc/tree-ssa-loop-im.cc
@@ -1634,7 +1634,7 @@ gather_mem_refs_stmt (class loop *loop, gimple *stmt)
aor.max_size = saved_maxsize;
if (*slot)
{
- if (!(*slot)->ref_canonical
+ if (!(*slot)->ref_canonical
&& !operand_equal_p (*mem, (*slot)->mem.ref, 0))
{
/* If we didn't yet canonicalize the hashtable ref (which
@@ -2007,7 +2007,7 @@ first_mem_ref_loc (class loop *loop, im_mem_ref *ref)
MEM = lsm; <-- (X)
In case MEM and TMP_VAR are NULL the function will return the then
- block so the caller can insert (X) and other related stmts.
+ block so the caller can insert (X) and other related stmts.
*/
static basic_block
diff --git a/gcc/tree-ssa-loop-ivcanon.cc b/gcc/tree-ssa-loop-ivcanon.cc
index ddc31a82fdc..0427d244861 100644
--- a/gcc/tree-ssa-loop-ivcanon.cc
+++ b/gcc/tree-ssa-loop-ivcanon.cc
@@ -142,7 +142,7 @@ struct loop_size
instructions after exit are not executed. */
int last_iteration;
int last_iteration_eliminated_by_peeling;
-
+
/* If some IV computation will become constant. */
bool constant_iv;
@@ -207,7 +207,7 @@ constant_after_peeling (tree op, gimple *stmt, class loop *loop)
iteration of the loop.
EDGE_TO_CANCEL (if non-NULL) is an non-exit edge eliminated in the last iteration
of loop.
- Return results in SIZE, estimate benefits for complete unrolling exiting by EXIT.
+ Return results in SIZE, estimate benefits for complete unrolling exiting by EXIT.
Stop estimating after UPPER_BOUND is met. Return true in this case. */
static bool
@@ -417,8 +417,8 @@ estimated_unrolled_size (struct loop_size *size,
/* Loop LOOP is known to not loop. See if there is an edge in the loop
body that can be remove to make the loop to always exit and at
- the same time it does not make any code potentially executed
- during the last iteration dead.
+ the same time it does not make any code potentially executed
+ during the last iteration dead.
After complete unrolling we still may get rid of the conditional
on the exit in the last copy even if we have no idea what it does.
@@ -580,7 +580,7 @@ remove_redundant_iv_tests (class loop *loop)
|| !wi::ltu_p (loop->nb_iterations_upper_bound,
wi::to_widest (niter.niter)))
continue;
-
+
if (dump_file && (dump_flags & TDF_DETAILS))
{
fprintf (dump_file, "Removed pointless exit: ");
@@ -607,14 +607,14 @@ static vec<edge> edges_to_remove;
static bitmap peeled_loops;
/* Cancel all fully unrolled loops by putting __builtin_unreachable
- on the latch edge.
+ on the latch edge.
We do it after all unrolling since unlooping moves basic blocks
across loop boundaries trashing loop closed SSA form as well
- as SCEV info needed to be intact during unrolling.
+ as SCEV info needed to be intact during unrolling.
IRRED_INVALIDATED is used to bookkeep if information about
irreducible regions may become invalid as a result
- of the transformation.
+ of the transformation.
LOOP_CLOSED_SSA_INVALIDATED is used to bookkepp the case
when we need to go into loop closed SSA form. */
@@ -695,12 +695,12 @@ try_unroll_loop_completely (class loop *loop,
/* See if we proved number of iterations to be low constant.
- EXIT is an edge that will be removed in all but last iteration of
+ EXIT is an edge that will be removed in all but last iteration of
the loop.
EDGE_TO_CACNEL is an edge that will be removed from the last iteration
of the unrolled sequence and is expected to make the final loop not
- rolling.
+ rolling.
If the number of execution of loop is determined by standard induction
variable test, then EXIT and EDGE_TO_CANCEL are the two edges leaving
@@ -983,7 +983,7 @@ estimated_peeled_sequence_size (struct loop_size *size,
/* If the loop is expected to iterate N times and is
small enough, duplicate the loop body N+1 times before
the loop itself. This way the hot path will never
- enter the loop.
+ enter the loop.
Parameters are the same as for try_unroll_loops_completely */
static bool
@@ -1600,7 +1600,7 @@ pass_complete_unroll::execute (function *fun)
re-peeling the same loop multiple times. */
if (flag_peel_loops)
peeled_loops = BITMAP_ALLOC (NULL);
- unsigned int val = tree_unroll_loops_completely (flag_cunroll_grow_size,
+ unsigned int val = tree_unroll_loops_completely (flag_cunroll_grow_size,
true);
if (peeled_loops)
{
diff --git a/gcc/tree-ssa-loop-niter.cc b/gcc/tree-ssa-loop-niter.cc
index 58a9d05f974..73c317016bd 100644
--- a/gcc/tree-ssa-loop-niter.cc
+++ b/gcc/tree-ssa-loop-niter.cc
@@ -894,8 +894,8 @@ inverse (tree x, tree mask)
condition S * i <> C. If NO_OVERFLOW is true, then the control variable of
the loop does not overflow. EXIT_MUST_BE_TAKEN is true if we are guaranteed
that the loop ends through this exit, i.e., the induction variable ever
- reaches the value of C.
-
+ reaches the value of C.
+
The value C is equal to final - base, where final and base are the final and
initial value of the actual induction variable in the analysed loop. BNDS
bounds the value of this difference when computed in signed type with
@@ -1821,7 +1821,7 @@ number_of_iterations_cond (class loop *loop,
bounds bnds;
/* If the test is not executed every iteration, wrapping may make the test
- to pass again.
+ to pass again.
TODO: the overflow case can be still used as unreliable estimate of upper
bound. But we have no API to pass it down to number of iterations code
and, at present, it will not use it anyway. */
@@ -3744,7 +3744,7 @@ idx_infer_loop_bounds (tree base, tree *idx, void *dta)
return true;
/* For arrays that might have flexible sizes, it is not guaranteed that they
- do not really extend over their declared size. */
+ do not really extend over their declared size. */
if (array_ref_flexible_size_p (base))
{
has_flexible_size = true;
@@ -4002,7 +4002,7 @@ infer_loop_bounds_from_undefined (class loop *loop, basic_block *bbs)
/* If BB is not executed in each iteration of the loop, we cannot
use the operations in it to infer reliable upper bound on the
- # of iterations of the loop. However, we can use it as a guess.
+ # of iterations of the loop. However, we can use it as a guess.
Reliable guesses come only from array bounds. */
reliable = dominated_by_p (CDI_DOMINATORS, loop->latch, bb);
@@ -4200,7 +4200,7 @@ discover_iteration_bound_by_body_walk (class loop *loop)
insert = true;
*entry = bound_index;
}
-
+
if (insert)
queues[bound_index].safe_push (e->dest);
}
@@ -4238,7 +4238,7 @@ maybe_lower_iteration_bound (class loop *loop)
bitmap visited;
/* Collect all statements with interesting (i.e. lower than
- nb_iterations_upper_bound) bound on them.
+ nb_iterations_upper_bound) bound on them.
TODO: Due to the way record_estimate choose estimates to store, the bounds
will be always nb_iterations_upper_bound-1. We can change this to record
@@ -4315,7 +4315,7 @@ maybe_lower_iteration_bound (class loop *loop)
/* If every path through the loop reach bounding statement before exit,
then we know the last iteration of the loop will have undefined effect
and we can decrease number of iterations. */
-
+
if (!found_exit)
{
if (dump_file && (dump_flags & TDF_DETAILS))
@@ -4747,7 +4747,7 @@ n_of_executions_at_most (gimple *stmt,
-- If NITER_BOUND->is_exit is false, then if we can prove that when STMT
is executed, then NITER_BOUND->stmt is executed as well in the same
- iteration then STMT is executed at most NITER_BOUND->bound + 1 times.
+ iteration then STMT is executed at most NITER_BOUND->bound + 1 times.
If we can determine that NITER_BOUND->stmt is always executed
after STMT, then STMT is executed at most NITER_BOUND->bound + 2 times.
diff --git a/gcc/tree-ssa-loop-prefetch.cc b/gcc/tree-ssa-loop-prefetch.cc
index 130c00f3b3a..dbab7fb3cc8 100644
--- a/gcc/tree-ssa-loop-prefetch.cc
+++ b/gcc/tree-ssa-loop-prefetch.cc
@@ -282,7 +282,7 @@ struct mem_ref
/* Dumps information about memory reference */
static void
dump_mem_details (FILE *file, tree base, tree step,
- HOST_WIDE_INT delta, bool write_p)
+ HOST_WIDE_INT delta, bool write_p)
{
fprintf (file, "(base ");
print_generic_expr (file, base, TDF_SLIM);
@@ -554,7 +554,7 @@ gather_memory_references_ref (class loop *loop, struct mem_ref_group **refs,
if (may_be_nonaddressable_p (base))
return false;
- /* Limit non-constant step prefetching only to the innermost loops and
+ /* Limit non-constant step prefetching only to the innermost loops and
only when the step is loop invariant in the entire loop nest. */
if (!cst_and_fits_in_hwi (step))
{
@@ -562,16 +562,16 @@ gather_memory_references_ref (class loop *loop, struct mem_ref_group **refs,
{
if (dump_file && (dump_flags & TDF_DETAILS))
{
- fprintf (dump_file, "Memory expression %p\n",(void *) ref );
+ fprintf (dump_file, "Memory expression %p\n",(void *) ref );
print_generic_expr (dump_file, ref, TDF_SLIM);
fprintf (dump_file,":");
dump_mem_details (dump_file, base, step, delta, write_p);
- fprintf (dump_file,
+ fprintf (dump_file,
"Ignoring %p, non-constant step prefetching is "
- "limited to inner most loops \n",
+ "limited to inner most loops \n",
(void *) ref);
}
- return false;
+ return false;
}
else
{
@@ -583,12 +583,12 @@ gather_memory_references_ref (class loop *loop, struct mem_ref_group **refs,
print_generic_expr (dump_file, ref, TDF_SLIM);
fprintf (dump_file,":");
dump_mem_details (dump_file, base, step, delta, write_p);
- fprintf (dump_file,
+ fprintf (dump_file,
"Not prefetching, ignoring %p due to "
"loop variant step\n",
(void *) ref);
}
- return false;
+ return false;
}
}
}
diff --git a/gcc/tree-ssa-loop-split.cc b/gcc/tree-ssa-loop-split.cc
index fca678113eb..bd7e843051e 100644
--- a/gcc/tree-ssa-loop-split.cc
+++ b/gcc/tree-ssa-loop-split.cc
@@ -448,7 +448,7 @@ compute_new_first_bound (gimple_seq *stmts, class tree_niter_desc *niter,
/* Depending on the direction of the IVs the new bound for the first
loop is the minimum or maximum of old bound and border.
Also, if the guard condition isn't strictly less or greater,
- we need to adjust the bound. */
+ we need to adjust the bound. */
int addbound = 0;
enum tree_code minmax;
if (niter->cmp == LT_EXPR)
diff --git a/gcc/tree-ssa-math-opts.cc b/gcc/tree-ssa-math-opts.cc
index 5ab5b944a57..a421d4565cb 100644
--- a/gcc/tree-ssa-math-opts.cc
+++ b/gcc/tree-ssa-math-opts.cc
@@ -1572,7 +1572,7 @@ powi_as_mults (gimple_stmt_iterator *gsi, location_t loc,
result. */
static tree
-gimple_expand_builtin_powi (gimple_stmt_iterator *gsi, location_t loc,
+gimple_expand_builtin_powi (gimple_stmt_iterator *gsi, location_t loc,
tree arg0, HOST_WIDE_INT n)
{
if ((n >= -1 && n <= 2)
@@ -2008,7 +2008,7 @@ expand_pow_as_sqrts (gimple_stmt_iterator *gsi, location_t loc,
expession holding the result. */
static tree
-gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
+gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
tree arg0, tree arg1)
{
REAL_VALUE_TYPE c, cint, dconst1_3, dconst1_4, dconst1_6;
@@ -2078,7 +2078,7 @@ gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
&& (!HONOR_NANS (mode) || tree_expr_nonnegative_p (arg0))
&& real_equal (&c, &dconst1_3))
return build_and_insert_call (gsi, loc, cbrtfn, arg0);
-
+
/* Optimize pow(x,1./6.) = cbrt(sqrt(x)). Don't do this optimization
if we don't have a hardware sqrt insn. */
dconst1_6 = dconst1_3;
@@ -4009,7 +4009,7 @@ match_arith_overflow (gimple_stmt_iterator *gsi, gimple *stmt,
}
ovf_use_seen = true;
}
- else
+ else
{
use_seen = true;
if (code == MULT_EXPR
@@ -4404,7 +4404,7 @@ match_arith_overflow (gimple_stmt_iterator *gsi, gimple *stmt,
/* Return true if target has support for divmod. */
static bool
-target_supports_divmod_p (optab divmod_optab, optab div_optab, machine_mode mode)
+target_supports_divmod_p (optab divmod_optab, optab div_optab, machine_mode mode)
{
/* If target supports hardware divmod insn, use it for divmod. */
if (optab_handler (divmod_optab, mode) != CODE_FOR_nothing)
@@ -4415,7 +4415,7 @@ target_supports_divmod_p (optab divmod_optab, optab div_optab, machine_mode mode
if (libfunc != NULL_RTX)
{
/* If optab_handler exists for div_optab, perhaps in a wider mode,
- we don't want to use the libfunc even if it exists for given mode. */
+ we don't want to use the libfunc even if it exists for given mode. */
machine_mode div_mode;
FOR_EACH_MODE_FROM (div_mode, mode)
if (optab_handler (div_optab, div_mode) != CODE_FOR_nothing)
@@ -4423,8 +4423,8 @@ target_supports_divmod_p (optab divmod_optab, optab div_optab, machine_mode mode
return targetm.expand_divmod_libfunc != NULL;
}
-
- return false;
+
+ return false;
}
/* Check if stmt is candidate for divmod transform. */
@@ -4474,8 +4474,8 @@ divmod_candidate_p (gassign *stmt)
expand using the [su]divv optabs. */
if (TYPE_OVERFLOW_TRAPS (type))
return false;
-
- if (!target_supports_divmod_p (divmod_optab, div_optab, mode))
+
+ if (!target_supports_divmod_p (divmod_optab, div_optab, mode))
return false;
return true;
@@ -4508,12 +4508,12 @@ convert_to_divmod (gassign *stmt)
tree op1 = gimple_assign_rhs1 (stmt);
tree op2 = gimple_assign_rhs2 (stmt);
-
+
imm_use_iterator use_iter;
gimple *use_stmt;
- auto_vec<gimple *> stmts;
+ auto_vec<gimple *> stmts;
- gimple *top_stmt = stmt;
+ gimple *top_stmt = stmt;
basic_block top_bb = gimple_bb (stmt);
/* Part 1: Try to set top_stmt to "topmost" stmt that dominates
@@ -4555,7 +4555,7 @@ convert_to_divmod (gassign *stmt)
/* Part 2: Add all trunc_div/trunc_mod statements domianted by top_bb
to stmts vector. The 2nd loop will always add stmt to stmts vector, since
gimple_bb (top_stmt) dominates gimple_bb (stmt), so the
- 2nd loop ends up adding at-least single trunc_mod_expr stmt. */
+ 2nd loop ends up adding at-least single trunc_mod_expr stmt. */
FOR_EACH_IMM_USE_STMT (use_stmt, use_iter, top_op1)
{
@@ -4593,7 +4593,7 @@ convert_to_divmod (gassign *stmt)
gimple_stmt_iterator top_stmt_gsi = gsi_for_stmt (top_stmt);
gsi_insert_before (&top_stmt_gsi, call_stmt, GSI_SAME_STMT);
- widen_mul_stats.divmod_calls_inserted++;
+ widen_mul_stats.divmod_calls_inserted++;
/* Update all statements in stmts vector:
lhs = op1 TRUNC_DIV_EXPR op2 -> lhs = REALPART_EXPR<divmod_tmp>
@@ -4622,8 +4622,8 @@ convert_to_divmod (gassign *stmt)
update_stmt (use_stmt);
}
- return true;
-}
+ return true;
+}
/* Process a single gimple assignment STMT, which has a RSHIFT_EXPR as
its rhs, and try to convert it into a MULT_HIGHPART_EXPR. The return
@@ -4705,7 +4705,7 @@ convert_mult_to_highpart (gassign *stmt, gimple_stmt_iterator *gsi)
}
if (bits > prec)
highpart2 = build_and_insert_binop (gsi, loc, "highparttmp",
- RSHIFT_EXPR, highpart2,
+ RSHIFT_EXPR, highpart2,
build_int_cst (ntype, bits - prec));
gassign *new_stmt = gimple_build_assign (lhs, NOP_EXPR, highpart2);
diff --git a/gcc/tree-ssa-phiopt.cc b/gcc/tree-ssa-phiopt.cc
index c3a889dc593..934946dc17e 100644
--- a/gcc/tree-ssa-phiopt.cc
+++ b/gcc/tree-ssa-phiopt.cc
@@ -1177,10 +1177,10 @@ rhs_is_fed_for_value_replacement (const_tree arg0, const_tree arg1,
return false;
}
-/* Return TRUE if arg0/arg1 are equal to the rhs/lhs or lhs/rhs of COND.
+/* Return TRUE if arg0/arg1 are equal to the rhs/lhs or lhs/rhs of COND.
Also return TRUE if arg0/arg1 are equal to the source arguments of a
- an EQ comparison feeding a BIT_AND_EXPR which feeds COND.
+ an EQ comparison feeding a BIT_AND_EXPR which feeds COND.
Return FALSE otherwise. */
@@ -1211,9 +1211,9 @@ operand_equal_for_value_replacement (const_tree arg0, const_tree arg1,
if (!is_gimple_assign (def) || gimple_assign_rhs_code (def) != BIT_AND_EXPR)
return false;
- /* Now verify arg0/arg1 correspond to the source arguments of an
+ /* Now verify arg0/arg1 correspond to the source arguments of an
EQ comparison feeding the BIT_AND_EXPR. */
-
+
tree tmp = gimple_assign_rhs1 (def);
if (rhs_is_fed_for_value_replacement (arg0, arg1, code, tmp))
return true;
diff --git a/gcc/tree-ssa-pre.cc b/gcc/tree-ssa-pre.cc
index f77732d75c3..6964594cb7c 100644
--- a/gcc/tree-ssa-pre.cc
+++ b/gcc/tree-ssa-pre.cc
@@ -886,7 +886,7 @@ pre_expr_DFS (pre_expr expr, bitmap_set_t set, bitmap val_visited,
/* Generate an topological-ordered array of bitmap set SET. */
-static vec<pre_expr>
+static vec<pre_expr>
sorted_array_from_bitmap_set (bitmap_set_t set)
{
unsigned int i;
@@ -1356,7 +1356,7 @@ get_representative_for (const pre_expr e, basic_block b = NULL)
/* We have to return either a new representative or one
that can be used for expression simplification and thus
is available in B. */
- if (! b
+ if (! b
|| gimple_nop_p (def)
|| dominated_by_p (CDI_DOMINATORS, b, gimple_bb (def)))
return name;
@@ -2846,7 +2846,7 @@ create_expression_by_pieces (basic_block block, pre_expr expr,
return folded;
break;
case CONSTANT:
- {
+ {
folded = PRE_EXPR_CONSTANT (expr);
tree tem = fold_convert (exprtype, folded);
if (is_gimple_min_invariant (tem))
@@ -3571,8 +3571,8 @@ do_pre_partial_partial_insertion (basic_block block, basic_block dom,
get_expression_id (expr),
avail))
new_stuff = true;
- }
- }
+ }
+ }
}
}
diff --git a/gcc/tree-ssa-propagate.cc b/gcc/tree-ssa-propagate.cc
index 472c4bcb540..d0321dcd41b 100644
--- a/gcc/tree-ssa-propagate.cc
+++ b/gcc/tree-ssa-propagate.cc
@@ -84,7 +84,7 @@
Blocks are added to this list if their incoming edges are
found executable.
- SSA_EDGE_WORKLIST contains the list of statements that we
+ SSA_EDGE_WORKLIST contains the list of statements that we
need to revisit.
5- Simulation terminates when all three work lists are drained.
diff --git a/gcc/tree-ssa-reassoc.cc b/gcc/tree-ssa-reassoc.cc
index 580ec0ee0eb..bbdefe96524 100644
--- a/gcc/tree-ssa-reassoc.cc
+++ b/gcc/tree-ssa-reassoc.cc
@@ -445,7 +445,7 @@ get_rank (tree e)
To obtain this result during reassociation, we bias the rank
of the phi definition x_1 upward, when it is recognized as an
- accumulator pattern. The artificial rank causes it to be
+ accumulator pattern. The artificial rank causes it to be
added last, providing the desired independence. */
if (TREE_CODE (e) == SSA_NAME)
@@ -923,7 +923,7 @@ eliminate_plus_minus_pair (enum tree_code opcode,
}
}
- /* If CURR->OP is a negate expr without nop conversion in a plus expr:
+ /* If CURR->OP is a negate expr without nop conversion in a plus expr:
save it for later inspection in repropagate_negates(). */
if (negateop != NULL_TREE
&& gimple_assign_rhs_code (SSA_NAME_DEF_STMT (curr->op)) == NEGATE_EXPR)
@@ -1198,7 +1198,7 @@ stmt_is_power_of_op (gimple *stmt, tree op)
CASE_CFN_POW:
CASE_CFN_POWI:
return (operand_equal_p (gimple_call_arg (stmt, 0), op, 0));
-
+
default:
return false;
}
@@ -6281,7 +6281,7 @@ attempt_builtin_powi (gimple *stmt, vec<operand_entry *> *ops)
result = t5 * y */
vec_len = repeat_factor_vec.length ();
-
+
/* Repeatedly look for opportunities to create a builtin_powi call. */
while (true)
{
@@ -6290,7 +6290,7 @@ attempt_builtin_powi (gimple *stmt, vec<operand_entry *> *ops)
/* First look for the largest cached product of factors from
preceding iterations. If found, create a builtin_powi for
it if the minimum occurrence count for its factors is at
- least 2, or just use this cached product as our next
+ least 2, or just use this cached product as our next
multiplicand if the minimum occurrence count is 1. */
FOR_EACH_VEC_ELT (repeat_factor_vec, j, rf1)
{
@@ -6498,7 +6498,7 @@ attempt_builtin_powi (gimple *stmt, vec<operand_entry *> *ops)
rf1 = &repeat_factor_vec[i];
rf1->count -= power;
-
+
FOR_EACH_VEC_ELT_REVERSE (*ops, n, oe)
{
if (oe->op == rf1->factor)
@@ -6819,7 +6819,7 @@ reassociate_bb (basic_block bb)
}
tree new_lhs = lhs;
- /* If the operand vector is now empty, all operands were
+ /* If the operand vector is now empty, all operands were
consumed by the __builtin_powi optimization. */
if (ops.length () == 0)
transform_stmt_to_copy (&gsi, stmt, powi_result);
@@ -6885,7 +6885,7 @@ reassociate_bb (basic_block bb)
len != orig_len);
}
- /* If we combined some repeated factors into a
+ /* If we combined some repeated factors into a
__builtin_powi call, multiply that result by the
reassociated operands. */
if (powi_result)
diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
index d6c436b4103..179313ff4a8 100644
--- a/gcc/tree-ssa-sccvn.cc
+++ b/gcc/tree-ssa-sccvn.cc
@@ -173,7 +173,7 @@ static int
vn_phi_eq (const_vn_phi_t const vp1, const_vn_phi_t const vp2);
struct vn_phi_hasher : nofree_ptr_hash <vn_phi_s>
-{
+{
static inline hashval_t hash (const vn_phi_s *);
static inline bool equal (const vn_phi_s *, const vn_phi_s *);
};
@@ -319,7 +319,7 @@ typedef struct vn_tables_s
/* vn_constant hashtable helpers. */
struct vn_constant_hasher : free_ptr_hash <vn_constant_s>
-{
+{
static inline hashval_t hash (const vn_constant_s *);
static inline bool equal (const vn_constant_s *, const vn_constant_s *);
};
@@ -1729,7 +1729,7 @@ static vec<vn_reference_op_s> shared_lookup_references;
this function. *VALUEIZED_ANYTHING will specify whether any
operands were valueized. */
-static vec<vn_reference_op_s>
+static vec<vn_reference_op_s>
valueize_shared_reference_ops_from_ref (tree ref, bool *valueized_anything)
{
if (!ref)
@@ -1744,7 +1744,7 @@ valueize_shared_reference_ops_from_ref (tree ref, bool *valueized_anything)
call statement. The vector is shared among all callers of
this function. */
-static vec<vn_reference_op_s>
+static vec<vn_reference_op_s>
valueize_shared_reference_ops_from_call (gcall *call)
{
if (!call)
@@ -4019,7 +4019,7 @@ vn_reference_lookup_call (gcall *call, vn_reference_t *vnresult,
/* Insert OP into the current hash table with a value number of RESULT. */
-static void
+static void
vn_reference_insert (tree op, tree result, tree vuse, tree vdef)
{
vn_reference_s **slot;
diff --git a/gcc/tree-ssa-scopedtables.cc b/gcc/tree-ssa-scopedtables.cc
index 528ddf2a2ab..396fd7d2cd1 100644
--- a/gcc/tree-ssa-scopedtables.cc
+++ b/gcc/tree-ssa-scopedtables.cc
@@ -497,7 +497,7 @@ avail_expr_hash (class expr_hash_elt *p)
enum tree_code code = MEM_REF;
hstate.add_object (code);
inchash::add_expr (base, hstate,
- TREE_CODE (base) == MEM_REF
+ TREE_CODE (base) == MEM_REF
? OEP_ADDRESS_OF : 0);
hstate.add_object (offset);
hstate.add_object (size);
@@ -979,7 +979,7 @@ const_and_copies::pop_to_marker (void)
}
}
-/* Record that X has the value Y and that X's previous value is PREV_X.
+/* Record that X has the value Y and that X's previous value is PREV_X.
This variant does not follow the value chain for Y. */
@@ -1009,7 +1009,7 @@ const_and_copies::record_const_or_copy (tree x, tree y)
record_const_or_copy (x, y, SSA_NAME_VALUE (x));
}
-/* Record that X has the value Y and that X's previous value is PREV_X.
+/* Record that X has the value Y and that X's previous value is PREV_X.
This variant follow's Y value chain. */
diff --git a/gcc/tree-ssa-scopedtables.h b/gcc/tree-ssa-scopedtables.h
index a810b05c605..95a472a28db 100644
--- a/gcc/tree-ssa-scopedtables.h
+++ b/gcc/tree-ssa-scopedtables.h
@@ -191,7 +191,7 @@ class const_and_copies
void record_const_or_copy (tree, tree);
/* Special entry point when we want to provide an explicit previous
- value for the first argument. Try to get rid of this in the future.
+ value for the first argument. Try to get rid of this in the future.
This version may also follow the value chain for the RHS. */
void record_const_or_copy (tree, tree, tree);
diff --git a/gcc/tree-ssa-sink.cc b/gcc/tree-ssa-sink.cc
index 87b1d40c174..b7e826969d4 100644
--- a/gcc/tree-ssa-sink.cc
+++ b/gcc/tree-ssa-sink.cc
@@ -442,7 +442,7 @@ statement_sink_location (gimple *stmt, basic_block frombb,
commondom = select_best_block (frombb, commondom, stmt);
if (commondom == frombb)
- return false;
+ return false;
*togsi = gsi_after_labels (commondom);
@@ -479,7 +479,7 @@ statement_sink_location (gimple *stmt, basic_block frombb,
/* This can happen if there are multiple uses in a PHI. */
if (!sinkbb)
return false;
-
+
sinkbb = select_best_block (frombb, sinkbb, stmt);
if (!sinkbb || sinkbb == frombb)
return false;
diff --git a/gcc/tree-ssa-strlen.cc b/gcc/tree-ssa-strlen.cc
index 7508c1768a5..992d2522c6f 100644
--- a/gcc/tree-ssa-strlen.cc
+++ b/gcc/tree-ssa-strlen.cc
@@ -1282,7 +1282,7 @@ get_range_strlen_dynamic (tree src, gimple *stmt,
toffset);
pdata->maxbound = pdata->maxlen;
}
- else
+ else
pdata->maxlen = build_all_ones_cst (size_type_node);
}
else
diff --git a/gcc/tree-ssa-structalias.cc b/gcc/tree-ssa-structalias.cc
index 2ed32de06ed..7e823805618 100644
--- a/gcc/tree-ssa-structalias.cc
+++ b/gcc/tree-ssa-structalias.cc
@@ -929,7 +929,7 @@ constraint_vec_find (vec<constraint_t> vec,
return found;
}
-/* Union two constraint vectors, TO and FROM. Put the result in TO.
+/* Union two constraint vectors, TO and FROM. Put the result in TO.
Returns true of TO set is changed. */
static bool
@@ -1076,7 +1076,7 @@ insert_into_complex (constraint_graph_t graph,
/* Condense two variable nodes into a single variable node, by moving
- all associated info from FROM to TO. Returns true if TO node's
+ all associated info from FROM to TO. Returns true if TO node's
constraint set changes after the merge. */
static bool
@@ -3673,7 +3673,7 @@ get_constraint_for_1 (tree t, vec<ce_s> *results, bool address_p,
}
case tcc_constant:
{
- /* We cannot refer to automatic variables through constants. */
+ /* We cannot refer to automatic variables through constants. */
temp.type = ADDRESSOF;
temp.var = nonlocal_id;
temp.offset = 0;
@@ -3960,7 +3960,7 @@ make_heapvar (const char *name, bool add_id)
{
varinfo_t vi;
tree heapvar;
-
+
heapvar = build_fake_var_decl (ptr_type_node);
DECL_EXTERNAL (heapvar) = 1;
@@ -4075,7 +4075,7 @@ handle_call_arg (gcall *stmt, tree arg, vec<ce_s> *results, int flags,
(except through the escape solution).
For all flags we get these implications right except for
not_returned because we miss return functions in ipa-prop. */
-
+
if (flags & EAF_NO_DIRECT_READ)
flags |= EAF_NOT_RETURNED_INDIRECTLY;
}
@@ -4293,7 +4293,7 @@ determine_global_memory_access (gcall *stmt,
/* For non-IPA mode, generate constraints necessary for a call on the
RHS and collect return value constraint to RESULTS to be used later in
handle_lhs_call.
-
+
IMPLICIT_EAF_FLAGS are added to each function argument. If
WRITES_GLOBAL_MEMORY is true function is assumed to possibly write to global
memory. Similar for READS_GLOBAL_MEMORY. */
@@ -5111,7 +5111,7 @@ find_func_aliases (struct function *fn, gimple *origt)
pointer passed by address. */
else if (is_gimple_call (t))
find_func_aliases_for_call (fn, as_a <gcall *> (t));
-
+
/* Otherwise, just a regular assignment statement. Only care about
operations with pointer result, others are dealt with as escape
points if they have pointer operands. */
diff --git a/gcc/tree-ssa.cc b/gcc/tree-ssa.cc
index 5126020d40f..d753a3897df 100644
--- a/gcc/tree-ssa.cc
+++ b/gcc/tree-ssa.cc
@@ -1519,7 +1519,7 @@ maybe_rewrite_mem_ref_base (tree *tp, bitmap suitable_for_renaming)
&& multiple_p (mem_ref_offset (*tp),
wi::to_poly_offset (TYPE_SIZE_UNIT (TREE_TYPE (*tp)))))
{
- *tp = build3 (BIT_FIELD_REF, TREE_TYPE (*tp), sym,
+ *tp = build3 (BIT_FIELD_REF, TREE_TYPE (*tp), sym,
TYPE_SIZE (TREE_TYPE (*tp)),
int_const_binop (MULT_EXPR,
bitsize_int (BITS_PER_UNIT),
@@ -1549,7 +1549,7 @@ maybe_rewrite_mem_ref_base (tree *tp, bitmap suitable_for_renaming)
(mem_ref_offset (*tp),
wi::to_offset (TYPE_SIZE_UNIT (TREE_TYPE (*tp))),
0, wi::to_offset (DECL_SIZE_UNIT (sym))))
- && (! INTEGRAL_TYPE_P (TREE_TYPE (*tp))
+ && (! INTEGRAL_TYPE_P (TREE_TYPE (*tp))
|| (wi::to_offset (TYPE_SIZE (TREE_TYPE (*tp)))
== TYPE_PRECISION (TREE_TYPE (*tp))))
&& (! INTEGRAL_TYPE_P (TREE_TYPE (sym))
@@ -1652,7 +1652,7 @@ non_rewritable_mem_ref_base (tree ref)
/* For an lvalue tree LHS return true if it cannot be rewritten into SSA form.
Otherwise return true. */
-static bool
+static bool
non_rewritable_lvalue_p (tree lhs)
{
/* A plain decl is always rewritable. */
diff --git a/gcc/tree-stdarg.cc b/gcc/tree-stdarg.cc
index 37c3981316a..80e4ea7a6a9 100644
--- a/gcc/tree-stdarg.cc
+++ b/gcc/tree-stdarg.cc
@@ -174,7 +174,7 @@ va_list_counter_bump (struct stdarg_info *si, tree counter, tree rhs,
continue;
}
- if (rhs_code == ADDR_EXPR
+ if (rhs_code == ADDR_EXPR
&& TREE_CODE (TREE_OPERAND (rhs1, 0)) == MEM_REF
&& TREE_CODE (TREE_OPERAND (TREE_OPERAND (rhs1, 0), 0)) == SSA_NAME
&& tree_fits_uhwi_p (TREE_OPERAND (TREE_OPERAND (rhs1, 0), 1)))
@@ -241,7 +241,7 @@ va_list_counter_bump (struct stdarg_info *si, tree counter, tree rhs,
continue;
}
- if (rhs_code == ADDR_EXPR
+ if (rhs_code == ADDR_EXPR
&& TREE_CODE (TREE_OPERAND (rhs1, 0)) == MEM_REF
&& TREE_CODE (TREE_OPERAND (TREE_OPERAND (rhs1, 0), 0)) == SSA_NAME
&& tree_fits_uhwi_p (TREE_OPERAND (TREE_OPERAND (rhs1, 0), 1)))
diff --git a/gcc/tree-switch-conversion.cc b/gcc/tree-switch-conversion.cc
index 6aeabb96c26..5002c1d8385 100644
--- a/gcc/tree-switch-conversion.cc
+++ b/gcc/tree-switch-conversion.cc
@@ -57,7 +57,7 @@ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
#include "langhooks.h"
#include "tree-switch-conversion.h"
-\f
+
using namespace tree_switch_conversion;
/* Constructor. */
diff --git a/gcc/tree-vect-generic.cc b/gcc/tree-vect-generic.cc
index 2e2d7567293..feab53048e0 100644
--- a/gcc/tree-vect-generic.cc
+++ b/gcc/tree-vect-generic.cc
@@ -108,7 +108,7 @@ subparts_gt (tree type1, tree type2)
static tree
build_replicated_const (tree type, unsigned int width, HOST_WIDE_INT value)
{
- int n = (TYPE_PRECISION (type) + HOST_BITS_PER_WIDE_INT - 1)
+ int n = (TYPE_PRECISION (type) + HOST_BITS_PER_WIDE_INT - 1)
/ HOST_BITS_PER_WIDE_INT;
unsigned HOST_WIDE_INT low, mask;
HOST_WIDE_INT a[WIDE_INT_MAX_ELTS];
@@ -1359,7 +1359,7 @@ optimize_vector_constructor (gimple_stmt_iterator *gsi)
cst.build ());
gsi_replace (gsi, g, false);
}
-\f
+
/* Return a type for the widest vector mode whose components are of type
TYPE, or NULL_TREE if none is found. */
@@ -2163,7 +2163,7 @@ expand_vector_operations_1 (gimple_stmt_iterator *gsi,
if (!VECTOR_TYPE_P (type)
|| !VECTOR_TYPE_P (TREE_TYPE (rhs1)))
return;
-
+
/* A scalar operation pretending to be a vector one. */
if (VECTOR_BOOLEAN_TYPE_P (type)
&& !VECTOR_MODE_P (TYPE_MODE (type))
@@ -2373,7 +2373,7 @@ expand_vector_operations_1 (gimple_stmt_iterator *gsi,
gimple_assign_set_rhs_from_tree (gsi, new_rhs);
update_stmt (gsi_stmt (*gsi));
}
-\f
+
/* Use this to lower vector operations introduced by the vectorizer,
if it may need the bit-twiddling tricks implemented in this file. */
diff --git a/gcc/tree-vect-loop-manip.cc b/gcc/tree-vect-loop-manip.cc
index b5c5f859144..d77d7252f79 100644
--- a/gcc/tree-vect-loop-manip.cc
+++ b/gcc/tree-vect-loop-manip.cc
@@ -3521,7 +3521,7 @@ vect_loop_versioning (loop_vec_info loop_vinfo,
non-perfect nests but allow if-conversion versioned loops inside. */
class loop *loop_to_version = loop;
if (flow_loop_nested_p (outermost, loop))
- {
+ {
if (dump_enabled_p ())
dump_printf_loc (MSG_NOTE, vect_location,
"trying to apply versioning to outer loop %d\n",
diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc
index f0801c23671..e3f20a0c4af 100644
--- a/gcc/tree-vect-loop.cc
+++ b/gcc/tree-vect-loop.cc
@@ -4426,10 +4426,10 @@ vect_estimate_min_profitable_iters (loop_vec_info loop_vinfo,
/* Cost model check occurs at prologue generation. */
if (LOOP_VINFO_PEELING_FOR_ALIGNMENT (loop_vinfo) < 0)
scalar_outside_cost += 2 * vect_get_stmt_cost (cond_branch_taken)
- + vect_get_stmt_cost (cond_branch_not_taken);
+ + vect_get_stmt_cost (cond_branch_not_taken);
/* Cost model check occurs at epilogue generation. */
else
- scalar_outside_cost += 2 * vect_get_stmt_cost (cond_branch_taken);
+ scalar_outside_cost += 2 * vect_get_stmt_cost (cond_branch_taken);
}
}
@@ -4878,11 +4878,11 @@ vect_model_reduction_cost (loop_vec_info loop_vinfo,
epilogue_cost += record_stmt_cost (cost_vec, 1,
vec_to_scalar, stmt_info, 0,
vect_epilogue);
- }
+ }
else
/* Use extracts and reduction op for final reduction. For N
elements, we have N extracts and N-1 reduction ops. */
- epilogue_cost += record_stmt_cost (cost_vec,
+ epilogue_cost += record_stmt_cost (cost_vec,
nelements + nelements - 1,
vector_stmt, stmt_info, 0,
vect_epilogue);
@@ -4890,7 +4890,7 @@ vect_model_reduction_cost (loop_vec_info loop_vinfo,
}
if (dump_enabled_p ())
- dump_printf (MSG_NOTE,
+ dump_printf (MSG_NOTE,
"vect_model_reduction_cost: inside_cost = %d, "
"prologue_cost = %d, epilogue_cost = %d .\n", inside_cost,
prologue_cost, epilogue_cost);
@@ -5331,10 +5331,10 @@ vect_create_partial_epilog (tree vec_def, tree vectype, code_helper code,
/* Function vect_create_epilog_for_reduction
Create code at the loop-epilog to finalize the result of a reduction
- computation.
-
+ computation.
+
STMT_INFO is the scalar reduction stmt that is being vectorized.
- SLP_NODE is an SLP node containing a group of reduction statements. The
+ SLP_NODE is an SLP node containing a group of reduction statements. The
first one in this group is STMT_INFO.
SLP_NODE_INSTANCE is the SLP node instance containing SLP_NODE
REDUC_INDEX says which rhs operand of the STMT_INFO is the reduction phi
@@ -5501,7 +5501,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
The first match will be a 1 to allow 0 to be used for non-matching
indexes. If there are no matches at all then the vector will be all
zeroes.
-
+
PR92772: This algorithm is broken for architectures that support
masked vectors, but do not provide fold_extract_last. */
if (STMT_VINFO_REDUC_TYPE (reduc_info) == COND_REDUCTION)
@@ -5625,7 +5625,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
/* 2.1 Create new loop-exit-phis to preserve loop-closed form:
- v_out1 = phi <VECT_DEF>
+ v_out1 = phi <VECT_DEF>
Store them in NEW_PHIS. */
if (double_reduc)
loop = outer_loop;
@@ -5668,7 +5668,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
gcc_assert (STMT_VINFO_IN_PATTERN_P (orig_stmt_info));
gcc_assert (STMT_VINFO_RELATED_STMT (orig_stmt_info) == stmt_info);
}
-
+
scalar_dest = gimple_get_lhs (orig_stmt_info->stmt);
scalar_type = TREE_TYPE (scalar_dest);
scalar_results.truncate (0);
@@ -5927,7 +5927,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
}
/* 2.3 Create the reduction code, using one of the three schemes described
- above. In SLP we simply need to extract all the elements from the
+ above. In SLP we simply need to extract all the elements from the
vector (without reducing them), so we use scalar shifts. */
else if (reduc_fn != IFN_LAST && !slp_reduc)
{
@@ -6198,7 +6198,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
bitsize, bitpos);
if (slp_reduc)
{
- /* In SLP we don't need to apply reduction operation, so
+ /* In SLP we don't need to apply reduction operation, so
we just collect s' values in SCALAR_RESULTS. */
new_temp = new_name;
scalar_results.safe_push (new_name);
@@ -6211,12 +6211,12 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
/* The only case where we need to reduce scalar results in SLP, is
unrolling. If the size of SCALAR_RESULTS is greater than
- REDUC_GROUP_SIZE, we reduce them combining elements modulo
+ REDUC_GROUP_SIZE, we reduce them combining elements modulo
REDUC_GROUP_SIZE. */
if (slp_reduc)
{
tree res, first_res, new_res;
-
+
/* Reduce multiple scalar results in case of SLP unrolling. */
for (j = group_size; scalar_results.iterate (j, &res);
j++)
@@ -6260,7 +6260,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
scalar_results[0] = tmp;
}
}
-
+
/* 2.5 Adjust the final result by the initial value of the reduction
variable. (When such adjustment is not needed, then
'adjustment_def' is zero). For example, if code is PLUS we create:
@@ -6302,7 +6302,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
/* 2.6 Handle the loop-exit phis. Replace the uses of scalar loop-exit
phis with new adjusted scalar results, i.e., replace use <s_out0>
- with use <s_out4>.
+ with use <s_out4>.
Transform:
loop_exit:
@@ -6322,7 +6322,7 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
v_out2 = reduce <v_out1>
s_out3 = extract_field <v_out2, 0>
s_out4 = adjust_result <s_out3>
- use <s_out4>
+ use <s_out4>
use <s_out4> */
gcc_assert (live_out_stmts.size () == scalar_results.length ());
@@ -9790,7 +9790,7 @@ vectorizable_induction (loop_vec_info loop_vinfo,
vec_def = gimple_build (&stmts,
PLUS_EXPR, step_vectype, vec_def, vec_step);
vec_def = gimple_convert (&stmts, vectype, vec_def);
-
+
gsi_insert_seq_before (&si, stmts, GSI_SAME_STMT);
new_stmt = SSA_NAME_DEF_STMT (vec_def);
STMT_VINFO_VEC_STMTS (stmt_info).safe_push (new_stmt);
@@ -10790,7 +10790,7 @@ vect_transform_loop (loop_vec_info loop_vinfo, gimple *loop_vectorized_call)
check_profitability = true;
}
- /* Make sure there exists a single-predecessor exit bb. Do this before
+ /* Make sure there exists a single-predecessor exit bb. Do this before
versioning. */
edge e = single_exit (loop);
if (! single_pred_p (e->dest))
diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc
index 6934aebc69f..04beec82708 100644
--- a/gcc/tree-vect-patterns.cc
+++ b/gcc/tree-vect-patterns.cc
@@ -2751,7 +2751,7 @@ vect_recog_average_pattern (vec_info *vinfo,
unmasked_carry = new_ops[0] and/or new_ops[1];
carry = unmasked_carry & 1;
new_var = sum_of_shifted + carry;
- */
+ */
tree one_cst = build_one_cst (new_type);
gassign *g;
@@ -2768,12 +2768,12 @@ vect_recog_average_pattern (vec_info *vinfo,
g = gimple_build_assign (sum_of_shifted, PLUS_EXPR,
shifted_op0, shifted_op1);
append_pattern_def_seq (vinfo, last_stmt_info, g, new_vectype);
-
+
tree unmasked_carry = vect_recog_temp_ssa_var (new_type, NULL);
tree_code c = (ifn == IFN_AVG_CEIL) ? BIT_IOR_EXPR : BIT_AND_EXPR;
g = gimple_build_assign (unmasked_carry, c, new_ops[0], new_ops[1]);
append_pattern_def_seq (vinfo, last_stmt_info, g, new_vectype);
-
+
tree carry = vect_recog_temp_ssa_var (new_type, NULL);
g = gimple_build_assign (carry, BIT_AND_EXPR, unmasked_carry, one_cst);
append_pattern_def_seq (vinfo, last_stmt_info, g, new_vectype);
@@ -4819,7 +4819,7 @@ vect_recog_bool_pattern (vec_info *vinfo,
return NULL;
lhs = vect_recog_temp_ssa_var (TREE_TYPE (lhs), NULL);
- pattern_stmt
+ pattern_stmt
= gimple_build_assign (lhs, COND_EXPR,
build2 (NE_EXPR, boolean_type_node,
var, build_int_cst (TREE_TYPE (var), 0)),
@@ -6161,7 +6161,7 @@ vect_pattern_recog_1 (vec_info *vinfo,
}
loop_vinfo = dyn_cast <loop_vec_info> (vinfo);
-
+
/* Found a vectorizable pattern. */
if (dump_enabled_p ())
dump_printf_loc (MSG_NOTE, vect_location,
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 6ddd41fb473..41b8df8fabf 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -85,7 +85,7 @@ stmt_in_inner_loop_p (vec_info *vinfo, class _stmt_vec_info *stmt_info)
return (bb->loop_father == loop->inner);
}
-/* Record the cost of a statement, either by directly informing the
+/* Record the cost of a statement, either by directly informing the
target model or by saving it in a vector for later processing.
Return a preliminary estimate of the statement's cost. */
@@ -1237,7 +1237,7 @@ vect_model_load_cost (vec_info *vinfo,
else
vect_get_load_cost (vinfo, stmt_info, ncopies,
alignment_support_scheme, misalignment, first_stmt_p,
- &inside_cost, &prologue_cost,
+ &inside_cost, &prologue_cost,
cost_vec, cost_vec, true);
if (memory_access_type == VMAT_ELEMENTWISE
|| memory_access_type == VMAT_STRIDED_SLP
@@ -7906,7 +7906,7 @@ vectorizable_store (vec_info *vinfo,
if (slp)
{
grouped_store = false;
- /* VEC_NUM is the number of vect stmts to be created for this
+ /* VEC_NUM is the number of vect stmts to be created for this
group. */
vec_num = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node);
first_stmt_info = SLP_TREE_SCALAR_STMTS (slp_node)[0];
@@ -7914,9 +7914,9 @@ vectorizable_store (vec_info *vinfo,
== first_stmt_info);
first_dr_info = STMT_VINFO_DR_INFO (first_stmt_info);
op = vect_get_store_rhs (first_stmt_info);
- }
+ }
else
- /* VEC_NUM is the number of vect stmts to be created for this
+ /* VEC_NUM is the number of vect stmts to be created for this
group. */
vec_num = group_size;
@@ -8484,7 +8484,7 @@ vectorizable_store (vec_info *vinfo,
tree new_temp = make_ssa_name (perm_dest);
/* Generate the permute statement. */
- gimple *perm_stmt
+ gimple *perm_stmt
= gimple_build_assign (new_temp, VEC_PERM_EXPR, vec_oprnd,
vec_oprnd, perm_mask);
vect_finish_stmt_generation (vinfo, stmt_info, perm_stmt, gsi);
@@ -9363,7 +9363,7 @@ vectorizable_load (vec_info *vinfo,
permutation result fits in. */
unsigned scalar_lanes = SLP_TREE_LANES (slp_node);
if (slp_perm
- && (group_size != scalar_lanes
+ && (group_size != scalar_lanes
|| !multiple_p (nunits, group_size)))
{
/* We don't yet generate such SLP_TREE_LOAD_PERMUTATIONs for
@@ -11549,7 +11549,7 @@ get_related_vectype_for_scalar_type (machine_mode prevailing_mode,
/* We can't build a vector type of elements with alignment bigger than
their size. */
else if (nbytes < TYPE_ALIGN_UNIT (scalar_type))
- scalar_type = lang_hooks.types.type_for_mode (inner_mode,
+ scalar_type = lang_hooks.types.type_for_mode (inner_mode,
TYPE_UNSIGNED (scalar_type));
/* If we felt back to using the mode fail if there was
@@ -12055,7 +12055,7 @@ supportable_widening_operation (vec_info *vinfo,
vectorization. */
/* TODO: Another case in which order doesn't *really* matter is when we
widen and then contract again, e.g. (short)((int)x * y >> 8).
- Normally, pack_trunc performs an even/odd permute, whereas the
+ Normally, pack_trunc performs an even/odd permute, whereas the
repack from an even/odd expansion would be an interleave, which
would be significantly simpler for e.g. AVX2. */
/* In any case, in order to avoid duplicating the code below, recurse
diff --git a/gcc/tree-vectorizer.cc b/gcc/tree-vectorizer.cc
index 875acbbf948..bb9e4e7afd2 100644
--- a/gcc/tree-vectorizer.cc
+++ b/gcc/tree-vectorizer.cc
@@ -188,7 +188,7 @@ dump_stmt_cost (FILE *f, int count, enum vect_cost_for_stmt kind,
}
fprintf (f, "in %s\n", ws);
}
-\f
+
/* For mapping simduid to vectorization factor. */
class simduid_to_vf : public free_ptr_hash<simduid_to_vf>
@@ -456,7 +456,7 @@ shrink_simd_arrays
delete simd_array_to_simduid_htab;
}
-\f
+
/* Initialize the vec_info with kind KIND_IN and target cost data
TARGET_COST_DATA_IN. */
@@ -1564,7 +1564,7 @@ static hash_map<tree, unsigned> *type_align_map;
/* Return alignment of array's vector type corresponding to scalar type.
0 if no vector type exists. */
static unsigned
-get_vec_alignment_for_array_type (tree type)
+get_vec_alignment_for_array_type (tree type)
{
gcc_assert (TREE_CODE (type) == ARRAY_TYPE);
poly_uint64 array_size, vector_size;
@@ -1585,7 +1585,7 @@ get_vec_alignment_for_array_type (tree type)
offset is a multiple of it's vector alignment.
0 if no suitable field is found. */
static unsigned
-get_vec_alignment_for_record_type (tree type)
+get_vec_alignment_for_record_type (tree type)
{
gcc_assert (TREE_CODE (type) == RECORD_TYPE);
@@ -1604,7 +1604,7 @@ get_vec_alignment_for_record_type (tree type)
field != NULL_TREE;
field = DECL_CHAIN (field))
{
- /* Skip if not FIELD_DECL or if alignment is set by user. */
+ /* Skip if not FIELD_DECL or if alignment is set by user. */
if (TREE_CODE (field) != FIELD_DECL
|| DECL_USER_ALIGN (field)
|| DECL_ARTIFICIAL (field))
@@ -1622,11 +1622,11 @@ get_vec_alignment_for_record_type (tree type)
if (!tree_fits_uhwi_p (offset_tree))
break;
- offset = tree_to_uhwi (offset_tree);
+ offset = tree_to_uhwi (offset_tree);
alignment = get_vec_alignment_for_type (TREE_TYPE (field));
/* Get maximum alignment of vectorized field/array among those members
- whose offset is multiple of the vector alignment. */
+ whose offset is multiple of the vector alignment. */
if (alignment
&& (offset % alignment == 0)
&& (alignment > max_align))
diff --git a/gcc/tree.cc b/gcc/tree.cc
index ea95e67bb79..a1f6fc3d24e 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -706,7 +706,7 @@ init_ttree (void)
lang_hooks.init_ts ();
}
-\f
+
/* The name of the object as the assembler will see it (but before any
translations made by ASM_OUTPUT_LABELREF). Often this is the same
as DECL_NAME. It is an IDENTIFIER_NODE. */
@@ -1318,7 +1318,7 @@ free_node (tree node)
cl_target_option_free (TREE_TARGET_OPTION (node));
ggc_free (node);
}
-\f
+
/* Return a new node with the same contents as NODE except that its
TREE_CHAIN, if it has one, is zero and it has a fresh uid. */
@@ -1431,7 +1431,7 @@ copy_list (tree list)
return head;
}
-\f
+
/* Return the value that TREE_INT_CST_EXT_NUNITS should have for an
INTEGER_CST with value CST and type TYPE. */
@@ -2781,7 +2781,7 @@ grow_tree_vec (tree v, int len MEM_STAT_DECL)
return v;
}
-\f
+
/* Return 1 if EXPR is the constant zero, whether it is integral, float or
fixed, and scalar, complex or vector. */
@@ -3269,7 +3269,7 @@ tree_to_poly_uint64 (const_tree t)
return poly_int_cst_value (t).force_uhwi ();
return TREE_INT_CST_LOW (t);
}
-\f
+
/* Return first list element whose TREE_VALUE is ELEM.
Return 0 if ELEM is not in LIST. */
@@ -3456,7 +3456,7 @@ nreverse (tree t)
}
return prev;
}
-\f
+
/* Return a newly created TREE_LIST node whose
purpose and value fields are PARM and VALUE. */
@@ -3490,7 +3490,7 @@ build_tree_list_vec (const vec<tree, va_gc> *vec MEM_STAT_DECL)
purpose and value fields are PURPOSE and VALUE
and whose TREE_CHAIN is CHAIN. */
-tree
+tree
tree_cons (tree purpose, tree value, tree chain MEM_STAT_DECL)
{
tree node;
@@ -3523,7 +3523,7 @@ ctor_to_vec (tree ctor)
return vec;
}
-\f
+
/* Return the size nominally occupied by an object of type TYPE
when it resides in memory. The value is measured in units of bytes,
and its data type is that normally used for type sizes
@@ -3602,7 +3602,7 @@ max_int_size_in_bytes (const_tree type)
return size;
}
-\f
+
/* Return the bit position of FIELD, in bits from the start of the record.
This is a tree of type bitsizetype. */
@@ -3612,7 +3612,7 @@ bit_position (const_tree field)
return bit_from_pos (DECL_FIELD_OFFSET (field),
DECL_FIELD_BIT_OFFSET (field));
}
-\f
+
/* Return the byte position of FIELD, in bytes from the start of the record.
This is a tree of type sizetype. */
@@ -3632,7 +3632,7 @@ int_byte_position (const_tree field)
{
return tree_to_shwi (byte_position (field));
}
-\f
+
/* Return, as a tree node, the number of elements for TYPE (which is an
ARRAY_TYPE) minus one. This counts only elements of the top array. */
@@ -3668,7 +3668,7 @@ array_type_nelts (const_tree type)
? max
: fold_build2 (MINUS_EXPR, TREE_TYPE (max), max, min));
}
-\f
+
/* If arg is static -- a reference to an object in static storage -- then
return the object. This is not the same as the C meaning of `static'.
If arg isn't static, return NULL. */
@@ -3735,7 +3735,7 @@ staticp (tree arg)
}
}
-\f
+
/* Return whether OP is a DECL whose address is function-invariant. */
@@ -4032,7 +4032,7 @@ process_call_operands (tree t)
TREE_SIDE_EFFECTS (t) = side_effects;
TREE_READONLY (t) = read_only;
}
-\f
+
/* Return true if EXP contains a PLACEHOLDER_EXPR, i.e. if it represents a
size or offset that depends on a field within a record. */
@@ -4213,7 +4213,7 @@ type_contains_placeholder_p (tree type)
return result;
}
-\f
+
/* Push tree EXP onto vector QUEUE if it is not already present. */
static void
@@ -4670,7 +4670,7 @@ substitute_placeholder_in_expr (tree exp, tree obj)
return new_tree;
}
-\f
+
/* Subroutine of stabilize_reference; this is called for subtrees of
references. Any expression with side-effects must be put in a SAVE_EXPR
@@ -4841,7 +4841,7 @@ stabilize_reference (tree ref)
return result;
}
-\f
+
/* Low-level constructors for expressions. */
/* A helper function for build1 and constant folders. Set TREE_CONSTANT,
@@ -5304,7 +5304,7 @@ build_nt_call_vec (tree fn, vec<tree, va_gc> *args)
CALL_EXPR_ARG (ret, ix) = t;
return ret;
}
-\f
+
/* Create a DECL_... node of code CODE, name NAME (if non-null)
and data type TYPE.
We do NOT enter this node in any sort of symbol table.
@@ -5380,7 +5380,7 @@ build_translation_unit_decl (tree name)
return tu;
}
-\f
+
/* BLOCK nodes are used to represent the structure of binding contours
and declarations, once those contours have been exited and their contents
compiled. This information is used for outputting debugging info. */
@@ -5397,7 +5397,7 @@ build_block (tree vars, tree subblocks, tree supercontext, tree chain)
return block;
}
-\f
+
/* Like SET_EXPR_LOCATION, but make sure the tree can have a location.
LOC is the location to use in tree T. */
@@ -5425,7 +5425,7 @@ protected_set_expr_location_if_unset (tree t, location_t loc)
if (t && !EXPR_HAS_LOCATION (t))
protected_set_expr_location (t, loc);
}
-\f
+
/* Set the type qualifiers for TYPE to TYPE_QUALS, which is a bitmask
of the various TYPE_QUAL values. */
@@ -5454,7 +5454,7 @@ check_lang_type (const_tree cand, const_tree base)
return lang_hooks.types.type_hash_eq (cand, base);
}
-/* This function checks to see if TYPE matches the size one of the built-in
+/* This function checks to see if TYPE matches the size one of the built-in
atomic types, and returns that core atomic type. */
static tree
@@ -5712,7 +5712,7 @@ build_variant_type_copy (tree type MEM_STAT_DECL)
return t;
}
-\f
+
/* Return true if the from tree in both tree maps are equal. */
int
@@ -5996,7 +5996,7 @@ type_hash_canon_hash (tree type)
hstate.add_object (TREE_INT_CST_ELT (t, i));
break;
}
-
+
case REAL_TYPE:
case FIXED_POINT_TYPE:
{
@@ -7044,7 +7044,7 @@ build_nonstandard_integer_type (unsigned HOST_WIDE_INT precision,
if (unsignedp)
unsignedp = MAX_INT_CACHED_PREC + 1;
-
+
if (precision <= MAX_INT_CACHED_PREC)
{
itype = nonstandard_integer_type_cache[precision + unsignedp];
@@ -7826,7 +7826,7 @@ excess_precision_type (tree type)
return NULL_TREE;
}
-\f
+
/* Return OP, stripped of any conversions to wider types as much as is safe.
Converting the value back to OP's type makes a value equivalent to OP.
@@ -7923,7 +7923,7 @@ get_unwidened (tree op, tree for_type)
return win;
}
-\f
+
/* Return OP or a simpler expression for a narrower value
which can be sign-extended or zero-extended to give back OP.
Store in *UNSIGNEDP_PTR either 1 if the value should be zero-extended
@@ -8036,7 +8036,7 @@ get_narrower (tree op, int *unsignedp_ptr)
*unsignedp_ptr = uns;
return win;
}
-\f
+
/* Return true if integer constant C has a value that is permissible
for TYPE, an integral type. */
@@ -8645,7 +8645,7 @@ dump_tree_statistics (void)
print_value_expr_statistics ();
lang_hooks.print_statistics ();
}
-\f
+
#define FILE_FUNCTION_FORMAT "_GLOBAL__%s_%s"
/* Generate a crc32 of the low BYTES bytes of VALUE. */
@@ -8715,7 +8715,7 @@ static GTY(()) unsigned anon_cnt = 0; /* Saved for PCH. */
tree
make_anon_name ()
{
- const char *fmt =
+ const char *fmt =
#if !defined (NO_DOT_IN_LABEL)
"."
#elif !defined (NO_DOLLAR_IN_LABEL)
@@ -8759,7 +8759,7 @@ get_file_function_name (const char *type)
p = q = ASTRDUP (first_global_object_name);
/* If the target is handling the constructors/destructors, they
will be local to this file and the name is only necessary for
- debugging purposes.
+ debugging purposes.
We also assign sub_I and sub_D sufixes to constructors called from
the global static constructors. These are always local. */
else if (((type[0] == 'I' || type[0] == 'D') && targetm.have_ctors_dtors)
@@ -8809,7 +8809,7 @@ get_file_function_name (const char *type)
return get_identifier (buf);
}
-\f
+
#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007)
/* Complain that the tree code of NODE does not match the expected 0
@@ -9084,7 +9084,7 @@ omp_clause_operand_check_failed (int idx, const_tree t, const char *file,
trim_filename (file), line);
}
#endif /* ENABLE_TREE_CHECKING */
-\f
+
/* Create a new vector type node holding NUNITS units of type INNERTYPE,
and mapped to the machine mode MODE. Initialize its fields and build
the information necessary for debugging output. */
@@ -9243,7 +9243,7 @@ build_atomic_base (tree type, unsigned int align)
/* Make sure its not already registered. */
if ((t = get_qualified_type (type, TYPE_QUAL_ATOMIC)))
return t;
-
+
t = build_variant_type_copy (type);
set_type_quals (t, TYPE_QUAL_ATOMIC);
@@ -9397,7 +9397,7 @@ build_common_tree_nodes (bool signed_char)
/* Don't call build_qualified type for atomics. That routine does
special processing for atomics, and until they are initialized
it's better not to make that call.
-
+
Check to see if there is a target override for atomic types. */
atomicQI_type_node = build_atomic_base (unsigned_intQI_type_node,
@@ -9410,7 +9410,7 @@ build_common_tree_nodes (bool signed_char)
targetm.atomic_align_for_mode (DImode));
atomicTI_type_node = build_atomic_base (unsigned_intTI_type_node,
targetm.atomic_align_for_mode (TImode));
-
+
access_public_node = get_identifier ("public");
access_protected_node = get_identifier ("protected");
access_private_node = get_identifier ("private");
@@ -10685,7 +10685,7 @@ build_call_expr_loc_array (location_t loc, tree fndecl, int n, tree *argarray)
{
tree fntype = TREE_TYPE (fndecl);
tree fn = build1 (ADDR_EXPR, build_pointer_type (fntype), fndecl);
-
+
return fold_build_call_array_loc (loc, TREE_TYPE (fntype), fn, n, argarray);
}
@@ -13318,7 +13318,7 @@ verify_type_variant (const_tree t, tree tv)
/* Type variant can differ by:
- TYPE_QUALS: TYPE_READONLY, TYPE_VOLATILE, TYPE_ATOMIC, TYPE_RESTRICT,
- ENCODE_QUAL_ADDR_SPACE.
+ ENCODE_QUAL_ADDR_SPACE.
- main variant may be TYPE_COMPLETE_P and variant types !TYPE_COMPLETE_P
in this case some values may not be set in the variant types
(see TYPE_COMPLETE_P checks).
@@ -13401,7 +13401,7 @@ verify_type_variant (const_tree t, tree tv)
else if (TREE_CODE (t) == ARRAY_TYPE)
verify_variant_match (TYPE_NONALIASED_COMPONENT);
/* During LTO we merge variant lists from diferent translation units
- that may differ BY TYPE_CONTEXT that in turn may point
+ that may differ BY TYPE_CONTEXT that in turn may point
to TRANSLATION_UNIT_DECL.
Ada also builds variants of types with different TYPE_CONTEXT. */
#if 0
@@ -13578,7 +13578,7 @@ type_with_interoperable_signedness (const_tree type)
}
/* Return true iff T1 and T2 are structurally identical for what
- TBAA is concerned.
+ TBAA is concerned.
This function is used both by lto.cc canonical type merging and by the
verifier. If TRUST_TYPE_CANONICAL we do not look into structure of types
that have TYPE_CANONICAL defined and assume them equivalent. This is useful
@@ -14080,7 +14080,7 @@ verify_type (const_tree t)
error ("%<TYPE_ARRAY_MAX_SIZE%> not %<INTEGER_CST%>");
debug_tree (TYPE_ARRAY_MAX_SIZE (t));
error_found = true;
- }
+ }
}
else if (TYPE_MAX_VALUE_RAW (t))
{
@@ -14241,7 +14241,7 @@ verify_type (const_tree t)
error ("%<TYPE_CACHED_VALUES_P%> is set while it should not be");
error_found = true;
}
-
+
/* ipa-devirt makes an assumption that TYPE_METHOD_BASETYPE is always
TYPE_MAIN_VARIANT and it would be odd to add methods only to variatns
of a type. */
@@ -14740,7 +14740,7 @@ get_typenode_from_name (const char *name)
real declaration.
Keep the size up to date in tree.h ! */
-const builtin_structptr_type builtin_structptr_types[6] =
+const builtin_structptr_type builtin_structptr_types[6] =
{
{ fileptr_type_node, ptr_type_node, "FILE" },
{ const_tm_ptr_type_node, const_ptr_type_node, "tm" },
diff --git a/gcc/tree.h b/gcc/tree.h
index 99695c647fe..ca8652bedc7 100644
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -608,7 +608,7 @@ extern void omp_clause_range_check_failed (const_tree, const char *, int,
&& TREE_CODE (TREE_TYPE (TYPE)) == REAL_TYPE)
/* Nonzero if TYPE represents a vector integer type. */
-
+
#define VECTOR_INTEGER_TYPE_P(TYPE) \
(VECTOR_TYPE_P (TYPE) \
&& TREE_CODE (TREE_TYPE (TYPE)) == INTEGER_TYPE)
@@ -2321,7 +2321,7 @@ extern tree vector_element_bits_tree (const_tree);
| (TYPE_ATOMIC (NODE) * TYPE_QUAL_ATOMIC) \
| (TYPE_RESTRICT (NODE) * TYPE_QUAL_RESTRICT)))
-/* The same as TYPE_QUALS without the address space and atomic
+/* The same as TYPE_QUALS without the address space and atomic
qualifications. */
#define TYPE_QUALS_NO_ADDR_SPACE_NO_ATOMIC(NODE) \
((int) ((TYPE_READONLY (NODE) * TYPE_QUAL_CONST) \
diff --git a/gcc/ubsan.cc b/gcc/ubsan.cc
index 6dec2c3078a..f017c496564 100644
--- a/gcc/ubsan.cc
+++ b/gcc/ubsan.cc
@@ -621,7 +621,7 @@ ubsan_create_data (const char *name, int loccnt, const location_t *ploc, ...)
{
location_t loc = LOCATION_LOCUS (ploc[j]);
CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, ubsan_source_location (loc));
- }
+ }
size_t nelts = vec_safe_length (saved_args);
for (i = 0; i < nelts; i++)
diff --git a/gcc/value-prof.cc b/gcc/value-prof.cc
index f40e58ac4f2..fd9861f6e36 100644
--- a/gcc/value-prof.cc
+++ b/gcc/value-prof.cc
@@ -84,7 +84,7 @@ along with GCC; see the file COPYING3. If not see
gimple_add_histogram_value(). Histograms are stored in a hash table
that is attached to every intrumented function, see VALUE_HISTOGRAMS
in function.h.
-
+
The value-profile transformations driver is the function
gimple_value_profile_transformations(). It traverses all statements in
the to-be-transformed function, and looks for statements with one or
@@ -1773,7 +1773,7 @@ stringop_block_profile (gimple *stmt, unsigned int *expected_align,
}
}
-\f
+
/* Find values inside STMT for that we want to measure histograms for
division/modulo optimization. */
diff --git a/gcc/value-prof.h b/gcc/value-prof.h
index 0cfd5adb8bc..40ade15e18b 100644
--- a/gcc/value-prof.h
+++ b/gcc/value-prof.h
@@ -39,7 +39,7 @@ enum hist_type
#define HIST_TYPE_FOR_COUNTER(COUNTER) \
((enum hist_type) ((COUNTER) - GCOV_FIRST_VALUE_COUNTER))
-\f
+
/* The value to measure. */
struct histogram_value_t
{
diff --git a/gcc/var-tracking.cc b/gcc/var-tracking.cc
index fae0c73e02f..d4b4f8c845e 100644
--- a/gcc/var-tracking.cc
+++ b/gcc/var-tracking.cc
@@ -10585,7 +10585,7 @@ variable_tracking_main (void)
return ret;
}
-\f
+
namespace {
const pass_data pass_data_variable_tracking =
diff --git a/gcc/varasm.cc b/gcc/varasm.cc
index cd0cd88321c..ae6eeba0ec5 100644
--- a/gcc/varasm.cc
+++ b/gcc/varasm.cc
@@ -125,7 +125,7 @@ static void asm_output_aligned_bss (FILE *, tree, const char *,
static void mark_weak (tree);
static void output_constant_pool (const char *, tree);
static void handle_vtv_comdat_section (section *, const_tree);
-\f
+
/* Well-known sections, each one associated with some sort of *_ASM_OP. */
section *text_section;
section *data_section;
@@ -938,7 +938,7 @@ mergeable_constant_section (machine_mode mode ATTRIBUTE_UNUSED,
}
return readonly_data_section;
}
-\f
+
/* Given NAME, a putative register name, discard any customary prefixes. */
static const char *
@@ -952,7 +952,7 @@ strip_reg_name (const char *name)
name++;
return name;
}
-\f
+
/* The user has asked for a DECL to have a particular name. Set (or
change) it in such a way that we don't prefix an underscore to
it. */
@@ -965,7 +965,7 @@ set_user_assembler_name (tree decl, const char *name)
symtab->change_decl_assembler_name (decl, get_identifier (starred));
SET_DECL_RTL (decl, NULL_RTX);
}
-\f
+
/* Decode an `asm' spec for a declaration as a register name.
Return the register number, or -1 if nothing specified,
or -2 if the ASMSPEC is not `cc' or `memory' and is not recognized,
@@ -1056,7 +1056,7 @@ decode_reg_name (const char *name)
return decode_reg_name_and_count (name, &count);
}
-\f
+
/* Return true if DECL's initializer is suitable for a BSS section. */
bool
@@ -1665,7 +1665,7 @@ make_decl_rtl_for_debug (tree decl)
flag_strict_aliasing = save_aliasing_flag;
return rtl;
}
-\f
+
/* Output a string of literal assembler code
for an `asm' keyword used between functions. */
@@ -1755,7 +1755,7 @@ default_ctor_section_asm_out_constructor (rtx symbol,
assemble_addr_to_section (symbol, ctors_section);
}
#endif
-\f
+
/* CONSTANT_POOL_BEFORE_FUNCTION may be defined as an expression with
a nonzero value if the constant pool should be output before the
start of the function, or a zero value if the pool should output
@@ -2033,7 +2033,7 @@ assemble_end_function (tree decl, const char *fnname ATTRIBUTE_UNUSED)
switch_to_section (save_text_section);
}
}
-\f
+
/* Assemble code to leave SIZE bytes of zeros. */
void
@@ -2092,7 +2092,7 @@ assemble_string (const char *p, int size)
}
}
-\f
+
/* A noswitch_section_callback for lcomm_section. */
static bool
@@ -2776,7 +2776,7 @@ assemble_trampoline_template (void)
return initial_trampoline;
}
-\f
+
/* A and B are either alignments or offsets. Return the minimum alignment
that may be assumed after adding the two together. */
@@ -2914,7 +2914,7 @@ assemble_integer (rtx x, unsigned int size, unsigned int align, int force)
return false;
}
-\f
+
/* Assemble the floating-point constant D into an object of size MODE. ALIGN
is the alignment of the constant in bits. If REVERSE is true, D is output
in reverse storage order. */
@@ -2970,7 +2970,7 @@ assemble_real (REAL_VALUE_TYPE d, scalar_float_mode mode, unsigned int align,
nunits -= chunk_nunits;
}
}
-\f
+
/* Given an expression EXP with a constant value,
reduce it to the sum of an assembler symbol and an integer.
Store them both in the structure *VALUE.
@@ -3068,7 +3068,7 @@ decode_addr_const (tree exp, class addr_const *value)
value->base = x;
value->offset = offset;
}
-\f
+
static GTY(()) hash_table<tree_descriptor_hasher> *const_desc_htab;
static void maybe_output_constant_def_contents (struct constant_descriptor_tree *, int);
@@ -3395,7 +3395,7 @@ compare_constant (const tree t1, const tree t2)
return 0;
}
}
-\f
+
/* Return the section into which constant EXP should be placed. */
static section *
@@ -3703,7 +3703,7 @@ tree_output_constant_def (tree exp)
varpool_node::finalize_decl (decl);
return decl;
}
-\f
+
class GTY((chain_next ("%h.next"), for_user)) constant_descriptor_rtx {
public:
class constant_descriptor_rtx *next;
@@ -3852,7 +3852,7 @@ const_rtx_hash (rtx x)
return h;
}
-\f
+
/* Create and return a new rtx constant pool. */
static struct rtx_constant_pool *
@@ -3876,7 +3876,7 @@ init_varasm_status (void)
crtl->varasm.pool = create_constant_pool ();
crtl->varasm.deferred_constants = 0;
}
-\f
+
/* Given a MINUS expression, simplify it if both sides
include the same symbol. */
@@ -3886,7 +3886,7 @@ simplify_subtraction (rtx x)
rtx r = simplify_rtx (x);
return r ? r : x;
}
-\f
+
/* Given a constant rtx X, make (or find) a memory constant for its value
and return a MEM rtx to refer to it in memory. IN_MODE is the mode
of X. */
@@ -3987,7 +3987,7 @@ force_const_mem (machine_mode in_mode, rtx x)
return copy_rtx (def);
}
-\f
+
/* Given a constant pool SYMBOL_REF, return the corresponding constant. */
rtx
@@ -4026,7 +4026,7 @@ constant_pool_empty_p (void)
{
return crtl->varasm.pool->first == NULL;
}
-\f
+
/* Worker function for output_constant_pool_1. Emit assembly for X
in MODE with known alignment ALIGN. */
@@ -4165,7 +4165,7 @@ output_constant_pool_1 (class constant_descriptor_rtx *desc,
/* Output the data.
Pass actual alignment value while emitting string constant to asm code
as function 'output_constant_pool_1' explicitly passes the alignment as 1
- assuming that the data is already aligned which prevents the generation
+ assuming that the data is already aligned which prevents the generation
of fix-up table entries. */
output_constant_pool_2 (desc->mode, x, desc->align);
@@ -4512,7 +4512,7 @@ output_constant_pool (const char *fnname ATTRIBUTE_UNUSED,
ASM_OUTPUT_POOL_EPILOGUE (asm_out_file, fnname, fndecl, pool->offset);
#endif
}
-\f
+
/* Write the contents of the shared constant pool. */
void
@@ -4524,7 +4524,7 @@ output_shared_constant_pool (void)
output_constant_pool_contents (shared_constant_pool);
}
-\f
+
/* Determine what kind of relocations EXP may need. */
int
@@ -4648,7 +4648,7 @@ output_addressed_constants (tree exp, int defer)
break;
}
}
-\f
+
/* Whether a constructor CTOR is a valid static constant initializer if all
its elements are. This used to be internal to initializer_constant_valid_p
and has been exposed to let other functions like categorize_ctor_elements
@@ -5048,7 +5048,7 @@ initializer_constant_valid_p (tree value, tree endtype, bool reverse)
return reloc;
}
-\f
+
/* Return true if VALUE is a valid constant-valued expression
for use in initializing a static bit-field; one that can be
an element of a "constant" initializer. */
@@ -5326,7 +5326,7 @@ output_constant (tree exp, unsigned HOST_WIDE_INT size, unsigned int align,
return size;
}
-\f
+
/* Subroutine of output_constructor, used for computing the size of
arrays of unspecified length. VAL must be a CONSTRUCTOR of an array
type with an unspecified upper bound. */
@@ -6969,7 +6969,7 @@ default_pe_asm_named_section (const char *name, unsigned int flags,
(flags & SECTION_CODE ? "discard" : "same_size"));
}
}
-\f
+
/* The lame default section selector. */
section *
@@ -8404,7 +8404,7 @@ get_elf_initfini_array_priority_section (int priority,
if (priority != DEFAULT_INIT_PRIORITY)
{
char buf[18];
- sprintf (buf, "%s.%.5u",
+ sprintf (buf, "%s.%.5u",
constructor_p ? ".init_array" : ".fini_array",
priority);
sec = get_section (buf, SECTION_WRITE | SECTION_NOTYPE, NULL_TREE);
@@ -8475,7 +8475,7 @@ default_asm_output_ident_directive (const char *ident_str)
}
/* Switch to a COMDAT section with COMDAT name of decl.
-
+
FIXME: resolve_unique_section needs to deal better with
decls with both DECL_SECTION_NAME and DECL_ONE_ONLY. Once
that is fixed, this if-else statement can be replaced with
diff --git a/gcc/varpool.cc b/gcc/varpool.cc
index e7b51b15e4a..322ab49ba97 100644
--- a/gcc/varpool.cc
+++ b/gcc/varpool.cc
@@ -136,7 +136,7 @@ varpool_node *
varpool_node::create_empty (void)
{
return new (ggc_alloc<varpool_node> ()) varpool_node ();
-}
+}
/* Return varpool node assigned to DECL. Create new one when needed. */
varpool_node *
@@ -368,7 +368,7 @@ varpool_node::ctor_useable_for_folding_p (void)
consistently. As a GNU extension, do not enforce this rule for user defined
weak variables, so we support interposition on:
static const int dummy = 0;
- extern const int foo __attribute__((__weak__, __alias__("dummy")));
+ extern const int foo __attribute__((__weak__, __alias__("dummy")));
*/
if ((!DECL_INITIAL (real_node->decl)
|| (DECL_WEAK (decl) && !DECL_COMDAT (decl)))
@@ -377,7 +377,7 @@ varpool_node::ctor_useable_for_folding_p (void)
return false;
/* Variables declared `const' with an initializer are considered
- to not be overwritable with different initializer by default.
+ to not be overwritable with different initializer by default.
??? Previously we behaved so for scalar variables but not for array
accesses. */
@@ -607,7 +607,7 @@ varpool_node::assemble_decl (void)
return false;
}
-/* Add NODE to queue starting at FIRST.
+/* Add NODE to queue starting at FIRST.
The queue is linked via AUX pointers and terminated by pointer to 1. */
static void
diff --git a/gcc/vec.h b/gcc/vec.h
index a536b68732d..91bf8da76b7 100644
--- a/gcc/vec.h
+++ b/gcc/vec.h
@@ -114,7 +114,7 @@ extern void *ggc_realloc (void *, size_t MEM_STAT_DECL);
Notes on the different layout strategies
* Embeddable vectors (vec<T, A, vl_embed>)
-
+
These vectors are suitable to be embedded in other data
structures so that they can be pre-allocated in a contiguous
memory block.
diff --git a/gcc/vmsdbgout.cc b/gcc/vmsdbgout.cc
index 6efa9ac619a..cc1424d984d 100644
--- a/gcc/vmsdbgout.cc
+++ b/gcc/vmsdbgout.cc
@@ -400,7 +400,7 @@ static char text_end_label[MAX_ARTIFICIAL_LABEL_BYTES];
while (0)
#endif
-\f
+
/* Output the debug header HEADER. Also output COMMENT if flag_verbose_asm is
set. Return the header size. Just return the size if DOSIZEONLY is
nonzero. */
@@ -1117,7 +1117,7 @@ write_srccorrs (int dosizeonly)
return totsize;
}
-\f
+
/* Output a marker (i.e. a label) for the beginning of a function, before
the prologue. */
diff --git a/gcc/vtable-verify.cc b/gcc/vtable-verify.cc
index a4ecb00ee72..261a8df1a05 100644
--- a/gcc/vtable-verify.cc
+++ b/gcc/vtable-verify.cc
@@ -359,7 +359,7 @@ vtbl_register_mangled_name (tree class_type, tree mangled_name)
gcc_assert (vtbl_mangled_name_types->length() ==
vtbl_mangled_name_ids->length());
-
+
if (vtbl_find_mangled_name (class_type) == NULL_TREE)
{
@@ -599,7 +599,7 @@ var_is_used_for_virtual_call_p (tree lhs, int *mem_ref_depth,
if (TREE_CODE (rhs) == ADDR_EXPR
|| TREE_CODE (rhs) == MEM_REF)
*mem_ref_depth = *mem_ref_depth + 1;
-
+
if (TREE_CODE (rhs) == COMPONENT_REF)
{
while (TREE_CODE (TREE_OPERAND (rhs, 0)) == COMPONENT_REF)
diff --git a/gcc/web.cc b/gcc/web.cc
index ef2d79e40e8..9a5ead97665 100644
--- a/gcc/web.cc
+++ b/gcc/web.cc
@@ -299,7 +299,7 @@ replace_ref (df_ref ref, rtx reg)
df_insn_rescan (DF_REF_INSN (ref));
}
-\f
+
namespace {
const pass_data pass_data_web =
@@ -419,7 +419,7 @@ pass_web::execute (function *fun)
free (used);
return 0;
}
-\f
+
} // anon namespace
rtl_opt_pass *
diff --git a/gcc/wide-int.cc b/gcc/wide-int.cc
index 8c817576505..873eac04269 100644
--- a/gcc/wide-int.cc
+++ b/gcc/wide-int.cc
@@ -1293,7 +1293,7 @@ wi_pack (HOST_WIDE_INT *result,
}
/* Multiply Op1 by Op2. If HIGH is set, only the upper half of the
- result is returned.
+ result is returned.
If HIGH is not set, throw away the upper half after the check is
made to see if it overflows. Unfortunately there is no better way
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATH] [CLEANUP] Remove trailing whitespace characters
2023-09-10 14:36 [PATH] [CLEANUP] Remove trailing whitespace characters Guillaume Gomez
@ 2023-09-11 13:27 ` David Malcolm
2023-09-11 13:30 ` Guillaume Gomez
2023-09-11 13:43 ` Jakub Jelinek
0 siblings, 2 replies; 6+ messages in thread
From: David Malcolm @ 2023-09-11 13:27 UTC (permalink / raw)
To: Guillaume Gomez, gcc-patches
On Sun, 2023-09-10 at 16:36 +0200, Guillaume Gomez wrote:
> When going through the code, I saw a lot of trailing whitespace
> characters so I decided to write a small script that would remove
> them. I didn't expect there would be so many though... Not sure if
> patch with so many changes are accepted like this or if I should send
> more focused one.
I'm not sure either.
Some notes on the patch:
- the ChangeLog sensibly makes use of "Likewise", but for the initial
file in each ChangeLog it incorrectly also says "Likewise". When these
are copied into the individual ChangeLog files by the "Daily bump"
cronjob, the Subject line from the commit won't be visible [1], so the
thing that "Likewise" refers to won't be present. So that initial file
in each category should read "Remove trailing whitespace characters".
- the patch touches the testsuite. Note that not all source files in
the testsuite are UTF-8 encoded, and we want the testsuite to contain a
variety of source formatting idioms (and examples of badly formatted
source code).
- some of our source files use U+000C, the form feed character, and the
patch eliminates these. I think this is an old convention used to
indicate a major change of topic within the source file. Perhaps it
leads to a page break when printing the source file? Personally I
dislike this convention, and feel a suitable big comment line would be
clearer such as:
/* Name of new topic.
General comments about the new topic, where useful. */
for such "high-level" source file organizational bounaries, but perhaps
people like and use the form feed characters?
Hope this is constructive
Dave
[1] see e.g. a134b6ce8e5c589f8c1b58cdf124cd4a916b0e8c
>
> Anyway, for posterity, here is the python script I used:
>
> ```
> from os import listdir
> from os.path import isfile, join
>
>
> def clean_file(p):
> if not p.endswith(".cc") and not p.endswith(".h"):
> return
> with open(p, 'r', encoding='utf8') as f:
> content = f.read().split('\n')
> updated = 0
> i = 0
> while i < len(content):
> s = content[i].rstrip()
> if s != content[i]:
> updated += 1
> content[i] = s
> i += 1
> if updated == 0:
> return
> with open(p, 'w', encoding='utf8') as f:
> f.write('\n'.join(content))
>
>
> def recur_read(p):
> for f in listdir(p):
> full_path = join(p, f)
> if isfile(full_path):
> clean_file(full_path)
> else:
> recur_read(full_path)
>
> recur_read(".")
> ```
>
> Cordially.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATH] [CLEANUP] Remove trailing whitespace characters
2023-09-11 13:27 ` David Malcolm
@ 2023-09-11 13:30 ` Guillaume Gomez
2023-09-11 13:43 ` Jakub Jelinek
1 sibling, 0 replies; 6+ messages in thread
From: Guillaume Gomez @ 2023-09-11 13:30 UTC (permalink / raw)
To: David Malcolm; +Cc: gcc-patches
Hi David.
Thanks for the feedback! Well, I think at this point, better to get
"global approval" on the idea and on what you suggested (which I agree
with) before I make any additional changes considering how big the
patch is.
Let's wait for others to also express their opinion here.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATH] [CLEANUP] Remove trailing whitespace characters
2023-09-11 13:27 ` David Malcolm
2023-09-11 13:30 ` Guillaume Gomez
@ 2023-09-11 13:43 ` Jakub Jelinek
2023-09-11 14:43 ` Eric Gallager
1 sibling, 1 reply; 6+ messages in thread
From: Jakub Jelinek @ 2023-09-11 13:43 UTC (permalink / raw)
To: David Malcolm; +Cc: Guillaume Gomez, gcc-patches
On Mon, Sep 11, 2023 at 09:27:48AM -0400, David Malcolm via Gcc-patches wrote:
> On Sun, 2023-09-10 at 16:36 +0200, Guillaume Gomez wrote:
> > When going through the code, I saw a lot of trailing whitespace
> > characters so I decided to write a small script that would remove
> > them. I didn't expect there would be so many though... Not sure if
> > patch with so many changes are accepted like this or if I should send
> > more focused one.
>
> I'm not sure either.
>
> Some notes on the patch:
IMHO testsuite shouldn't be touched at all, there are certainly tests
which test whether such sources are handled correctly.
Non-C/C++ sources shouldn't be changed this way either.
The ^L stuff should be preserved, not removed.
And even with that, I'm not sure it is a good idea to change it because
it will be a nightmare for git blame.
The usual way of fixing up formatting if it was committed in a broken way
is only when one is touching with real code changes something, fixing up
formatting on it or around it is fine.
If we decide to fix formatting in bulk, I think we should have a flag day
and change also other formatting mistakes at the same time (say 8 spaces
instead of tabs for start of line indentation (before first non-blank
character), = at the end of line except for static var initializers, etc.
But to make that worthwhile, it would be better to then have a pre-commit
hook that would enforce formatting. And, we haven't managed to come up with
something like that yet.
Jakub
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATH] [CLEANUP] Remove trailing whitespace characters
2023-09-11 13:43 ` Jakub Jelinek
@ 2023-09-11 14:43 ` Eric Gallager
2023-09-11 14:49 ` Arthur Cohen
0 siblings, 1 reply; 6+ messages in thread
From: Eric Gallager @ 2023-09-11 14:43 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: David Malcolm, Guillaume Gomez, gcc-patches
On Mon, Sep 11, 2023 at 9:43 AM Jakub Jelinek via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> On Mon, Sep 11, 2023 at 09:27:48AM -0400, David Malcolm via Gcc-patches wrote:
> > On Sun, 2023-09-10 at 16:36 +0200, Guillaume Gomez wrote:
> > > When going through the code, I saw a lot of trailing whitespace
> > > characters so I decided to write a small script that would remove
> > > them. I didn't expect there would be so many though... Not sure if
> > > patch with so many changes are accepted like this or if I should send
> > > more focused one.
> >
> > I'm not sure either.
> >
> > Some notes on the patch:
>
> IMHO testsuite shouldn't be touched at all, there are certainly tests
> which test whether such sources are handled correctly.
>
> Non-C/C++ sources shouldn't be changed this way either.
>
> The ^L stuff should be preserved, not removed.
>
> And even with that, I'm not sure it is a good idea to change it because
> it will be a nightmare for git blame.
>
Some git hosting services have added support for special files to
ignore revisions like this in git blame, for example, on GitHub, it's
called .git-blame-ignore-revs:
https://github.blog/changelog/2022-03-24-ignore-commits-in-the-blame-view-beta/
See for example:
https://github.com/cooljeanius/highlight.js/blob/main/.git-blame-ignore-revs
> The usual way of fixing up formatting if it was committed in a broken way
> is only when one is touching with real code changes something, fixing up
> formatting on it or around it is fine.
>
> If we decide to fix formatting in bulk, I think we should have a flag day
> and change also other formatting mistakes at the same time (say 8 spaces
> instead of tabs for start of line indentation (before first non-blank
> character), = at the end of line except for static var initializers, etc.
> But to make that worthwhile, it would be better to then have a pre-commit
> hook that would enforce formatting. And, we haven't managed to come up with
> something like that yet.
>
> Jakub
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATH] [CLEANUP] Remove trailing whitespace characters
2023-09-11 14:43 ` Eric Gallager
@ 2023-09-11 14:49 ` Arthur Cohen
0 siblings, 0 replies; 6+ messages in thread
From: Arthur Cohen @ 2023-09-11 14:49 UTC (permalink / raw)
To: Eric Gallager, Jakub Jelinek; +Cc: gcc-patches, Guillaume Gomez
[-- Attachment #1.1.1: Type: text/plain, Size: 2416 bytes --]
On 9/11/23 16:43, Eric Gallager via Gcc-patches wrote:
> On Mon, Sep 11, 2023 at 9:43 AM Jakub Jelinek via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
>>
>> On Mon, Sep 11, 2023 at 09:27:48AM -0400, David Malcolm via Gcc-patches wrote:
>>> On Sun, 2023-09-10 at 16:36 +0200, Guillaume Gomez wrote:
>>>> When going through the code, I saw a lot of trailing whitespace
>>>> characters so I decided to write a small script that would remove
>>>> them. I didn't expect there would be so many though... Not sure if
>>>> patch with so many changes are accepted like this or if I should send
>>>> more focused one.
>>>
>>> I'm not sure either.
>>>
>>> Some notes on the patch:
>>
>> IMHO testsuite shouldn't be touched at all, there are certainly tests
>> which test whether such sources are handled correctly.
>>
>> Non-C/C++ sources shouldn't be changed this way either.
>>
>> The ^L stuff should be preserved, not removed.
>>
>> And even with that, I'm not sure it is a good idea to change it because
>> it will be a nightmare for git blame.
>>
>
> Some git hosting services have added support for special files to
> ignore revisions like this in git blame, for example, on GitHub, it's
> called .git-blame-ignore-revs:
> https://github.blog/changelog/2022-03-24-ignore-commits-in-the-blame-view-beta/
> See for example:
> https://github.com/cooljeanius/highlight.js/blob/main/.git-blame-ignore-revs
This is also something you can setup locally, without changing the remote:
`git config blame.ignoreRevsFile <filename>`
so this could be a good step to add to the `gcc-git-customization.sh`
script if such a file was created.
>> The usual way of fixing up formatting if it was committed in a broken way
>> is only when one is touching with real code changes something, fixing up
>> formatting on it or around it is fine.
>>
>> If we decide to fix formatting in bulk, I think we should have a flag day
>> and change also other formatting mistakes at the same time (say 8 spaces
>> instead of tabs for start of line indentation (before first non-blank
>> character), = at the end of line except for static var initializers, etc.
>> But to make that worthwhile, it would be better to then have a pre-commit
>> hook that would enforce formatting. And, we haven't managed to come up with
>> something like that yet.
>>
>> Jakub
>>
Kindly,
Arthur
[-- Attachment #1.1.2: OpenPGP public key --]
[-- Type: application/pgp-keys, Size: 3195 bytes --]
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 840 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-09-11 14:50 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-10 14:36 [PATH] [CLEANUP] Remove trailing whitespace characters Guillaume Gomez
2023-09-11 13:27 ` David Malcolm
2023-09-11 13:30 ` Guillaume Gomez
2023-09-11 13:43 ` Jakub Jelinek
2023-09-11 14:43 ` Eric Gallager
2023-09-11 14:49 ` Arthur Cohen
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).