Re: [PATCH] invoke: RISC-V's -march doesn't take ISA strings

[Philipp Tomsich <philipp.tomsich@vrull.eu>]

On Wed, 9 Nov 2022 at 04:00, Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> On Tue, 08 Nov 2022 05:40:10 PST (-0800), christoph.muellner@vrull.eu wrote:
> > On Mon, Nov 7, 2022 at 8:01 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
> >
> >> The docs say we take ISA strings, but that's never really been the case:
> >> at a bare minimum we've required lower case strings, but there's
> >> generally been some subtle differences as well in things like version
> >> handling and such.  We talked about removing the lower case requirement
> >> in the last GNU toolchain meeting and we've always called other
> >> differences just bugs.  We don't have profile support yet, but based on
> >> the discussions on the RISC-V lists it looks like we're going to have
> >> some differences there as well.
> >
> >
> >> So let's just stop pretending these are ISA strings.  That's been a
> >> headache for years now, if we're meant to just be ISA-string-like here
> >> then we don't have to worry about all these long-tail ISA string parsing
> >> issues.
> >>
> >
> > You are right, we should first properly specify the -march string,
> > before we talk about the implementation details of the parser.
> >
> > I tried to collect all the recent change requests and undocumented
> > properties of the -march string and worked on a first draft specification.
> > As the -march flag should share a common behavior across different
> > compilers and tools, I've made a PR to the RISC-V toolchain-conventions
> > repo:
> >   https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/26
> >
> > Do you mind if we continue the discussion there?
>
> IMO trying to handle this with another RISC-V spec is a waste of time:
> we've spent many years trying to follow the specs here, it's pretty
> clear they're just not meant to be read in that level of detail.  This
> sort of problem is all over the place in RISC-V land, moving to a
> different spec doesn't fix the problem.

Consider this repo as "hosted by RISC-V" and not as a RISC-V
specification (e.g., it doesn't go through the lifecycle and never
gets ratified/approved).  Maybe that's easier to digest.

Within RISC-V, some participants try hard to enforce a requirement for
end-to-end implementations before a spec lands.  This continually
leads to some friction between the software community within RISC-V
and those that "just need the specs done".  If you see something in a
spec going for public review (or even better: before it goes to public
review and is at the committee sign-off stage) that is underspecified,
let us know and we can request remedial action: the ABI effort in Zc
is a good example of this.

Anytime someone tries to skip these requirements, I point them to the
'bset' instruction (which—even though most people assume it—does not
implement 'a | (1 << b)'; instead it implements 'a | (1 << (b &
(XLEN-1)))').  Things like that get caught only if there are
end-to-end software implementations to allow experimentation and
review with various workloads and by a wide community.

Philipp.




> >> Link: https://lists.riscv.org/g/sig-toolchains/message/486
> >>
> >> gcc/ChangeLog
> >>
> >>         doc/invoke.texi (RISC-V): -march doesn't take ISA strings.
> >>
> >> ---
> >>
> >> This is now woefully under-documented, as we can't even fall back on the
> >> "it's just an ISA string" excuse any more.  I'm happy to go document
> >> that, but figured I'd just send this along now so we can have the
> >> discussion.
> >> ---
> >>  gcc/doc/invoke.texi | 8 ++++----
> >>  1 file changed, 4 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> >> index 94a2e20cfc1..780b0364c52 100644
> >> --- a/gcc/doc/invoke.texi
> >> +++ b/gcc/doc/invoke.texi
> >> @@ -28617,11 +28617,11 @@ Produce code conforming to version 20191213.
> >>  The default is @option{-misa-spec=20191213} unless GCC has been configured
> >>  with @option{--with-isa-spec=} specifying a different default version.
> >>
> >> -@item -march=@var{ISA-string}
> >> +@item -march=@var{target-string}
> >>  @opindex march
> >> -Generate code for given RISC-V ISA (e.g.@: @samp{rv64im}).  ISA strings
> >> must be
> >> -lower-case.  Examples include @samp{rv64i}, @samp{rv32g}, @samp{rv32e},
> >> and
> >> -@samp{rv32imaf}.
> >> +Generate code for given target (e.g.@: @samp{rv64im}).  Target strings
> >> are
> >> +similar to ISA strings, but must be lower-case.  Examples include
> >> @samp{rv64i},
> >> +@samp{rv32g}, @samp{rv32e}, and @samp{rv32imaf}.
> >>
> >>  When @option{-march=} is not specified, use the setting from
> >> @option{-mcpu}.
> >>
> >> --
> >> 2.38.1
> >>
> >>