Re: [PATCH v1 1/3] RISC-V: Split "(a & (1 << BIT_NO)) ? 0 : -1" to bexti + addi

[Philipp Tomsich <philipp.tomsich@vrull.eu>]

Kito,

Looks like this series fell by the wayside (possibly, because it
didn't have a cover-letter and was easier to miss)?

Thanks,
Philipp.

On Wed, 25 May 2022 at 00:52, Philipp Tomsich <philipp.tomsich@vrull.eu> wrote:
>
> Consider creating a polarity-reversed mask from a set-bit (i.e., if
> the bit is set, produce all-ones; otherwise: all-zeros).  Using Zbb,
> this can be expressed as bexti, followed by an addi of minus-one.  To
> enable the combiner to discover this opportunity, we need to split the
> canonical expression for "(a & (1 << BIT_NO)) ? 0 : -1" into a form
> combinable into bexti.
>
> Consider the function:
>     long f(long a)
>     {
>       return (a & (1 << BIT_NO)) ? 0 : -1;
>     }
> This produces the following sequence prior to this change:
>     andi        a0,a0,16
>     seqz        a0,a0
>     neg         a0,a0
>     ret
> Following this change, it results in:
>     bexti       a0,a0,4
>     addi        a0,a0,-1
>     ret
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
>
> gcc/ChangeLog:
>
>         * config/riscv/bitmanip.md: Add a splitter to generate
>           polarity-reversed masks from a set bit using bexti + addi.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/zbs-bexti.c: New test.
>
> ---
>
>  gcc/config/riscv/bitmanip.md               | 13 +++++++++++++
>  gcc/testsuite/gcc.target/riscv/zbs-bexti.c | 14 ++++++++++++++
>  2 files changed, 27 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bexti.c
>
> diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
> index 0ab9ffe3c0b..ea5dea13cfb 100644
> --- a/gcc/config/riscv/bitmanip.md
> +++ b/gcc/config/riscv/bitmanip.md
> @@ -340,3 +340,16 @@ (define_insn "*bexti"
>    "TARGET_ZBS"
>    "bexti\t%0,%1,%2"
>    [(set_attr "type" "bitmanip")])
> +
> +;; We can create a polarity-reversed mask (i.e. bit N -> { set = 0, clear = -1 })
> +;; using a bext(i) followed by an addi instruction.
> +;; This splits the canonical representation of "(a & (1 << BIT_NO)) ? 0 : -1".
> +(define_split
> +  [(set (match_operand:GPR 0 "register_operand")
> +       (neg:GPR (eq:GPR (zero_extract:GPR (match_operand:GPR 1 "register_operand")
> +                                          (const_int 1)
> +                                          (match_operand 2))
> +                        (const_int 0))))]
> +  "TARGET_ZBS"
> +  [(set (match_dup 0) (zero_extract:GPR (match_dup 1) (const_int 1) (match_dup 2)))
> +   (set (match_dup 0) (plus:GPR (match_dup 0) (const_int -1)))])
> diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bexti.c b/gcc/testsuite/gcc.target/riscv/zbs-bexti.c
> new file mode 100644
> index 00000000000..99e3b58309c
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/zbs-bexti.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */
> +
> +/* bexti */
> +#define BIT_NO  4
> +
> +long
> +foo0 (long a)
> +{
> +  return (a & (1 << BIT_NO)) ? 0 : -1;
> +}
> +
> +/* { dg-final { scan-assembler "bexti" } } */
> +/* { dg-final { scan-assembler "addi" } } */
> --
> 2.34.1
>