From: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
To: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>,
gcc Patches <gcc-patches@gcc.gnu.org>,
richard.sandiford@arm.com
Subject: Re: [aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
Date: Thu, 19 Jan 2023 12:48:36 +0530 [thread overview]
Message-ID: <CAAgBjMmP9=0nmKku5grZTJjZpRn_o=EudFJnTsPaSjHkWuUtnw@mail.gmail.com> (raw)
In-Reply-To: <mptfsc7q5j6.fsf@arm.com>
On Wed, 18 Jan 2023 at 20:00, Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> writes:
> > Hi Richard,
> > Based on your suggestion in the other thread, the patch uses
> > exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
> > Bootstrap+test in progress on aarch64-linux-gnu.
> > Does it look OK ?
>
> Yeah, this is OK, thanks. IMO it's a latent bug and suitable for stage 4.
Thanks, pushed in 22c75b4ed94bd731cb6e37c507de1d91954a17cf.
Thanks,
Prathamesh
>
> Richard
>
> >
> > Thanks,
> > Prathamesh
> >
> > [aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
> >
> > gcc/ChangeLog:
> > * gcc/config/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
> > exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
> > the pattern.
> > (aarch64_simd_vec_copy_lane<mode>): Likewise.
> > (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
> >
> > diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
> > index 104088f67d2..7cc8c00f0ec 100644
> > --- a/gcc/config/aarch64/aarch64-simd.md
> > +++ b/gcc/config/aarch64/aarch64-simd.md
> > @@ -1064,7 +1064,7 @@
> > (match_operand:<VEL> 1 "aarch64_simd_nonimmediate_operand" "w,?r,Utv"))
> > (match_operand:VALL_F16 3 "register_operand" "0,0,0")
> > (match_operand:SI 2 "immediate_operand" "i,i,i")))]
> > - "TARGET_SIMD"
> > + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0"
> > {
> > int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
> > operands[2] = GEN_INT ((HOST_WIDE_INT) 1 << elt);
> > @@ -1093,7 +1093,7 @@
> > [(match_operand:SI 4 "immediate_operand" "i")])))
> > (match_operand:VALL_F16 1 "register_operand" "0")
> > (match_operand:SI 2 "immediate_operand" "i")))]
> > - "TARGET_SIMD"
> > + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0"
> > {
> > int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
> > operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
> > @@ -1114,7 +1114,7 @@
> > [(match_operand:SI 4 "immediate_operand" "i")])))
> > (match_operand:VALL_F16_NO_V2Q 1 "register_operand" "0")
> > (match_operand:SI 2 "immediate_operand" "i")))]
> > - "TARGET_SIMD"
> > + "TARGET_SIMD && exact_log2 (INTVAL (operands[2])) >= 0"
> > {
> > int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
> > operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
prev parent reply other threads:[~2023-01-19 7:19 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 10:48 Prathamesh Kulkarni
2023-01-18 14:30 ` Richard Sandiford
2023-01-19 7:18 ` Prathamesh Kulkarni [this message]
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