From: "Christoph Müllner" <christoph.muellner@vrull.eu>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>
Subject: Re: [PATCH v2 0/2] riscv: Adding support for XTHead(F)MemIdx
Date: Fri, 20 Oct 2023 20:08:36 +0200 [thread overview]
Message-ID: <CAEg0e7gv8qfzrK2_-Of8AZJNL=UTZf67UaVRbUzqkUz2SXomGQ@mail.gmail.com> (raw)
In-Reply-To: <af834de0-26d8-4c59-a2ce-3ae0e17b2f46@gmail.com>
On Fri, Oct 20, 2023 at 4:33 PM Jeff Law <jeffreyalaw@gmail.com> wrote:
>
>
>
> On 10/20/23 03:53, Christoph Muellner wrote:
> > From: Christoph Müllner <christoph.muellner@vrull.eu>
> >
> > This two patches add support for the XTheadMemIdx
> > and XTheadFMemIdx ISA extensions, that support additional
> > addressing modes. The extensions are implemented in a range
> > of T-Head cores (e.g. C906, C910, C920) and are available
> > on the market for quite some time.
> >
> > The ISA spec can be found here:
> > https://github.com/T-head-Semi/thead-extension-spec
> >
> > An initial version of these patches has been sent a while ago.
> > Jeff Law suggested to use INSNs instead of peepholes to let
> > the combiner do the optimization. This is the major change
> > that this patches have seen.
> Did you happen to do any before/after testing? And if so, did using the
> combiner help with discovery of these cases? I would expect it to have
> done so, but it's always nice to have a confirmation.
I had no doubt this would be equal or better, therefore I did not plan
to do that.
However, measuring this is not that hard, so I just did the exercise
of forward-porting
the peephole-based patchset (and all tiny fixes that the v2 has).
I then built xalancbmk_r/peak (randomly selected) with both compilers and
compared the number of indexed loads and indexed stores in the binary:
v1: 3982 indexed loads / 2447 indexed stores
v2: 4110 indexed loads (+3.2%) / 2476 indexed stores (+1.2%)
So your suggestion indeed helps to discover additional cases.
Thanks again for that!
BR
Christoph
prev parent reply other threads:[~2023-10-20 18:08 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 9:53 Christoph Muellner
2023-10-20 9:53 ` [PATCH v2 1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension Christoph Muellner
2023-10-29 21:44 ` Jeff Law
2023-10-31 13:42 ` Christoph Müllner
2023-10-20 9:53 ` [PATCH v2 2/2] riscv: thead: Add support for the XTheadFMemIdx " Christoph Muellner
2023-10-29 22:25 ` Jeff Law
2023-10-31 13:43 ` Christoph Müllner
2023-10-20 14:33 ` [PATCH v2 0/2] riscv: Adding support for XTHead(F)MemIdx Jeff Law
2023-10-20 18:08 ` Christoph Müllner [this message]
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