From: Uros Bizjak <ubizjak@gmail.com>
To: Richard Biener <richard.guenther@gmail.com>
Cc: Robin Dapp <rdapp@linux.ibm.com>, GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: optabs: Variable index vec_set
Date: Sun, 6 Nov 2022 20:53:23 +0100 [thread overview]
Message-ID: <CAFULd4aO4e5D2UdM3L8iDNTBc6qR8GBuYBz6EfEw9nNG6m3shQ@mail.gmail.com> (raw)
In-Reply-To: <CAFiYyc0pt3iUyiNdaWJz52ksF1nASGcccsHaDktG57qzYwYaRw@mail.gmail.com>
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On Sat, Nov 5, 2022 at 12:25 PM Richard Biener
<richard.guenther@gmail.com> wrote:
>
> On Wed, Nov 2, 2022 at 1:46 PM Uros Bizjak <ubizjak@gmail.com> wrote:
> >
> > On Wed, Nov 2, 2022 at 1:45 PM Robin Dapp <rdapp@linux.ibm.com> wrote:
> > >
> > > > IIRC, I was trying to "fix" modeless operand by giving it a mode, but
> > > > since it made no difference for x86, I later dropped the patch.
> > > > However, operand with a known mode is preferred, so if it works for
> > > > you, just include my patch in your submission. My patch is somehow
> > > > trivial if we want operand to have known mode.
> > >
> > > I'd prefer to push it separately as my patch changes several things in
> > > the s390 backend that are kind of unrelated. Is it OK to do an x86
> > > bootstrap and regtest and push it if everything looks good? You can of
> > > course also do it yourself :)
> >
> > It is a middle-end patch, someone will have to approve it.
>
> The patch is OK
Thanks, pushed with the following ChangeLog:
optabs: Use operand[2] mode in can_vec_set_var_idx_p
Use operand[2] mode in can_vec_set_var_idx_p when checking vec_set_optab.
This change allows non-VOID index operand in vec_set_optab.
2022-11-06 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
* optabs.cc (can_vec_set_var_idx_p): Use operand[2]
mode when checking vec_set_optab.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
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diff --git a/gcc/optabs.cc b/gcc/optabs.cc
index c2a6f971d74..9fc9b1fc6e9 100644
--- a/gcc/optabs.cc
+++ b/gcc/optabs.cc
@@ -4344,12 +4344,17 @@ can_vec_set_var_idx_p (machine_mode vec_mode)
return false;
machine_mode inner_mode = GET_MODE_INNER (vec_mode);
+
rtx reg1 = alloca_raw_REG (vec_mode, LAST_VIRTUAL_REGISTER + 1);
rtx reg2 = alloca_raw_REG (inner_mode, LAST_VIRTUAL_REGISTER + 2);
- rtx reg3 = alloca_raw_REG (VOIDmode, LAST_VIRTUAL_REGISTER + 3);
enum insn_code icode = optab_handler (vec_set_optab, vec_mode);
+ const struct insn_data_d *data = &insn_data[icode];
+ machine_mode idx_mode = data->operand[2].mode;
+
+ rtx reg3 = alloca_raw_REG (idx_mode, LAST_VIRTUAL_REGISTER + 3);
+
return icode != CODE_FOR_nothing && insn_operand_matches (icode, 0, reg1)
&& insn_operand_matches (icode, 1, reg2)
&& insn_operand_matches (icode, 2, reg3);
prev parent reply other threads:[~2022-11-06 19:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 15:42 Robin Dapp
2022-11-02 12:12 ` Robin Dapp
2022-11-02 12:39 ` Uros Bizjak
2022-11-02 12:45 ` Robin Dapp
2022-11-02 12:46 ` Uros Bizjak
2022-11-05 11:25 ` Richard Biener
2022-11-06 19:53 ` Uros Bizjak [this message]
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