[committed] IRA+LRA: Change return type of predicate functions from int to bool

[committed] IRA+LRA: Change return type of predicate functions from int to bool

[Uros Bizjak]

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gcc/ChangeLog:

    * ira.cc (equiv_init_varies_p): Change return type from int to bool
    and adjust function body accordingly.
    (equiv_init_movable_p): Ditto.
    (memref_used_between_p): Ditto.
    * lra-constraints.cc (valid_address_p): Ditto.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Uros.

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diff --git a/gcc/ira.cc b/gcc/ira.cc
index 02dea5d49ee..a1860105c60 100644
--- a/gcc/ira.cc
+++ b/gcc/ira.cc
@@ -3075,7 +3075,7 @@ validate_equiv_mem_from_store (rtx dest, const_rtx set ATTRIBUTE_UNUSED,
     info->equiv_mem_modified = true;
 }
 
-static int equiv_init_varies_p (rtx x);
+static bool equiv_init_varies_p (rtx x);
 
 enum valid_equiv { valid_none, valid_combine, valid_reload };
 
@@ -3145,8 +3145,8 @@ validate_equiv_mem (rtx_insn *start, rtx reg, rtx memref)
   return valid_none;
 }
 
-/* Returns zero if X is known to be invariant.  */
-static int
+/* Returns false if X is known to be invariant.  */
+static bool
 equiv_init_varies_p (rtx x)
 {
   RTX_CODE code = GET_CODE (x);
@@ -3162,14 +3162,14 @@ equiv_init_varies_p (rtx x)
     CASE_CONST_ANY:
     case SYMBOL_REF:
     case LABEL_REF:
-      return 0;
+      return false;
 
     case REG:
       return reg_equiv[REGNO (x)].replace == 0 && rtx_varies_p (x, 0);
 
     case ASM_OPERANDS:
       if (MEM_VOLATILE_P (x))
-	return 1;
+	return true;
 
       /* Fall through.  */
 
@@ -3182,24 +3182,24 @@ equiv_init_varies_p (rtx x)
     if (fmt[i] == 'e')
       {
 	if (equiv_init_varies_p (XEXP (x, i)))
-	  return 1;
+	  return true;
       }
     else if (fmt[i] == 'E')
       {
 	int j;
 	for (j = 0; j < XVECLEN (x, i); j++)
 	  if (equiv_init_varies_p (XVECEXP (x, i, j)))
-	    return 1;
+	    return true;
       }
 
-  return 0;
+  return false;
 }
 
-/* Returns nonzero if X (used to initialize register REGNO) is movable.
+/* Returns true if X (used to initialize register REGNO) is movable.
    X is only movable if the registers it uses have equivalent initializations
    which appear to be within the same loop (or in an inner loop) and movable
    or if they are not candidates for local_alloc and don't vary.  */
-static int
+static bool
 equiv_init_movable_p (rtx x, int regno)
 {
   int i, j;
@@ -3212,7 +3212,7 @@ equiv_init_movable_p (rtx x, int regno)
       return equiv_init_movable_p (SET_SRC (x), regno);
 
     case CLOBBER:
-      return 0;
+      return false;
 
     case PRE_INC:
     case PRE_DEC:
@@ -3220,7 +3220,7 @@ equiv_init_movable_p (rtx x, int regno)
     case POST_DEC:
     case PRE_MODIFY:
     case POST_MODIFY:
-      return 0;
+      return false;
 
     case REG:
       return ((reg_equiv[REGNO (x)].loop_depth >= reg_equiv[regno].loop_depth
@@ -3229,11 +3229,11 @@ equiv_init_movable_p (rtx x, int regno)
 		  && ! rtx_varies_p (x, 0)));
 
     case UNSPEC_VOLATILE:
-      return 0;
+      return false;
 
     case ASM_OPERANDS:
       if (MEM_VOLATILE_P (x))
-	return 0;
+	return false;
 
       /* Fall through.  */
 
@@ -3247,16 +3247,16 @@ equiv_init_movable_p (rtx x, int regno)
       {
       case 'e':
 	if (! equiv_init_movable_p (XEXP (x, i), regno))
-	  return 0;
+	  return false;
 	break;
       case 'E':
 	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
 	  if (! equiv_init_movable_p (XVECEXP (x, i, j), regno))
-	    return 0;
+	    return false;
 	break;
       }
 
-  return 1;
+  return true;
 }
 
 static bool memref_referenced_p (rtx memref, rtx x, bool read_p);
@@ -3370,7 +3370,7 @@ memref_referenced_p (rtx memref, rtx x, bool read_p)
    Callers should not call this routine if START is after END in the
    RTL chain.  */
 
-static int
+static bool
 memref_used_between_p (rtx memref, rtx_insn *start, rtx_insn *end)
 {
   rtx_insn *insn;
@@ -3383,15 +3383,15 @@ memref_used_between_p (rtx memref, rtx_insn *start, rtx_insn *end)
 	continue;
 
       if (memref_referenced_p (memref, PATTERN (insn), false))
-	return 1;
+	return true;
 
       /* Nonconst functions may access memory.  */
       if (CALL_P (insn) && (! RTL_CONST_CALL_P (insn)))
-	return 1;
+	return true;
     }
 
   gcc_assert (insn == NEXT_INSN (end));
-  return 0;
+  return false;
 }
 
 /* Mark REG as having no known equivalence.
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index 123ff662cbc..9bfc88149ff 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -329,20 +329,20 @@ in_mem_p (int regno)
   return get_reg_class (regno) == NO_REGS;
 }
 
-/* Return 1 if ADDR is a valid memory address for mode MODE in address
+/* Return true if ADDR is a valid memory address for mode MODE in address
    space AS, and check that each pseudo has the proper kind of hard
    reg.	 */
-static int
+static bool
 valid_address_p (machine_mode mode ATTRIBUTE_UNUSED,
 		 rtx addr, addr_space_t as)
 {
 #ifdef GO_IF_LEGITIMATE_ADDRESS
   lra_assert (ADDR_SPACE_GENERIC_P (as));
   GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
-  return 0;
+  return false;
 
  win:
-  return 1;
+  return true;
 #else
   return targetm.addr_space.legitimate_address_p (mode, addr, 0, as);
 #endif
@@ -1624,7 +1624,7 @@ insert_move_for_subreg (rtx_insn **before, rtx_insn **after, rtx origreg,
     }
 }
 
-static int valid_address_p (machine_mode mode, rtx addr, addr_space_t as);
+static bool valid_address_p (machine_mode mode, rtx addr, addr_space_t as);
 static bool process_address (int, bool, rtx_insn **, rtx_insn **);
 
 /* Make reloads for subreg in operand NOP with internal subreg mode