* [PATCH][GCC] arm: Add support for Cortex-X1C CPU.
@ 2022-11-10 10:23 Srinath Parvathaneni
2022-11-10 19:49 ` Ramana Radhakrishnan
0 siblings, 1 reply; 2+ messages in thread
From: Srinath Parvathaneni @ 2022-11-10 10:23 UTC (permalink / raw)
To: gcc-patches; +Cc: richard.earnshaw, kyrylo.tkachov
[-- Attachment #1: Type: text/plain, Size: 4593 bytes --]
Hi,
This patch adds the -mcpu support for the Arm Cortex-X1C CPU.
Regression tested on arm-none-eabi and bootstrapped on arm-none-linux-gnueabihf.
Ok for GCC master?
Regards,
Srinath.
gcc/ChangeLog:
2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/arm/arm-cpus.in (cortex-x1c): Define new CPU.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst:
Document Cortex-X1C CPU.
gcc/testsuite/ChangeLog:
2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/multilib.exp: Add tests for Cortex-X1C.
############### Attachment also inlined for ease of reply ###############
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 5a63bc548e54dbfdce5d1df425bd615d81895d80..5ed4db340bc5d7c9a41e6d1a3f660bf2a97b058b 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -1542,6 +1542,17 @@ begin cpu cortex-x1
part d44
end cpu cortex-x1
+begin cpu cortex-x1c
+ cname cortexx1c
+ tune for cortex-a57
+ tune flags LDSCHED
+ architecture armv8.2-a+fp16+dotprod
+ option crypto add FP_ARMv8 CRYPTO
+ costs cortex_a57
+ vendor 41
+ part d4c
+end cpu cortex-x1c
+
begin cpu neoverse-n1
cname neoversen1
alias !ares
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index e6461abcc57cd485025f3e18535267c454662cbe..a10a09e36cd004165b6f1efddeb3bfc29d8337ac 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -255,6 +255,9 @@ Enum(processor_type) String(cortex-a710) Value( TARGET_CPU_cortexa710)
EnumValue
Enum(processor_type) String(cortex-x1) Value( TARGET_CPU_cortexx1)
+EnumValue
+Enum(processor_type) String(cortex-x1c) Value( TARGET_CPU_cortexx1c)
+
EnumValue
Enum(processor_type) String(neoverse-n1) Value( TARGET_CPU_neoversen1)
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index abc290edd094179379f3856a3f8f64781e0c33f2..8af8c936abe31fb60e3de2fd713f4c6946c2a752 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -46,7 +46,7 @@
cortexa73cortexa53,cortexa55,cortexa75,
cortexa76,cortexa76ae,cortexa77,
cortexa78,cortexa78ae,cortexa78c,
- cortexa710,cortexx1,neoversen1,
+ cortexa710,cortexx1,cortexx1c,neoversen1,
cortexa75cortexa55,cortexa76cortexa55,neoversev1,
neoversen2,cortexm23,cortexm33,
cortexm35p,cortexm55,starmc1,
diff --git a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
index 3315114969381995d47162b53abeb9bfc442fd28..d531eced20cbb583ecaba2ab3927937faf69b9de 100644
--- a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
+++ b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
@@ -594,7 +594,7 @@ These :samp:`-m` options are defined for the ARM port:
:samp:`cortex-r7`, :samp:`cortex-r8`, :samp:`cortex-r52`, :samp:`cortex-r52plus`,
:samp:`cortex-m0`, :samp:`cortex-m0plus`, :samp:`cortex-m1`, :samp:`cortex-m3`,
:samp:`cortex-m4`, :samp:`cortex-m7`, :samp:`cortex-m23`, :samp:`cortex-m33`,
- :samp:`cortex-m35p`, :samp:`cortex-m55`, :samp:`cortex-x1`,
+ :samp:`cortex-m35p`, :samp:`cortex-m55`, :samp:`cortex-x1`, :samp:`cortex-x1c`,
:samp:`cortex-m1.small-multiply`, :samp:`cortex-m0.small-multiply`,
:samp:`cortex-m0plus.small-multiply`, :samp:`exynos-m1`, :samp:`marvell-pj4`,
:samp:`neoverse-n1`, :samp:`neoverse-n2`, :samp:`neoverse-v1`, :samp:`xscale`,
diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp
index 2fa648c61dafebb663969198bf7849400a7547f6..f903f028a83f884bdc1521f810f7e70e4130a715 100644
--- a/gcc/testsuite/gcc.target/arm/multilib.exp
+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
@@ -450,6 +450,9 @@ if {[multilib_config "aprofile"] } {
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
+ {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
+ {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
+ {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=soft -mthumb} "thumb/v8-a/nofp"
} {
check_multi_dir $opts $dir
}
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diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 5a63bc548e54dbfdce5d1df425bd615d81895d80..5ed4db340bc5d7c9a41e6d1a3f660bf2a97b058b 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -1542,6 +1542,17 @@ begin cpu cortex-x1
part d44
end cpu cortex-x1
+begin cpu cortex-x1c
+ cname cortexx1c
+ tune for cortex-a57
+ tune flags LDSCHED
+ architecture armv8.2-a+fp16+dotprod
+ option crypto add FP_ARMv8 CRYPTO
+ costs cortex_a57
+ vendor 41
+ part d4c
+end cpu cortex-x1c
+
begin cpu neoverse-n1
cname neoversen1
alias !ares
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index e6461abcc57cd485025f3e18535267c454662cbe..a10a09e36cd004165b6f1efddeb3bfc29d8337ac 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -255,6 +255,9 @@ Enum(processor_type) String(cortex-a710) Value( TARGET_CPU_cortexa710)
EnumValue
Enum(processor_type) String(cortex-x1) Value( TARGET_CPU_cortexx1)
+EnumValue
+Enum(processor_type) String(cortex-x1c) Value( TARGET_CPU_cortexx1c)
+
EnumValue
Enum(processor_type) String(neoverse-n1) Value( TARGET_CPU_neoversen1)
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index abc290edd094179379f3856a3f8f64781e0c33f2..8af8c936abe31fb60e3de2fd713f4c6946c2a752 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -46,7 +46,7 @@
cortexa73cortexa53,cortexa55,cortexa75,
cortexa76,cortexa76ae,cortexa77,
cortexa78,cortexa78ae,cortexa78c,
- cortexa710,cortexx1,neoversen1,
+ cortexa710,cortexx1,cortexx1c,neoversen1,
cortexa75cortexa55,cortexa76cortexa55,neoversev1,
neoversen2,cortexm23,cortexm33,
cortexm35p,cortexm55,starmc1,
diff --git a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
index 3315114969381995d47162b53abeb9bfc442fd28..d531eced20cbb583ecaba2ab3927937faf69b9de 100644
--- a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
+++ b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
@@ -594,7 +594,7 @@ These :samp:`-m` options are defined for the ARM port:
:samp:`cortex-r7`, :samp:`cortex-r8`, :samp:`cortex-r52`, :samp:`cortex-r52plus`,
:samp:`cortex-m0`, :samp:`cortex-m0plus`, :samp:`cortex-m1`, :samp:`cortex-m3`,
:samp:`cortex-m4`, :samp:`cortex-m7`, :samp:`cortex-m23`, :samp:`cortex-m33`,
- :samp:`cortex-m35p`, :samp:`cortex-m55`, :samp:`cortex-x1`,
+ :samp:`cortex-m35p`, :samp:`cortex-m55`, :samp:`cortex-x1`, :samp:`cortex-x1c`,
:samp:`cortex-m1.small-multiply`, :samp:`cortex-m0.small-multiply`,
:samp:`cortex-m0plus.small-multiply`, :samp:`exynos-m1`, :samp:`marvell-pj4`,
:samp:`neoverse-n1`, :samp:`neoverse-n2`, :samp:`neoverse-v1`, :samp:`xscale`,
diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp
index 2fa648c61dafebb663969198bf7849400a7547f6..f903f028a83f884bdc1521f810f7e70e4130a715 100644
--- a/gcc/testsuite/gcc.target/arm/multilib.exp
+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
@@ -450,6 +450,9 @@ if {[multilib_config "aprofile"] } {
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
+ {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
+ {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
+ {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=soft -mthumb} "thumb/v8-a/nofp"
} {
check_multi_dir $opts $dir
}
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH][GCC] arm: Add support for Cortex-X1C CPU.
2022-11-10 10:23 [PATCH][GCC] arm: Add support for Cortex-X1C CPU Srinath Parvathaneni
@ 2022-11-10 19:49 ` Ramana Radhakrishnan
0 siblings, 0 replies; 2+ messages in thread
From: Ramana Radhakrishnan @ 2022-11-10 19:49 UTC (permalink / raw)
To: Srinath Parvathaneni; +Cc: gcc-patches, richard.earnshaw, kyrylo.tkachov
On Thu, Nov 10, 2022 at 10:24 AM Srinath Parvathaneni via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>
> This patch adds the -mcpu support for the Arm Cortex-X1C CPU.
>
> Regression tested on arm-none-eabi and bootstrapped on arm-none-linux-gnueabihf.
>
> Ok for GCC master?
Ok
Ramana
>
> Regards,
> Srinath.
>
> gcc/ChangeLog:
>
> 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
>
> * config/arm/arm-cpus.in (cortex-x1c): Define new CPU.
> * config/arm/arm-tables.opt: Regenerate.
> * config/arm/arm-tune.md: Likewise.
> * doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst:
> Document Cortex-X1C CPU.
>
> gcc/testsuite/ChangeLog:
>
> 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
>
> * gcc.target/arm/multilib.exp: Add tests for Cortex-X1C.
>
>
> ############### Attachment also inlined for ease of reply ###############
>
>
> diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
> index 5a63bc548e54dbfdce5d1df425bd615d81895d80..5ed4db340bc5d7c9a41e6d1a3f660bf2a97b058b 100644
> --- a/gcc/config/arm/arm-cpus.in
> +++ b/gcc/config/arm/arm-cpus.in
> @@ -1542,6 +1542,17 @@ begin cpu cortex-x1
> part d44
> end cpu cortex-x1
>
> +begin cpu cortex-x1c
> + cname cortexx1c
> + tune for cortex-a57
> + tune flags LDSCHED
> + architecture armv8.2-a+fp16+dotprod
> + option crypto add FP_ARMv8 CRYPTO
> + costs cortex_a57
> + vendor 41
> + part d4c
> +end cpu cortex-x1c
> +
> begin cpu neoverse-n1
> cname neoversen1
> alias !ares
> diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
> index e6461abcc57cd485025f3e18535267c454662cbe..a10a09e36cd004165b6f1efddeb3bfc29d8337ac 100644
> --- a/gcc/config/arm/arm-tables.opt
> +++ b/gcc/config/arm/arm-tables.opt
> @@ -255,6 +255,9 @@ Enum(processor_type) String(cortex-a710) Value( TARGET_CPU_cortexa710)
> EnumValue
> Enum(processor_type) String(cortex-x1) Value( TARGET_CPU_cortexx1)
>
> +EnumValue
> +Enum(processor_type) String(cortex-x1c) Value( TARGET_CPU_cortexx1c)
> +
> EnumValue
> Enum(processor_type) String(neoverse-n1) Value( TARGET_CPU_neoversen1)
>
> diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
> index abc290edd094179379f3856a3f8f64781e0c33f2..8af8c936abe31fb60e3de2fd713f4c6946c2a752 100644
> --- a/gcc/config/arm/arm-tune.md
> +++ b/gcc/config/arm/arm-tune.md
> @@ -46,7 +46,7 @@
> cortexa73cortexa53,cortexa55,cortexa75,
> cortexa76,cortexa76ae,cortexa77,
> cortexa78,cortexa78ae,cortexa78c,
> - cortexa710,cortexx1,neoversen1,
> + cortexa710,cortexx1,cortexx1c,neoversen1,
> cortexa75cortexa55,cortexa76cortexa55,neoversev1,
> neoversen2,cortexm23,cortexm33,
> cortexm35p,cortexm55,starmc1,
> diff --git a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
> index 3315114969381995d47162b53abeb9bfc442fd28..d531eced20cbb583ecaba2ab3927937faf69b9de 100644
> --- a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
> +++ b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/arm-options.rst
> @@ -594,7 +594,7 @@ These :samp:`-m` options are defined for the ARM port:
> :samp:`cortex-r7`, :samp:`cortex-r8`, :samp:`cortex-r52`, :samp:`cortex-r52plus`,
> :samp:`cortex-m0`, :samp:`cortex-m0plus`, :samp:`cortex-m1`, :samp:`cortex-m3`,
> :samp:`cortex-m4`, :samp:`cortex-m7`, :samp:`cortex-m23`, :samp:`cortex-m33`,
> - :samp:`cortex-m35p`, :samp:`cortex-m55`, :samp:`cortex-x1`,
> + :samp:`cortex-m35p`, :samp:`cortex-m55`, :samp:`cortex-x1`, :samp:`cortex-x1c`,
> :samp:`cortex-m1.small-multiply`, :samp:`cortex-m0.small-multiply`,
> :samp:`cortex-m0plus.small-multiply`, :samp:`exynos-m1`, :samp:`marvell-pj4`,
> :samp:`neoverse-n1`, :samp:`neoverse-n2`, :samp:`neoverse-v1`, :samp:`xscale`,
> diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp
> index 2fa648c61dafebb663969198bf7849400a7547f6..f903f028a83f884bdc1521f810f7e70e4130a715 100644
> --- a/gcc/testsuite/gcc.target/arm/multilib.exp
> +++ b/gcc/testsuite/gcc.target/arm/multilib.exp
> @@ -450,6 +450,9 @@ if {[multilib_config "aprofile"] } {
> {-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
> {-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
> {-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
> + {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
> + {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
> + {-mcpu=cortex-x1c -mfpu=auto -mfloat-abi=soft -mthumb} "thumb/v8-a/nofp"
> } {
> check_multi_dir $opts $dir
> }
>
>
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2022-11-10 10:23 [PATCH][GCC] arm: Add support for Cortex-X1C CPU Srinath Parvathaneni
2022-11-10 19:49 ` Ramana Radhakrishnan
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