* [PATCH 2/2] xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STACKADJ_RTX
@ 2022-07-29 19:32 Takayuki 'January June' Suwa
2022-07-30 4:15 ` Max Filippov
0 siblings, 1 reply; 2+ messages in thread
From: Takayuki 'January June' Suwa @ 2022-07-29 19:32 UTC (permalink / raw)
To: GCC Patches
The hard register A10 was already allocated for EH_RETURN_STACKADJ_RTX.
(although exception handling and sibling call may not apply at the same time,
but for safety)
gcc/ChangeLog:
* config/xtensa/xtensa.md: Change hard register number used in
the split patterns for indirect sibling call fixups from 10 to 11,
the last free one for the CALL0 ABI.
---
gcc/config/xtensa/xtensa.md | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 899ce2755aa..1294aab6c5d 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -25,7 +25,7 @@
(A7_REG 7)
(A8_REG 8)
(A9_REG 9)
- (A10_REG 10)
+ (A11_REG 11)
(UNSPEC_NOP 2)
(UNSPEC_PLT 3)
@@ -2295,9 +2295,9 @@
"reload_completed
&& !TARGET_WINDOWED_ABI && SIBLING_CALL_P (insn)
&& ! call_used_or_fixed_reg_p (REGNO (operands[0]))"
- [(set (reg:SI A10_REG)
+ [(set (reg:SI A11_REG)
(match_dup 0))
- (call (mem:SI (reg:SI A10_REG))
+ (call (mem:SI (reg:SI A11_REG))
(match_dup 1))])
(define_expand "sibcall_value"
@@ -2328,10 +2328,10 @@
"reload_completed
&& !TARGET_WINDOWED_ABI && SIBLING_CALL_P (insn)
&& ! call_used_or_fixed_reg_p (REGNO (operands[1]))"
- [(set (reg:SI A10_REG)
+ [(set (reg:SI A11_REG)
(match_dup 1))
(set (match_dup 0)
- (call (mem:SI (reg:SI A10_REG))
+ (call (mem:SI (reg:SI A11_REG))
(match_dup 2)))])
(define_insn "entry"
--
2.20.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH 2/2] xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STACKADJ_RTX
2022-07-29 19:32 [PATCH 2/2] xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STACKADJ_RTX Takayuki 'January June' Suwa
@ 2022-07-30 4:15 ` Max Filippov
0 siblings, 0 replies; 2+ messages in thread
From: Max Filippov @ 2022-07-30 4:15 UTC (permalink / raw)
To: Takayuki 'January June' Suwa; +Cc: GCC Patches
On Fri, Jul 29, 2022 at 12:34 PM Takayuki 'January June' Suwa
<jjsuwa_sys3175@yahoo.co.jp> wrote:
>
> The hard register A10 was already allocated for EH_RETURN_STACKADJ_RTX.
> (although exception handling and sibling call may not apply at the same time,
> but for safety)
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md: Change hard register number used in
> the split patterns for indirect sibling call fixups from 10 to 11,
> the last free one for the CALL0 ABI.
> ---
> gcc/config/xtensa/xtensa.md | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
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2022-07-29 19:32 [PATCH 2/2] xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STACKADJ_RTX Takayuki 'January June' Suwa
2022-07-30 4:15 ` Max Filippov
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