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From: Max Filippov <jcmvbkbc@gmail.com>
To: "Takayuki 'January June' Suwa" <jjsuwa_sys3175@yahoo.co.jp>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH 5/5] xtensa: Improve bswap[sd]i2 insn patterns
Date: Thu, 26 May 2022 10:04:11 -0700	[thread overview]
Message-ID: <CAMo8Bf+m4KU3ybM8rRcT-PR+-nse13mbrUfSn431fip0UoBRoA@mail.gmail.com> (raw)
In-Reply-To: <0934250f-8808-0176-94f7-a6c7d37288b5@yahoo.co.jp>

On Fri, May 13, 2022 at 6:35 AM Takayuki 'January June' Suwa
<jjsuwa_sys3175@yahoo.co.jp> wrote:
>
> This patch makes bswap[sd]i2 better register allocation, and reconstructs
> bswapsi2 in order to take advantage of GIMPLE manual byte-swapping
> recognition.
>
> gcc/ChangeLog:
>
>         * gcc/config/xtensa/xtensa.md (bswapsi2): New expansion pattern.
>         (bswapsi2_internal): Revise the template and condition, and add
>         detection code for preceding the same insn in order to omit a
>         "SSAI 8" instruction of the latter.
>         (bswapdi2): Suppress built-in insn expansion with the corresponding
>         library call when optimizing for size.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/xtensa/bswap-O1.c: New.
>         * gcc.target/xtensa/bswap-O2.c, gcc.target/xtensa/bswap-Os.c:
>         Ditto.
> ---
>   gcc/config/xtensa/xtensa.md                | 77 +++++++++++++++++-----
>   gcc/testsuite/gcc.target/xtensa/bswap-O1.c | 37 +++++++++++
>   gcc/testsuite/gcc.target/xtensa/bswap-O2.c | 37 +++++++++++
>   gcc/testsuite/gcc.target/xtensa/bswap-Os.c | 37 +++++++++++
>   4 files changed, 172 insertions(+), 16 deletions(-)
>   create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-O1.c
>   create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-O2.c
>   create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-Os.c

This patch breaks the test gcc.target/xtensa/bswap.c, but
since it introduces three other tests that cover the same area
I've dropped that test.

I've regtested it for target=xtensa-linux-uclibc, there's no new regressions,
but I have a question: what guarantees that no instruction that changes
the SAR register can be moved between two adjacent bswapsi2_internal
instructions?

--
Thanks.
-- Max

      reply	other threads:[~2022-05-26 17:04 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-13 13:33 Takayuki 'January June' Suwa
2022-05-26 17:04 ` Max Filippov [this message]

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