Re: RISC-V: Remove masking third operand of rotate instructions

[Joern Rennecke <joern.rennecke@embecosm.com>]

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This breaks building libstdc++-v3 for
-march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b
-mabi=ilp32f .

[amylaar@damia tstd]$
/home/amylaar/embecosm/fsf-riscv/riscv-gnu-toolchain/build-gcc-newlib-stage2/./gcc/cc1plus
20230518-1.cc -quiet -dumpbase memory_resource.cc -dumpbase-ext .cc
-mcmodel=medany -march=rv32imafdcv_zicsr
_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b
-mabi=ilp32f -mtune=rocket -misa-spec=20191213
-march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128
b_zvl32b_zvl64b -Os -Wall -Wextra -Wwrite-strings -Wcast-qual -Wabi=2
-std=gnu++17 -version -fdiagnostics-show-location=once
-ffunction-sections -fdata-sections -frandom-seed=memory_resource.lo
-fimplicit-templates -o mem
ory_resource.s
GNU C++17 (GCC) version 14.0.0 20230518 (experimental) (riscv64-unknown-elf)
        compiled by GNU C version 11.3.1 20220421 (Red Hat 11.3.1-2),
GMP version 6.2.0, MPFR version 4.1.0-p13, MPC version 1.2.1, isl
version isl-0.16.1-GMP

GGC heuristics: --param ggc-min-expand=30 --param ggc-min-heapsize=4096
Compiler executable checksum: d7da457b477a50631d59e9ee36a0d79f
/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc:226:36:
warning: 'std::pmr::monotonic_buffer_resource::_Chunk' has a field
'std::pmr::{anonymous}::aligned_size<64> std::pmr::monotonic_buffer
_resource::_Chunk::_M_size' whose type uses the anonymous namespace
[-Wsubobject-linkage]
  226 |   class monotonic_buffer_resource::_Chunk
      |                                    ^~~~~~
/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc:756:12:
warning: 'std::pmr::__pool_resource::_Pool::vector' has a field
'std::pmr::{anonymous}::chunk* std::pmr::__pool_resource::_Pool::vecto
r::data' whose type uses the anonymous namespace [-Wsubobject-linkage]
  756 |     struct vector
      |            ^~~~~~
/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc:861:27:
warning: 'std::pmr::__pool_resource::_BigBlock' has a base
'std::pmr::{anonymous}::big_block' which uses the anonymous namespace
[-Wsu
bobject-linkage]
  861 |   struct __pool_resource::_BigBlock : big_block
      |                           ^~~~~~~~~
/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc:
In member function 'void
std::pmr::monotonic_buffer_resource::_M_release_buffers()':
/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc:302:3:
error: unable to generate reloads for:
  302 |   }
      |   ^
(insn 22 21 23 4 (set (reg:SI 13 a3)
        (ashift:SI (const_int 1 [0x1])
            (subreg:QI (and:SI (reg:SI 137 [ _9 ])
                    (const_int 63 [0x3f])) 0)))
"/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc":274:19
403 {*bsetsi_1_mask}
     (expr_list:REG_DEAD (reg:SI 137 [ _9 ])
        (nil)))
during RTL pass: reload
/home/amylaar/embecosm/fsf-riscv/gcc/libstdc++-v3/src/c++17/memory_resource.cc:302:3:
internal compiler error: in curr_insn_transform, at
lra-constraints.cc:4231
0x8a3219 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
        /home/amylaar/embecosm/fsf-riscv/gcc/gcc/rtl-error.cc:108
0x87c243 curr_insn_transform
        /home/amylaar/embecosm/fsf-riscv/gcc/gcc/lra-constraints.cc:4231
0x10ab673 lra_constraints(bool)
        /home/amylaar/embecosm/fsf-riscv/gcc/gcc/lra-constraints.cc:5396
0x1093092 lra(_IO_FILE*)
        /home/amylaar/embecosm/fsf-riscv/gcc/gcc/lra.cc:2375
0x104bd41 do_reload
        /home/amylaar/embecosm/fsf-riscv/gcc/gcc/ira.cc:5967
0x104bd41 execute
        /home/amylaar/embecosm/fsf-riscv/gcc/gcc/ira.cc:6153
Please submit a full bug report, with preprocessed source (by using
-freport-bug).

The issue is that you have loosened the <X:shiftm1> predicates used in
 bset<X:mode>_1_mask without likewise loosening the <X:shiftm1p> / DsS
/ DsD constraints.

The attached patch fixes this build failure.

To reproduce the failure compile the attached 20230518-1.cc with the
riscv cc1plus
<path-to-your-gcc-build-directory>/cc1plus 20230518-1.cc -quiet
-dumpbase memory_resource.cc -dumpbase-ext .cc -mcmodel=medany
-march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b
-mabi=ilp32f -mtune=rocket -misa-spec=20191213
-march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b
-Os -Wall -Wextra -Wwrite-strings -Wcast-qual -Wabi=2 -std=gnu++17
-version -fdiagnostics-show-location=once -ffunction-sections
-fdata-sections -frandom-seed=memory_resource.lo -fimplicit-templates
-o memory_resource.s

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diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index c448e6b37e9..44525b2da49 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -65,13 +65,13 @@
   "@internal
    31 immediate"
   (and (match_code "const_int")
-       (match_test "ival == 31")))
+       (match_test "(ival & 31) == 31")))
 
 (define_constraint "DsD"
   "@internal
    63 immediate"
   (and (match_code "const_int")
-       (match_test "ival == 63")))
+       (match_test "(ival & 63) == 63")))
 
 (define_constraint "DbS"
   "@internal"

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