* [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] [not found] <20220915033043.3484071-1-lingling.kong@intel.com> @ 2022-09-15 3:36 ` Kong, Lingling 2022-09-15 3:45 ` Hongtao Liu 0 siblings, 1 reply; 4+ messages in thread From: Kong, Lingling @ 2022-09-15 3:36 UTC (permalink / raw) To: gcc-patches, Liu, Hongtao Hi The patch is to fix vec_init_dup_v16bf, add correct handle for v16bf mode in ix86_expand_vector_init_duplicate. Add testcase with sse2 without avx2. OK for master? gcc/ChangeLog: PR target/106887 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): Fixed V16BF mode case. gcc/testsuite/ChangeLog: PR target/106887 * gcc.target/i386/vect-bfloat16-2c.c: New test. --- gcc/config/i386/i386-expand.cc | 1 + .../gcc.target/i386/vect-bfloat16-2c.c | 76 +++++++++++++++++++ 2 files changed, 77 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index d7b49c99dc8..9451c561489 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -15111,6 +15111,7 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode, { machine_mode hvmode = (mode == V16HImode ? V8HImode : mode == V16HFmode ? V8HFmode + : mode == V16BFmode ? V8BFmode : V16QImode); rtx x = gen_reg_rtx (hvmode); diff --git a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c new file mode 100644 index 00000000000..bead94e46a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c @@ -0,0 +1,76 @@ +/* { dg-do compile } */ +/* { dg-options "-mf16c -msse2 -mno-avx2 -O2" } */ + +typedef __bf16 v8bf __attribute__ ((__vector_size__ (16))); typedef +__bf16 v16bf __attribute__ ((__vector_size__ (32))); + +#define VEC_EXTRACT(V,S,IDX) \ + S \ + __attribute__((noipa)) \ + vec_extract_##V##_##IDX (V v) \ + { \ + return v[IDX]; \ + } + +#define VEC_SET(V,S,IDX) \ + V \ + __attribute__((noipa)) \ + vec_set_##V##_##IDX (V v, S s) \ + { \ + v[IDX] = s; \ + return v; \ + } + +v8bf +vec_init_v8bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8) { + return __extension__ (v8bf) {a1, a2, a3, a4, a5, a6, a7, a8}; } + +v16bf +vec_init_v16bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8, + __bf16 a9, __bf16 a10, __bf16 a11, __bf16 a12, + __bf16 a13, __bf16 a14, __bf16 a15, __bf16 a16) { + return __extension__ (v16bf) {a1, a2, a3, a4, a5, a6, a7, a8, + a9, a10, a11, a12, a13, a14, a15, a16}; } + +v8bf +vec_init_dup_v8bf (__bf16 a1) +{ + return __extension__ (v8bf) {a1, a1, a1, a1, a1, a1, a1, a1}; } + +v16bf +vec_init_dup_v16bf (__bf16 a1) +{ + return __extension__ (v16bf) {a1, a1, a1, a1, a1, a1, a1, a1, + a1, a1, a1, a1, a1, a1, a1, a1}; +} + +/* { dg-final { scan-assembler-times "vpunpcklwd" 12 } } */ +/* { dg-final { scan-assembler-times "vpunpckldq" 6 } } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq" 3 } } */ + +VEC_EXTRACT (v8bf, __bf16, 0); +VEC_EXTRACT (v8bf, __bf16, 4); +VEC_EXTRACT (v16bf, __bf16, 0); +VEC_EXTRACT (v16bf, __bf16, 3); +VEC_EXTRACT (v16bf, __bf16, 8); +VEC_EXTRACT (v16bf, __bf16, 15); +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$8" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$6" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$14" 1 } } */ +/* { dg-final { scan-assembler-times "vextract" 4 } } */ + +VEC_SET (v8bf, __bf16, 4); +VEC_SET (v16bf, __bf16, 3); +VEC_SET (v16bf, __bf16, 8); +VEC_SET (v16bf, __bf16, 15); +/* { dg-final { scan-assembler-times "vpblendw" 3 { target { ! ia32 } } +} } */ + +/* { dg-final { scan-assembler-times "vpinsrw" 30 { target ia32 } } } +*/ + -- 2.18.2 ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] 2022-09-15 3:36 ` [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] Kong, Lingling @ 2022-09-15 3:45 ` Hongtao Liu 2022-09-16 7:40 ` Kong, Lingling 0 siblings, 1 reply; 4+ messages in thread From: Hongtao Liu @ 2022-09-15 3:45 UTC (permalink / raw) To: Kong, Lingling; +Cc: gcc-patches, Liu, Hongtao On Thu, Sep 15, 2022 at 11:36 AM Kong, Lingling via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Hi > > The patch is to fix vec_init_dup_v16bf, add correct handle for v16bf mode in ix86_expand_vector_init_duplicate. > Add testcase with sse2 without avx2. > > OK for master? > > gcc/ChangeLog: > > PR target/106887 > * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): > Fixed V16BF mode case. > > gcc/testsuite/ChangeLog: > > PR target/106887 > * gcc.target/i386/vect-bfloat16-2c.c: New test. > --- > gcc/config/i386/i386-expand.cc | 1 + > .../gcc.target/i386/vect-bfloat16-2c.c | 76 +++++++++++++++++++ > 2 files changed, 77 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index d7b49c99dc8..9451c561489 100644 > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -15111,6 +15111,7 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode, > { > machine_mode hvmode = (mode == V16HImode ? V8HImode > : mode == V16HFmode ? V8HFmode > + : mode == V16BFmode ? V8BFmode Can it be written as switch case? > : V16QImode); > rtx x = gen_reg_rtx (hvmode); > > diff --git a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > new file mode 100644 > index 00000000000..bead94e46a1 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > @@ -0,0 +1,76 @@ > +/* { dg-do compile } */ > +/* { dg-options "-mf16c -msse2 -mno-avx2 -O2" } */ > + > +typedef __bf16 v8bf __attribute__ ((__vector_size__ (16))); typedef > +__bf16 v16bf __attribute__ ((__vector_size__ (32))); > + > +#define VEC_EXTRACT(V,S,IDX) \ > + S \ > + __attribute__((noipa)) \ > + vec_extract_##V##_##IDX (V v) \ > + { \ > + return v[IDX]; \ > + } > + > +#define VEC_SET(V,S,IDX) \ > + V \ > + __attribute__((noipa)) \ > + vec_set_##V##_##IDX (V v, S s) \ > + { \ > + v[IDX] = s; \ > + return v; \ > + } > + > +v8bf > +vec_init_v8bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, > + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8) { > + return __extension__ (v8bf) {a1, a2, a3, a4, a5, a6, a7, a8}; } > + > +v16bf > +vec_init_v16bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, > + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8, > + __bf16 a9, __bf16 a10, __bf16 a11, __bf16 a12, > + __bf16 a13, __bf16 a14, __bf16 a15, __bf16 a16) { > + return __extension__ (v16bf) {a1, a2, a3, a4, a5, a6, a7, a8, > + a9, a10, a11, a12, a13, a14, a15, a16}; } > + > +v8bf > +vec_init_dup_v8bf (__bf16 a1) > +{ > + return __extension__ (v8bf) {a1, a1, a1, a1, a1, a1, a1, a1}; } > + > +v16bf > +vec_init_dup_v16bf (__bf16 a1) > +{ > + return __extension__ (v16bf) {a1, a1, a1, a1, a1, a1, a1, a1, > + a1, a1, a1, a1, a1, a1, a1, a1}; > +} > + > +/* { dg-final { scan-assembler-times "vpunpcklwd" 12 } } */ > +/* { dg-final { scan-assembler-times "vpunpckldq" 6 } } */ > +/* { dg-final { scan-assembler-times "vpunpcklqdq" 3 } } */ > + > +VEC_EXTRACT (v8bf, __bf16, 0); > +VEC_EXTRACT (v8bf, __bf16, 4); > +VEC_EXTRACT (v16bf, __bf16, 0); > +VEC_EXTRACT (v16bf, __bf16, 3); > +VEC_EXTRACT (v16bf, __bf16, 8); > +VEC_EXTRACT (v16bf, __bf16, 15); > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$8" 1 } } */ > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$6" 1 } } */ > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$14" 1 } } */ > +/* { dg-final { scan-assembler-times "vextract" 4 } } */ > + > +VEC_SET (v8bf, __bf16, 4); > +VEC_SET (v16bf, __bf16, 3); > +VEC_SET (v16bf, __bf16, 8); > +VEC_SET (v16bf, __bf16, 15); > +/* { dg-final { scan-assembler-times "vpblendw" 3 { target { ! ia32 } } > +} } */ > + > +/* { dg-final { scan-assembler-times "vpinsrw" 30 { target ia32 } } } > +*/ > + > -- > 2.18.2 > -- BR, Hongtao ^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] 2022-09-15 3:45 ` Hongtao Liu @ 2022-09-16 7:40 ` Kong, Lingling 2022-09-16 7:43 ` Liu, Hongtao 0 siblings, 1 reply; 4+ messages in thread From: Kong, Lingling @ 2022-09-16 7:40 UTC (permalink / raw) To: Hongtao Liu; +Cc: gcc-patches, Liu, Hongtao [-- Attachment #1: Type: text/plain, Size: 5606 bytes --] Hi, > > machine_mode hvmode = (mode == V16HImode ? V8HImode > > : mode == V16HFmode ? V8HFmode > > + : mode == V16BFmode ? V8BFmode > Can it be written as switch case? Sure, I fixed it in new patch. Thanks again for take a look. OK for master ? Thanks, Lingling > -----Original Message----- > From: Hongtao Liu <crazylht@gmail.com> > Sent: Thursday, September 15, 2022 11:46 AM > To: Kong, Lingling <lingling.kong@intel.com> > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > Subject: Re: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] > > On Thu, Sep 15, 2022 at 11:36 AM Kong, Lingling via Gcc-patches <gcc- > patches@gcc.gnu.org> wrote: > > > > Hi > > > > The patch is to fix vec_init_dup_v16bf, add correct handle for v16bf mode in > ix86_expand_vector_init_duplicate. > > Add testcase with sse2 without avx2. > > > > OK for master? > > > > gcc/ChangeLog: > > > > PR target/106887 > > * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): > > Fixed V16BF mode case. > > > > gcc/testsuite/ChangeLog: > > > > PR target/106887 > > * gcc.target/i386/vect-bfloat16-2c.c: New test. > > --- > > gcc/config/i386/i386-expand.cc | 1 + > > .../gcc.target/i386/vect-bfloat16-2c.c | 76 +++++++++++++++++++ > > 2 files changed, 77 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > > > diff --git a/gcc/config/i386/i386-expand.cc > > b/gcc/config/i386/i386-expand.cc index d7b49c99dc8..9451c561489 100644 > > --- a/gcc/config/i386/i386-expand.cc > > +++ b/gcc/config/i386/i386-expand.cc > > @@ -15111,6 +15111,7 @@ ix86_expand_vector_init_duplicate (bool > mmx_ok, machine_mode mode, > > { > > machine_mode hvmode = (mode == V16HImode ? V8HImode > > : mode == V16HFmode ? V8HFmode > > + : mode == V16BFmode ? V8BFmode > Can it be written as switch case? > > : V16QImode); > > rtx x = gen_reg_rtx (hvmode); > > > > diff --git a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > new file mode 100644 > > index 00000000000..bead94e46a1 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > @@ -0,0 +1,76 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-mf16c -msse2 -mno-avx2 -O2" } */ > > + > > +typedef __bf16 v8bf __attribute__ ((__vector_size__ (16))); typedef > > +__bf16 v16bf __attribute__ ((__vector_size__ (32))); > > + > > +#define VEC_EXTRACT(V,S,IDX) \ > > + S \ > > + __attribute__((noipa)) \ > > + vec_extract_##V##_##IDX (V v) \ > > + { \ > > + return v[IDX]; \ > > + } > > + > > +#define VEC_SET(V,S,IDX) \ > > + V \ > > + __attribute__((noipa)) \ > > + vec_set_##V##_##IDX (V v, S s) \ > > + { \ > > + v[IDX] = s; \ > > + return v; \ > > + } > > + > > +v8bf > > +vec_init_v8bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, > > + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8) { > > + return __extension__ (v8bf) {a1, a2, a3, a4, a5, a6, a7, a8}; } > > + > > +v16bf > > +vec_init_v16bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, > > + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8, > > + __bf16 a9, __bf16 a10, __bf16 a11, __bf16 a12, > > + __bf16 a13, __bf16 a14, __bf16 a15, __bf16 a16) { > > + return __extension__ (v16bf) {a1, a2, a3, a4, a5, a6, a7, a8, > > + a9, a10, a11, a12, a13, a14, a15, > > +a16}; } > > + > > +v8bf > > +vec_init_dup_v8bf (__bf16 a1) > > +{ > > + return __extension__ (v8bf) {a1, a1, a1, a1, a1, a1, a1, a1}; } > > + > > +v16bf > > +vec_init_dup_v16bf (__bf16 a1) > > +{ > > + return __extension__ (v16bf) {a1, a1, a1, a1, a1, a1, a1, a1, > > + a1, a1, a1, a1, a1, a1, a1, a1}; } > > + > > +/* { dg-final { scan-assembler-times "vpunpcklwd" 12 } } */ > > +/* { dg-final { scan-assembler-times "vpunpckldq" 6 } } */ > > +/* { dg-final { scan-assembler-times "vpunpcklqdq" 3 } } */ > > + > > +VEC_EXTRACT (v8bf, __bf16, 0); > > +VEC_EXTRACT (v8bf, __bf16, 4); > > +VEC_EXTRACT (v16bf, __bf16, 0); > > +VEC_EXTRACT (v16bf, __bf16, 3); > > +VEC_EXTRACT (v16bf, __bf16, 8); > > +VEC_EXTRACT (v16bf, __bf16, 15); > > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$8" 1 } } */ > > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$6" 1 } } */ > > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$14" 1 } } */ > > +/* { dg-final { scan-assembler-times "vextract" 4 } } */ > > + > > +VEC_SET (v8bf, __bf16, 4); > > +VEC_SET (v16bf, __bf16, 3); > > +VEC_SET (v16bf, __bf16, 8); > > +VEC_SET (v16bf, __bf16, 15); > > +/* { dg-final { scan-assembler-times "vpblendw" 3 { target { ! ia32 } > > +} } } */ > > + > > +/* { dg-final { scan-assembler-times "vpinsrw" 30 { target ia32 } } } > > +*/ > > + > > -- > > 2.18.2 > > > > > -- > BR, > Hongtao [-- Attachment #2: 0001-i386-Fixed-vec_init_dup_v16bf-PR106887.patch --] [-- Type: application/octet-stream, Size: 4876 bytes --] From 25049cf7c3a900b6ad5cec9d00335fbfc14c56ac Mon Sep 17 00:00:00 2001 From: konglin1 <lingling.kong@intel.com> Date: Wed, 14 Sep 2022 14:56:49 +0800 Subject: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] gcc/ChangeLog: PR target/106887 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): Fixed V16BF mode case. gcc/testsuite/ChangeLog: PR target/106887 * gcc.target/i386/vect-bfloat16-2c.c: New test. --- gcc/config/i386/i386-expand.cc | 43 +++++++++-- .../gcc.target/i386/vect-bfloat16-2c.c | 76 +++++++++++++++++++ 2 files changed, 112 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index d7b49c99dc8..d37cc824620 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -15109,9 +15109,24 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode, return ix86_vector_duplicate_value (mode, target, val); else { - machine_mode hvmode = (mode == V16HImode ? V8HImode - : mode == V16HFmode ? V8HFmode - : V16QImode); + machine_mode hvmode; + switch (mode) + { + case V16HImode: + hvmode = V8HImode; + break; + case V16HFmode: + hvmode = V8HFmode; + break; + case V16BFmode: + hvmode = V8BFmode; + break; + case V32QImode: + hvmode = V16QImode; + break; + default: + gcc_unreachable (); + } rtx x = gen_reg_rtx (hvmode); ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val); @@ -15130,10 +15145,24 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode, return ix86_vector_duplicate_value (mode, target, val); else { - machine_mode hvmode = (mode == V32HImode ? V16HImode - : mode == V32HFmode ? V16HFmode - : mode == V32BFmode ? V16BFmode - : V32QImode); + machine_mode hvmode; + switch (mode) + { + case V32HImode: + hvmode = V16HImode; + break; + case V32HFmode: + hvmode = V16HFmode; + break; + case V32BFmode: + hvmode = V16BFmode; + break; + case V64QImode: + hvmode = V32QImode; + break; + default: + gcc_unreachable (); + } rtx x = gen_reg_rtx (hvmode); ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val); diff --git a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c new file mode 100644 index 00000000000..bead94e46a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c @@ -0,0 +1,76 @@ +/* { dg-do compile } */ +/* { dg-options "-mf16c -msse2 -mno-avx2 -O2" } */ + +typedef __bf16 v8bf __attribute__ ((__vector_size__ (16))); +typedef __bf16 v16bf __attribute__ ((__vector_size__ (32))); + +#define VEC_EXTRACT(V,S,IDX) \ + S \ + __attribute__((noipa)) \ + vec_extract_##V##_##IDX (V v) \ + { \ + return v[IDX]; \ + } + +#define VEC_SET(V,S,IDX) \ + V \ + __attribute__((noipa)) \ + vec_set_##V##_##IDX (V v, S s) \ + { \ + v[IDX] = s; \ + return v; \ + } + +v8bf +vec_init_v8bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8) +{ + return __extension__ (v8bf) {a1, a2, a3, a4, a5, a6, a7, a8}; +} + +v16bf +vec_init_v16bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8, + __bf16 a9, __bf16 a10, __bf16 a11, __bf16 a12, + __bf16 a13, __bf16 a14, __bf16 a15, __bf16 a16) +{ + return __extension__ (v16bf) {a1, a2, a3, a4, a5, a6, a7, a8, + a9, a10, a11, a12, a13, a14, a15, a16}; +} + +v8bf +vec_init_dup_v8bf (__bf16 a1) +{ + return __extension__ (v8bf) {a1, a1, a1, a1, a1, a1, a1, a1}; +} + +v16bf +vec_init_dup_v16bf (__bf16 a1) +{ + return __extension__ (v16bf) {a1, a1, a1, a1, a1, a1, a1, a1, + a1, a1, a1, a1, a1, a1, a1, a1}; +} + +/* { dg-final { scan-assembler-times "vpunpcklwd" 12 } } */ +/* { dg-final { scan-assembler-times "vpunpckldq" 6 } } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq" 3 } } */ + +VEC_EXTRACT (v8bf, __bf16, 0); +VEC_EXTRACT (v8bf, __bf16, 4); +VEC_EXTRACT (v16bf, __bf16, 0); +VEC_EXTRACT (v16bf, __bf16, 3); +VEC_EXTRACT (v16bf, __bf16, 8); +VEC_EXTRACT (v16bf, __bf16, 15); +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$8" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$6" 1 } } */ +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$14" 1 } } */ +/* { dg-final { scan-assembler-times "vextract" 4 } } */ + +VEC_SET (v8bf, __bf16, 4); +VEC_SET (v16bf, __bf16, 3); +VEC_SET (v16bf, __bf16, 8); +VEC_SET (v16bf, __bf16, 15); +/* { dg-final { scan-assembler-times "vpblendw" 3 { target { ! ia32 } } } } */ + +/* { dg-final { scan-assembler-times "vpinsrw" 30 { target ia32 } } } */ + -- 2.18.2 ^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] 2022-09-16 7:40 ` Kong, Lingling @ 2022-09-16 7:43 ` Liu, Hongtao 0 siblings, 0 replies; 4+ messages in thread From: Liu, Hongtao @ 2022-09-16 7:43 UTC (permalink / raw) To: Kong, Lingling, Hongtao Liu; +Cc: gcc-patches > -----Original Message----- > From: Kong, Lingling <lingling.kong@intel.com> > Sent: Friday, September 16, 2022 3:40 PM > To: Hongtao Liu <crazylht@gmail.com> > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > Subject: RE: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] > > Hi, > > > > machine_mode hvmode = (mode == V16HImode ? V8HImode > > > : mode == V16HFmode ? V8HFmode > > > + : mode == V16BFmode ? V8BFmode > > Can it be written as switch case? > Sure, I fixed it in new patch. Thanks again for take a look. > OK for master ? + switch (mode) + { + case V16HImode: + hvmode = V8HImode; + break; + case V16HFmode: + hvmode = V8HFmode; + break; + case V16BFmode: + hvmode = V8BFmode; + break; + case V32QImode: + hvmode = V16QImode; + break; + default: + gcc_unreachable (); + } > For the format, case aligns with {? Others LGTM. > Thanks, > Lingling > > > -----Original Message----- > > From: Hongtao Liu <crazylht@gmail.com> > > Sent: Thursday, September 15, 2022 11:46 AM > > To: Kong, Lingling <lingling.kong@intel.com> > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com> > > Subject: Re: [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] > > > > On Thu, Sep 15, 2022 at 11:36 AM Kong, Lingling via Gcc-patches <gcc- > > patches@gcc.gnu.org> wrote: > > > > > > Hi > > > > > > The patch is to fix vec_init_dup_v16bf, add correct handle for v16bf > > > mode in > > ix86_expand_vector_init_duplicate. > > > Add testcase with sse2 without avx2. > > > > > > OK for master? > > > > > > gcc/ChangeLog: > > > > > > PR target/106887 > > > * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate): > > > Fixed V16BF mode case. > > > > > > gcc/testsuite/ChangeLog: > > > > > > PR target/106887 > > > * gcc.target/i386/vect-bfloat16-2c.c: New test. > > > --- > > > gcc/config/i386/i386-expand.cc | 1 + > > > .../gcc.target/i386/vect-bfloat16-2c.c | 76 +++++++++++++++++++ > > > 2 files changed, 77 insertions(+) > > > create mode 100644 gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > > > > > diff --git a/gcc/config/i386/i386-expand.cc > > > b/gcc/config/i386/i386-expand.cc index d7b49c99dc8..9451c561489 > > > 100644 > > > --- a/gcc/config/i386/i386-expand.cc > > > +++ b/gcc/config/i386/i386-expand.cc > > > @@ -15111,6 +15111,7 @@ ix86_expand_vector_init_duplicate (bool > > mmx_ok, machine_mode mode, > > > { > > > machine_mode hvmode = (mode == V16HImode ? V8HImode > > > : mode == V16HFmode ? V8HFmode > > > + : mode == V16BFmode ? V8BFmode > > Can it be written as switch case? > > > : V16QImode); > > > rtx x = gen_reg_rtx (hvmode); > > > > > > diff --git a/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > > b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > > new file mode 100644 > > > index 00000000000..bead94e46a1 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/i386/vect-bfloat16-2c.c > > > @@ -0,0 +1,76 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-mf16c -msse2 -mno-avx2 -O2" } */ > > > + > > > +typedef __bf16 v8bf __attribute__ ((__vector_size__ (16))); typedef > > > +__bf16 v16bf __attribute__ ((__vector_size__ (32))); > > > + > > > +#define VEC_EXTRACT(V,S,IDX) \ > > > + S \ > > > + __attribute__((noipa)) \ > > > + vec_extract_##V##_##IDX (V v) \ > > > + { \ > > > + return v[IDX]; \ > > > + } > > > + > > > +#define VEC_SET(V,S,IDX) \ > > > + V \ > > > + __attribute__((noipa)) \ > > > + vec_set_##V##_##IDX (V v, S s) \ > > > + { \ > > > + v[IDX] = s; \ > > > + return v; \ > > > + } > > > + > > > +v8bf > > > +vec_init_v8bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, > > > + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8) { > > > + return __extension__ (v8bf) {a1, a2, a3, a4, a5, a6, a7, a8}; } > > > + > > > +v16bf > > > +vec_init_v16bf (__bf16 a1, __bf16 a2, __bf16 a3, __bf16 a4, > > > + __bf16 a5, __bf16 a6, __bf16 a7, __bf16 a8, > > > + __bf16 a9, __bf16 a10, __bf16 a11, __bf16 a12, > > > + __bf16 a13, __bf16 a14, __bf16 a15, __bf16 a16) { > > > + return __extension__ (v16bf) {a1, a2, a3, a4, a5, a6, a7, a8, > > > + a9, a10, a11, a12, a13, a14, a15, > > > +a16}; } > > > + > > > +v8bf > > > +vec_init_dup_v8bf (__bf16 a1) > > > +{ > > > + return __extension__ (v8bf) {a1, a1, a1, a1, a1, a1, a1, a1}; } > > > + > > > +v16bf > > > +vec_init_dup_v16bf (__bf16 a1) > > > +{ > > > + return __extension__ (v16bf) {a1, a1, a1, a1, a1, a1, a1, a1, > > > + a1, a1, a1, a1, a1, a1, a1, a1}; } > > > + > > > +/* { dg-final { scan-assembler-times "vpunpcklwd" 12 } } */ > > > +/* { dg-final { scan-assembler-times "vpunpckldq" 6 } } */ > > > +/* { dg-final { scan-assembler-times "vpunpcklqdq" 3 } } */ > > > + > > > +VEC_EXTRACT (v8bf, __bf16, 0); > > > +VEC_EXTRACT (v8bf, __bf16, 4); > > > +VEC_EXTRACT (v16bf, __bf16, 0); > > > +VEC_EXTRACT (v16bf, __bf16, 3); > > > +VEC_EXTRACT (v16bf, __bf16, 8); > > > +VEC_EXTRACT (v16bf, __bf16, 15); > > > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$8" 1 } } */ > > > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$6" 1 } } */ > > > +/* { dg-final { scan-assembler-times "vpsrldq\[\t ]*\\\$14" 1 } } > > > +*/ > > > +/* { dg-final { scan-assembler-times "vextract" 4 } } */ > > > + > > > +VEC_SET (v8bf, __bf16, 4); > > > +VEC_SET (v16bf, __bf16, 3); > > > +VEC_SET (v16bf, __bf16, 8); > > > +VEC_SET (v16bf, __bf16, 15); > > > +/* { dg-final { scan-assembler-times "vpblendw" 3 { target { ! ia32 > > > +} } } } */ > > > + > > > +/* { dg-final { scan-assembler-times "vpinsrw" 30 { target ia32 } } > > > +} */ > > > + > > > -- > > > 2.18.2 > > > > > > > > > -- > > BR, > > Hongtao ^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-09-15 3:36 ` [PATCH] i386: Fixed vec_init_dup_v16bf [PR106887] Kong, Lingling
2022-09-15 3:45 ` Hongtao Liu
2022-09-16 7:40 ` Kong, Lingling
2022-09-16 7:43 ` Liu, Hongtao
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