RE: [PATCH v1] Revert "RISC-V: Support highpart register overlap for vwcvt"

["Li, Pan2" <pan2.li@intel.com>]

Sorry, looks I missed the early clobber which exists before when resolve the conflict manually.
File another PATCH for this as below

https://gcc.gnu.org/pipermail/gcc-patches/2024-April/649991.html

> We probably don't have tests for this, in particular runtime?
I am afraid this is true currently.

Pan


-----Original Message-----
From: Li, Pan2 <pan2.li@intel.com> 
Sent: Wednesday, April 24, 2024 10:38 PM
To: Robin Dapp <rdapp.gcc@gmail.com>; gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai; kito.cheng@gmail.com
Subject: RE: [PATCH v1] Revert "RISC-V: Support highpart register overlap for vwcvt"

> Just noticed, not a problem of the revert but wasn't that wrong before
> without the early-clobber?
> vwsll.vx  v0, v0, a0 for LMUL = 2 would be allowed but should not?
> We probably don't have tests for this, in particular runtime?

Yes, you are right according to the spec "the overlap is in the highest-numbered part of the destination register group" when lmul >= 1.
We need to take care of this carefully when support overlap in GCC-15, specifically making sure every scenarios are well tested as you mentioned.

Pan

-----Original Message-----
From: Robin Dapp <rdapp.gcc@gmail.com> 
Sent: Wednesday, April 24, 2024 10:12 PM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org
Cc: rdapp.gcc@gmail.com; juzhe.zhong@rivai.ai; kito.cheng@gmail.com
Subject: Re: [PATCH v1] Revert "RISC-V: Support highpart register overlap for vwcvt"

>  (define_insn "@pred_vwsll<mode>_scalar"
> - [(set (match_operand:VWEXTI 0 "register_operand" "=vd, vr, vd, vr, vd, vr, vd, vr, vd, vr, vd, vr, ?&vr, ?&vr")
> + [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vr")

Just noticed, not a problem of the revert but wasn't that wrong before
without the early-clobber?
vwsll.vx  v0, v0, a0 for LMUL = 2 would be allowed but should not?
We probably don't have tests for this, in particular runtime?

Regards
 Robin