From: Robin Dapp <rdapp.gcc@gmail.com>
To: pan2.li@intel.com, gcc-patches@gcc.gnu.org
Cc: rdapp.gcc@gmail.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com
Subject: Re: [PATCH v1] Revert "RISC-V: Support highpart register overlap for vwcvt"
Date: Wed, 24 Apr 2024 16:12:00 +0200 [thread overview]
Message-ID: <b66b6036-f188-4fb9-b3e2-e9b148f374ef@gmail.com> (raw)
In-Reply-To: <20240424125859.994208-1-pan2.li@intel.com>
> (define_insn "@pred_vwsll<mode>_scalar"
> - [(set (match_operand:VWEXTI 0 "register_operand" "=vd, vr, vd, vr, vd, vr, vd, vr, vd, vr, vd, vr, ?&vr, ?&vr")
> + [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vr")
Just noticed, not a problem of the revert but wasn't that wrong before
without the early-clobber?
vwsll.vx v0, v0, a0 for LMUL = 2 would be allowed but should not?
We probably don't have tests for this, in particular runtime?
Regards
Robin
next prev parent reply other threads:[~2024-04-24 14:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 12:58 pan2.li
2024-04-24 13:01 ` Li, Pan2
2024-04-24 13:10 ` Kito Cheng
2024-04-24 13:35 ` Li, Pan2
2024-04-24 14:12 ` Robin Dapp [this message]
2024-04-24 14:37 ` Li, Pan2
2024-04-25 1:25 ` Li, Pan2
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