[PATCH] RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]

[PATCH] RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]

[Juzhe-Zhong]

This patch fixes this issue happens on both GCC-13 and GCC-14.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110264

The testcase is too big and I failed to reduce it so I didn't append
test into this patch.

This patch should not only land into GCC-14 but also should backport to GCC-13.

	PR target/110264

gcc/ChangeLog:

        * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.

---
 gcc/config/riscv/riscv-vsetvl.cc | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index cae9be0d928..42cc6f29f26 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -744,7 +744,10 @@ insert_vsetvl (enum emit_type emit_type, rtx_insn *rinsn,
   if (vlmax_avl_p (info.get_avl ()))
     {
       gcc_assert (has_vtype_op (rinsn) || vsetvl_insn_p (rinsn));
-      rtx vl_op = info.get_avl_reg_rtx ();
+      /* For user vsetvli a5, zero, we should use get_vl to get the VL
+	 operand "a5".  */
+      rtx vl_op
+	= vsetvl_insn_p (rinsn) ? get_vl (rinsn) : info.get_avl_reg_rtx ();
       gcc_assert (!vlmax_avl_p (vl_op));
       emit_vsetvl_insn (VSETVL_NORMAL, emit_type, info, vl_op, rinsn);
       return VSETVL_NORMAL;
-- 
2.36.3

Re: [PATCH] RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]

[Jeff Law]

On 6/16/23 02:02, Juzhe-Zhong wrote:
> This patch fixes this issue happens on both GCC-13 and GCC-14.
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110264
> 
> The testcase is too big and I failed to reduce it so I didn't append
> test into this patch.
> 
> This patch should not only land into GCC-14 but also should backport to GCC-13.
> 
> 	PR target/110264
> 
> gcc/ChangeLog:
> 
>          * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
OK.

Note, I've been swamped this week.  So things are moving a bit slower 
than I'd like on the review side.

jeff

RE: [PATCH] RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]

[Li, Pan2]

Committed, thanks Jeff.

Pan

-----Original Message-----
From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Jeff Law via Gcc-patches
Sent: Friday, June 16, 2023 11:53 PM
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>; gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com; kito.cheng@sifive.com; palmer@dabbelt.com; palmer@rivosinc.com; rdapp.gcc@gmail.com
Subject: Re: [PATCH] RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]



On 6/16/23 02:02, Juzhe-Zhong wrote:
> This patch fixes this issue happens on both GCC-13 and GCC-14.
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110264
> 
> The testcase is too big and I failed to reduce it so I didn't append
> test into this patch.
> 
> This patch should not only land into GCC-14 but also should backport to GCC-13.
> 
> 	PR target/110264
> 
> gcc/ChangeLog:
> 
>          * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
OK.

Note, I've been swamped this week.  So things are moving a bit slower 
than I'd like on the review side.

jeff