* [PATCH]AArch64: Have -mcpu=native and -march=native enable extensions when CPU is unknown
@ 2021-05-05 17:35 Tamar Christina
2021-05-10 16:31 ` Richard Sandiford
0 siblings, 1 reply; 3+ messages in thread
From: Tamar Christina @ 2021-05-05 17:35 UTC (permalink / raw)
To: gcc-patches
Cc: nd, Richard.Earnshaw, Marcus.Shawcroft, Kyrylo.Tkachov,
richard.sandiford
[-- Attachment #1: Type: text/plain, Size: 4718 bytes --]
Hi All,
Currently when using -mcpu=native or -march=native on a CPU that is unknown to
the compiler the compiler currently just used -march=armv8-a and enables none
of the extensions.
To make this a bit more useful this patch changes it to still use -march=armv8.a
but to enable the extensions. We still cannot do tuning but at least if using
this on a future SVE core the compiler will at the very least enable SVE etc.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for master?
Thanks,
Tamar
gcc/ChangeLog:
* config/aarch64/driver-aarch64.c (DEFAULT_ARCH): New.
(host_detect_local_cpu): Use it.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/info_16: New test.
* gcc.target/aarch64/cpunative/info_17: New test.
* gcc.target/aarch64/cpunative/native_cpu_16.c: New test.
* gcc.target/aarch64/cpunative/native_cpu_17.c: New test.
--- inline copy of patch --
diff --git a/gcc/config/aarch64/driver-aarch64.c b/gcc/config/aarch64/driver-aarch64.c
index e2935a1156412c898ea086feb0d698ec92107652..b58591d497461cae6e8014fa39afd9dd26ae67bf 100644
--- a/gcc/config/aarch64/driver-aarch64.c
+++ b/gcc/config/aarch64/driver-aarch64.c
@@ -58,6 +58,8 @@ struct aarch64_core_data
#define INVALID_IMP ((unsigned char) -1)
#define INVALID_CORE ((unsigned)-1)
#define ALL_VARIANTS ((unsigned)-1)
+/* Default architecture to use if -mcpu=native did not detect a known CPU. */
+#define DEFAULT_ARCH "8A"
#define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
{ CORE_NAME, #ARCH, IMP, PART, VARIANT, FLAGS },
@@ -390,10 +392,18 @@ host_detect_local_cpu (int argc, const char **argv)
&& (aarch64_cpu_data[i].variant == ALL_VARIANTS
|| variants[0] == aarch64_cpu_data[i].variant))
break;
+
if (aarch64_cpu_data[i].name == NULL)
- goto not_found;
+ {
+ aarch64_arch_driver_info* arch_info
+ = get_arch_from_id (DEFAULT_ARCH);
+
+ gcc_assert (arch_info);
- if (arch)
+ res = concat ("-march=", arch_info->name, NULL);
+ default_flags = arch_info->flags;
+ }
+ else if (arch)
{
const char *arch_id = aarch64_cpu_data[i].arch;
aarch64_arch_driver_info* arch_info = get_arch_from_id (arch_id);
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
new file mode 100644
index 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb63d9077f7a80f70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
+CPU implementer : 0xff
+CPU architecture: 8
+CPU variant : 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
new file mode 100644
index 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb63d9077f7a80f70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
+CPU implementer : 0xff
+CPU architecture: 8
+CPU variant : 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
new file mode 100644
index 0000000000000000000000000000000000000000..a424e7c56c782ca6e6917248e2fa7a18eb94e06a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
+
+/* Test a normal looking procinfo. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
new file mode 100644
index 0000000000000000000000000000000000000000..8104761be927275207318a834f03041b627856b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
+/* { dg-additional-options "-march=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
+
+/* Test a normal looking procinfo. */
--
[-- Attachment #2: rb14452.patch --]
[-- Type: text/x-diff, Size: 3809 bytes --]
diff --git a/gcc/config/aarch64/driver-aarch64.c b/gcc/config/aarch64/driver-aarch64.c
index e2935a1156412c898ea086feb0d698ec92107652..b58591d497461cae6e8014fa39afd9dd26ae67bf 100644
--- a/gcc/config/aarch64/driver-aarch64.c
+++ b/gcc/config/aarch64/driver-aarch64.c
@@ -58,6 +58,8 @@ struct aarch64_core_data
#define INVALID_IMP ((unsigned char) -1)
#define INVALID_CORE ((unsigned)-1)
#define ALL_VARIANTS ((unsigned)-1)
+/* Default architecture to use if -mcpu=native did not detect a known CPU. */
+#define DEFAULT_ARCH "8A"
#define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
{ CORE_NAME, #ARCH, IMP, PART, VARIANT, FLAGS },
@@ -390,10 +392,18 @@ host_detect_local_cpu (int argc, const char **argv)
&& (aarch64_cpu_data[i].variant == ALL_VARIANTS
|| variants[0] == aarch64_cpu_data[i].variant))
break;
+
if (aarch64_cpu_data[i].name == NULL)
- goto not_found;
+ {
+ aarch64_arch_driver_info* arch_info
+ = get_arch_from_id (DEFAULT_ARCH);
+
+ gcc_assert (arch_info);
- if (arch)
+ res = concat ("-march=", arch_info->name, NULL);
+ default_flags = arch_info->flags;
+ }
+ else if (arch)
{
const char *arch_id = aarch64_cpu_data[i].arch;
aarch64_arch_driver_info* arch_info = get_arch_from_id (arch_id);
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
new file mode 100644
index 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb63d9077f7a80f70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
+CPU implementer : 0xff
+CPU architecture: 8
+CPU variant : 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
new file mode 100644
index 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb63d9077f7a80f70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
+CPU implementer : 0xff
+CPU architecture: 8
+CPU variant : 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
new file mode 100644
index 0000000000000000000000000000000000000000..a424e7c56c782ca6e6917248e2fa7a18eb94e06a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
+
+/* Test a normal looking procinfo. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
new file mode 100644
index 0000000000000000000000000000000000000000..8104761be927275207318a834f03041b627856b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
+/* { dg-additional-options "-march=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
+
+/* Test a normal looking procinfo. */
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH]AArch64: Have -mcpu=native and -march=native enable extensions when CPU is unknown
2021-05-05 17:35 [PATCH]AArch64: Have -mcpu=native and -march=native enable extensions when CPU is unknown Tamar Christina
@ 2021-05-10 16:31 ` Richard Sandiford
2021-05-10 16:51 ` Tamar Christina
0 siblings, 1 reply; 3+ messages in thread
From: Richard Sandiford @ 2021-05-10 16:31 UTC (permalink / raw)
To: Tamar Christina
Cc: gcc-patches, nd, Richard.Earnshaw, Marcus.Shawcroft, Kyrylo.Tkachov
Tamar Christina <tamar.christina@arm.com> writes:
> Hi All,
>
> Currently when using -mcpu=native or -march=native on a CPU that is unknown to
> the compiler the compiler currently just used -march=armv8-a and enables none
> of the extensions.
>
> To make this a bit more useful this patch changes it to still use -march=armv8.a
> but to enable the extensions. We still cannot do tuning but at least if using
> this on a future SVE core the compiler will at the very least enable SVE etc.
>
> Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
>
> Ok for master?
OK, thanks.
We'll have to collectively remember that this means we shouldn't try
to enforce minimum architecture versions for features in future.
E.g. -march=armv8-a+sve should remain valid.
Richard
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> * config/aarch64/driver-aarch64.c (DEFAULT_ARCH): New.
> (host_detect_local_cpu): Use it.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/cpunative/info_16: New test.
> * gcc.target/aarch64/cpunative/info_17: New test.
> * gcc.target/aarch64/cpunative/native_cpu_16.c: New test.
> * gcc.target/aarch64/cpunative/native_cpu_17.c: New test.
>
> --- inline copy of patch --
> diff --git a/gcc/config/aarch64/driver-aarch64.c b/gcc/config/aarch64/driver-aarch64.c
> index e2935a1156412c898ea086feb0d698ec92107652..b58591d497461cae6e8014fa39afd9dd26ae67bf 100644
> --- a/gcc/config/aarch64/driver-aarch64.c
> +++ b/gcc/config/aarch64/driver-aarch64.c
> @@ -58,6 +58,8 @@ struct aarch64_core_data
> #define INVALID_IMP ((unsigned char) -1)
> #define INVALID_CORE ((unsigned)-1)
> #define ALL_VARIANTS ((unsigned)-1)
> +/* Default architecture to use if -mcpu=native did not detect a known CPU. */
> +#define DEFAULT_ARCH "8A"
>
> #define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
> { CORE_NAME, #ARCH, IMP, PART, VARIANT, FLAGS },
> @@ -390,10 +392,18 @@ host_detect_local_cpu (int argc, const char **argv)
> && (aarch64_cpu_data[i].variant == ALL_VARIANTS
> || variants[0] == aarch64_cpu_data[i].variant))
> break;
> +
> if (aarch64_cpu_data[i].name == NULL)
> - goto not_found;
> + {
> + aarch64_arch_driver_info* arch_info
> + = get_arch_from_id (DEFAULT_ARCH);
> +
> + gcc_assert (arch_info);
>
> - if (arch)
> + res = concat ("-march=", arch_info->name, NULL);
> + default_flags = arch_info->flags;
> + }
> + else if (arch)
> {
> const char *arch_id = aarch64_cpu_data[i].arch;
> aarch64_arch_driver_info* arch_info = get_arch_from_id (arch_id);
> diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
> new file mode 100644
> index 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb63d9077f7a80f70
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
> @@ -0,0 +1,8 @@
> +processor : 0
> +BogoMIPS : 100.00
> +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
> +CPU implementer : 0xff
> +CPU architecture: 8
> +CPU variant : 0x0
> +CPU part : 0xd08
> +CPU revision : 2
> diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
> new file mode 100644
> index 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb63d9077f7a80f70
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
> @@ -0,0 +1,8 @@
> +processor : 0
> +BogoMIPS : 100.00
> +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2
> +CPU implementer : 0xff
> +CPU architecture: 8
> +CPU variant : 0x0
> +CPU part : 0xd08
> +CPU revision : 2
> diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..a424e7c56c782ca6e6917248e2fa7a18eb94e06a
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
> @@ -0,0 +1,12 @@
> +/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
> +/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
> +/* { dg-additional-options "-mcpu=native" } */
> +
> +int main()
> +{
> + return 0;
> +}
> +
> +/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
> +
> +/* Test a normal looking procinfo. */
> diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..8104761be927275207318a834f03041b627856b7
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
> @@ -0,0 +1,12 @@
> +/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
> +/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_16" } */
> +/* { dg-additional-options "-march=native" } */
> +
> +int main()
> +{
> + return 0;
> +}
> +
> +/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
> +
> +/* Test a normal looking procinfo. */
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH]AArch64: Have -mcpu=native and -march=native enable extensions when CPU is unknown
2021-05-10 16:31 ` Richard Sandiford
@ 2021-05-10 16:51 ` Tamar Christina
0 siblings, 0 replies; 3+ messages in thread
From: Tamar Christina @ 2021-05-10 16:51 UTC (permalink / raw)
To: Richard Sandiford
Cc: gcc-patches, nd, Richard Earnshaw, Marcus Shawcroft, Kyrylo Tkachov
> -----Original Message-----
> From: Richard Sandiford <richard.sandiford@arm.com>
> Sent: Monday, May 10, 2021 5:31 PM
> To: Tamar Christina <Tamar.Christina@arm.com>
> Cc: gcc-patches@gcc.gnu.org; nd <nd@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Marcus Shawcroft
> <Marcus.Shawcroft@arm.com>; Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
> Subject: Re: [PATCH]AArch64: Have -mcpu=native and -march=native enable
> extensions when CPU is unknown
>
> Tamar Christina <tamar.christina@arm.com> writes:
> > Hi All,
> >
> > Currently when using -mcpu=native or -march=native on a CPU that is
> > unknown to the compiler the compiler currently just used
> > -march=armv8-a and enables none of the extensions.
> >
> > To make this a bit more useful this patch changes it to still use
> > -march=armv8.a but to enable the extensions. We still cannot do
> > tuning but at least if using this on a future SVE core the compiler will at the
> very least enable SVE etc.
> >
> > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
> >
> > Ok for master?
>
> OK, thanks.
>
> We'll have to collectively remember that this means we shouldn't try to
> enforce minimum architecture versions for features in future.
> E.g. -march=armv8-a+sve should remain valid.
The Attached testcases would fail if we do forget! 😊
Regards,
Tamar
> Richard
>
> > Thanks,
> > Tamar
> >
> > gcc/ChangeLog:
> >
> > * config/aarch64/driver-aarch64.c (DEFAULT_ARCH): New.
> > (host_detect_local_cpu): Use it.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/aarch64/cpunative/info_16: New test.
> > * gcc.target/aarch64/cpunative/info_17: New test.
> > * gcc.target/aarch64/cpunative/native_cpu_16.c: New test.
> > * gcc.target/aarch64/cpunative/native_cpu_17.c: New test.
> >
> > --- inline copy of patch --
> > diff --git a/gcc/config/aarch64/driver-aarch64.c
> > b/gcc/config/aarch64/driver-aarch64.c
> > index
> >
> e2935a1156412c898ea086feb0d698ec92107652..b58591d497461cae6e8014fa3
> 9af
> > d9dd26ae67bf 100644
> > --- a/gcc/config/aarch64/driver-aarch64.c
> > +++ b/gcc/config/aarch64/driver-aarch64.c
> > @@ -58,6 +58,8 @@ struct aarch64_core_data #define INVALID_IMP
> > ((unsigned char) -1) #define INVALID_CORE ((unsigned)-1) #define
> > ALL_VARIANTS ((unsigned)-1)
> > +/* Default architecture to use if -mcpu=native did not detect a known
> > +CPU. */ #define DEFAULT_ARCH "8A"
> >
> > #define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS,
> COSTS, IMP, PART, VARIANT) \
> > { CORE_NAME, #ARCH, IMP, PART, VARIANT, FLAGS }, @@ -390,10
> +392,18
> > @@ host_detect_local_cpu (int argc, const char **argv)
> > && (aarch64_cpu_data[i].variant == ALL_VARIANTS
> > || variants[0] == aarch64_cpu_data[i].variant))
> > break;
> > +
> > if (aarch64_cpu_data[i].name == NULL)
> > - goto not_found;
> > + {
> > + aarch64_arch_driver_info* arch_info
> > + = get_arch_from_id (DEFAULT_ARCH);
> > +
> > + gcc_assert (arch_info);
> >
> > - if (arch)
> > + res = concat ("-march=", arch_info->name, NULL);
> > + default_flags = arch_info->flags;
> > + }
> > + else if (arch)
> > {
> > const char *arch_id = aarch64_cpu_data[i].arch;
> > aarch64_arch_driver_info* arch_info = get_arch_from_id (arch_id);
> > diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
> > b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
> > new file mode 100644
> > index
> >
> 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb
> 63d
> > 9077f7a80f70
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16
> > @@ -0,0 +1,8 @@
> > +processor : 0
> > +BogoMIPS : 100.00
> > +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve
> sve2
> > +CPU implementer : 0xff
> > +CPU architecture: 8
> > +CPU variant : 0x0
> > +CPU part : 0xd08
> > +CPU revision : 2
> > diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
> > b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
> > new file mode 100644
> > index
> >
> 0000000000000000000000000000000000000000..b0679579d9167d46c832e55cb
> 63d
> > 9077f7a80f70
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17
> > @@ -0,0 +1,8 @@
> > +processor : 0
> > +BogoMIPS : 100.00
> > +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve
> sve2
> > +CPU implementer : 0xff
> > +CPU architecture: 8
> > +CPU variant : 0x0
> > +CPU part : 0xd08
> > +CPU revision : 2
> > diff --git
> > a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
> > b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
> > new file mode 100644
> > index
> >
> 0000000000000000000000000000000000000000..a424e7c56c782ca6e6917248e2
> fa
> > 7a18eb94e06a
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
> > @@ -0,0 +1,12 @@
> > +/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
> > +/* { dg-set-compiler-env-var GCC_CPUINFO
> > +"$srcdir/gcc.target/aarch64/cpunative/info_16" } */
> > +/* { dg-additional-options "-mcpu=native" } */
> > +
> > +int main()
> > +{
> > + return 0;
> > +}
> > +
> > +/* { dg-final { scan-assembler {\.arch
> > +armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
> > +
> > +/* Test a normal looking procinfo. */
> > diff --git
> > a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
> > b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
> > new file mode 100644
> > index
> >
> 0000000000000000000000000000000000000000..8104761be927275207318a834f
> 03
> > 041b627856b7
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
> > @@ -0,0 +1,12 @@
> > +/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
> > +/* { dg-set-compiler-env-var GCC_CPUINFO
> > +"$srcdir/gcc.target/aarch64/cpunative/info_16" } */
> > +/* { dg-additional-options "-march=native" } */
> > +
> > +int main()
> > +{
> > + return 0;
> > +}
> > +
> > +/* { dg-final { scan-assembler {\.arch
> > +armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
> > +
> > +/* Test a normal looking procinfo. */
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2021-05-05 17:35 [PATCH]AArch64: Have -mcpu=native and -march=native enable extensions when CPU is unknown Tamar Christina
2021-05-10 16:31 ` Richard Sandiford
2021-05-10 16:51 ` Tamar Christina
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