From: Michael Meissner <meissner@linux.ibm.com>
To: "Kewen.Lin" <linkw@linux.ibm.com>
Cc: Ajit Agarwal <aagarwa1@linux.ibm.com>,
Segher Boessenkool <segher@kernel.crashing.org>,
David Edelsohn <dje.gcc@gmail.com>,
Peter Bergner <bergner@linux.ibm.com>,
Michael Meissner <meissner@linux.ibm.com>,
GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp
Date: Wed, 6 Dec 2023 00:09:09 -0500 [thread overview]
Message-ID: <ZXAB9S0nHYd5ltAT@cowardly-lion.the-meissners.org> (raw)
In-Reply-To: <af9139e7-e990-df43-9696-be45f4526cdf@linux.ibm.com>
On Wed, Dec 06, 2023 at 10:22:57AM +0800, Kewen.Lin wrote:
> I'd expect you use UNSPEC_MMA_EXTRACT to extract V16QI from the result of lxvp,
> the current define_insn_and_split "*vsx_disassemble_pair" should be able to take
> care of it further (eg: reg and regoff).
>
> BR,
> Kewen
With Peter's subreg patch, UNSPEC_MMA_EXTRACT would produce two move with
eSUBREGs:
For a FMA type loop such as:
union vector_hack2 {
vector unsigned char vuc[2];
vector double v[2];
};
static void
use_mma_ld_st_normal_no_unroll (double * __restrict__ r,
const double * __restrict__ a,
const double * __restrict__ b,
size_t num)
{
__vector_pair * __restrict__ v_r = ( __vector_pair * __restrict__) r;
const __vector_pair * __restrict__ v_a = (const __vector_pair * __restrict__) a;
const __vector_pair * __restrict__ v_b = (const __vector_pair * __restrict__) b;
size_t num_vector = num / (2 * (sizeof (vector double) / sizeof (double)));
size_t num_scalar = num % (2 * (sizeof (vector double) / sizeof (double)));
size_t i;
union vector_hack2 a_union;
union vector_hack2 b_union;
union vector_hack2 r_union;
vector double a_hi, a_lo;
vector double b_hi, b_lo;
vector double r_hi, r_lo;
union vector_hack result_hi, result_lo;
#pragma GCC unroll 0
for (i = 0; i < num_vector; i++)
{
__builtin_vsx_disassemble_pair (&a_union.vuc, &v_a[i]);
__builtin_vsx_disassemble_pair (&b_union.vuc, &v_b[i]);
__builtin_vsx_disassemble_pair (&r_union.vuc, &v_r[i]);
a_hi = a_union.v[0];
b_hi = b_union.v[0];
r_hi = r_union.v[0];
a_lo = a_union.v[1];
b_lo = b_union.v[1];
r_lo = r_union.v[1];
result_hi.v = (a_hi * b_hi) + r_hi;
result_lo.v = (a_lo * b_lo) + r_lo;
__builtin_vsx_build_pair (&v_r[i], result_hi.vuc, result_lo.vuc);
}
if (num_scalar)
{
r += num_vector * (2 * (sizeof (vector double) / sizeof (double)));
a += num_vector * (2 * (sizeof (vector double) / sizeof (double)));
b += num_vector * (2 * (sizeof (vector double) / sizeof (double)));
#pragma GCC unroll 0
for (i = 0; i < num_scalar; i++)
r[i] += (a[i] * b[i]);
}
return;
}
Peter's code would produce the following in the inner loop:
(insn 16 15 19 4 (set (reg:OO 133 [ _43 ])
(mem:OO (plus:DI (reg/v/f:DI 150 [ a ])
(reg:DI 143 [ ivtmp.1088 ])) [6 MEM[(__vector_pair *)a_30(D) + ivtmp.1088_88 * 1]+0 S32 A128])) "p10-fma.h":3285:1 2181 {*movoo}
(nil))
(insn 19 16 22 4 (set (reg:OO 136 [ _48 ])
(mem:OO (plus:DI (reg/v/f:DI 151 [ b ])
(reg:DI 143 [ ivtmp.1088 ])) [6 MEM[(__vector_pair *)b_31(D) + ivtmp.1088_88 * 1]+0 S32 A128])) "p10-fma.h":3285:1 2181 {*movoo}
(nil))
(insn 22 19 25 4 (set (reg:OO 139 [ _53 ])
(mem:OO (plus:DI (reg/v/f:DI 149 [ r ])
(reg:DI 143 [ ivtmp.1088 ])) [6 MEM[(__vector_pair *)r_29(D) + ivtmp.1088_88 * 1]+0 S32 A128])) "p10-fma.h":3285:1 2181 {*movoo}
(nil))
(insn 25 22 26 4 (set (reg:V2DF 117 [ _6 ])
(fma:V2DF (subreg:V2DF (reg:OO 136 [ _48 ]) 16)
(subreg:V2DF (reg:OO 133 [ _43 ]) 16)
(subreg:V2DF (reg:OO 139 [ _53 ]) 16))) "p10-fma.h":3319:35 1265 {*vsx_fmav2df4}
(nil))
(insn 26 25 27 4 (set (reg:V2DF 118 [ _8 ])
(fma:V2DF (subreg:V2DF (reg:OO 136 [ _48 ]) 0)
(subreg:V2DF (reg:OO 133 [ _43 ]) 0)
(subreg:V2DF (reg:OO 139 [ _53 ]) 0))) "p10-fma.h":3320:35 1265 {*vsx_fmav2df4}
(expr_list:REG_DEAD (reg:OO 139 [ _53 ])
(expr_list:REG_DEAD (reg:OO 136 [ _48 ])
(expr_list:REG_DEAD (reg:OO 133 [ _43 ])
(nil)))))
(insn 27 26 28 4 (set (reg:OO 142 [ _59 ])
(unspec:OO [
(subreg:V16QI (reg:V2DF 117 [ _6 ]) 0)
(subreg:V16QI (reg:V2DF 118 [ _8 ]) 0)
] UNSPEC_VSX_ASSEMBLE)) 2183 {*vsx_assemble_pair}
(expr_list:REG_DEAD (reg:V2DF 118 [ _8 ])
(expr_list:REG_DEAD (reg:V2DF 117 [ _6 ])
(nil))))
Now in theory you could get ride of the UNSPEC_VSX_ASSEMBLE also using SUBREG's.
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com
next prev parent reply other threads:[~2023-12-06 5:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-07 19:04 Ajit Agarwal
2023-10-15 12:13 ` [PING ^0][PATCH " Ajit Agarwal
2023-10-23 8:32 ` [PING ^1][PATCH " Ajit Agarwal
2023-11-10 7:04 ` [PING ^2][PATCH " Ajit Agarwal
2023-11-24 9:31 ` [PATCH " Kewen.Lin
2023-11-28 4:34 ` Michael Meissner
2023-11-28 9:33 ` Kewen.Lin
2023-12-01 9:10 ` Ajit Agarwal
2023-12-04 2:01 ` Kewen.Lin
2023-12-05 13:43 ` Ajit Agarwal
2023-12-05 18:01 ` Ajit Agarwal
2023-12-06 2:22 ` Kewen.Lin
2023-12-06 5:09 ` Michael Meissner [this message]
2023-12-07 7:14 ` Kewen.Lin
2023-12-07 11:01 ` Ajit Agarwal
2023-12-08 8:01 ` Ajit Agarwal
2023-12-08 9:51 ` Kewen.Lin
2023-12-12 6:28 ` Kewen.Lin
2023-12-12 7:38 ` Ajit Agarwal
2023-11-28 7:05 ` Michael Meissner
2023-11-28 9:44 ` Kewen.Lin
2023-11-28 15:41 ` Michael Meissner
2023-11-29 14:10 ` Ajit Agarwal
2023-12-01 9:13 ` Ajit Agarwal
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