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* [PATCH] FreeBSD arm support, EABI.
@ 2014-11-02 22:12 Andreas Tobler
  2014-11-03  4:16 ` Gerald Pfeifer
                   ` (4 more replies)
  0 siblings, 5 replies; 11+ messages in thread
From: Andreas Tobler @ 2014-11-02 22:12 UTC (permalink / raw)
  To: GCC Patches

[-- Attachment #1: Type: text/plain, Size: 1973 bytes --]

Hello all,

this is a patch which brings support for arm*-*-freebsd* to trunk.
The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and 
armv6hf-*-freebsd*.
armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH < 6.

There is kernel development for armv8 aka. aarch64 ongoing but this is 
not covered here. This patch only covers 32-bit arm in a basic manner.

The patch is built and tested against armv6, armv6hf and arm. The former 
two tests (lots of) were done on a WANDBOARD-QUAD, the latter on a 
MARVELL board with 256MB Ram and 200MHz cpu.... (around 72h+ for a build 
and test.....)

Results for armv6hf are on the list. Only one entry but locally I ran 
several dozens runs...

Once if this patch is accepted a few test suite additions will follow.
(arm*-*-*eabi* -> arm_eabi)

The patch itself is also prepared for arm*eb*-*-freebsd*, but I could 
not test since I lack the HW.

I appreciate comments, questions and also an ack if this patch is ok for 
trunk.

TIA,

Andreas

toplevel:

2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>

	* configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
	* configure: Regenerate.

gcc:

2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>

	* config.gcc (arm*-*-freebsd*): New configuration.
	* config/arm/freebsd.h: New file.
	* config.host: A extras components for arm*-*-freebsd*.
	* config/arm/arm.c (arm_init_libfuncs): FreeBSD does not support 8 byte
	atomics for __ARM_ARCH__ < 6 yet.
	(arm_option_override): FreeBSD has not yet implemented unaligned access.

libgcc:

2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>

	* config.host (arm*-*-freebsd*): Add new configuration for
	arm*-*-freebsd*.
	* config/arm/freebsd-atomic.c: New file.
	* config/arm/t-freebsd: Likewise.
	* config/arm/unwind-arm.h: Add __FreeBSD__ to the list of 'PC-relative
	indirect' OS's.

libstdc++:

2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>

	* configure.host: Add arm*-*-freebsd* port_specific_symbol_files.


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Index: configure.ac
===================================================================
--- configure.ac	(revision 217020)
+++ configure.ac	(working copy)
@@ -711,6 +711,9 @@
   alpha*-*-*vms*)
     noconfigdirs="$noconfigdirs ${libgcj}"
     ;;
+  arm*-*-freebsd*)
+    noconfigdirs="$noconfigdirs ${libgcj}"
+    ;;
   arm-wince-pe)
     noconfigdirs="$noconfigdirs ${libgcj}"
     ;;
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	(revision 217020)
+++ gcc/config/arm/arm.c	(working copy)
@@ -2202,7 +2202,11 @@
 {
   /* For Linux, we have access to kernel support for atomic operations.  */
   if (arm_abi == ARM_ABI_AAPCS_LINUX)
+#ifndef __FreeBSD__
     init_sync_libfuncs (2 * UNITS_PER_WORD);
+#else
+    init_sync_libfuncs (UNITS_PER_WORD);
+#endif
 
   /* There are no special library functions unless we are using the
      ARM BPABI.  */
@@ -3036,6 +3040,9 @@
       warning (0, "target CPU does not support unaligned accesses");
       unaligned_access = 0;
     }
+#ifdef __FreeBSD__
+      unaligned_access = 0;
+#endif
 
   if (TARGET_THUMB1 && flag_schedule_insns)
     {
Index: gcc/config/arm/freebsd.h
===================================================================
--- gcc/config/arm/freebsd.h	(revision 0)
+++ gcc/config/arm/freebsd.h	(working copy)
@@ -0,0 +1,170 @@
+/* Definitions of target machine for GNU compiler, FreeBSD/arm version.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#undef  SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC FBSD_CPP_SPEC
+
+#undef  SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS					\
+  { "subtarget_extra_asm_spec",	SUBTARGET_EXTRA_ASM_SPEC },	\
+  { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, 	\
+  { "fbsd_dynamic_linker", FBSD_DYNAMIC_LINKER }
+
+#undef SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC \
+  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5} " TARGET_FIX_V4BX_SPEC " \
+  %{fpic|fpie:-k} %{fPIC|fPIE:-k}"
+
+#undef SUBTARGET_ASM_FLOAT_SPEC
+#ifdef TARGET_FREEBSD_ARM_HARD_FLOAT
+/* Default to full vfp if we build for arm*hf.  */
+#define SUBTARGET_ASM_FLOAT_SPEC "%{!mfpu=*:-mfpu=vfp}"
+#else
+#define SUBTARGET_ASM_FLOAT_SPEC "%{!mfpu=*:-mfpu=softvfp}"
+#endif
+
+#undef	LINK_SPEC
+#define LINK_SPEC "							\
+  %{p:%nconsider using `-pg' instead of `-p' with gprof (1) }		\
+  %{v:-V}								\
+  %{assert*} %{R*} %{rpath*} %{defsym*}					\
+  %{shared:-Bshareable %{h*} %{soname*}}				\
+  %{!shared:								\
+    %{!static:								\
+      %{rdynamic:-export-dynamic}					\
+      %{!dynamic-linker:-dynamic-linker %(fbsd_dynamic_linker) }}	\
+    %{static:-Bstatic}}							\
+  %{!static:--hash-style=both --enable-new-dtags}			\
+  %{symbolic:-Bsymbolic}						\
+  -X %{mbig-endian:-EB} %{mlittle-endian:-EL}"
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+   config.gcc for big endian configurations.  */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_ENDIAN_DEFAULT    MASK_BIG_END
+#define TARGET_ENDIAN_OPTION     "mbig-endian"
+#define TARGET_LINKER_EMULATION  "armelfb_fbsd"
+#else
+#define TARGET_ENDIAN_DEFAULT    0
+#define TARGET_ENDIAN_OPTION     "mlittle-endian"
+#define TARGET_LINKER_EMULATION  "armelf_fbsd"
+#endif
+
+#undef	SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+
+#undef  TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS() 		\
+  do						\
+    {						\
+	FBSD_TARGET_OS_CPP_BUILTINS ();		\
+	TARGET_BPABI_CPP_BUILTINS ();		\
+    }						\
+  while (false)
+
+/* We default to a soft-float ABI so that binaries can run on all
+   target hardware.  */
+#undef TARGET_DEFAULT_FLOAT_ABI
+#ifdef TARGET_FREEBSD_ARM_HARD_FLOAT
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD
+#else
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
+#endif
+
+#undef ARM_DEFAULT_ABI
+
+/* AACPS_LINUX has access to kernel atomic ops while we don't.
+   But AACPS defaults to short_enums.  */
+#define ARM_DEFAULT_ABI ARM_ABI_AAPCS_LINUX
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_INTERWORK | TARGET_ENDIAN_DEFAULT)
+
+/* We do not have any MULTILIB_OPTIONS specified, so there are no
+   MULTILIB_DEFAULTS.  */
+#undef  MULTILIB_DEFAULTS
+
+/*  Use the AAPCS type for wchar_t, override the one from config/freebsd.h.  */
+#undef  WCHAR_TYPE
+#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long int")
+
+#undef  WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
+#if defined (TARGET_FREEBSD_ARMv6)
+#undef  SUBTARGET_CPU_DEFAULT
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm1176jzs
+#else
+#undef  SUBTARGET_CPU_DEFAULT
+#define SUBTARGET_CPU_DEFAULT   TARGET_CPU_arm9
+#endif
+
+/* FreeBSD does its profiling differently to the Acorn compiler.  We
+   don't need a word following the mcount call; and to skip it
+   requires either an assembly stub or use of fomit-frame-pointer when
+   compiling the profiling functions.  Since we break Acorn CC
+   compatibility below a little more won't hurt.  */
+
+#undef ARM_FUNCTION_PROFILER
+#define ARM_FUNCTION_PROFILER(STREAM,LABELNO)		\
+{							\
+  asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n");		\
+  asm_fprintf (STREAM, "\tbl\t__mcount%s\n",		\
+	       (TARGET_ARM && NEED_PLT_RELOC)		\
+	       ? "(PLT)" : "");				\
+}
+
+/* Clear the instruction cache from `BEG' to `END'.  This makes a
+   call to the ARM_SYNC_ICACHE architecture specific syscall.  */
+#define CLEAR_INSN_CACHE(BEG, END)					\
+do									\
+  {									\
+    extern int sysarch (int number, void *args);			\
+    struct								\
+      {									\
+	unsigned int addr;						\
+	int          len;						\
+      } s;								\
+    s.addr = (unsigned int) (BEG);					\
+    s.len = (END) - (BEG);						\
+    (void) sysarch (0, &s);						\
+  }									\
+while (0)
+
+/* This is how we tell the assembler that two symbols have the same value.  */
+#define ASM_OUTPUT_DEF(FILE, NAME1, NAME2) \
+  do					   \
+    {					   \
+     assemble_name (FILE, NAME1); 	   \
+     fputs (" = ", FILE);		   \
+     assemble_name (FILE, NAME2);	   \
+     fputc ('\n', FILE);		   \
+    }					   \
+  while (0)
+
+/* Add  .note.GNU-stack.  */
+#undef NEED_INDICATE_EXEC_STACK
+#define NEED_INDICATE_EXEC_STACK 1
+
+#define ARM_TARGET2_DWARF_FORMAT (DW_EH_PE_pcrel | DW_EH_PE_indirect)
Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(revision 217020)
+++ gcc/config.gcc	(working copy)
@@ -259,7 +259,6 @@
    arm*-wince-pe*			\
  | arm*-*-ecos-elf			\
  | arm*-*-elf				\
- | arm*-*-freebsd*			\
  | arm*-*-linux*			\
  | arm*-*-uclinux*			\
  | i[34567]86-go32-*			\
@@ -1000,6 +999,27 @@
 	extra_options="${extra_options} arm/vxworks.opt"
 	tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
 	;;
+arm*-*-freebsd*)                # ARM FreeBSD EABI
+	tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h"
+	case $target in
+	arm*b-*-freebsd*)
+	    tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
+	    ;;
+	esac
+	tmake_file="${tmake_file} arm/t-arm arm/t-bpabi"
+	tm_file="${tm_file} arm/bpabi.h arm/freebsd.h arm/aout.h arm/arm.h"
+	case $target in
+	armv[67]*-*-freebsd*)
+	    tm_defines="${tm_defines} TARGET_FREEBSD_ARMv6=1"
+	    ;;
+	esac
+	case $target in
+	arm*hf-*-freebsd*)
+	    tm_defines="${tm_defines} TARGET_FREEBSD_ARM_HARD_FLOAT=1"
+	    ;;
+	esac
+	with_tls=${with_tls:-gnu}
+	;;
 arm*-*-netbsdelf*)
 	tm_file="dbxelf.h elfos.h netbsd.h netbsd-elf.h arm/elf.h arm/aout.h ${tm_file} arm/netbsd-elf.h"
 	extra_options="${extra_options} netbsd.opt netbsd-elf.opt"
Index: gcc/config.host
===================================================================
--- gcc/config.host	(revision 217020)
+++ gcc/config.host	(working copy)
@@ -99,7 +99,7 @@
 esac
 
 case ${host} in
-  arm*-*-linux*)
+  arm*-*-freebsd* | arm*-*-linux*)
     case ${target} in
       arm*-*-*)
 	host_extra_gcc_objs="driver-arm.o"
Index: libgcc/config/arm/freebsd-atomic.c
===================================================================
--- libgcc/config/arm/freebsd-atomic.c	(revision 0)
+++ libgcc/config/arm/freebsd-atomic.c	(working copy)
@@ -0,0 +1,224 @@
+/* FreeBSD specific atomic operations for ARM EABI.
+   Copyright (C) 2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <sys/types.h>
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+#define ARM_VECTORS_HIGH 0xffff0000U
+#define ARM_TP_ADDRESS   (ARM_VECTORS_HIGH + 0x1000)
+#define ARM_RAS_START    (ARM_TP_ADDRESS + 4)
+
+void HIDDEN
+__sync_synchronize (void)
+{
+#if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__)       \
+    || defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6T2__)  \
+    || defined (__ARM_ARCH_6Z__) || defined (__ARM_ARCH_6ZK__)  \
+    || defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+#if defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+    __asm __volatile ("dmb" : : : "memory");
+#else
+    __asm __volatile ("mcr p15, 0, r0, c7, c10, 5" : : : "memory");
+#endif
+#else
+    __asm __volatile ("nop" : : : "memory");
+#endif
+}
+
+#if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__)        \
+    || defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6T2__)   \
+    || defined (__ARM_ARCH_6Z__) || defined (__ARM_ARCH_6ZK__)   \
+    || defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+
+/* These systems should be supported by the compiler.  */
+
+#else /* __ARM_ARCH_5__  */
+
+#define	SYNC_LOCK_TEST_AND_SET_N(N, TYPE, LDR, STR)			\
+TYPE HIDDEN    								\
+__sync_lock_test_and_set_##N (TYPE *mem, TYPE val)			\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%5]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%5, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %4\n"	/* Load old value.  */		\
+                "\t"STR" %3, %1\n"	/* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%5]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%5, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (val), "m" (*mem), "r" (ras_start));		\
+        return (old);							\
+}
+
+#define SYNC_LOCK_RELEASE_N(N, TYPE)					\
+void HIDDEN								\
+__sync_lock_release_##N (TYPE *ptr)     				\
+{					       				\
+    /* All writes before this point must be seen before we release	\
+       the lock itself.  */						\
+    __sync_synchronize ();     						\
+    *ptr = 0;								\
+}
+
+#define	SYNC_VAL_CAS_N(N, TYPE, LDR, STREQ)             		\
+TYPE HIDDEN    								\
+__sync_val_compare_and_swap_##N (TYPE *mem, TYPE expected,		\
+    TYPE desired)							\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%6]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%6, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %5\n"     /* Load old value.  */		\
+                "\tcmp   %0, %3\n"     /* Compare to expected value.  */\
+                "\t"STREQ" %4, %1\n"   /* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%6]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%6, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (expected), "r" (desired), "m" (*mem),		\
+                  "r" (ras_start));					\
+        return (old);							\
+}
+
+typedef unsigned char bool;
+
+#define SYNC_BOOL_CAS_N(N, TYPE)                                        \
+bool HIDDEN								\
+__sync_bool_compare_and_swap_##N (TYPE *ptr, TYPE oldval,		\
+                                  TYPE newval)                          \
+{									\
+    TYPE actual_oldval							\
+      = __sync_val_compare_and_swap_##N (ptr, oldval, newval);          \
+    return (oldval == actual_oldval);					\
+}
+
+#define	SYNC_FETCH_AND_OP_N(N, TYPE, LDR, STR, NAME, OP)		\
+TYPE HIDDEN								\
+__sync_fetch_and_##NAME##_##N (TYPE *mem, TYPE val)	       		\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%5]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%5, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %4\n"	/* Load old value.  */		\
+                "\t"OP"  %2, %0, %3\n"	/* Calculate new value.  */	\
+                "\t"STR" %2, %1\n"	/* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%5]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%5, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (val), "m" (*mem), "r" (ras_start));		\
+        return (old);							\
+}
+
+#define	SYNC_OP_AND_FETCH_N(N, TYPE, LDR, STR, NAME, OP)		\
+TYPE HIDDEN   								\
+__sync_##NAME##_and_fetch_##N (TYPE *mem, TYPE val)	       		\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%5]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%5, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %4\n"	/* Load old value.  */		\
+                "\t"OP"  %2, %0, %3\n"	/* Calculate new value.  */	\
+                "\t"STR" %2, %1\n"	/* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%5]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%5, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (val), "m" (*mem), "r" (ras_start));		\
+        return (old);							\
+}
+
+#define	EMIT_ALL_OPS_N(N, TYPE, LDR, STR, STREQ)			\
+SYNC_LOCK_TEST_AND_SET_N (N, TYPE, LDR, STR)				\
+SYNC_LOCK_RELEASE_N (N, TYPE)                                           \
+SYNC_VAL_CAS_N (N, TYPE, LDR, STREQ)	                		\
+SYNC_BOOL_CAS_N (N, TYPE)                                               \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, add, "add")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, and, "and")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, or, "orr")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, sub, "sub")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, xor, "eor")                     \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, add, "add")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, and, "and")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, or, "orr")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, sub, "sub")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, xor, "eor")
+
+
+
+EMIT_ALL_OPS_N (1, unsigned char, "ldrb", "strb", "streqb")
+EMIT_ALL_OPS_N (2, unsigned short, "ldrh", "strh", "streqh")
+EMIT_ALL_OPS_N (4, unsigned int, "ldr", "str", "streq")
+
+#endif
Index: libgcc/config/arm/t-freebsd
===================================================================
--- libgcc/config/arm/t-freebsd	(revision 0)
+++ libgcc/config/arm/t-freebsd	(working copy)
@@ -0,0 +1,9 @@
+# Just for these, we omit the frame pointer since it makes such a big
+# difference.  It is then pointless adding debugging.
+HOST_LIBGCC2_CFLAGS += -fomit-frame-pointer
+
+LIB2ADD_ST += $(srcdir)/config/arm/freebsd-atomic.c
+
+# Use a version of div0 which raises SIGFPE.
+LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx
+
Index: libgcc/config/arm/unwind-arm.h
===================================================================
--- libgcc/config/arm/unwind-arm.h	(revision 217020)
+++ libgcc/config/arm/unwind-arm.h	(working copy)
@@ -48,7 +48,8 @@
       if (!tmp)
 	return 0;
 
-#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__)
+#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
+    || defined(__FreeBSD__)
       /* Pc-relative indirect.  */
 #define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel | DW_EH_PE_indirect)
       tmp += ptr;
Index: libgcc/config.host
===================================================================
--- libgcc/config.host	(revision 217020)
+++ libgcc/config.host	(working copy)
@@ -366,6 +366,13 @@
 	tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
 	extra_parts="$extra_parts crti.o crtn.o"
 	;;
+arm*-*-freebsd*)                # ARM FreeBSD EABI
+	tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix arm/t-elf"
+	tmake_file="${tmake_file} arm/t-bpabi arm/t-freebsd t-slibgcc-libgcc"
+	tm_file="${tm_file} arm/bpabi-lib.h"
+	unwind_header=config/arm/unwind-arm.h
+	tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
+	;;
 arm*-*-netbsdelf*)
 	tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
 	;;
Index: libstdc++-v3/configure.host
===================================================================
--- libstdc++-v3/configure.host	(revision 217020)
+++ libstdc++-v3/configure.host	(working copy)
@@ -366,6 +366,9 @@
 	;;
     esac
     ;;
+  arm*-*-freebsd*)
+     port_specific_symbol_files="\$(srcdir)/../config/os/gnu-linux/arm-eabi-extra.ver"
+     ;;
   powerpc*-*-darwin*)
     port_specific_symbol_files="\$(srcdir)/../config/os/bsd/darwin/ppc-extra.ver"
     ;;

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-02 22:12 [PATCH] FreeBSD arm support, EABI Andreas Tobler
@ 2014-11-03  4:16 ` Gerald Pfeifer
  2014-11-03  9:04 ` Bin.Cheng
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 11+ messages in thread
From: Gerald Pfeifer @ 2014-11-03  4:16 UTC (permalink / raw)
  To: Andreas Tobler; +Cc: GCC Patches

On Sunday 2014-11-02 23:11, Andreas Tobler wrote:
> this is a patch which brings support for arm*-*-freebsd* to trunk.

Nice!

> 	* config.host: A extras components for arm*-*-freebsd*.

"Add" instead of "A"?

Gerald

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-02 22:12 [PATCH] FreeBSD arm support, EABI Andreas Tobler
  2014-11-03  4:16 ` Gerald Pfeifer
@ 2014-11-03  9:04 ` Bin.Cheng
  2014-11-03 11:45 ` Kyrill Tkachov
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 11+ messages in thread
From: Bin.Cheng @ 2014-11-03  9:04 UTC (permalink / raw)
  To: Andreas Tobler; +Cc: GCC Patches

On Mon, Nov 3, 2014 at 6:11 AM, Andreas Tobler <andreast-list@fgznet.ch> wrote:
> Hello all,
>
> this is a patch which brings support for arm*-*-freebsd* to trunk.
> The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and
> armv6hf-*-freebsd*.
> armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH < 6.
Just out of curiosity, what about armv7?

Thanks,
bin
>
> There is kernel development for armv8 aka. aarch64 ongoing but this is not
> covered here. This patch only covers 32-bit arm in a basic manner.
>
> The patch is built and tested against armv6, armv6hf and arm. The former two
> tests (lots of) were done on a WANDBOARD-QUAD, the latter on a MARVELL board
> with 256MB Ram and 200MHz cpu.... (around 72h+ for a build and test.....)
>
> Results for armv6hf are on the list. Only one entry but locally I ran
> several dozens runs...
>
> Once if this patch is accepted a few test suite additions will follow.
> (arm*-*-*eabi* -> arm_eabi)
>
> The patch itself is also prepared for arm*eb*-*-freebsd*, but I could not
> test since I lack the HW.
>
> I appreciate comments, questions and also an ack if this patch is ok for
> trunk.
>
> TIA,
>
> Andreas
>
> toplevel:
>
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
>
>         * configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
>         * configure: Regenerate.
>
> gcc:
>
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
>
>         * config.gcc (arm*-*-freebsd*): New configuration.
>         * config/arm/freebsd.h: New file.
>         * config.host: A extras components for arm*-*-freebsd*.
>         * config/arm/arm.c (arm_init_libfuncs): FreeBSD does not support 8
> byte
>         atomics for __ARM_ARCH__ < 6 yet.
>         (arm_option_override): FreeBSD has not yet implemented unaligned
> access.
>
> libgcc:
>
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
>
>         * config.host (arm*-*-freebsd*): Add new configuration for
>         arm*-*-freebsd*.
>         * config/arm/freebsd-atomic.c: New file.
>         * config/arm/t-freebsd: Likewise.
>         * config/arm/unwind-arm.h: Add __FreeBSD__ to the list of
> 'PC-relative
>         indirect' OS's.
>
> libstdc++:
>
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
>
>         * configure.host: Add arm*-*-freebsd* port_specific_symbol_files.
>

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-02 22:12 [PATCH] FreeBSD arm support, EABI Andreas Tobler
  2014-11-03  4:16 ` Gerald Pfeifer
  2014-11-03  9:04 ` Bin.Cheng
@ 2014-11-03 11:45 ` Kyrill Tkachov
  2014-11-03 16:26   ` Andreas Tobler
  2014-11-03 17:53 ` Joseph Myers
  2014-11-07 13:45 ` Richard Earnshaw
  4 siblings, 1 reply; 11+ messages in thread
From: Kyrill Tkachov @ 2014-11-03 11:45 UTC (permalink / raw)
  To: Andreas Tobler; +Cc: GCC Patches, Ramana Radhakrishnan, Richard Earnshaw

Hi Andreas,

CC'ing arm maintainers and a couple of comments inline.

On 02/11/14 22:11, Andreas Tobler wrote:
> Hello all,
>
> this is a patch which brings support for arm*-*-freebsd* to trunk.
> The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and
> armv6hf-*-freebsd*.
> armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH < 6.

Why split at ARM_ARCH == 6 ? I see in the patch you define 
TARGET_FREEBSD_ARMv6 but
only ever use it to define the SUBTARGET_CPU_DEFAULT. In the other arm 
triplets I don't think
we have architecture-specific identifiers in the arm* parts...
>
> +
> +#if defined (TARGET_FREEBSD_ARMv6)
> +#undef  SUBTARGET_CPU_DEFAULT
> +#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm1176jzs
> +#else
> +#undef  SUBTARGET_CPU_DEFAULT
> +#define SUBTARGET_CPU_DEFAULT   TARGET_CPU_arm9
> +#endif
> +

What about ARMv7? The default CPU there is TARGET_CPU_cortexa8

> Index: gcc/config.gcc
> ===================================================================
> --- gcc/config.gcc	(revision 217020)
> +++ gcc/config.gcc	(working copy)
> @@ -259,7 +259,6 @@
>      arm*-wince-pe*			\
>    | arm*-*-ecos-elf			\
>    | arm*-*-elf				\
> - | arm*-*-freebsd*			\
>    | arm*-*-linux*			\
>    | arm*-*-uclinux*			\
>    | i[34567]86-go32-*			\
> @@ -1000,6 +999,27 @@
>   	extra_options="${extra_options} arm/vxworks.opt"
>   	tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
>   	;;
> +arm*-*-freebsd*)                # ARM FreeBSD EABI
> +	tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h"
> +	case $target in
> +	arm*b-*-freebsd*)
> +	    tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
> +	    ;;
> +	esac
> +	tmake_file="${tmake_file} arm/t-arm arm/t-bpabi"
> +	tm_file="${tm_file} arm/bpabi.h arm/freebsd.h arm/aout.h arm/arm.h"
> +	case $target in
> +	armv[67]*-*-freebsd*)
> +	    tm_defines="${tm_defines} TARGET_FREEBSD_ARMv6=1"
> +	    ;;
> +	esac

So you also match armv7*-*-freebsd*. As mentioned above I'm not sure why 
we would want these per-architecture triplets. If we do want to have 
these per-architecture triplets, there is also the ARMv8 AArch32 state 
which is supported in the arm backend and can be identified by ARM_ARCH 
== 8. Do we want to add an armv8*-*-freebsd triplet as well?

Cheers,
Kyrill


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-03 11:45 ` Kyrill Tkachov
@ 2014-11-03 16:26   ` Andreas Tobler
  0 siblings, 0 replies; 11+ messages in thread
From: Andreas Tobler @ 2014-11-03 16:26 UTC (permalink / raw)
  To: Kyrill Tkachov; +Cc: GCC Patches, Ramana Radhakrishnan, Richard Earnshaw

Hi Kyrill,

On 03.11.14 12:44, Kyrill Tkachov wrote:

> CC'ing arm maintainers and a couple of comments inline.

Thank you!

> On 02/11/14 22:11, Andreas Tobler wrote:
>> Hello all,
>>
>> this is a patch which brings support for arm*-*-freebsd* to trunk.
>> The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and
>> armv6hf-*-freebsd*.
>> armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH < 6.
>
> Why split at ARM_ARCH == 6 ? I see in the patch you define
> TARGET_FREEBSD_ARMv6 but
> only ever use it to define the SUBTARGET_CPU_DEFAULT. In the other arm
> triplets I don't think
> we have architecture-specific identifiers in the arm* parts...

Well, I mentioned it in another response, it was unfortunate from me to 
write the equal sign. What we currently do is the following:

ARM_ARCH >= 6 becomes armv6*-*-freebsd*
ARM_ARCH <= 5 becomes arm-*-freebsd*

So, would you suggest to leave the SUBTARGET_CPU_DEFAULT away?

>> +
>> +#if defined (TARGET_FREEBSD_ARMv6)
>> +#undef  SUBTARGET_CPU_DEFAULT
>> +#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm1176jzs
>> +#else
>> +#undef  SUBTARGET_CPU_DEFAULT
>> +#define SUBTARGET_CPU_DEFAULT   TARGET_CPU_arm9
>> +#endif
>> +
>
> What about ARMv7? The default CPU there is TARGET_CPU_cortexa8

Would fall under armv6 with the above rule.

>> Index: gcc/config.gcc
>> ===================================================================
>> --- gcc/config.gcc	(revision 217020)
>> +++ gcc/config.gcc	(working copy)
>> @@ -259,7 +259,6 @@
>>       arm*-wince-pe*			\
>>     | arm*-*-ecos-elf			\
>>     | arm*-*-elf				\
>> - | arm*-*-freebsd*			\
>>     | arm*-*-linux*			\
>>     | arm*-*-uclinux*			\
>>     | i[34567]86-go32-*			\
>> @@ -1000,6 +999,27 @@
>>    	extra_options="${extra_options} arm/vxworks.opt"
>>    	tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
>>    	;;
>> +arm*-*-freebsd*)                # ARM FreeBSD EABI
>> +	tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h"
>> +	case $target in
>> +	arm*b-*-freebsd*)
>> +	    tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
>> +	    ;;
>> +	esac
>> +	tmake_file="${tmake_file} arm/t-arm arm/t-bpabi"
>> +	tm_file="${tm_file} arm/bpabi.h arm/freebsd.h arm/aout.h arm/arm.h"
>> +	case $target in
>> +	armv[67]*-*-freebsd*)
>> +	    tm_defines="${tm_defines} TARGET_FREEBSD_ARMv6=1"
>> +	    ;;
>> +	esac
>
> So you also match armv7*-*-freebsd*. As mentioned above I'm not sure why
> we would want these per-architecture triplets. If we do want to have
> these per-architecture triplets, there is also the ARMv8 AArch32 state
> which is supported in the arm backend and can be identified by ARM_ARCH
> == 8. Do we want to add an armv8*-*-freebsd triplet as well?

Aehm, this is left over from a trial where I tried an 
armv7hf-*-freebsd*. This does not exist yet and I'm not sure if we 
really want that.

Regarding armv8, for the 64-bit there will be another triplet. armv8 
with AArch32 would also fall under armv6 now, but I can not say how it 
would behave, I lack the hardware ;)

Thanks for the feedback.

Andreas

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-02 22:12 [PATCH] FreeBSD arm support, EABI Andreas Tobler
                   ` (2 preceding siblings ...)
  2014-11-03 11:45 ` Kyrill Tkachov
@ 2014-11-03 17:53 ` Joseph Myers
  2014-11-03 19:07   ` Andreas Tobler
  2014-11-07 13:45 ` Richard Earnshaw
  4 siblings, 1 reply; 11+ messages in thread
From: Joseph Myers @ 2014-11-03 17:53 UTC (permalink / raw)
  To: Andreas Tobler; +Cc: GCC Patches

On Sun, 2 Nov 2014, Andreas Tobler wrote:

> 	* config/arm/arm.c (arm_init_libfuncs): FreeBSD does not support 8
> byte
> 	atomics for __ARM_ARCH__ < 6 yet.
> 	(arm_option_override): FreeBSD has not yet implemented unaligned
> access.

The __FreeBSD__ conditionals in arm.c are incorrect.  Those would test for 
FreeBSD *host*, but you need a conditional for FreeBSD *target* here.

-- 
Joseph S. Myers
joseph@codesourcery.com

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-03 17:53 ` Joseph Myers
@ 2014-11-03 19:07   ` Andreas Tobler
  2014-11-03 19:11     ` Joseph Myers
  0 siblings, 1 reply; 11+ messages in thread
From: Andreas Tobler @ 2014-11-03 19:07 UTC (permalink / raw)
  To: Joseph Myers; +Cc: GCC Patches

On 03.11.14 18:53, Joseph Myers wrote:
> On Sun, 2 Nov 2014, Andreas Tobler wrote:
>
>> 	* config/arm/arm.c (arm_init_libfuncs): FreeBSD does not support 8
>> byte
>> 	atomics for __ARM_ARCH__ < 6 yet.
>> 	(arm_option_override): FreeBSD has not yet implemented unaligned
>> access.
>
> The __FreeBSD__ conditionals in arm.c are incorrect.  Those would test for
> FreeBSD *host*, but you need a conditional for FreeBSD *target* here.
>

Ouch, yes.

This I'd have to define via config/arm/freebsd.h, right?

#define ARM_FREEBSD

Index: arm.c
===================================================================
--- arm.c	(revision 216539)
+++ arm.c	(working copy)
@@ -2188,7 +2188,11 @@
  {
    /* For Linux, we have access to kernel support for atomic 
operations.  */
    if (arm_abi == ARM_ABI_AAPCS_LINUX)
+#ifndef ARM_FREEBSD
      init_sync_libfuncs (2 * UNITS_PER_WORD);
+#else
+    init_sync_libfuncs (UNITS_PER_WORD);
+#endif

....

Thank you!
Andreas


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-03 19:07   ` Andreas Tobler
@ 2014-11-03 19:11     ` Joseph Myers
  0 siblings, 0 replies; 11+ messages in thread
From: Joseph Myers @ 2014-11-03 19:11 UTC (permalink / raw)
  To: Andreas Tobler; +Cc: GCC Patches

On Mon, 3 Nov 2014, Andreas Tobler wrote:

> > The __FreeBSD__ conditionals in arm.c are incorrect.  Those would test for
> > FreeBSD *host*, but you need a conditional for FreeBSD *target* here.
> > 
> 
> Ouch, yes.
> 
> This I'd have to define via config/arm/freebsd.h, right?
> 
> #define ARM_FREEBSD

Yes, that seems the right place.

-- 
Joseph S. Myers
joseph@codesourcery.com

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-02 22:12 [PATCH] FreeBSD arm support, EABI Andreas Tobler
                   ` (3 preceding siblings ...)
  2014-11-03 17:53 ` Joseph Myers
@ 2014-11-07 13:45 ` Richard Earnshaw
  2014-11-09 19:58   ` Andreas Tobler
  4 siblings, 1 reply; 11+ messages in thread
From: Richard Earnshaw @ 2014-11-07 13:45 UTC (permalink / raw)
  To: Andreas Tobler, GCC Patches

On 02/11/14 22:11, Andreas Tobler wrote:
> Hello all,
> 
> this is a patch which brings support for arm*-*-freebsd* to trunk.
> The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and 
> armv6hf-*-freebsd*.
> armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH < 6.
> 
> There is kernel development for armv8 aka. aarch64 ongoing but this is 
> not covered here. This patch only covers 32-bit arm in a basic manner.
> 
> The patch is built and tested against armv6, armv6hf and arm. The former 
> two tests (lots of) were done on a WANDBOARD-QUAD, the latter on a 
> MARVELL board with 256MB Ram and 200MHz cpu.... (around 72h+ for a build 
> and test.....)
> 
> Results for armv6hf are on the list. Only one entry but locally I ran 
> several dozens runs...
> 
> Once if this patch is accepted a few test suite additions will follow.
> (arm*-*-*eabi* -> arm_eabi)
> 
> The patch itself is also prepared for arm*eb*-*-freebsd*, but I could 
> not test since I lack the HW.
> 
> I appreciate comments, questions and also an ack if this patch is ok for 
> trunk.
> 
> TIA,
> 
> Andreas
> 
> toplevel:
> 
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
> 
> 	* configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
> 	* configure: Regenerate.
> 
> gcc:
> 
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
> 
> 	* config.gcc (arm*-*-freebsd*): New configuration.
> 	* config/arm/freebsd.h: New file.
> 	* config.host: A extras components for arm*-*-freebsd*.
> 	* config/arm/arm.c (arm_init_libfuncs): FreeBSD does not support 8 byte
> 	atomics for __ARM_ARCH__ < 6 yet.
> 	(arm_option_override): FreeBSD has not yet implemented unaligned access.
> 
> libgcc:
> 
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
> 
> 	* config.host (arm*-*-freebsd*): Add new configuration for
> 	arm*-*-freebsd*.
> 	* config/arm/freebsd-atomic.c: New file.
> 	* config/arm/t-freebsd: Likewise.
> 	* config/arm/unwind-arm.h: Add __FreeBSD__ to the list of 'PC-relative
> 	indirect' OS's.
> 
> libstdc++:
> 
> 2014-11-02  Andreas Tobler  <andreast@gcc.gnu.org>
> 
> 	* configure.host: Add arm*-*-freebsd* port_specific_symbol_files.
> 
> 

This mostly looks OK, but a couple of nits.


> Index: gcc/config/arm/arm.c
> ===================================================================
> --- gcc/config/arm/arm.c	(revision 217020)
> +++ gcc/config/arm/arm.c	(working copy)
> @@ -2202,7 +2202,11 @@
>  {
>    /* For Linux, we have access to kernel support for atomic operations.  */
>    if (arm_abi == ARM_ABI_AAPCS_LINUX)
> +#ifndef __FreeBSD__
>      init_sync_libfuncs (2 * UNITS_PER_WORD);
> +#else
> +    init_sync_libfuncs (UNITS_PER_WORD);
> +#endif

This would be better handled by some refactoring, so that we can
eliminate the conditionalized code in the main function.  Define
something like MAX_SYNC_LIBFUNC_SIZE and then override it in the
FreeBSD-specific header.

> @@ -3036,6 +3040,9 @@
>        warning (0, "target CPU does not support unaligned accesses");
>        unaligned_access = 0;
>      }
> +#ifdef __FreeBSD__
> +      unaligned_access = 0;
> +#endif
>  

This really should be fixed in the OS; you're not really supporting the
architecture properly if you don't allow this on v6 or later.  In the
mean time, the code should be moved to SUBTARGET_OVERRIDE_OPTIONS.

> Index: gcc/config/arm/freebsd.h
> ===================================================================
> --- gcc/config/arm/freebsd.h	(revision 0)
> +++ gcc/config/arm/freebsd.h	(working copy)

> +
> +/*  Use the AAPCS type for wchar_t, override the one from config/freebsd.h.  */
> +#undef  WCHAR_TYPE
> +#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long int")

I don't think you should really be targeting anything that is not AAPCS
based; so this should surely collapse to 'unsigned int'.




^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
  2014-11-07 13:45 ` Richard Earnshaw
@ 2014-11-09 19:58   ` Andreas Tobler
  0 siblings, 0 replies; 11+ messages in thread
From: Andreas Tobler @ 2014-11-09 19:58 UTC (permalink / raw)
  To: Richard Earnshaw, GCC Patches

[-- Attachment #1: Type: text/plain, Size: 4119 bytes --]

Hi Richard,

On 07.11.14 14:45, Richard Earnshaw wrote:
> On 02/11/14 22:11, Andreas Tobler wrote:
>> Hello all,
>>
>> this is a patch which brings support for arm*-*-freebsd* to trunk.
>> The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and
>> armv6hf-*-freebsd*.
>> armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH < 6.
>>
>> There is kernel development for armv8 aka. aarch64 ongoing but this is
>> not covered here. This patch only covers 32-bit arm in a basic manner.
>>
>> The patch is built and tested against armv6, armv6hf and arm. The former
>> two tests (lots of) were done on a WANDBOARD-QUAD, the latter on a
>> MARVELL board with 256MB Ram and 200MHz cpu.... (around 72h+ for a build
>> and test.....)
>>
>> Results for armv6hf are on the list. Only one entry but locally I ran
>> several dozens runs...
>>
>> Once if this patch is accepted a few test suite additions will follow.
>> (arm*-*-*eabi* -> arm_eabi)
>>
>> The patch itself is also prepared for arm*eb*-*-freebsd*, but I could
>> not test since I lack the HW.

[snip]

> This mostly looks OK, but a couple of nits.

Thank you for the review.

>> Index: gcc/config/arm/arm.c
>> ===================================================================
>> --- gcc/config/arm/arm.c	(revision 217020)
>> +++ gcc/config/arm/arm.c	(working copy)
>> @@ -2202,7 +2202,11 @@
>>   {
>>     /* For Linux, we have access to kernel support for atomic operations.  */
>>     if (arm_abi == ARM_ABI_AAPCS_LINUX)
>> +#ifndef __FreeBSD__
>>       init_sync_libfuncs (2 * UNITS_PER_WORD);
>> +#else
>> +    init_sync_libfuncs (UNITS_PER_WORD);
>> +#endif
>
> This would be better handled by some refactoring, so that we can
> eliminate the conditionalized code in the main function.  Define
> something like MAX_SYNC_LIBFUNC_SIZE and then override it in the
> FreeBSD-specific header.

Done.

>> @@ -3036,6 +3040,9 @@
>>         warning (0, "target CPU does not support unaligned accesses");
>>         unaligned_access = 0;
>>       }
>> +#ifdef __FreeBSD__
>> +      unaligned_access = 0;
>> +#endif
>>
>
> This really should be fixed in the OS; you're not really supporting the
> architecture properly if you don't allow this on v6 or later.  In the
> mean time, the code should be moved to SUBTARGET_OVERRIDE_OPTIONS.

Agreed, for now as you suggested included it in the 
SUBTARGET_OVERRIDE_OPTIONS of config/arm/freebsd.h

>> Index: gcc/config/arm/freebsd.h
>> ===================================================================
>> --- gcc/config/arm/freebsd.h	(revision 0)
>> +++ gcc/config/arm/freebsd.h	(working copy)
>
>> +
>> +/*  Use the AAPCS type for wchar_t, override the one from config/freebsd.h.  */
>> +#undef  WCHAR_TYPE
>> +#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long int")
>
> I don't think you should really be targeting anything that is not AAPCS
> based; so this should surely collapse to 'unsigned int'.

Done.

Attached the revised version with adapted Changelog (thanks Gerald).
Bootstraped and tested (results sent).

Ok for trunk?

Thanks again for your time.
Andreas

toplevel:

2014-11-08  Andreas Tobler  <andreast@gcc.gnu.org>

         * configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
         * configure: Regenerate.

gcc:
2014-11-08  Andreas Tobler  <andreast@gcc.gnu.org>

         * config.gcc (arm*-*-freebsd*): New configuration.
         * config/arm/freebsd.h: New file.
         * config.host: Add extra components for arm*-*-freebsd*.
         * config/arm/arm.h: Introduce MAX_SYNC_LIBFUNC_SIZE.
         * config/arm/arm.c (arm_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE.


libgcc:
2014-11-08  Andreas Tobler  <andreast@gcc.gnu.org>

         * config.host (arm*-*-freebsd*): Add new configuration for
         arm*-*-freebsd*.
         * config/arm/freebsd-atomic.c: New file.
         * config/arm/t-freebsd: Likewise.
         * config/arm/unwind-arm.h: Add __FreeBSD__ to the list of
         'PC-relative indirect' OS's.


libstdc++-v3:
2014-11-08  Andreas Tobler  <andreast@gcc.gnu.org>

         * configure.host: Add arm*-*-freebsd* port_specific_symbol_files.


[-- Attachment #2: gcc5_fbsd_arm_20141109-1.diff --]
[-- Type: text/plain, Size: 22058 bytes --]

Index: configure
===================================================================
--- configure	(revision 217256)
+++ configure	(working copy)
@@ -3352,6 +3352,9 @@
   alpha*-*-*vms*)
     noconfigdirs="$noconfigdirs ${libgcj}"
     ;;
+  arm*-*-freebsd*)
+    noconfigdirs="$noconfigdirs ${libgcj}"
+    ;;
   arm-wince-pe)
     noconfigdirs="$noconfigdirs ${libgcj}"
     ;;
Index: configure.ac
===================================================================
--- configure.ac	(revision 217256)
+++ configure.ac	(working copy)
@@ -711,6 +711,9 @@
   alpha*-*-*vms*)
     noconfigdirs="$noconfigdirs ${libgcj}"
     ;;
+  arm*-*-freebsd*)
+    noconfigdirs="$noconfigdirs ${libgcj}"
+    ;;
   arm-wince-pe)
     noconfigdirs="$noconfigdirs ${libgcj}"
     ;;
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	(revision 217256)
+++ gcc/config/arm/arm.c	(working copy)
@@ -2229,7 +2229,7 @@
 {
   /* For Linux, we have access to kernel support for atomic operations.  */
   if (arm_abi == ARM_ABI_AAPCS_LINUX)
-    init_sync_libfuncs (2 * UNITS_PER_WORD);
+    init_sync_libfuncs (MAX_SYNC_LIBFUNC_SIZE);
 
   /* There are no special library functions unless we are using the
      ARM BPABI.  */
Index: gcc/config/arm/arm.h
===================================================================
--- gcc/config/arm/arm.h	(revision 217256)
+++ gcc/config/arm/arm.h	(working copy)
@@ -766,6 +766,11 @@
 #define PCC_BITFIELD_TYPE_MATTERS TARGET_AAPCS_BASED
 #endif
 
+/* The maximum size of the sync library functions supported.  */
+#ifndef MAX_SYNC_LIBFUNC_SIZE
+#define MAX_SYNC_LIBFUNC_SIZE (2 * UNITS_PER_WORD);
+#endif
+
 \f
 /* Standard register usage.  */
 
Index: gcc/config/arm/freebsd.h
===================================================================
--- gcc/config/arm/freebsd.h	(revision 0)
+++ gcc/config/arm/freebsd.h	(working copy)
@@ -0,0 +1,180 @@
+/* Definitions of target machine for GNU compiler, FreeBSD/arm version.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#undef  SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC FBSD_CPP_SPEC
+
+#undef  SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS					\
+  { "subtarget_extra_asm_spec",	SUBTARGET_EXTRA_ASM_SPEC },	\
+  { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, 	\
+  { "fbsd_dynamic_linker", FBSD_DYNAMIC_LINKER }
+
+#undef SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC \
+  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5} " TARGET_FIX_V4BX_SPEC " \
+  %{fpic|fpie:-k} %{fPIC|fPIE:-k}"
+
+#undef SUBTARGET_ASM_FLOAT_SPEC
+#ifdef TARGET_FREEBSD_ARM_HARD_FLOAT
+/* Default to full vfp if we build for arm*hf.  */
+#define SUBTARGET_ASM_FLOAT_SPEC "%{!mfpu=*:-mfpu=vfp}"
+#else
+#define SUBTARGET_ASM_FLOAT_SPEC "%{!mfpu=*:-mfpu=softvfp}"
+#endif
+
+#undef	LINK_SPEC
+#define LINK_SPEC "							\
+  %{p:%nconsider using `-pg' instead of `-p' with gprof (1) }		\
+  %{v:-V}								\
+  %{assert*} %{R*} %{rpath*} %{defsym*}					\
+  %{shared:-Bshareable %{h*} %{soname*}}				\
+  %{!shared:								\
+    %{!static:								\
+      %{rdynamic:-export-dynamic}					\
+      %{!dynamic-linker:-dynamic-linker %(fbsd_dynamic_linker) }}	\
+    %{static:-Bstatic}}							\
+  %{!static:--hash-style=both --enable-new-dtags}			\
+  %{symbolic:-Bsymbolic}						\
+  -X %{mbig-endian:-EB} %{mlittle-endian:-EL}"
+
+/* TARGET_BIG_ENDIAN_DEFAULT is set in
+   config.gcc for big endian configurations.  */
+#if TARGET_BIG_ENDIAN_DEFAULT
+#define TARGET_ENDIAN_DEFAULT    MASK_BIG_END
+#define TARGET_ENDIAN_OPTION     "mbig-endian"
+#define TARGET_LINKER_EMULATION  "armelfb_fbsd"
+#else
+#define TARGET_ENDIAN_DEFAULT    0
+#define TARGET_ENDIAN_OPTION     "mlittle-endian"
+#define TARGET_LINKER_EMULATION  "armelf_fbsd"
+#endif
+
+#undef	SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+
+#undef  TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS() 		\
+  do						\
+    {						\
+	FBSD_TARGET_OS_CPP_BUILTINS ();		\
+	TARGET_BPABI_CPP_BUILTINS ();		\
+    }						\
+  while (false)
+
+/* We default to a soft-float ABI so that binaries can run on all
+   target hardware.  */
+#undef TARGET_DEFAULT_FLOAT_ABI
+#ifdef TARGET_FREEBSD_ARM_HARD_FLOAT
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD
+#else
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
+#endif
+
+#undef ARM_DEFAULT_ABI
+
+/* AACPS_LINUX has access to kernel atomic ops while we don't.
+   But AACPS defaults to short_enums.  */
+#define ARM_DEFAULT_ABI ARM_ABI_AAPCS_LINUX
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_INTERWORK | TARGET_ENDIAN_DEFAULT)
+
+/* We do not have any MULTILIB_OPTIONS specified, so there are no
+   MULTILIB_DEFAULTS.  */
+#undef  MULTILIB_DEFAULTS
+
+/*  Use the AAPCS type for wchar_t, override the one from config/freebsd.h.  */
+#undef  WCHAR_TYPE
+#define WCHAR_TYPE  "unsigned int"
+
+#undef  WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
+#if defined (TARGET_FREEBSD_ARMv6)
+#undef  SUBTARGET_CPU_DEFAULT
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm1176jzs
+#else
+#undef  SUBTARGET_CPU_DEFAULT
+#define SUBTARGET_CPU_DEFAULT   TARGET_CPU_arm9
+#endif
+
+#define SUBTARGET_OVERRIDE_OPTIONS		\
+do {						\
+    if (unaligned_access)			\
+	unaligned_access = 0;			\
+} while (0)
+
+#undef MAX_SYNC_LIBFUNC_SIZE
+#define MAX_SYNC_LIBFUNC_SIZE 4 /* UNITS_PER_WORD not defined yet.  */
+
+/* FreeBSD does its profiling differently to the Acorn compiler.  We
+   don't need a word following the mcount call; and to skip it
+   requires either an assembly stub or use of fomit-frame-pointer when
+   compiling the profiling functions.  Since we break Acorn CC
+   compatibility below a little more won't hurt.  */
+
+#undef ARM_FUNCTION_PROFILER
+#define ARM_FUNCTION_PROFILER(STREAM,LABELNO)		\
+{							\
+  asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n");		\
+  asm_fprintf (STREAM, "\tbl\t__mcount%s\n",		\
+	       (TARGET_ARM && NEED_PLT_RELOC)		\
+	       ? "(PLT)" : "");				\
+}
+
+/* Clear the instruction cache from `BEG' to `END'.  This makes a
+   call to the ARM_SYNC_ICACHE architecture specific syscall.  */
+#define CLEAR_INSN_CACHE(BEG, END)					\
+do									\
+  {									\
+    extern int sysarch (int number, void *args);			\
+    struct								\
+      {									\
+	unsigned int addr;						\
+	int          len;						\
+      } s;								\
+    s.addr = (unsigned int) (BEG);					\
+    s.len = (END) - (BEG);						\
+    (void) sysarch (0, &s);						\
+  }									\
+while (0)
+
+/* This is how we tell the assembler that two symbols have the same value.  */
+#define ASM_OUTPUT_DEF(FILE, NAME1, NAME2) \
+  do					   \
+    {					   \
+     assemble_name (FILE, NAME1); 	   \
+     fputs (" = ", FILE);		   \
+     assemble_name (FILE, NAME2);	   \
+     fputc ('\n', FILE);		   \
+    }					   \
+  while (0)
+
+/* Add  .note.GNU-stack.  */
+#undef NEED_INDICATE_EXEC_STACK
+#define NEED_INDICATE_EXEC_STACK 1
+
+#define ARM_TARGET2_DWARF_FORMAT (DW_EH_PE_pcrel | DW_EH_PE_indirect)
+
Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(revision 217256)
+++ gcc/config.gcc	(working copy)
@@ -259,7 +259,6 @@
    arm*-wince-pe*			\
  | arm*-*-ecos-elf			\
  | arm*-*-elf				\
- | arm*-*-freebsd*			\
  | arm*-*-linux*			\
  | arm*-*-uclinux*			\
  | i[34567]86-go32-*			\
@@ -1000,6 +999,27 @@
 	extra_options="${extra_options} arm/vxworks.opt"
 	tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
 	;;
+arm*-*-freebsd*)                # ARM FreeBSD EABI
+	tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h"
+	case $target in
+	arm*b-*-freebsd*)
+	    tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
+	    ;;
+	esac
+	tmake_file="${tmake_file} arm/t-arm arm/t-bpabi"
+	tm_file="${tm_file} arm/bpabi.h arm/freebsd.h arm/aout.h arm/arm.h"
+	case $target in
+	armv6*-*-freebsd*)
+	    tm_defines="${tm_defines} TARGET_FREEBSD_ARMv6=1"
+	    ;;
+	esac
+	case $target in
+	arm*hf-*-freebsd*)
+	    tm_defines="${tm_defines} TARGET_FREEBSD_ARM_HARD_FLOAT=1"
+	    ;;
+	esac
+	with_tls=${with_tls:-gnu}
+	;;
 arm*-*-netbsdelf*)
 	tm_file="dbxelf.h elfos.h netbsd.h netbsd-elf.h arm/elf.h arm/aout.h ${tm_file} arm/netbsd-elf.h"
 	extra_options="${extra_options} netbsd.opt netbsd-elf.opt"
Index: gcc/config.host
===================================================================
--- gcc/config.host	(revision 217256)
+++ gcc/config.host	(working copy)
@@ -99,7 +99,7 @@
 esac
 
 case ${host} in
-  arm*-*-linux*)
+  arm*-*-freebsd* | arm*-*-linux*)
     case ${target} in
       arm*-*-*)
 	host_extra_gcc_objs="driver-arm.o"
Index: libgcc/config/arm/freebsd-atomic.c
===================================================================
--- libgcc/config/arm/freebsd-atomic.c	(revision 0)
+++ libgcc/config/arm/freebsd-atomic.c	(working copy)
@@ -0,0 +1,224 @@
+/* FreeBSD specific atomic operations for ARM EABI.
+   Copyright (C) 2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <sys/types.h>
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+#define ARM_VECTORS_HIGH 0xffff0000U
+#define ARM_TP_ADDRESS   (ARM_VECTORS_HIGH + 0x1000)
+#define ARM_RAS_START    (ARM_TP_ADDRESS + 4)
+
+void HIDDEN
+__sync_synchronize (void)
+{
+#if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__)       \
+    || defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6T2__)  \
+    || defined (__ARM_ARCH_6Z__) || defined (__ARM_ARCH_6ZK__)  \
+    || defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+#if defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+    __asm __volatile ("dmb" : : : "memory");
+#else
+    __asm __volatile ("mcr p15, 0, r0, c7, c10, 5" : : : "memory");
+#endif
+#else
+    __asm __volatile ("nop" : : : "memory");
+#endif
+}
+
+#if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__)        \
+    || defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6T2__)   \
+    || defined (__ARM_ARCH_6Z__) || defined (__ARM_ARCH_6ZK__)   \
+    || defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+
+/* These systems should be supported by the compiler.  */
+
+#else /* __ARM_ARCH_5__  */
+
+#define	SYNC_LOCK_TEST_AND_SET_N(N, TYPE, LDR, STR)			\
+TYPE HIDDEN    								\
+__sync_lock_test_and_set_##N (TYPE *mem, TYPE val)			\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%5]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%5, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %4\n"	/* Load old value.  */		\
+                "\t"STR" %3, %1\n"	/* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%5]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%5, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (val), "m" (*mem), "r" (ras_start));		\
+        return (old);							\
+}
+
+#define SYNC_LOCK_RELEASE_N(N, TYPE)					\
+void HIDDEN								\
+__sync_lock_release_##N (TYPE *ptr)     				\
+{					       				\
+    /* All writes before this point must be seen before we release	\
+       the lock itself.  */						\
+    __sync_synchronize ();     						\
+    *ptr = 0;								\
+}
+
+#define	SYNC_VAL_CAS_N(N, TYPE, LDR, STREQ)             		\
+TYPE HIDDEN    								\
+__sync_val_compare_and_swap_##N (TYPE *mem, TYPE expected,		\
+    TYPE desired)							\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%6]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%6, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %5\n"     /* Load old value.  */		\
+                "\tcmp   %0, %3\n"     /* Compare to expected value.  */\
+                "\t"STREQ" %4, %1\n"   /* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%6]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%6, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (expected), "r" (desired), "m" (*mem),		\
+                  "r" (ras_start));					\
+        return (old);							\
+}
+
+typedef unsigned char bool;
+
+#define SYNC_BOOL_CAS_N(N, TYPE)                                        \
+bool HIDDEN								\
+__sync_bool_compare_and_swap_##N (TYPE *ptr, TYPE oldval,		\
+                                  TYPE newval)                          \
+{									\
+    TYPE actual_oldval							\
+      = __sync_val_compare_and_swap_##N (ptr, oldval, newval);          \
+    return (oldval == actual_oldval);					\
+}
+
+#define	SYNC_FETCH_AND_OP_N(N, TYPE, LDR, STR, NAME, OP)		\
+TYPE HIDDEN								\
+__sync_fetch_and_##NAME##_##N (TYPE *mem, TYPE val)	       		\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%5]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%5, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %4\n"	/* Load old value.  */		\
+                "\t"OP"  %2, %0, %3\n"	/* Calculate new value.  */	\
+                "\t"STR" %2, %1\n"	/* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%5]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%5, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (val), "m" (*mem), "r" (ras_start));		\
+        return (old);							\
+}
+
+#define	SYNC_OP_AND_FETCH_N(N, TYPE, LDR, STR, NAME, OP)		\
+TYPE HIDDEN   								\
+__sync_##NAME##_and_fetch_##N (TYPE *mem, TYPE val)	       		\
+{									\
+        unsigned int old, temp, ras_start;                              \
+                                                                        \
+        ras_start = ARM_RAS_START;					\
+        __asm volatile (						\
+                /* Set up Restartable Atomic Sequence.  */		\
+                "1:"							\
+                "\tadr   %2, 1b\n"					\
+                "\tstr   %2, [%5]\n"					\
+                "\tadr   %2, 2f\n"					\
+                "\tstr   %2, [%5, #4]\n"				\
+                                                                        \
+                "\t"LDR" %0, %4\n"	/* Load old value.  */		\
+                "\t"OP"  %2, %0, %3\n"	/* Calculate new value.  */	\
+                "\t"STR" %2, %1\n"	/* Store new value.  */		\
+                                                                        \
+                /* Tear down Restartable Atomic Sequence.  */		\
+                "2:"							\
+                "\tmov   %2, #0x00000000\n"				\
+                "\tstr   %2, [%5]\n"					\
+                "\tmov   %2, #0xffffffff\n"				\
+                "\tstr   %2, [%5, #4]\n"				\
+                : "=&r" (old), "=m" (*mem), "=&r" (temp)		\
+                : "r" (val), "m" (*mem), "r" (ras_start));		\
+        return (old);							\
+}
+
+#define	EMIT_ALL_OPS_N(N, TYPE, LDR, STR, STREQ)			\
+SYNC_LOCK_TEST_AND_SET_N (N, TYPE, LDR, STR)				\
+SYNC_LOCK_RELEASE_N (N, TYPE)                                           \
+SYNC_VAL_CAS_N (N, TYPE, LDR, STREQ)	                		\
+SYNC_BOOL_CAS_N (N, TYPE)                                               \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, add, "add")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, and, "and")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, or, "orr")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, sub, "sub")		        \
+SYNC_FETCH_AND_OP_N (N, TYPE, LDR, STR, xor, "eor")                     \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, add, "add")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, and, "and")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, or, "orr")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, sub, "sub")		        \
+SYNC_OP_AND_FETCH_N (N, TYPE, LDR, STR, xor, "eor")
+
+
+
+EMIT_ALL_OPS_N (1, unsigned char, "ldrb", "strb", "streqb")
+EMIT_ALL_OPS_N (2, unsigned short, "ldrh", "strh", "streqh")
+EMIT_ALL_OPS_N (4, unsigned int, "ldr", "str", "streq")
+
+#endif
Index: libgcc/config/arm/t-freebsd
===================================================================
--- libgcc/config/arm/t-freebsd	(revision 0)
+++ libgcc/config/arm/t-freebsd	(working copy)
@@ -0,0 +1,9 @@
+# Just for these, we omit the frame pointer since it makes such a big
+# difference.  It is then pointless adding debugging.
+HOST_LIBGCC2_CFLAGS += -fomit-frame-pointer
+
+LIB2ADD_ST += $(srcdir)/config/arm/freebsd-atomic.c
+
+# Use a version of div0 which raises SIGFPE.
+LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx
+
Index: libgcc/config/arm/unwind-arm.h
===================================================================
--- libgcc/config/arm/unwind-arm.h	(revision 217256)
+++ libgcc/config/arm/unwind-arm.h	(working copy)
@@ -48,7 +48,8 @@
       if (!tmp)
 	return 0;
 
-#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__)
+#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \
+    || defined(__FreeBSD__)
       /* Pc-relative indirect.  */
 #define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel | DW_EH_PE_indirect)
       tmp += ptr;
Index: libgcc/config.host
===================================================================
--- libgcc/config.host	(revision 217256)
+++ libgcc/config.host	(working copy)
@@ -366,6 +366,13 @@
 	tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
 	extra_parts="$extra_parts crti.o crtn.o"
 	;;
+arm*-*-freebsd*)                # ARM FreeBSD EABI
+	tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix arm/t-elf"
+	tmake_file="${tmake_file} arm/t-bpabi arm/t-freebsd t-slibgcc-libgcc"
+	tm_file="${tm_file} arm/bpabi-lib.h"
+	unwind_header=config/arm/unwind-arm.h
+	tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
+	;;
 arm*-*-netbsdelf*)
 	tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
 	;;
Index: libstdc++-v3/configure.host
===================================================================
--- libstdc++-v3/configure.host	(revision 217256)
+++ libstdc++-v3/configure.host	(working copy)
@@ -366,6 +366,9 @@
 	;;
     esac
     ;;
+  arm*-*-freebsd*)
+     port_specific_symbol_files="\$(srcdir)/../config/os/gnu-linux/arm-eabi-extra.ver"
+     ;;
   powerpc*-*-darwin*)
     port_specific_symbol_files="\$(srcdir)/../config/os/bsd/darwin/ppc-extra.ver"
     ;;

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH] FreeBSD arm support, EABI.
@ 2014-11-03  9:23 Andreas Tobler
  0 siblings, 0 replies; 11+ messages in thread
From: Andreas Tobler @ 2014-11-03  9:23 UTC (permalink / raw)
  To: Bin.Cheng, AndreasTobler; +Cc: GCCPatches

--------- Original Message --------
From: Bin.Cheng <amker.cheng@gmail.com>
To: Andreas Tobler <andreast-list@fgznet.ch>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] FreeBSD arm support, EABI.
Date: 03/11/14 10:04

> On Mon, Nov 3, 2014 at 6:11 AM, Andreas Tobler
&lt;andreast-list@fgznet.ch&gt; wrote:
> &gt; Hello all,
> &gt;
> &gt; this is a patch which brings support for arm*-*-freebsd* to trunk.
> &gt; The architectures supported are arm-*-*freebsd*, armv6-*-freebsd* and
> &gt; armv6hf-*-freebsd*.
> &gt; armv6 stands for ARM_ARCH == 6, arm stands for ARM_ARCH &lt; 6.
> Just out of curiosity, what about armv7?

Sorry, I should have written 'armv6 stands for ARM_ARCH >= 6'. But I have no
evidence how an armv8 (ARM_ARCH == 8) will/would work.

Thanks for the curiosity :)

Andreas


^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2014-11-09 19:58 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-11-02 22:12 [PATCH] FreeBSD arm support, EABI Andreas Tobler
2014-11-03  4:16 ` Gerald Pfeifer
2014-11-03  9:04 ` Bin.Cheng
2014-11-03 11:45 ` Kyrill Tkachov
2014-11-03 16:26   ` Andreas Tobler
2014-11-03 17:53 ` Joseph Myers
2014-11-03 19:07   ` Andreas Tobler
2014-11-03 19:11     ` Joseph Myers
2014-11-07 13:45 ` Richard Earnshaw
2014-11-09 19:58   ` Andreas Tobler
2014-11-03  9:23 Andreas Tobler

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