* [PATCH] arm: fix mve intrinsics scan body tests for C++
@ 2022-12-07 15:02 Andrea Corallo
2022-12-07 17:19 ` Kyrylo Tkachov
0 siblings, 1 reply; 4+ messages in thread
From: Andrea Corallo @ 2022-12-07 15:02 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
Hi all,
this patch is to export the functions defined in these MVE tests as C
so the body scan assembler works as expected also for our C++ tests.
Best Regards and sorry for the regression!
Andrea
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Extern functions
as "C".
* gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
---
.../arm/mve/intrinsics/vabavq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vabavq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vabavq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vabavq_p_u16.c | 8 ++++
.../arm/mve/intrinsics/vabavq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vabavq_p_u8.c | 8 ++++
.../arm/mve/intrinsics/vabavq_s16.c | 8 ++++
.../arm/mve/intrinsics/vabavq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 8 ++++
.../arm/mve/intrinsics/vabavq_u16.c | 8 ++++
.../arm/mve/intrinsics/vabavq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_m_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vabdq_x_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 8 ++++
.../arm/mve/intrinsics/vabsq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vabsq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vabsq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vabsq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vabsq_m_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 8 ++++
.../arm/mve/intrinsics/vabsq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vabsq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vabsq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vabsq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vabsq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddlvaq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvaq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvaq_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvaq_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvq_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddlvq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_n_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddq_x_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_p_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_p_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddvaq_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_p_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_p_u8.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_s16.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddvq_s8.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_u16.c | 8 ++++
.../arm/mve/intrinsics/vaddvq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vaddvq_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpcsq_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpeqq_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgeq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpgtq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmphiq_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpleq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpltq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_u16.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_u32.c | 8 ++++
.../arm/mve/intrinsics/vcmpneq_u8.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_f16.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_f32.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_s16.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_s32.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_s64.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_s8.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_u16.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_u32.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_u64.c | 8 ++++
.../arm/mve/intrinsics/vcreateq_u8.c | 8 ++++
.../arm/mve/intrinsics/vddupq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vddupq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vddupq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vddupq_m_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vddupq_m_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vddupq_m_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vddupq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vddupq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vddupq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vddupq_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vddupq_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vddupq_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vddupq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vddupq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vddupq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vddupq_x_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vddupq_x_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vddupq_x_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vdupq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vfmasq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vfmasq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vhaddq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vhsubq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vidupq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vidupq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vidupq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vidupq_m_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vidupq_m_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vidupq_m_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vidupq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vidupq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vidupq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vidupq_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vidupq_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vidupq_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vidupq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vidupq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vidupq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vidupq_x_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/vidupq_x_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/vidupq_x_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 8 ++++
.../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 8 ++++
.../arm/mve/intrinsics/vmaxaq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxaq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vmaxaq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxaq_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxaq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxavq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxavq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vmaxavq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxavq_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxavq_s32.c | 8 ++++
.../arm/mve/intrinsics/vmaxavq_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmaq_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmaq_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmaq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmaq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmavq_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmavq_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmq_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmq_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmvq_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmvq_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmvq_p_f16.c | 8 ++++
.../arm/mve/intrinsics/vmaxnmvq_p_f32.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_m_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vmaxq_x_u8.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_p_u16.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_p_u8.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_s16.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_u16.c | 8 ++++
.../arm/mve/intrinsics/vmaxvq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 8 ++++
.../arm/mve/intrinsics/vminaq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vminaq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vminaq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vminaq_s16.c | 8 ++++
.../arm/mve/intrinsics/vminaq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 8 ++++
.../arm/mve/intrinsics/vminavq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vminavq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vminavq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vminavq_s16.c | 8 ++++
.../arm/mve/intrinsics/vminavq_s32.c | 8 ++++
.../arm/mve/intrinsics/vminavq_s8.c | 8 ++++
.../arm/mve/intrinsics/vminnmaq_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmaq_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmaq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmaq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmavq_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmavq_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmavq_p_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmavq_p_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmq_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmq_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmvq_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmvq_f32.c | 8 ++++
.../arm/mve/intrinsics/vminnmvq_p_f16.c | 8 ++++
.../arm/mve/intrinsics/vminnmvq_p_f32.c | 8 ++++
.../arm/mve/intrinsics/vminq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vminq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vminq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vminq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vminq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vminq_m_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminq_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminq_u16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminq_u8.c | 8 ++++
.../arm/mve/intrinsics/vminq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vminq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vminq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vminq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vminq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vminq_x_u8.c | 8 ++++
.../arm/mve/intrinsics/vminvq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vminvq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vminvq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vminvq_p_u16.c | 8 ++++
.../arm/mve/intrinsics/vminvq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vminvq_p_u8.c | 8 ++++
.../arm/mve/intrinsics/vminvq_s16.c | 8 ++++
.../arm/mve/intrinsics/vminvq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 8 ++++
.../arm/mve/intrinsics/vminvq_u16.c | 8 ++++
.../arm/mve/intrinsics/vminvq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_p_s8.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_p_u16.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_p_u8.c | 8 ++++
.../arm/mve/intrinsics/vmladavaq_s16.c | 32 +++++++++++---
.../arm/mve/intrinsics/vmladavaq_s32.c | 32 +++++++++++---
.../arm/mve/intrinsics/vmladavaq_s8.c | 32 +++++++++++---
.../arm/mve/intrinsics/vmladavaq_u16.c | 44 ++++++++++++++++---
.../arm/mve/intrinsics/vmladavaq_u32.c | 44 ++++++++++++++++---
.../arm/mve/intrinsics/vmladavaq_u8.c | 44 ++++++++++++++++---
.../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 8 ++++
.../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vmlaldavaxq_s16.c | 8 ++++
.../arm/mve/intrinsics/vmlaldavaxq_s32.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vmlasq_n_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_n_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_u16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vmulq_x_u8.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vqaddq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulhq_s8.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmullbq_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_s16.c | 8 ++++
.../arm/mve/intrinsics/vqdmulltq_s32.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlahq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_s16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_u16.c | 8 ++++
.../arm/mve/intrinsics/vqsubq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 8 ++++
.../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 8 ++++
.../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 8 ++++
.../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 24 +++++++++-
.../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 36 ++++++++++++++-
.../arm/mve/intrinsics/vrshlq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_s16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_u16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vrshlq_x_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_f16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_f32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_s16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_s32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_s8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_u16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_u32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_m_u8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_n_u8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 8 ++++
.../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_f16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_f32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_f16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_f32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_s16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_s32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_s8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_u16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_u32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_n_u8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_s16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_s32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_s8.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_u16.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_u32.c | 8 ++++
.../arm/mve/intrinsics/vsubq_x_u8.c | 8 ++++
785 files changed, 6464 insertions(+), 40 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
index 843d022c418..3b95fb140f7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int16x8_t b, int16x8_t c, mve_pred16_t p)
return vabavq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
index 6ed9b9ac1c4..b9f84e581bd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int32x4_t b, int32x4_t c, mve_pred16_t p)
return vabavq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
index ec34be92a28..fa76cd20e1b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int8x16_t b, int8x16_t c, mve_pred16_t p)
return vabavq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
index 440b603a18e..93deb664eda 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t b, uint16x8_t c, mve_pred16_t p)
return vabavq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
index 9500ee054b1..c11fc704b34 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
return vabavq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
index 40c9a51fbe4..04b9a6e2e35 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t b, uint8x16_t c, mve_pred16_t p)
return vabavq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
index 27684fa4a88..d1a1c967581 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int16x8_t b, int16x8_t c)
return vabavq (1, b, c);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
index f595609a2a0..9ccfc73f79c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int32x4_t b, int32x4_t c)
return vabavq (1, b, c);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
index 60fa9e23b7b..5184d7a068d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int8x16_t b, int8x16_t c)
return vabavq (1, b, c);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
index f3255276eda..c800d79d351 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t b, uint16x8_t c)
return vabavq (1, b, c);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
index f41fa1f3952..b1733bae333 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t b, uint32x4_t c)
return vabavq (1, b, c);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
index 3a2654435df..897cd32b1bb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t b, uint8x16_t c)
return vabavq (1, b, c);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
index f379b25c49e..338514621ea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
index 3ba808e0b4d..9a600384822 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
index 903c6dfe861..3584f182e9a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
index 4ddf4ee5c61..8b64f39a758 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
index c719a0b5e9c..aeb9879f91c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
index 048554144cd..294c6f17467 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
index 458b920b5cb..c4c414691cb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
index 8e163edb153..4567b0f7da8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
index 619d4706dc5..fc58f5c9001 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
index 079478df08a..6c5e2fe479a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vabdq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
index 0dce4c482ac..ac300d287dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
index f5908fe81d8..6170a59c0b8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
index 3f249e1a622..9cf62f9742d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
index 16a4b930d2c..c283d7482cc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
index 2b5ee12945c..be9abda0cab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
index 50a4c162c9b..227af07d0e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vabdq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
index da142f4394b..ae54ef21c3e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
index 1ff1bef258f..d8781db3fb8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
index 6733e2bcc14..9d141616047 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
index 8d7631b9ac6..7eb6fad3499 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
index 90784c1d389..8431703f4ef 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
index f376374564a..7d2f3dcea48 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
index d9467a1ccd7..b94358fb4ae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
index 1ea3713d12b..a88e1e5346f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vabdq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
index f29ada8c058..d4bc9110f38 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a)
return vabsq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
index cc24744fb26..9f2955829f8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a)
return vabsq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
index 21cf284d045..33d113241e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
return vabsq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
index 236830b3a9e..a588f5fc94c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
return vabsq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
index 22f7b37b30b..360087db4e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
return vabsq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
index b3021edf52b..590d0204385 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
return vabsq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
index da9ff2f978a..518c19fdf79 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
return vabsq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
index 84906302c8a..6f40447eb1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a)
return vabsq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
index 117c787d595..3da8b740fc8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a)
return vabsq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
index a7f1413505c..5fa4ce42f5d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a)
return vabsq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
index f24a8cccb53..fda43efcf96 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, mve_pred16_t p)
return vabsq_x (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
index fd4c2277969..281e07468ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, mve_pred16_t p)
return vabsq_x (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
index 0e1d1bb94d4..93d4ff5a473 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, mve_pred16_t p)
return vabsq_x (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
index 64d0e4b574d..1ddc8b81cf6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, mve_pred16_t p)
return vabsq_x (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
index 742bc701fae..0dfcf3e62fb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, mve_pred16_t p)
return vabsq_x (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
index 3a9504df94e..174f3e3b958 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64_t a, int32x4_t b, mve_pred16_t p)
return vaddlvaq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
index 6e2613ee099..41b93675b74 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t b, mve_pred16_t p)
return vaddlvaq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
index 180dc9b2deb..d692df30d55 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int64_t a, int32x4_t b)
return vaddlvaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
index 1f899e92c3c..4daba29620c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t b)
return vaddlvaq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
index 5b22da49c1d..df71bf107b8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, mve_pred16_t p)
return vaddlvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
index 2c85139435a..40d6f4c1082 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, mve_pred16_t p)
return vaddlvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
index bdb04b5214f..4c87fb6dd2a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a)
return vaddlvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
index bcd9d21df4f..3a9037addbb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a)
return vaddlvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
index 58462177473..b0e6d5d2c59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
index f3fcd286f4d..be459e68d3c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
index 291e65f32cc..1631969a87f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
index 0346f65a330..bd00b2056a3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
index 9d57bbd27b9..5622365dd96 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
return vaddq_m (inactive, a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
index 9939aa0012d..e8bdb6a6a98 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
return vaddq_m (inactive, a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
index 50b138fc763..b1c41e2b3bf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
index 66c2be777ce..1ff3dff685a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
index 87dba75dff1..3c7ed0f8e3e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
index a8e9ea576b3..a8e7b989ba9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
index 045e5024d5d..0cbc89d37d8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
index 3d17afcbe56..db95f28d548 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
index 87210a41dae..4306e61b57b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
index 1acb0b67fa9..fad289c8a41 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
index 6136c54cbb8..0b39c3dce21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
index b60d98e0691..c7a846a2dba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
index d56bbae9b03..bbead6073ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
index 9f0b623c3e8..3097756d53e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
index 5df23a6e61f..dbb86b7083c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t a)
return vaddq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
index d07927c427e..61cbe4d03cc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t a)
return vaddq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
index 9ae30406f51..237838cb0e6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
index 3271d4d5af1..c2cee5dc69b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
index 119fd5d5528..d815eaaa16e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
index ef0722e4dcd..35527a63ef4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
index 67513819f39..66de687bef0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
index 2aa79e5e916..9d4f8073810 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
index 24b12a6aee1..370e4332e65 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
index 3fdfa3d86e6..8c3bd3316d6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
index 6b32b8ccfd5..3d126df3c3c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
index 0deefa14ac6..e8ed91457b3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
index 44df963f0f8..172ed24016a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
index 7349fa165bf..b60b877bdba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
index b1d48a1d260..e7a3693f4a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
index 047043d6526..f38c6b1f7af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
index ed67007df51..e092b28afa8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vaddq_x (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
index fa17d6b4aa2..c58a5e50608 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vaddq_x (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
index d6c3252132a..876afc7367b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
index c2a861706d9..c25ec006918 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
index abc90a4c86b..b6389224fe6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
index 8866a07bc8e..006a872034a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vaddq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
index 4123ad594ed..0cc940b449c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vaddq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
index d610930a311..214a8decd83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vaddq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
index 323010a6d33..a79531abf14 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
index 98773e7ba6f..019ed62813c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
index bff0bda1109..4f390d109dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
index 85f5cd4db7a..e528a9ef1bf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
index ad0e7afbc39..fa622f0a520 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
index a3cfc5686e2..8ce1fe36015 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
index 16b51514be1..95224809f66 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t a, int16x8_t b, mve_pred16_t p)
return vaddvaq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
index bbf04aa0d08..80281819f06 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
return vaddvaq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
index f06623b1893..53a92513511 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t a, int8x16_t b, mve_pred16_t p)
return vaddvaq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
index 7bfb4bb9cbe..da61820c552 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t b, mve_pred16_t p)
return vaddvaq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
index 9aea5caa4fe..0b7892c8b9a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t b, mve_pred16_t p)
return vaddvaq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
index b5113b209c0..51cba0385a9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t b, mve_pred16_t p)
return vaddvaq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
index 1b9af185a0d..2a4dd6c33d9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t a, int16x8_t b)
return vaddvaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
index e25487954d2..9f1c8515142 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t a, int32x4_t b)
return vaddvaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
index d37c916c94d..6f77cdb46f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t a, int8x16_t b)
return vaddvaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
index b3583ce5725..a3e0e39502f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t b)
return vaddvaq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
index 006c0a3734f..e6b2f85cdae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t b)
return vaddvaq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
index cfe29bfd7be..5bad0ca996e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t b)
return vaddvaq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
index 3d19b46fdc6..f4e499b631e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, mve_pred16_t p)
return vaddvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
index a148d15ead1..9417d86d6fe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, mve_pred16_t p)
return vaddvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
index f0b0c499d0d..757bc5759ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, mve_pred16_t p)
return vaddvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
index 2fb316c50ab..cc9673f7326 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, mve_pred16_t p)
return vaddvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
index 24bde90ec77..9ead886d3e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, mve_pred16_t p)
return vaddvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
index f6710941119..45ed62f8b58 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, mve_pred16_t p)
return vaddvq_p (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
index 6b9a99f2b07..468cc810cc4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a)
return vaddvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
index 50823b65ecc..791e27bdbb5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a)
return vaddvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
index 131edbe2b3f..3a13efc93dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a)
return vaddvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
index 7c0ac0e1395..6aabcdce2c6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a)
return vaddvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
index 40779ed0f99..8b5ba816623 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a)
return vaddvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
index d2a6ba8f0fb..2576d9c66d0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a)
return vaddvq (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
index de9fe5e7d01..373acbd31b9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vcmpcsq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
index 04df1b2dc61..25263654930 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vcmpcsq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
index 34ebadca248..60120e88ef9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vcmpcsq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
index bc03bf687de..fcdc41fdc81 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vcmpcsq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
index 8e216d49a02..b294c8593d1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vcmpcsq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
index ac4196a2e48..00c118a68c6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vcmpcsq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
index 6038f4c8c65..dc63c527743 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint16x8_t a)
return vcmpcsq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
index 9f39aa761c8..8c5d185ca22 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint32x4_t a)
return vcmpcsq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
index 0ce2cd13a7b..2296f3e1655 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint8x16_t a)
return vcmpcsq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
index 5598d06875c..5ae4d0ceaef 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vcmpcsq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
index 99b232b05dd..4695e7e3405 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vcmpcsq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
index 571e57135ab..3075050a943 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vcmpcsq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
index 57b276a1d4c..82b24a83f8b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
index ab1b25e2888..1d7bda0a986 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
index c5587884d0e..0a0406b3b74 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
index 4e9675fff51..ba8a946591c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
index a3cae828e79..f095b4aff1e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vcmpeqq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
index a7ce9e0c7e3..dd244db5e46 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vcmpeqq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
index 7ba481e169f..bbf5326d2b3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
index 13c88eaabb5..b66949b7633 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
index dcf276dee44..5730eebb47b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
index d59d5149a30..6009e951beb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vcmpeqq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
index 1fbf385d030..2bce70de33e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vcmpeqq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
index 92758c98c9a..6c6fa8a7720 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vcmpeqq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
index 1ea35ed924b..4b5feb26a62 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
index a9bc9733842..60db456c60d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
index a9fe771a101..45cdc28fb2b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
index 826901874d7..41c3653b892 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
index 512b7f9c889..2e7bf175e63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
index 01b4507ba63..e9d333f6661 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vcmpeqq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
index cf2812558ff..1d870428c55 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float16x8_t a)
return vcmpeqq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
index 13817174282..8b8610b0617 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float32x4_t a)
return vcmpeqq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
index bd29828492e..2f146d937ec 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
index 2a0d84e9b51..f77743c00d3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
index 524bbe9f3cb..690ed1b811d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
index 3eeaa49aa97..409c9de58ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint16x8_t a)
return vcmpeqq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
index a881bb841af..c3b1736bfa1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint32x4_t a)
return vcmpeqq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
index 429b2e35eb7..3728c738b54 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint8x16_t a)
return vcmpeqq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
index 92a87c08773..24f34a24ee3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
index d3b87d59bfa..ae5d870d2b4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
index 2b71bbf75f6..81538a9957a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
index 1830b667bb6..39778cf1b6c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
index 2b2a5f920f3..8afd39e89b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
index 9450c203394..84610a10445 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vcmpeqq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
index fd8bcab4f25..f11dc28376d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
index a2d50b580e7..8eb38db2021 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
index a631825fadd..c3a8df2ec46 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
index b94e0738ef0..8069e426b73 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
index 9f4903d9cfd..3a9be99bc0a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vcmpgeq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
index 679e644f165..a785cfb52f8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vcmpgeq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
index 45e26d0a77b..0a2544e7ac4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
index 3a6cad921f2..fa453774d06 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
index ce1ca30d6ea..34d632b03e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
index 51587a38b72..1c5ce785a63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
index 3ff0aaaa414..3ac4d59bf1f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
index df71ee57945..3c3a584e075 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vcmpgeq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
index 2ca1b9d6684..4e9a346ab14 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float16x8_t a)
return vcmpgeq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
index 3af110bd2b2..2cf1d1ab0b6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float32x4_t a)
return vcmpgeq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
index 3c1af8a93ab..e0488dc0003 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
index 8b4e0f426e5..b448e8a15e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
index c1669bcdd90..9f609b9f243 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
index 593c7410dcb..c835d99b47a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
index 9e26ea9938a..37d9524b4f8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
index 3cb2832e159..a752510621b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vcmpgeq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
index 8835fe08dba..d8f151a19f3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
index e1470884708..6f601889e85 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
index cb9d5f4036f..f724387023e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
index b249b831782..6eebe92b797 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
index b375983f01e..be4da4b50da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vcmpgtq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
index 208a285cb39..e8244345eb2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vcmpgtq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
index 248e3093d2a..12d5540ba39 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
index 9843288296e..dca726fde38 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
index 80f1aa9ead0..07216ac242f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
index 9289c00b5af..bd0ac3d927a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
index 8a3d7606bb7..0c2f3acf2bd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
index 2760795eb86..3f2f28b839b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vcmpgtq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
index 9f2a4be319a..0339fbcafc6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float16x8_t a)
return vcmpgtq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
index bbf18ebe6e7..482ac094cf3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float32x4_t a)
return vcmpgtq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
index d833cb6f58e..9c8611d924c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
index 28cd51b9582..ef285c9692b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
index 5a953ca55f4..8cabf987c9a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
index b9c9da486f5..da107d414b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
index 0f79385358e..4508698a856 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
index f59dad94a57..d65d27704d0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vcmpgtq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
index 136a2e44259..403ad11fee8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vcmphiq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
index 5640b97afaf..a9c9816976d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vcmphiq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
index e6474e45487..16e3af1d556 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vcmphiq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
index 38b9b90c803..139f69e392b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vcmphiq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
index 97c8c1dfe05..a33aed0a005 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vcmphiq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
index e2024ccda25..18e9b1907b8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vcmphiq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
index 36107fc7b8d..085b8277736 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint16x8_t a)
return vcmphiq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
index d34de8f65c7..a62a73ff24c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint32x4_t a)
return vcmphiq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
index 93a05b1a857..f05c9d24643 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint8x16_t a)
return vcmphiq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
index 40e65dc52f4..3cff050425d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vcmphiq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
index d87a4185762..39f0c12a75b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vcmphiq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
index 80fd2a40b0f..69103f502f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vcmphiq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
index 209d81096af..fb92b67325f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
index b92c5f66fd9..61ab55d83da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
index e6136898ded..f866469eadb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
index 2304e98d253..5704e6d7a0b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
index a61db2817c1..5fa3be11c2a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vcmpleq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
index 7a2cdb4059d..cbab9606b3c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vcmpleq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
index 69fcab15b8a..d16b5c49e83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
index 617ebd6144f..e9504fad271 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
index b8ee50dd55c..10709a8520c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
index fcc376d6ec3..59102a6eb60 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
index 9983e89d80c..42d7d7fdbb3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
index 504e4feb5d1..3d1407baebf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vcmpleq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
index cfa6dbc07c7..4f6276484ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float16x8_t a)
return vcmpleq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
index c89558f4076..e71dcb8f174 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float32x4_t a)
return vcmpleq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
index da73fc14b77..6aad8de937a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
index 0951a5c13fb..fedc87fa318 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
index e4553354681..066dd808771 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
index 68500da9ddf..00872c3503c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
index 1966bcd94d3..8f595a0d24b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
index e9f6e47e5d6..a827b9b6f5d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vcmpleq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
index b4958816bd8..15855e1bbed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
index 752ab2b3e49..d11c9e2f1e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
index cbaacbe2b47..efb525cacce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
index 96d0e7c7cc6..6c788202199 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
index 1e5db53198e..2b29d72bbf6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vcmpltq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
index 77de40ade01..0c89d2982e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vcmpltq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
index beebe65a58f..34984fa7772 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
index 07260c56ed3..bb7c0a26bf1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
index 7d1e9e7fbde..035ce454073 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
index c0f6dfc9432..9776a4a64e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
index b6fc4700e73..6a7459806ef 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
index 545b76359ad..ca08e1dadf1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vcmpltq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
index 401ef21ba2b..c6fdb08d8ae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float16x8_t a)
return vcmpltq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
index 380f071e564..4f1ac3c0977 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float32x4_t a)
return vcmpltq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
index a1d12392dd2..4c9d1d3d887 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
index 6332f75f327..632c4aeca13 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
index e0ac80caeb0..1eabc2e70bd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
index 23843ad88f3..85117199a90 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
index aeb7a6f9896..11379cf7ff8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
index 2129b56a5f7..686ccd8eedb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vcmpltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
index c27ea2f0de8..20d722ca649 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
index 609de44d8e7..1e4dcde89b1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
index 98f22337d61..bafb7e8a956 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
index 7f6e96ae47e..168633d05c3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
index 71b3476fb18..3b7951f4ee1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vcmpneq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
index d6dea8db865..47b972cdeeb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vcmpneq_m (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
index e72c9b62829..b16c6445942 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
index 47c90e31f49..2f8057050f1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
index 9d9da100046..4637bd10d2e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
index ea8cf24b358..90b23531f49 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vcmpneq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
index 30291dcdd9b..c8b0c952730 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vcmpneq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
index be75376a691..d458b9ad15b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -60,4 +64,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vcmpneq_m (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
index 60e868141d0..ea83993bd72 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
index 780c544bef3..817060f8d73 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
index 15f6d316cba..9c0473d228e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
index 300852ed7b3..4f10b5a787e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
index 227b5f01eca..ba440459d5d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
index cfcb59f49cf..ffe091bd082 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vcmpneq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
index 29e43f3fdf8..e36d8a95a85 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float16x8_t a)
return vcmpneq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
index 688e77cd044..7262503eee6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (float32x4_t a)
return vcmpneq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
index 2afc34d16e5..2e39b66b34c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
index 6c323161316..9471935d96f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
index 5483d6dd2fe..7d3d4ddd2c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
index d8edfb0d825..71d878dff9f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint16x8_t a)
return vcmpneq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
index 2b7a6b56830..3f997e8e487 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint32x4_t a)
return vcmpneq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
index 2dab43af331..9917a95ffb7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -48,4 +52,8 @@ foo2 (uint8x16_t a)
return vcmpneq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
index d57b607baa9..a3b0572c011 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
index e02171f6686..c6bf6ca82d7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
index 0abef8c3e00..99b343b0427 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
index 7144f3ee2fc..d676d9b3c22 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
index a31134f2f1d..56c39968035 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
index 2801c8e3763..f906574d5e4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -34,4 +38,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vcmpneq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
index c39303daa03..0458bb1bb7c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_f16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
index ad66f4407cd..af782b5ac53 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_f32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
index 7e70a486513..8a3e91843f8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_s16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
index ffcfc80ff40..5e385dfeee0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_s32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
index 26642f9cd68..df901680c2b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_s64 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
index 7e7e4d5948d..e853395af0c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_s8 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
index 858a3a4546f..bf4a137bb43 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_u16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
index 5f27cf68845..efb58ddff8b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_u32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
index 78553dec701..91dd885dce1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_u64 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
index 4a8ab61f865..d5d001158ed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -31,4 +35,8 @@ foo1 ()
return vcreateq_u8 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
index 7c8b0152763..86e6e0ed5c0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vddupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
index 810a1a7e21b..c5aa5323edc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vddupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
index 6642b9f4b88..e326a00062f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vddupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
index cc6a19516d9..2a907417b40 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vddupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
index cd6c6f86eea..ffaf3734923 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vddupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
index fe186e743da..ae7a4e25fe2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vddupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
index 2dba2d74b61..dbaf372e446 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vddupq_u16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
index 6b5cf6c75b0..cf932541023 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vddupq_u32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
index 174e422f4ef..60088880776 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vddupq_u8 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
index 6a471a7f72f..6c54e325155 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vddupq_u16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
index debf420d3e8..a8de90f7b12 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vddupq_u32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
index 8e6ef8adccd..5a90e069b1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vddupq_u8 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
index 1aafaf87b82..12e13ad5af7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vddupq_x_u16 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
index 2e3e268dbee..ebe7270f28d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vddupq_x_u32 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
index bdf563a8074..d53d45fc852 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vddupq_x_u8 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
index 713d8b731c8..dab65e08320 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vddupq_x_u16 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
index 9f484b3b8fb..c7abcaef942 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vddupq_x_u32 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
index aa83bfed125..d2c299d4e3f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vddupq_x_u8 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
index bfa471bcb31..df7438bf0a0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t inactive, mve_pred16_t p)
return vdupq_m (inactive, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
index e1dd8f58ad0..6397b902705 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t inactive, mve_pred16_t p)
return vdupq_m (inactive, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
index 52304ace03a..bf05c73fc1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p)
return vdupq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
index 44a80c5d5bc..71789bb620e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p)
return vdupq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
index 1630a3b9234..48c4fbd1f82 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p)
return vdupq_m (inactive, a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
index d3df8b69248..511be48ebae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vdupq_m (inactive, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
index e6bb0cc2c38..f3a2c25f5ab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vdupq_m (inactive, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
index ad6f6d04ae3..a99d8f3d86b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vdupq_m (inactive, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
index fc5a7933653..44112190fb8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -29,4 +33,8 @@ foo1 ()
return vdupq_n_f16 (1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
index a6be82e5927..059e3e42dd0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -29,4 +33,8 @@ foo1 ()
return vdupq_n_f32 (1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
index f842b96c3b1..d8ba299cb15 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -17,4 +21,8 @@ foo (int16_t a)
return vdupq_n_s16 (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
index 05cbff8fdae..a81c6d1e220 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -17,4 +21,8 @@ foo (int32_t a)
return vdupq_n_s32 (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
index 1d141161604..b0bac4fce89 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -17,4 +21,8 @@ foo (int8_t a)
return vdupq_n_s8 (a);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
index 4839d427e65..55e0a601110 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -29,4 +33,8 @@ foo1 ()
return vdupq_n_u16 (1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
index f0069eb7280..bf73bc17fc7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -29,4 +33,8 @@ foo1 ()
return vdupq_n_u32 (1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
index fe26687ae45..48cbdb2a1da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -29,4 +33,8 @@ foo1 ()
return vdupq_n_u8 (1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
index 11ebb47f94f..7821e365293 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -37,4 +41,8 @@ foo1 (mve_pred16_t p)
return vdupq_x_n_f16 (1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
index 4e79bd54f71..af82b3ebdbc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -37,4 +41,8 @@ foo1 (mve_pred16_t p)
return vdupq_x_n_f32 (1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
index 90288777df7..6756502ab21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -21,4 +25,8 @@ foo (int16_t a, mve_pred16_t p)
return vdupq_x_n_s16 (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
index c4c906e0682..b04afb3834b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -21,4 +25,8 @@ foo (int32_t a, mve_pred16_t p)
return vdupq_x_n_s32 (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
index 6234730827e..b23facd5e94 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -21,4 +25,8 @@ foo (int8_t a, mve_pred16_t p)
return vdupq_x_n_s8 (a, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
index 821fcddcab1..62dc42c6eae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -37,4 +41,8 @@ foo1 (mve_pred16_t p)
return vdupq_x_n_u16 (1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
index 20125df6226..098fdfbd233 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -37,4 +41,8 @@ foo1 (mve_pred16_t p)
return vdupq_x_n_u32 (1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
index defaaeebfcf..02a4253e74a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -37,4 +41,8 @@ foo1 (mve_pred16_t p)
return vdupq_x_n_u8 (1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
index 8f53f5ef0cb..dc4dbb9f432 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vdwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
index 30e971fb733..edfc4c464be 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vdwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
index 0abc19a2318..009048fdb05 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vdwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
index b3e6affbf8f..b24e7a2f5af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vdwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
index 60c52b0d850..75c41450a38 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vdwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
index 459321a7984..90d64671dcf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vdwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
index 9f76dbf35eb..6235b1422b1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vdwdupq_u16 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
index 962f766b496..b6ce427015a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vdwdupq_u32 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
index c73b1b69661..bec1eb5165d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vdwdupq_u8 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
index 3b1968d78aa..87af2b6817a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vdwdupq_u16 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
index 8554f62ee6b..ec136dc3222 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vdwdupq_u32 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
index eb91a80daf5..3653d00bc5d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vdwdupq_u8 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
index 9c0fd1e253c..e9ef2df77c8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vdwdupq_x_u16 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
index 3107e2fdbbe..6cc1582c22b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vdwdupq_x_u32 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
index 03d01e0dd43..3216d250aa4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vdwdupq_x_u8 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
index f7dca660c03..e9d994ccfc5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vdwdupq_x_u16 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
index 032ae94e8c3..07438b02351 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vdwdupq_x_u32 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
index 5d238a7a865..96280225351 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vdwdupq_x_u8 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
index 03b376c9bbe..7f427bd6140 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t m1, float16x8_t m2, mve_pred16_t p)
return vfmasq_m (m1, m2, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
index ecf30ba9826..99a106982fa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t m1, float32x4_t m2, mve_pred16_t p)
return vfmasq_m (m1, m2, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
index 0bd03832ff5..dbcc3b3aec2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
index 42fe35dc746..134409e8f09 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
index 1f4a4016c74..fb295f2d245 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
index 7d7ebebd638..2ed1262e5ec 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vhaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
index 31f7ee2fa54..852fe64cf8e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vhaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
index 2120472af46..5700f7ec818 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vhaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
index 4b4ce40efb8..fce31dada68 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
index e532055c675..dbc1b835482 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
index 25b81629ec3..32e6bebf8ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
index 4a9e9f3f438..d824bd3d39a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
index 1e68099ebf2..5f033d255f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
index 6dd75d7336e..f3ea63f75b4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vhaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
index 6390589808f..0f9eb59646f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
index db09d0f2c21..5b41bf193b8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
index 89ea3f2aaf8..48e88781ce3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
index e6fb8be673b..3d7314673b7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vhsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
index 7ab815d5623..f6509a5472e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vhsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
index 0bf695aded4..db75b389138 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vhsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
index 3bad177ad28..d8f3f3c9504 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
index cc5cdb07059..94252c80324 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
index 4c651091e59..d4f6c247503 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
index daed202c055..a921ba6ab51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
index cf71e6dab13..73a544f9147 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
index a8183dd48ed..fd2aa22de0e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vhsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
index b4ee7af36e3..397be9f3e1e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vidupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
index b13a7a80dcb..02b38cc6415 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vidupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
index b731002724a..f44aa21f324 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vidupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
index 0e2ad6a2b55..19d04601809 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return vidupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
index 786a05eee35..36a8ac30564 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return vidupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
index 3fcc3ba0d67..75695304c65 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return vidupq_m (inactive, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
index a6ffdc05ce5..6b5d8815e1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vidupq_u16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
index 8cd43e38255..0b829a43a10 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vidupq_u32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
index 4005eabb45d..12523757737 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vidupq_u8 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
index 3ad89c0536c..83d9cc2a563 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vidupq_u16 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
index 45eb1b09a5b..d73face505d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vidupq_u32 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
index beb0aae67a9..75187b0eb25 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return vidupq_u8 (1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
index 74cd4310213..5df5035e340 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vidupq_x_u16 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
index 3111b1a54e6..02c6d7784dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vidupq_x_u32 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
index 5bedb4f9e79..3a1d3c0317f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vidupq_x_u8 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
index caf334fa32f..31ddde4bd3a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vidupq_x_u16 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
index 11895e303cf..c8193465a72 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vidupq_x_u32 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
index b951d4cfe94..f7a628990c9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return vidupq_x_u8 (1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
index 67a2465f435..d96a89017e6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return viwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
index 9fc2518acc5..ca1ac6ebe24 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return viwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
index 39f4071bfa1..9590e023335 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return viwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
index 8bb680e0d77..84733f94e7c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, mve_pred16_t p)
return viwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
index 2dc8d5f3442..a175744b654 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, mve_pred16_t p)
return viwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
index ff3a5f520e8..7240b6e72bc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, mve_pred16_t p)
return viwdupq_m (inactive, 1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
index 5f37290759a..a5eb3094d44 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return viwdupq_u16 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
index de93f8a7ec4..63f6bdf52b1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return viwdupq_u32 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
index 089025c3401..65d1062ac96 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return viwdupq_u8 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
index fc3e9c6fac4..eaa496bb2da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return viwdupq_u16 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
index 4c098dd8f02..c1912d77486 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return viwdupq_u32 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
index 44cb53fe344..f0d66a9ba29 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 ()
return viwdupq_u8 (1, 1, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
index 2242877881f..7f8cc38e4c2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return viwdupq_x_u16 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
index 4b2b650e21a..f97b599373c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return viwdupq_x_u32 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
index 873952b6c2e..c0ceead5267 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return viwdupq_x_u8 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
index b6c94797380..265aef42c92 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return viwdupq_x_u16 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
index 5fd84963d01..585e41075db 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return viwdupq_x_u32 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
index abbb40fa8da..ca39081dfc5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (mve_pred16_t p)
return viwdupq_x_u8 (1, 1, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
index 4c487ed7f60..6d011177c21 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
return vmaxaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
index 5156467f0c1..f8f960af752 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
return vmaxaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
index 6564bd88c9b..69313d5ecc3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
return vmaxaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
index 6cabf9f723b..aefe76a63e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, int16x8_t b)
return vmaxaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
index d0dd3c23600..f5e018e3be5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, int32x4_t b)
return vmaxaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
index a7344638dcf..186b92a3d2f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, int8x16_t b)
return vmaxaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
index ac81c8fd1bd..10478e9d97b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int16x8_t b, mve_pred16_t p)
return vmaxavq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
index 119c0c34c76..d43afbce273 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int32x4_t b, mve_pred16_t p)
return vmaxavq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
index dfd7f828ef6..beb34db720c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int8x16_t b, mve_pred16_t p)
return vmaxavq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
index 9f59e8e4542..b997f308963 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int16x8_t b)
return vmaxavq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
index 716b8a2a979..e969f572bd4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int32x4_t b)
return vmaxavq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
index 0f1a87af54b..e668c378a03 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int8x16_t b)
return vmaxavq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
index cd4c813bf3b..1f6902e952c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vmaxnmaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
index 527466fc131..dc79d1bf14b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vmaxnmaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
index 39c68cdc172..aa6d3a5f2a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vmaxnmaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
index f6f8bf07549..8637c6efa7a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vmaxnmaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
index 4c1f20be036..7e3708cc5cc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t b)
return vmaxnmavq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
index 86087335cea..5f63fa52a1c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t b)
return vmaxnmavq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
index a4973567d5e..1cc89f89a27 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t b, mve_pred16_t p)
return vmaxnmavq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
index b229cb3a322..339be113753 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t b, mve_pred16_t p)
return vmaxnmavq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
index faf968ebb21..2c2ac3c4edd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vmaxnmq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
index f7ee01b1f14..18f4f0817ea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vmaxnmq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
index ee3444393ed..5cf0d72b8af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
return vmaxnmq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
index 5d434432856..4a10383bb3b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
return vmaxnmq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
index dad76734fd8..c52bfce7425 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vmaxnmq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
index 2fe8c0d4f3d..a940a08691d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vmaxnmq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
index 9787cc1ba90..d2a67445849 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t b)
return vmaxnmvq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
index b1191876850..b56620693e8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t b)
return vmaxnmvq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
index 0b1740d5ed2..9c4df6b2642 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t b, mve_pred16_t p)
return vmaxnmvq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
index ca6ad91d24d..fa4b5830679 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t b, mve_pred16_t p)
return vmaxnmvq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
index 548824fc58a..5ae4d8addb3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vmaxq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
index e935729b47d..6963a987176 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vmaxq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
index 8028fa031c7..e7064300952 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vmaxq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
index e872f9e72f8..41117d46b25 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vmaxq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
index 76606555881..9ce6f831785 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vmaxq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
index 7ade467cafd..fcd90fb6f90 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vmaxq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
index bf547a2420d..7c532dcac7b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vmaxq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
index 25bb950c0bf..e8e3a4eeb0c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vmaxq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
index 33057f1a58e..ad529c03d8f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vmaxq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
index 7717a9a5057..04d8c64fdd3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vmaxq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
index 36b5c276cfe..d68ae2b43cb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vmaxq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
index e643e5f3e3c..944353ef2d8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vmaxq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
index a32feb0d7cd..843a4cc4a70 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vmaxq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
index 3ac1994c4f8..ff81a393f3f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vmaxq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
index c9ba33d1504..68563747f3b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vmaxq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
index 954a9e2f02a..85c21e6ab1e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vmaxq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
index 022d418af84..b45d7bd3ea4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vmaxq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
index 7e1687a8b72..de8b2d4a48c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vmaxq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
index a97703eb58c..ac29f91bdf2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
return vmaxvq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
index b4bddcb8312..4290484f847 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
return vmaxvq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
index ee8c3e9155f..6a9b1cedf0a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
return vmaxvq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
index 906adf85936..3cc1dbb0bbd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t b, mve_pred16_t p)
return vmaxvq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
index acc5367c5a2..99264f3a2b3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t b, mve_pred16_t p)
return vmaxvq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
index 358cb40f829..6aac76b8798 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t b, mve_pred16_t p)
return vmaxvq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
index 485355a7d72..18938d86396 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16_t a, int16x8_t b)
return vmaxvq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
index 3b9075689a0..26ee10b0c27 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t a, int32x4_t b)
return vmaxvq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
index f13a0168d9d..b5bbfc3bd11 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8_t a, int8x16_t b)
return vmaxvq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
index 6a0fe254043..f806cfa7e36 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t b)
return vmaxvq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
index eed20046e53..b46dc06611f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t b)
return vmaxvq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
index d44a6d3bb02..1a64f5528c4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t b)
return vmaxvq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
index 925b9154ca7..50a98bf0780 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
return vminaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
index 296f69dfcda..3870cf5226a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
return vminaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
index cf6fecc3461..74a3122b18f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
return vminaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
index 63f59f8c80a..f78ee9de4f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, int16x8_t b)
return vminaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
index eb0a54cbe19..cbe18e05e26 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, int32x4_t b)
return vminaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
index b875308863d..e8030958284 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, int8x16_t b)
return vminaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
index 5d3c40fb1fc..ff77b8e72c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int16x8_t b, mve_pred16_t p)
return vminavq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
index ee4ff251d63..4c1433d67f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int32x4_t b, mve_pred16_t p)
return vminavq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
index 14602c29719..ef923f8d022 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (int8x16_t b, mve_pred16_t p)
return vminavq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
index 51f75ae1f6a..3f66002e46c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int16x8_t b)
return vminavq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
index d1602cebe18..69daa328374 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int32x4_t b)
return vminavq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
index f4c9b045b90..95fb6cf51b4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (int8x16_t b)
return vminavq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
index 1728d104266..19c736cd318 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vminnmaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
index 42b4265d9cc..8dc7ea9a72d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vminnmaq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
index 51b85bd2b04..c57b3842a31 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vminnmaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
index 2f0423ecb4f..8c51328c148 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vminnmaq_m (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
index 17e4ad16759..79503f2b212 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t b)
return vminnmavq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
index 2758e59666e..34dd9ddbb17 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t b)
return vminnmavq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
index b60a6627aea..ae7931fc966 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t b, mve_pred16_t p)
return vminnmavq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
index 6fa97b74a65..2d6aad6bc51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t b, mve_pred16_t p)
return vminnmavq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
index c0962b52631..251d35e9c6e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vminnmq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
index a9c3e5f74b1..7d77e215823 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vminnmq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
index 466264249c5..fb741991a41 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
return vminnmq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
index 57edc8e1a80..fa3c47c23de 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
return vminnmq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
index 73b4ccba080..632dcaa9dbf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vminnmq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
index 9a824566212..5c290687e60 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vminnmq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
index dc00d02df7d..2ef50208def 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t b)
return vminnmvq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
index ff23c818452..1a65fca220a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t b)
return vminnmvq (1.1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
index ad99f586d11..8cb61904dfe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t b, mve_pred16_t p)
return vminnmvq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
index 3c7e5c07a68..93bad1ec334 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t b, mve_pred16_t p)
return vminnmvq_p (1.1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
index fe7368eeb38..1b3bbe163fb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vminq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
index a90a1db8835..b45cc91f79b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vminq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
index 911bd3af0dc..fa7c43bb392 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vminq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
index f80288aaf79..65dbf136d27 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vminq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
index b480089f4f3..256ee84ee40 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vminq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
index 73633c9612e..9399ac4ab83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vminq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
index eb34dc4c41c..8d3a948ec51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vminq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
index 60d29da4e14..51970d67d5b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vminq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
index 675fb8edfb1..d5e671fe3b0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vminq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
index 50f648d5133..ade8c016637 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vminq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
index bcfead39c5a..bb15d1b4575 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vminq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
index e8eacae4da8..ff9b23288eb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vminq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
index 0d8987e16b8..6ae37c58b64 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vminq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
index 3c3595171ea..395907dc7ec 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vminq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
index 402c4aa121d..16f6ef3cd66 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vminq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
index e27a3416e38..c25dc747801 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vminq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
index d3cb29bf60c..bf2764d6ac0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vminq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
index 3e05ef7dd13..f4a35535f68 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vminq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
index 7c25c9d2f82..6562d6ae757 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
return vminvq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
index d5f7418af38..6e3715e3ef3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
return vminvq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
index 6a42170fc19..dc06d0f5e7e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
return vminvq_p (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
index 8f2f68fef84..16cc419fce2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t b, mve_pred16_t p)
return vminvq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
index 9d14c39c1dc..bef29dc40e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t b, mve_pred16_t p)
return vminvq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
index 4c1f4406852..42beaee1d45 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t b, mve_pred16_t p)
return vminvq_p (1, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
index e3242c0aa4d..9fc314d2573 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16_t a, int16x8_t b)
return vminvq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
index 1325b38411d..3546b69e9a8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t a, int32x4_t b)
return vminvq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
index 81c14a8ac6b..e512a7df254 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8_t a, int8x16_t b)
return vminvq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
index 4372ac62388..29746c3184a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t b)
return vminvq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
index aff3679f49d..d12764ddfa7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t b)
return vminvq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
index 883e5f2d2c7..60175116e9f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t b)
return vminvq (1, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
index f3e5eba3b08..258adfa989d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
return vmladavaq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
index 71f6957bfc5..78d3333a9fc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
return vmladavaq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
index a74317aeff9..1529e9466f1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
return vmladavaq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
index 9ac84d46a07..3266c3a6d1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
return vmladavaq_p (1, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
index 4a3d109ed90..a555e5f3fb0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
return vmladavaq_p (1, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
index a17440f4675..4f9596f4958 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
return vmladavaq_p (1, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
index a45ea90b60f..9f7c0eeb04f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmladava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
-foo (int32_t a, int16x8_t b, int16x8_t c)
+foo (int32_t add, int16x8_t m1, int16x8_t m2)
{
- return vmladavaq_s16 (a, b, c);
+ return vmladavaq_s16 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmladava.s16" } } */
+/*
+**foo1:
+** ...
+** vmladava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
-foo1 (int32_t a, int16x8_t b, int16x8_t c)
+foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
{
- return vmladavaq (a, b, c);
+ return vmladavaq (add, m1, m2);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vmladava.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
index 6533addcfaf..012a06988e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmladava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
-foo (int32_t a, int32x4_t b, int32x4_t c)
+foo (int32_t add, int32x4_t m1, int32x4_t m2)
{
- return vmladavaq_s32 (a, b, c);
+ return vmladavaq_s32 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmladava.s32" } } */
+/*
+**foo1:
+** ...
+** vmladava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
-foo1 (int32_t a, int32x4_t b, int32x4_t c)
+foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
{
- return vmladavaq (a, b, c);
+ return vmladavaq (add, m1, m2);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vmladava.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
index 6fed506e7c4..f41230f3ac8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmladava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
-foo (int32_t a, int8x16_t b, int8x16_t c)
+foo (int32_t add, int8x16_t m1, int8x16_t m2)
{
- return vmladavaq_s8 (a, b, c);
+ return vmladavaq_s8 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmladava.s8" } } */
+/*
+**foo1:
+** ...
+** vmladava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32_t
-foo1 (int32_t a, int8x16_t b, int8x16_t c)
+foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
{
- return vmladavaq (a, b, c);
+ return vmladavaq (add, m1, m2);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vmladava.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
index 3c5f689ba92..62a3c0e5027 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
@@ -1,21 +1,53 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmladava.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
-foo (uint32_t a, uint16x8_t b, uint16x8_t c)
+foo (uint32_t add, uint16x8_t m1, uint16x8_t m2)
{
- return vmladavaq_u16 (a, b, c);
+ return vmladavaq_u16 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmladava.u16" } } */
+/*
+**foo1:
+** ...
+** vmladava.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
-foo1 (uint32_t a, uint16x8_t b, uint16x8_t c)
+foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2)
{
- return vmladavaq (a, b, c);
+ return vmladavaq (add, m1, m2);
+}
+
+/*
+**foo2:
+** ...
+** vmladava.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint16x8_t m1, uint16x8_t m2)
+{
+ return vmladavaq (1, m1, m2);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vmladava.u16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
index 6172f82aaaa..a186953d9dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
@@ -1,21 +1,53 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmladava.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
-foo (uint32_t a, uint32x4_t b, uint32x4_t c)
+foo (uint32_t add, uint32x4_t m1, uint32x4_t m2)
{
- return vmladavaq_u32 (a, b, c);
+ return vmladavaq_u32 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmladava.u32" } } */
+/*
+**foo1:
+** ...
+** vmladava.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
-foo1 (uint32_t a, uint32x4_t b, uint32x4_t c)
+foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2)
{
- return vmladavaq (a, b, c);
+ return vmladavaq (add, m1, m2);
+}
+
+/*
+**foo2:
+** ...
+** vmladava.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint32x4_t m1, uint32x4_t m2)
+{
+ return vmladavaq (1, m1, m2);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vmladava.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
index 2aff5552053..0df91990ead 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
@@ -1,21 +1,53 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmladava.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
-foo (uint32_t a, uint8x16_t b, uint8x16_t c)
+foo (uint32_t add, uint8x16_t m1, uint8x16_t m2)
{
- return vmladavaq_u8 (a, b, c);
+ return vmladavaq_u8 (add, m1, m2);
}
-/* { dg-final { scan-assembler "vmladava.u8" } } */
+/*
+**foo1:
+** ...
+** vmladava.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32_t
-foo1 (uint32_t a, uint8x16_t b, uint8x16_t c)
+foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2)
{
- return vmladavaq (a, b, c);
+ return vmladavaq (add, m1, m2);
+}
+
+/*
+**foo2:
+** ...
+** vmladava.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
+uint32_t
+foo2 (uint8x16_t m1, uint8x16_t m2)
+{
+ return vmladavaq (1, m1, m2);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vmladava.u8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
index 87f0354a636..11e32c76d5a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
return vmlaldavaxq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
index d26bf5b90af..937fab4166c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
return vmlaldavaxq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
index 3a37e7a58a9..4f10ec7d098 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
return vmlaldavaxq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
index 155b8be70f0..1d78a7cd269 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
return vmlaldavaxq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
index af6e588adad..83af9bb4355 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
return vmlasq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
index 9d0cc3076d9..f6bf6444bdd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
return vmlasq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
index 772ad8b1e76..021fc0373a6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
return vmlasq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
index b02dc64a31b..1b478da34da 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p)
return vmlasq_m (m1, m2, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
index 0214cf2136e..99fc605d1b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p)
return vmlasq_m (m1, m2, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
index c9824e332f7..43128266673 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p)
return vmlasq_m (m1, m2, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
index 6708a741790..0ab8e9f431f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
return vmlasq (m1, m2, add);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
index 4e8bf32e016..88f1dc53682 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
return vmlasq (m1, m2, add);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
index 1cb1a31459c..a5cb99ebf50 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
return vmlasq (m1, m2, add);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
index e03c91ef298..f455fc10146 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t m1, uint16x8_t m2)
return vmlasq (m1, m2, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
index b80c3c7631f..561b4f7a24e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t m1, uint32x4_t m2)
return vmlasq (m1, m2, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
index 0f37550160e..414cba1fba8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t m1, uint8x16_t m2)
return vmlasq (m1, m2, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
index 9251809bfa1..3c9b82deed5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
index 3dacb7ad77c..adebaee5f00 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
index 8f47e962633..4737ac3c75b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
index 41f3786e5fe..2c09a9ee90a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
index 2f4fecbf56b..8de0d38f97c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
return vmulq_m (inactive, a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
index 2ad4108d637..36e9aa99b33 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
return vmulq_m (inactive, a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
index b10bd5af687..163d4259338 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
index e8bdf7278ad..89e4c212147 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
index 001e888e075..4055959ec8e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
index 5015f20a4be..2ea47a6df96 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vmulq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
index a6013a42721..c818c4556d8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vmulq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
index 42fc7264229..d0380864af6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vmulq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
index 04fdc010f5b..72f5d3cefc3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
index 96178d02e37..2ee86e9e163 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
index aa3b8061122..6356f4adce0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
index e56ab77f3ee..903bccbf0ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
index 72e313cfd78..8d386c0727a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
index 1ae6a93934c..de3f6096fa4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vmulq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
index d77aeb219ca..e4efd6b279f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t a)
return vmulq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
index 9ef6a21b2bd..97c71ab0a2c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t a)
return vmulq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
index 7ea25dce4a7..c2f3c1df51c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
index b884603ac5b..50b5f0c0ccb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
index 8e6e17cd593..425b576caf7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
index 907bb0a4009..1e02ad0077c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vmulq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
index 1164b29fc76..6a05f542a37 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vmulq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
index ccc950e3ccf..7ba29e6a482 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vmulq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
index a1fc1fc8f04..026bbaecc9e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
index 4fcf0dd88d1..75a17e07cf0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
index d0c147ef912..a7762893e93 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
index d4a24ba95b6..4150c390fab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
index c9194b73eaf..3bdc5df35c4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
index d69402021ec..dc988fd9b4a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vmulq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
index 169871b47d8..bde0536d9cf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
index f800731b3ff..162569cbad4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
index a4dc47725b5..b37a9ae7411 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vmulq_x (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
index e8428fe9b2d..a2be895bea5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vmulq_x (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
index 27ef55d932a..70e169975c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
index 929f420bd4c..4e3e2320c10 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
index 31885a2d90f..a7a2cca4e59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
index 5972a525092..76b8a7e0f11 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vmulq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
index 3e02a542988..cba98561403 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vmulq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
index 9b59b189a5f..33836662b2d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vmulq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
index 09b7169a68b..a1a60030a2a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
index a57ef2da840..f3a2917bd45 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
index 7fb5e007990..cdd311d41a0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
index 7b1c6b2acc8..c8d4eed010e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
index bc53faff33f..497e542f9ea 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
index f43760861d4..e54b95f5ee4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vmulq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
index a659373d441..8884a7c8318 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
index 8ffc6a67762..77d4b36b94c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
index 2e88b7fabac..943fae8657f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
index 61cf9fcf2aa..b8808066322 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vqaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
index bbd255ac1f1..b9815bd5ca3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vqaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
index 9cee8c65333..674d0c578ff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vqaddq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
index 8bb8a957423..ce1cedd7e1e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
index 9959724fc11..9b6717ef8f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
index 6b918978880..46ce20b7cae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
index c0a8d9ba9c8..ed1ffbf8721 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
index 7a72ce57840..50450ff3361 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
index f7e6ca9b5a4..a260e96a95d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vqaddq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
index 94d93874542..42b3e25fc3d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
return vqdmlahq_m (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
index a3dab7fa02e..03e50f14e00 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
return vqdmlahq_m (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
index 610580478a3..d7f8a153c63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
return vqdmlahq_m (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
index a5c1a106205..17c43c4e4b4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vqdmulhq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
index c78d4db1591..62e7988f107 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vqdmulhq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
index b5ab6eb292c..3bd8b4f9632 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vqdmulhq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
index 2f5fb0e53a4..b1efee53278 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vqdmulhq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
index 80a938a8a5b..3492c17c3fd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vqdmulhq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
index bfb755af4ee..41118e0dcda 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vqdmulhq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
index e34689d203d..dfff38bf59b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vqdmulhq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
index f967b8a286a..ac0812b438d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vqdmulhq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
index 5e1928fd51b..db8db5cb855 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vqdmulhq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
index 7c0a434e48f..e8927845ab4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vqdmulhq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
index 19f4b03f6f0..c15c8e29273 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vqdmulhq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
index 1784c967f3c..1f7a556e1fb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vqdmulhq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
index 4f96e192732..57ad651188c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vqdmullbq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
index d0bca6e3015..c7153b35cef 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vqdmullbq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
index 8448cdc88cf..d7abff0b3f4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vqdmullbq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
index 48cddcd791e..503cd27735a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vqdmullbq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
index cd7c394139d..31a3a244355 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vqdmullbq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
index b4d82f55987..dbc07187165 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vqdmullbq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
index 6f0fdabf67f..7d5fd25a1e1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vqdmullbq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
index 2bf952bfd77..503b1751250 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vqdmullbq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
index 6c756ebf3e7..a36afd8a3a5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vqdmulltq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
index e46f6b2c384..fdbbfee27ef 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vqdmulltq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
index 8526b3ad628..f5d5c6ce04e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vqdmulltq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
index 809e0740e46..91dad0e506d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vqdmulltq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
index 44f0036bc51..e4f09d0f45c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vqdmulltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
index b025886ff15..80694b686c9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vqdmulltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
index 95084876349..4f8b1eef4bc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vqdmulltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
index ab27aeddc29..e3ebacc4f36 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vqdmulltq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
index 07d689279ac..304f86c6e51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
return vqrdmlahq_m (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
index 3b02ca16038..265fecaf806 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
return vqrdmlahq_m (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
index b661bdcb4cf..d1687f79311 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
return vqrdmlahq_m (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
index 16804735b32..4595d55711e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
return vqrdmlahq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
index d7d3dc06d7f..22d9ce56a35 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
return vqrdmlahq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
index d3f9f25f11c..36a23ad2078 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
return vqrdmlahq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
index da4d724bb46..2995682f252 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
return vqrdmlashq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
index 2430f1cb102..7e637e6900f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
return vqrdmlashq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
index 30915b24e5e..d81472d933a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
return vqrdmlashq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
index 39b8089919d..a64b6649938 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
index ed6b92ddcf5..350629cf234 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
index c69ed2aeb84..e5fa4c486bb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
index 57ba7428bef..734ac2da8f7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vqsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
index eda9e74309d..f54aec8dd00 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vqsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
index f6f61b52f52..c96a8398bad 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vqsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
index 1a8ea29e83e..bd6a05e858d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
index c49b7497f6d..baa9e9f192c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
index 17d6471bcd9..746001d0efa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
index 0ce93fdf9be..ed504fe3817 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
index 1eac57545b3..508b54ff41f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
index 56bdda2da6e..5cfb2c58940 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vqsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
index b9a46f5ff6f..a4407cc802f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
index 732e6c01b78..80634f0a797 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
index fb3c4404fba..172609a94e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
index aa09d1831e0..0a95d0ab3ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vqsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
index 19b62e3a8a5..9964ea66ee8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vqsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
index c8eeb38b266..b28a93ffd00 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vqsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
index 6c66b4d75d8..1c5edd730ad 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
index 8432197b9e8..a7b6c07fb4b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
index ad16cae08bc..92676fdca4f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
index 264df1a0398..0b816c6b765 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
index a4bf15cd9df..565508db865 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
index 1804d6484e2..cca60ff7247 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vqsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
index dec4a969dfe..2134e3fc0dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
return vrmlaldavhaq_p (a, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
index f3c8bfd121c..4ebd337e8ee 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
return vrmlaldavhaq_p (1, b, c, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
index 09cd9ee99ff..2efde824eb3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vrmlaldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo (int64_t a, int32x4_t b, int32x4_t c)
{
return vrmlaldavhaq_s32 (a, b, c);
}
-/* { dg-final { scan-assembler "vrmlaldavha.s32" } } */
+/*
+**foo1:
+** ...
+** vrmlaldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64_t
foo1 (int64_t a, int32x4_t b, int32x4_t c)
{
return vrmlaldavhaq (a, b, c);
}
-/* { dg-final { scan-assembler "vrmlaldavha.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
index 1d6f64e0879..745655f31d0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
@@ -1,21 +1,53 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vrmlaldavha.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo (uint64_t a, uint32x4_t b, uint32x4_t c)
{
return vrmlaldavhaq_u32 (a, b, c);
}
-/* { dg-final { scan-assembler "vrmlaldavha.u32" } } */
+/*
+**foo1:
+** ...
+** vrmlaldavha.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64_t
foo1 (uint64_t a, uint32x4_t b, uint32x4_t c)
{
return vrmlaldavhaq (a, b, c);
}
-/* { dg-final { scan-assembler "vrmlaldavha.u32" } } */
+/*
+**foo2:
+** ...
+** vrmlaldavha.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
+uint64_t
+foo2 (uint32x4_t b, uint32x4_t c)
+{
+ return vrmlaldavhaq (1, b, c);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
index c7d1f3a5b1c..4c064515f0b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int32_t b, mve_pred16_t p)
return vrshlq_m_n (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
index a8713e6a06a..2c9c15b13b0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vrshlq_m_n (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
index 8160d1bdb04..48c394e21e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int32_t b, mve_pred16_t p)
return vrshlq_m_n (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
index b08f4c076d1..2fe162b7051 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, int32_t b, mve_pred16_t p)
return vrshlq_m_n (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
index 59f9a13d8c0..49ccaf81c0c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, int32_t b, mve_pred16_t p)
return vrshlq_m_n (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
index fda65f7c592..df2f38f9cd2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, int32_t b, mve_pred16_t p)
return vrshlq_m_n (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
index 20c9f5fcd7c..0cb1511f778 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vrshlq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
index af7a5158458..52872e30d8d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vrshlq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
index 59d283ebb71..887f3fd8ef8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vrshlq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
index e731cb71675..9f55d180efb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p)
return vrshlq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
index 0379e0455c9..f52e9d474c3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p)
return vrshlq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
index 1e20486253e..7241e3174c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p)
return vrshlq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
index c846e9f06ee..feceb6dae9f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int32_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
index 1c6144212f7..4fe4e4fe209 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
index 3b9d0a389dc..fc8fd2d3bee 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int32_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
index 77994bd3a29..7d3a77a1928 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, int32_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
index 82774c794fe..e5d688a67c1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, int32_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
index e9badb7297e..9f594e9cbce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, int32_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
index 4a64fc7b410..facb0c957a5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
index c5cbe266c0f..d30d987eeb0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
index 85305921f9a..52d1f41e5fc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
index 905a18c4f20..b729151774c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, int16x8_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
index 16c7578df39..12b46421e69 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, int32x4_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
index 8bf21eeaef5..37b9194a6a7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, int8x16_t b)
return vrshlq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
index 4dfb6a65842..b813647839c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vrshlq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
index 7f1f6dbb760..d06d0f93b10 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vrshlq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
index 69bf0a50fa6..0d1d8858e54 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vrshlq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
index b5a89892070..ae050e4cda3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
return vrshlq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
index 59ab2662021..00a2edc55d4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
return vrshlq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
index b81d8d03da4..1172a62d0b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
return vrshlq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
index 3d82b081ca2..5114f9f6e85 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float16x8_t a, float16x8_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
index d0f64bb9872..d0524ba6196 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (float32x4_t a, float32x4_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
index 434b0a7ced8..e8536dc51f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
index 0b8e056647e..eca850b63b5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
index abbd60060a7..1753d6c8045 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
return vsubq_m (inactive, a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
index 40ca4284a1f..056810f4b06 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
return vsubq_m (inactive, a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
index f13eff8ad2d..a55ed63d635 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
index 21ba17ba869..480fed3a112 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
index c75b8b5420d..9aaa540a990 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
index 700bc01833c..5d033129356 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
return vsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
index 25dd37ae5b2..3f9494005cb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
return vsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
index 4fed154d258..c6ee8887e62 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
return vsubq_m (inactive, a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
index dde77dc51b7..cfd43b07258 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
index 8770e31ad95..6c382ba6f45 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
index c9813313594..0408dd0e2c4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
index eebc3ad6929..9d860e9b224 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
index d85bbec7ebf..c409b0a9d58 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
index a104a74e259..7d568c17173 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vsubq_m (inactive, a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
index 4db52649ab4..3c31189e52e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t a)
return vsubq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
index fe97eed7d37..041266b3b7d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t a)
return vsubq (a, 1.1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
index d695fc83e06..78a2b911c97 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
index c281e21ab0c..98ab34e89d5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
index ef36b4d6330..07173eaa1ec 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
index be754d894a8..f0744f5c501 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
index ef0aaa4cf08..600d6290cde 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
index c55aefc3307..34d4725b27b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
index 469395452bd..80213e828e6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
index 0e60e1c6f60..262ec5ce5c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
index 882d63dfcf7..9a2d55f1307 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
index fe9baf3d52c..62a5942396d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
index b82051d69d5..3c824b0fb75 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
index 630b2f79f1f..c9c7f6ca085 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
index c48bea7e9f0..cb233e9897c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
index d3e129bb6ee..227e9349206 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
index 2dcaff58c09..14574d5074e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float16x8_t a, mve_pred16_t p)
return vsubq_x (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
index 92bafa3c4cc..864f6fee264 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (float32x4_t a, mve_pred16_t p)
return vsubq_x (a, 1.1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
index f01e8d7d490..ee9e7bcb45f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
index 506966424cc..551f46c92ff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
index 3c4a5d8129c..04a9d7285c0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
index 958e5aa2ce8..a07d4955224 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vsubq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
index ba39c75bb2b..1055769ee1f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vsubq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
index 19204d1d80f..a67d303107a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vsubq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
index 8dcc5477c6f..9bf363275cc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
index a2d43323227..19707f684ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
index 8ead3d22439..ef4d831a117 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
index f0faf8165d2..6c3d6697c92 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
index 67a70931859..97f9f744f2f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
index 19002336cbd..75e75e5d028 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] arm: fix mve intrinsics scan body tests for C++
2022-12-07 15:02 [PATCH] arm: fix mve intrinsics scan body tests for C++ Andrea Corallo
@ 2022-12-07 17:19 ` Kyrylo Tkachov
2022-12-08 9:33 ` Andrea Corallo
2022-12-08 9:38 ` Andrea Corallo
0 siblings, 2 replies; 4+ messages in thread
From: Kyrylo Tkachov @ 2022-12-07 17:19 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
Hi Andrea,
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Wednesday, December 7, 2022 3:03 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH] arm: fix mve intrinsics scan body tests for C++
>
> Hi all,
>
> this patch is to export the functions defined in these MVE tests as C
> so the body scan assembler works as expected also for our C++ tests.
>
> Best Regards and sorry for the regression!
Ok.
Thanks,
Kyrill
>
> Andrea
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Extern functions
> as "C".
> * gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
> ---
> .../arm/mve/intrinsics/vabavq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_p_u16.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_p_u8.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vabavq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_m_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vabdq_x_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_m_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vabsq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvaq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvaq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvaq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvaq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddlvq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_n_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddq_x_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_p_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_p_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddvaq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_p_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_p_u8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddvq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vaddvq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vaddvq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpcsq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpeqq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgeq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpgtq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmphiq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpleq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpltq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcmpneq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_s64.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_u32.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_u64.c | 8 ++++
> .../arm/mve/intrinsics/vcreateq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_m_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_m_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_m_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_x_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_x_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vddupq_x_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdupq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vfmasq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vfmasq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vhaddq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vhsubq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_m_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/vidupq_x_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 8 ++++
> .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxaq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxaq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxaq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxaq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxaq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxavq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxavq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxavq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxavq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxavq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxavq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmaq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmaq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmaq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmaq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmavq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmavq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmvq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmvq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmvq_p_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxnmvq_p_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_m_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxq_x_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_p_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_p_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmaxvq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vminaq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminaq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vminaq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminaq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminaq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminavq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminavq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vminavq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminavq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminavq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vminavq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminnmaq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmaq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmaq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmaq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmavq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmavq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmavq_p_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmavq_p_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmvq_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmvq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminnmvq_p_f16.c | 8 ++++
> .../arm/mve/intrinsics/vminnmvq_p_f32.c | 8 ++++
> .../arm/mve/intrinsics/vminq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vminq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vminq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vminq_m_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminq_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminq_u16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vminq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vminq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vminq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vminq_x_u8.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_p_u16.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_p_u8.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vminvq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_p_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_p_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_p_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmladavaq_s16.c | 32 +++++++++++---
> .../arm/mve/intrinsics/vmladavaq_s32.c | 32 +++++++++++---
> .../arm/mve/intrinsics/vmladavaq_s8.c | 32 +++++++++++---
> .../arm/mve/intrinsics/vmladavaq_u16.c | 44 ++++++++++++++++---
> .../arm/mve/intrinsics/vmladavaq_u32.c | 44 ++++++++++++++++---
> .../arm/mve/intrinsics/vmladavaq_u8.c | 44 ++++++++++++++++---
> .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmlasq_n_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_n_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_u16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vmulq_x_u8.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vqaddq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulhq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmullbq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqdmulltq_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlahq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vqsubq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 8 ++++
> .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 8 ++++
> .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 24 +++++++++-
> .../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 36 ++++++++++++++-
> .../arm/mve/intrinsics/vrshlq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_s16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_u16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vrshlq_x_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_f16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_f32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_s16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_s32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_s8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_u16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_u32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_m_u8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_n_u8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 8 ++++
> .../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_f16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_f32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_f16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_f32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_s16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_s32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_s8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_u16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_u32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_n_u8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_s16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_s32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_s8.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_u16.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_u32.c | 8 ++++
> .../arm/mve/intrinsics/vsubq_x_u8.c | 8 ++++
> 785 files changed, 6464 insertions(+), 40 deletions(-)
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm: fix mve intrinsics scan body tests for C++
2022-12-07 17:19 ` Kyrylo Tkachov
@ 2022-12-08 9:33 ` Andrea Corallo
2022-12-08 9:38 ` Andrea Corallo
1 sibling, 0 replies; 4+ messages in thread
From: Andrea Corallo @ 2022-12-08 9:33 UTC (permalink / raw)
To: Kyrylo Tkachov; +Cc: gcc-patches, Richard Earnshaw
[-- Attachment #1: Type: text/plain, Size: 797 bytes --]
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com> writes:
> Hi Andrea,
>
>> -----Original Message-----
>> From: Andrea Corallo <andrea.corallo@arm.com>
>> Sent: Wednesday, December 7, 2022 3:03 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
>> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
>> Subject: [PATCH] arm: fix mve intrinsics scan body tests for C++
>>
>> Hi all,
>>
>> this patch is to export the functions defined in these MVE tests as C
>> so the body scan assembler works as expected also for our C++ tests.
>>
>> Best Regards and sorry for the regression!
>
> Ok.
> Thanks,
> Kyrill
Thanks attaching the original patch as compressed, the original it's
still stuck for moderator review (more than 400KB).
Andrea
[-- Attachment #2: 0001-arm-fix-mve-intrinsics-scan-body-tests-for-C.patch.gz --]
[-- Type: application/gzip, Size: 35144 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm: fix mve intrinsics scan body tests for C++
2022-12-07 17:19 ` Kyrylo Tkachov
2022-12-08 9:33 ` Andrea Corallo
@ 2022-12-08 9:38 ` Andrea Corallo
1 sibling, 0 replies; 4+ messages in thread
From: Andrea Corallo @ 2022-12-08 9:38 UTC (permalink / raw)
To: Kyrylo Tkachov; +Cc: gcc-patches, Richard Earnshaw
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com> writes:
> Hi Andrea,
>
>> -----Original Message-----
>> From: Andrea Corallo <andrea.corallo@arm.com>
>> Sent: Wednesday, December 7, 2022 3:03 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
>> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
>> Subject: [PATCH] arm: fix mve intrinsics scan body tests for C++
>>
>> Hi all,
>>
>> this patch is to export the functions defined in these MVE tests as C
>> so the body scan assembler works as expected also for our C++ tests.
>>
>> Best Regards and sorry for the regression!
>
> Ok.
> Thanks,
> Kyrill
Thanks,
into trunk as 8d4f007398b.
Regards
Andrea
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-12-08 9:39 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-07 15:02 [PATCH] arm: fix mve intrinsics scan body tests for C++ Andrea Corallo
2022-12-07 17:19 ` Kyrylo Tkachov
2022-12-08 9:33 ` Andrea Corallo
2022-12-08 9:38 ` Andrea Corallo
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).