From: Richard Sandiford <richard.sandiford@arm.com>
To: gcc-patches@gcc.gnu.org
Subject: [pushed] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086]
Date: Thu, 02 Feb 2023 14:55:39 +0000 [thread overview]
Message-ID: <mptlelgce1g.fsf@arm.com> (raw)
insn_info tried to save space by storing the number of
definitions in a 16-bit bitfield. The justification was:
// ... FIRST_PSEUDO_REGISTER + 1
// is the maximum number of accesses to hard registers and memory, and
// MAX_RECOG_OPERANDS is the maximum number of pseudos that can be
// defined by an instruction, so the number of definitions should fit
// easily in 16 bits.
But while that reasoning holds (I think) for real instructions,
it doesn't hold for artificial instructions. I don't think there's
any sensible higher limit we can use, so this patch goes for a full
unsigned int.
Tested on aarch64-linux-gnu. Pushed (as obvious) to trunk so far,
will backport to GCC 12 and GCC 11 too.
Richard
gcc/
PR rtl-optimization/108086
* rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
Adjust size-related commentary accordingly.
---
gcc/rtl-ssa/insns.h | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/gcc/rtl-ssa/insns.h b/gcc/rtl-ssa/insns.h
index ffaf22d4b8e..a604fe295cd 100644
--- a/gcc/rtl-ssa/insns.h
+++ b/gcc/rtl-ssa/insns.h
@@ -141,7 +141,7 @@ using insn_call_clobbers_tree = default_splay_tree<insn_call_clobbers_note *>;
// of "notes", a bit like REG_NOTES for the underlying RTL insns.
class insn_info
{
- // Size: 8 LP64 words.
+ // Size: 9 LP64 words.
friend class ebb_info;
friend class function_info;
@@ -401,10 +401,11 @@ private:
// The number of definitions and the number uses. FIRST_PSEUDO_REGISTER + 1
// is the maximum number of accesses to hard registers and memory, and
// MAX_RECOG_OPERANDS is the maximum number of pseudos that can be
- // defined by an instruction, so the number of definitions should fit
- // easily in 16 bits.
+ // defined by an instruction, so the number of definitions in a real
+ // instruction should fit easily in 16 bits. However, there are no
+ // limits on the number of definitions in artifical instructions.
unsigned int m_num_uses;
- unsigned int m_num_defs : 16;
+ unsigned int m_num_defs;
// Flags returned by the accessors above.
unsigned int m_is_debug_insn : 1;
@@ -414,7 +415,7 @@ private:
unsigned int m_has_volatile_refs : 1;
// For future expansion.
- unsigned int m_spare : 11;
+ unsigned int m_spare : 27;
// The program point at which the instruction occurs.
//
@@ -431,6 +432,9 @@ private:
// instruction.
mutable int m_cost_or_uid;
+ // On LP64 systems, there's a gap here that could be used for future
+ // expansion.
+
// The list of notes that have been attached to the instruction.
insn_note *m_first_note;
};
--
2.25.1
reply other threads:[~2023-02-02 14:55 UTC|newest]
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