From: Richard Sandiford <richard.sandiford@arm.com>
To: Victor Do Nascimento <victor.donascimento@arm.com>
Cc: <gcc-patches@gcc.gnu.org>, <kyrylo.tkachov@arm.com>,
<Richard.Earnshaw@arm.com>
Subject: Re: [PATCH 4/5] aarch64: rcpc3: add Neon ACLE wrapper functions to `arm_neon.h'
Date: Fri, 24 Nov 2023 12:05:20 +0000 [thread overview]
Message-ID: <mptv89r2w73.fsf@arm.com> (raw)
In-Reply-To: <20231109141300.3542453-5-victor.donascimento@arm.com> (Victor Do Nascimento's message of "Thu, 9 Nov 2023 14:12:47 +0000")
Victor Do Nascimento <victor.donascimento@arm.com> writes:
> Create the necessary mappings from the ACLE-defined Neon intrinsics
> names[1] to the internal builtin function names.
>
> [1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html
>
> gcc/ChangeLog:
>
> * gcc/config/aarch64/arm_neon.h (vldap1_lane_u64): New.
> (vldap1q_lane_u64): Likewise.
> (vldap1_lane_s64): Likewise.
> (vldap1q_lane_s64): Likewise.
> (vldap1_lane_f64): Likewise.
> (vldap1q_lane_f64): Likewise.
> (vldap1_lane_p64): Likewise.
> (vldap1q_lane_p64): Likewise.
> (vstl1_lane_u64): Likewise.
> (vstl1q_lane_u64): Likewise.
> (vstl1_lane_s64): Likewise.
> (vstl1q_lane_s64): Likewise.
> (vstl1_lane_f64): Likewise.
> (vstl1q_lane_f64): Likewise.
> (vstl1_lane_p64): Likewise.
> (vstl1q_lane_p64): Likewise.
OK, thanks.
Richard
> ---
> gcc/config/aarch64/arm_neon.h | 129 ++++++++++++++++++++++++++++++++++
> 1 file changed, 129 insertions(+)
>
> diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
> index 349f3167699..ef0d75e07ce 100644
> --- a/gcc/config/aarch64/arm_neon.h
> +++ b/gcc/config/aarch64/arm_neon.h
> @@ -13446,6 +13446,135 @@ vld1q_lane_u64 (const uint64_t *__src, uint64x2_t __vec, const int __lane)
> return __aarch64_vset_lane_any (*__src, __vec, __lane);
> }
>
> +#pragma GCC push_options
> +#pragma GCC target ("+nothing+rcpc3+simd")
> +
> +/* vldap1_lane. */
> +
> +__extension__ extern __inline uint64x1_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1_lane_u64 (const uint64_t *__src, uint64x1_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev1di_usus (
> + (__builtin_aarch64_simd_di *) __src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline uint64x2_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1q_lane_u64 (const uint64_t *__src, uint64x2_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev2di_usus (
> + (__builtin_aarch64_simd_di *) __src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline int64x1_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1_lane_s64 (const int64_t *__src, int64x1_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev1di (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline int64x2_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1q_lane_s64 (const int64_t *__src, int64x2_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev2di (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline float64x1_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1_lane_f64 (const float64_t *__src, float64x1_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev1df (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline float64x2_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1q_lane_f64 (const float64_t *__src, float64x2_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev2df (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline poly64x1_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1_lane_p64 (const poly64_t *__src, poly64x1_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev1di_psps (
> + (__builtin_aarch64_simd_di *) __src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline poly64x2_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vldap1q_lane_p64 (const poly64_t *__src, poly64x2_t __vec, const int __lane)
> +{
> + return __builtin_aarch64_vec_ldap1_lanev2di_psps (
> + (__builtin_aarch64_simd_di *) __src, __vec, __lane);
> +}
> +
> +/* vstl1_lane. */
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1_lane_u64 (const uint64_t *__src, uint64x1_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev1di_sus ((__builtin_aarch64_simd_di *) __src,
> + __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1q_lane_u64 (uint64_t *__src, uint64x2_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev2di_sus ((__builtin_aarch64_simd_di *) __src,
> + __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1_lane_s64 (int64_t *__src, int64x1_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev1di (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1q_lane_s64 (int64_t *__src, int64x2_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev2di (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1_lane_f64 (float64_t *__src, float64x1_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev1df (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1q_lane_f64 (float64_t *__src, float64x2_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev2df (__src, __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1_lane_p64 (poly64_t *__src, poly64x1_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev1di_sps ((__builtin_aarch64_simd_di *) __src,
> + __vec, __lane);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vstl1q_lane_p64 (poly64_t *__src, poly64x2_t __vec, const int __lane)
> +{
> + __builtin_aarch64_vec_stl1_lanev2di_sps ((__builtin_aarch64_simd_di *) __src,
> + __vec, __lane);
> +}
> +
> +#pragma GCC pop_options
> +
> /* vldn */
>
> __extension__ extern __inline int64x1x2_t
next prev parent reply other threads:[~2023-11-24 12:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-09 14:12 [PATCH 0/5] aarch64: Add ACLE intrinsics codegen support for lrcpc3 instructions Victor Do Nascimento
2023-11-09 14:12 ` [PATCH 1/5] aarch64: rcpc3: Add +rcpc3 extension Victor Do Nascimento
2023-11-24 12:03 ` Richard Sandiford
2023-11-09 14:12 ` [PATCH 2/5] aarch64: rcpc3: Add relevant iterators to handle Neon intrinsics Victor Do Nascimento
2023-11-24 11:31 ` Richard Sandiford
2023-11-09 14:12 ` [PATCH 3/5] aarch64: rcpc3: Add Neon ACLE intrinsics Victor Do Nascimento
2023-11-24 11:38 ` Richard Sandiford
2023-11-09 14:12 ` [PATCH 4/5] aarch64: rcpc3: add Neon ACLE wrapper functions to `arm_neon.h' Victor Do Nascimento
2023-11-24 12:05 ` Richard Sandiford [this message]
2023-12-07 17:22 ` Prathamesh Kulkarni
2023-11-09 14:12 ` [PATCH 5/5] aarch64: rcpc3: Add intrinsics tests Victor Do Nascimento
2023-11-24 12:06 ` Richard Sandiford
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