* [PATCH] aarch64: Use type-qualified builtins for ADDP Neon intrinsics
@ 2021-11-11 10:29 Jonathan Wright
2021-11-11 10:37 ` Richard Sandiford
0 siblings, 1 reply; 2+ messages in thread
From: Jonathan Wright @ 2021-11-11 10:29 UTC (permalink / raw)
To: gcc-patches; +Cc: Richard Sandiford, Kyrylo Tkachov
[-- Attachment #1: Type: text/plain, Size: 697 bytes --]
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement the pairwise addition Neon intrinsics. This removes the need
for many casts in arm_neon.h.
Bootstrapped and regression tested on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-11-09 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/aarch64-simd-builtins.def:
* config/aarch64/arm_neon.h (vpaddq_u8): Use type-qualified
builtin and remove casts.
(vpaddq_u16): Likewise.
(vpaddq_u32): Likewise.
(vpaddq_u64): Likewise.
(vpadd_u8): Likewise.
(vpadd_u16): Likewise.
(vpadd_u32): Likewise.
(vpaddd_u64): Likewise.
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diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 035bddcb660e34146b709fdae244571cdeb06272..7d6de6728cf7c63872e09850a394101f7abf21d4 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -51,7 +51,9 @@
BUILTIN_VHSDF_HSDF (BINOP, fmulx, 0, FP)
BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
BUILTIN_VDQ_I (BINOP, addp, 0, NONE)
+ BUILTIN_VDQ_I (BINOPU, addp, 0, NONE)
VAR1 (UNOP, addp, 0, NONE, di)
+ VAR1 (UNOPU, addp, 0, NONE, di)
BUILTIN_VDQ_BHSI (UNOP, clrsb, 2, NONE)
BUILTIN_VDQ_BHSI (UNOP, clz, 2, NONE)
BUILTIN_VS (UNOP, ctz, 2, NONE)
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index ac871d4e503c634b453cd1f1d3e61182ce4a5a88..ab46897d784b81bec9654d87557640ca4c1e5681 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -8011,32 +8011,28 @@ __extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpaddq_u8 (uint8x16_t __a, uint8x16_t __b)
{
- return (uint8x16_t) __builtin_aarch64_addpv16qi ((int8x16_t) __a,
- (int8x16_t) __b);
+ return __builtin_aarch64_addpv16qi_uuu (__a, __b);
}
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpaddq_u16 (uint16x8_t __a, uint16x8_t __b)
{
- return (uint16x8_t) __builtin_aarch64_addpv8hi ((int16x8_t) __a,
- (int16x8_t) __b);
+ return __builtin_aarch64_addpv8hi_uuu (__a, __b);
}
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpaddq_u32 (uint32x4_t __a, uint32x4_t __b)
{
- return (uint32x4_t) __builtin_aarch64_addpv4si ((int32x4_t) __a,
- (int32x4_t) __b);
+ return __builtin_aarch64_addpv4si_uuu (__a, __b);
}
__extension__ extern __inline uint64x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpaddq_u64 (uint64x2_t __a, uint64x2_t __b)
{
- return (uint64x2_t) __builtin_aarch64_addpv2di ((int64x2_t) __a,
- (int64x2_t) __b);
+ return __builtin_aarch64_addpv2di_uuu (__a, __b);
}
__extension__ extern __inline int16x4_t
@@ -20293,24 +20289,21 @@ __extension__ extern __inline uint8x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpadd_u8 (uint8x8_t __a, uint8x8_t __b)
{
- return (uint8x8_t) __builtin_aarch64_addpv8qi ((int8x8_t) __a,
- (int8x8_t) __b);
+ return __builtin_aarch64_addpv8qi_uuu (__a, __b);
}
__extension__ extern __inline uint16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpadd_u16 (uint16x4_t __a, uint16x4_t __b)
{
- return (uint16x4_t) __builtin_aarch64_addpv4hi ((int16x4_t) __a,
- (int16x4_t) __b);
+ return __builtin_aarch64_addpv4hi_uuu (__a, __b);
}
__extension__ extern __inline uint32x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpadd_u32 (uint32x2_t __a, uint32x2_t __b)
{
- return (uint32x2_t) __builtin_aarch64_addpv2si ((int32x2_t) __a,
- (int32x2_t) __b);
+ return __builtin_aarch64_addpv2si_uuu (__a, __b);
}
__extension__ extern __inline float32_t
@@ -20338,7 +20331,7 @@ __extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vpaddd_u64 (uint64x2_t __a)
{
- return __builtin_aarch64_addpdi ((int64x2_t) __a);
+ return __builtin_aarch64_addpdi_uu (__a);
}
/* vqabs */
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] aarch64: Use type-qualified builtins for ADDP Neon intrinsics
2021-11-11 10:29 [PATCH] aarch64: Use type-qualified builtins for ADDP Neon intrinsics Jonathan Wright
@ 2021-11-11 10:37 ` Richard Sandiford
0 siblings, 0 replies; 2+ messages in thread
From: Richard Sandiford @ 2021-11-11 10:37 UTC (permalink / raw)
To: Jonathan Wright; +Cc: gcc-patches, Kyrylo Tkachov
Jonathan Wright <Jonathan.Wright@arm.com> writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement the pairwise addition Neon intrinsics. This removes the need
> for many casts in arm_neon.h.
>
> Bootstrapped and regression tested on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-11-09 Jonathan Wright <jonathan.wright@arm.com>
>
> * config/aarch64/aarch64-simd-builtins.def:
> * config/aarch64/arm_neon.h (vpaddq_u8): Use type-qualified
> builtin and remove casts.
> (vpaddq_u16): Likewise.
> (vpaddq_u32): Likewise.
> (vpaddq_u64): Likewise.
> (vpadd_u8): Likewise.
> (vpadd_u16): Likewise.
> (vpadd_u32): Likewise.
> (vpaddd_u64): Likewise.
OK, thanks. Was initially caught out by vpaddd_u64 not oreviously
having a return cast, but of course that's because it's scalar,
and so an implicit cast was allowed. So the patch is still
avoiding two casts there.
Richard
>
> diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
> index 035bddcb660e34146b709fdae244571cdeb06272..7d6de6728cf7c63872e09850a394101f7abf21d4 100644
> --- a/gcc/config/aarch64/aarch64-simd-builtins.def
> +++ b/gcc/config/aarch64/aarch64-simd-builtins.def
> @@ -51,7 +51,9 @@
> BUILTIN_VHSDF_HSDF (BINOP, fmulx, 0, FP)
> BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP)
> BUILTIN_VDQ_I (BINOP, addp, 0, NONE)
> + BUILTIN_VDQ_I (BINOPU, addp, 0, NONE)
> VAR1 (UNOP, addp, 0, NONE, di)
> + VAR1 (UNOPU, addp, 0, NONE, di)
> BUILTIN_VDQ_BHSI (UNOP, clrsb, 2, NONE)
> BUILTIN_VDQ_BHSI (UNOP, clz, 2, NONE)
> BUILTIN_VS (UNOP, ctz, 2, NONE)
> diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
> index ac871d4e503c634b453cd1f1d3e61182ce4a5a88..ab46897d784b81bec9654d87557640ca4c1e5681 100644
> --- a/gcc/config/aarch64/arm_neon.h
> +++ b/gcc/config/aarch64/arm_neon.h
> @@ -8011,32 +8011,28 @@ __extension__ extern __inline uint8x16_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpaddq_u8 (uint8x16_t __a, uint8x16_t __b)
> {
> - return (uint8x16_t) __builtin_aarch64_addpv16qi ((int8x16_t) __a,
> - (int8x16_t) __b);
> + return __builtin_aarch64_addpv16qi_uuu (__a, __b);
> }
>
> __extension__ extern __inline uint16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpaddq_u16 (uint16x8_t __a, uint16x8_t __b)
> {
> - return (uint16x8_t) __builtin_aarch64_addpv8hi ((int16x8_t) __a,
> - (int16x8_t) __b);
> + return __builtin_aarch64_addpv8hi_uuu (__a, __b);
> }
>
> __extension__ extern __inline uint32x4_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpaddq_u32 (uint32x4_t __a, uint32x4_t __b)
> {
> - return (uint32x4_t) __builtin_aarch64_addpv4si ((int32x4_t) __a,
> - (int32x4_t) __b);
> + return __builtin_aarch64_addpv4si_uuu (__a, __b);
> }
>
> __extension__ extern __inline uint64x2_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpaddq_u64 (uint64x2_t __a, uint64x2_t __b)
> {
> - return (uint64x2_t) __builtin_aarch64_addpv2di ((int64x2_t) __a,
> - (int64x2_t) __b);
> + return __builtin_aarch64_addpv2di_uuu (__a, __b);
> }
>
> __extension__ extern __inline int16x4_t
> @@ -20293,24 +20289,21 @@ __extension__ extern __inline uint8x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpadd_u8 (uint8x8_t __a, uint8x8_t __b)
> {
> - return (uint8x8_t) __builtin_aarch64_addpv8qi ((int8x8_t) __a,
> - (int8x8_t) __b);
> + return __builtin_aarch64_addpv8qi_uuu (__a, __b);
> }
>
> __extension__ extern __inline uint16x4_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpadd_u16 (uint16x4_t __a, uint16x4_t __b)
> {
> - return (uint16x4_t) __builtin_aarch64_addpv4hi ((int16x4_t) __a,
> - (int16x4_t) __b);
> + return __builtin_aarch64_addpv4hi_uuu (__a, __b);
> }
>
> __extension__ extern __inline uint32x2_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpadd_u32 (uint32x2_t __a, uint32x2_t __b)
> {
> - return (uint32x2_t) __builtin_aarch64_addpv2si ((int32x2_t) __a,
> - (int32x2_t) __b);
> + return __builtin_aarch64_addpv2si_uuu (__a, __b);
> }
>
> __extension__ extern __inline float32_t
> @@ -20338,7 +20331,7 @@ __extension__ extern __inline uint64_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vpaddd_u64 (uint64x2_t __a)
> {
> - return __builtin_aarch64_addpdi ((int64x2_t) __a);
> + return __builtin_aarch64_addpdi_uu (__a);
> }
>
> /* vqabs */
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2021-11-11 10:37 ` Richard Sandiford
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