Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[rearnsha]

Synopsis: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

Responsible-Changed-From-To: unassigned->rearnsha
Responsible-Changed-By: rearnsha
Responsible-Changed-When: Thu Mar 14 07:54:45 2002
Responsible-Changed-Why:
    Mine
State-Changed-From-To: open->closed
State-Changed-By: rearnsha
State-Changed-When: Thu Mar 14 07:54:45 2002
State-Changed-Why:
    Fixed on trunk and 3.1 branch

http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=5828

Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[Richard Earnshaw]

The following reply was made to PR target/5828; it has been noted by GNATS.

From: Richard Earnshaw <rearnsha@arm.com>
To: jeroen dobbelaere <jeroen.dobbelaere@acunia.com>
Cc: gcc-patches@gcc.gnu.org, gcc-gnats@gcc.gnu.org, Richard.Earnshaw@arm.com
Subject: Re: target/5828: gcc-3.0.4 on arm : floating point registers 
 incorrectly reloaded
Date: Thu, 14 Mar 2002 15:13:28 +0000

 This is a multipart MIME message.
 
 --==_Exmh_-16759862300
 Content-Type: text/plain; charset=us-ascii
 
  Richard Earnshaw wrote:
  
  >  + 2002-03-04  Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
  >  + 
  >  + 	* config/arm/arm.c (arm_output_epilogue): bug 5828 : offset
  >  + 	must start at 0 in stead of 12.
  >  + 
  > 
  > This patch is incorrect.
   [...]
  > 2) It is cludge to work around another bug further down the function.
 
 
 Having thought about this some more, I've revised my opinion.  This a 
 slightly different, but equally valid, way of looking at the problem.  
 However, it slightly confuses the way the offsets are being calculated.
 
 I've committed the following patch to correct the problem:
 
 2002-03-14  Richard Earnshaw  <rearnsha@arm.com>
 	    Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
 
 	PR target/5828
 	* arm.c (arm_output_epilogue): Fix floating-point register save
 	adjustment when using a frame pointer.
 
 
 --==_Exmh_-16759862300
 Content-Type: text/x-patch ; name="gcc-armfpsave.patch"; charset=us-ascii
 Content-Description: gcc-armfpsave.patch
 Content-Disposition: attachment; filename="gcc-armfpsave.patch"
 
 Index: arm.c
 ===================================================================
 RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
 retrieving revision 1.197
 diff -p -r1.197 arm.c
 *** arm.c	2002/03/13 05:42:33	1.197
 --- arm.c	2002/03/14 15:03:26
 *************** arm_output_epilogue (really_return)
 *** 7467,7474 ****
     int reg;
     unsigned long saved_regs_mask;
     unsigned long func_type;
 !   /* If we need this, then it will always be at least this much.  */
 !   int floats_offset = 12;
     rtx operands[3];
     int frame_size = get_frame_size ();
     FILE * f = asm_out_file;
 --- 7467,7475 ----
     int reg;
     unsigned long saved_regs_mask;
     unsigned long func_type;
 !   /* Floats_offset is the offset from the "virtual" frame.  In an APCS 
 !      frame that is $fp + 4 for a non-variadic function.  */
 !   int floats_offset = 0;
     rtx operands[3];
     int frame_size = get_frame_size ();
     FILE * f = asm_out_file;
 *************** arm_output_epilogue (really_return)
 *** 7505,7510 ****
 --- 7506,7514 ----
     
     saved_regs_mask = arm_compute_save_reg_mask ();
     
 +   /* XXX We should adjust floats_offset for any anonymous args, and then
 +      re-adjust vfp_offset below to compensate.  */
 + 
     /* Compute how far away the floats will be.  */
     for (reg = 0; reg <= LAST_ARM_REGNUM; reg ++)
       if (saved_regs_mask & (1 << reg))
 *************** arm_output_epilogue (really_return)
 *** 7512,7517 ****
 --- 7516,7523 ----
     
     if (frame_pointer_needed)
       {
 +       int vfp_offset = 4;
 + 
         if (arm_fpu_arch == FP_SOFT2)
   	{
   	  for (reg = LAST_ARM_FP_REGNUM; reg >= FIRST_ARM_FP_REGNUM; reg--)
 *************** arm_output_epilogue (really_return)
 *** 7519,7525 ****
   	      {
   		floats_offset += 12;
   		asm_fprintf (f, "\tldfe\t%r, [%r, #-%d]\n", 
 ! 			     reg, FP_REGNUM, floats_offset);
   	      }
   	}
         else
 --- 7525,7531 ----
   	      {
   		floats_offset += 12;
   		asm_fprintf (f, "\tldfe\t%r, [%r, #-%d]\n", 
 ! 			     reg, FP_REGNUM, floats_offset - vfp_offset);
   	      }
   	}
         else
 *************** arm_output_epilogue (really_return)
 *** 7536,7542 ****
   		  if (start_reg - reg == 3)
   		    {
   		      asm_fprintf (f, "\tlfm\t%r, 4, [%r, #-%d]\n",
 ! 			           reg, FP_REGNUM, floats_offset);
   		      start_reg = reg - 1;
   		    }
   		}
 --- 7542,7548 ----
   		  if (start_reg - reg == 3)
   		    {
   		      asm_fprintf (f, "\tlfm\t%r, 4, [%r, #-%d]\n",
 ! 			           reg, FP_REGNUM, floats_offset - vfp_offset);
   		      start_reg = reg - 1;
   		    }
   		}
 *************** arm_output_epilogue (really_return)
 *** 7545,7551 ****
   		  if (reg != start_reg)
   		    asm_fprintf (f, "\tlfm\t%r, %d, [%r, #-%d]\n",
   				 reg + 1, start_reg - reg,
 ! 				 FP_REGNUM, floats_offset);
   		  start_reg = reg - 1;
   		}
   	    }
 --- 7551,7557 ----
   		  if (reg != start_reg)
   		    asm_fprintf (f, "\tlfm\t%r, %d, [%r, #-%d]\n",
   				 reg + 1, start_reg - reg,
 ! 				 FP_REGNUM, floats_offset - vfp_offset);
   		  start_reg = reg - 1;
   		}
   	    }
 *************** arm_output_epilogue (really_return)
 *** 7554,7560 ****
   	  if (reg != start_reg)
   	    asm_fprintf (f, "\tlfm\t%r, %d, [%r, #-%d]\n",
   			 reg + 1, start_reg - reg,
 ! 			 FP_REGNUM, floats_offset);
   	}
   
         /* saved_regs_mask should contain the IP, which at the time of stack
 --- 7560,7566 ----
   	  if (reg != start_reg)
   	    asm_fprintf (f, "\tlfm\t%r, %d, [%r, #-%d]\n",
   			 reg + 1, start_reg - reg,
 ! 			 FP_REGNUM, floats_offset - vfp_offset);
   	}
   
         /* saved_regs_mask should contain the IP, which at the time of stack
 
 --==_Exmh_-16759862300--
 
 

Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[jeroen dobbelaere]

The following reply was made to PR target/5828; it has been noted by GNATS.

From: jeroen dobbelaere <jeroen.dobbelaere@acunia.com>
To: Richard.Earnshaw@arm.com
Cc: nobody@gcc.gnu.org, gcc-gnats@gcc.gnu.org
Subject: Re: target/5828: gcc-3.0.4 on arm : floating point registers  incorrectly reloaded
Date: Wed, 06 Mar 2002 12:34:13 +0100

 Richard Earnshaw wrote:
 
 >  + 2002-03-04  Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
 >  + 
 >  + 	* config/arm/arm.c (arm_output_epilogue): bug 5828 : offset
 >  + 	must start at 0 in stead of 12.
 >  + 
 > 
 > This patch is incorrect.
 > 
 > 1) this doesn't precisely describe your patch (which starts at -4)
 
 Indeed. My fault :(. The changelog should mention -4.
 (As the fp points to the stack entry - 4)
 
 > 2) It is cludge to work around another bug further down the function.
 
 
 Could you explain ??
 
 
 
 Greetings
 --
 Jeroen Dobbelaere
 Embedded Software Engineer
 
 ACUNIA Embedded Solutions
 http://www.acunia.com
 
 

Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[Richard Earnshaw]

The following reply was made to PR target/5828; it has been noted by GNATS.

From: Richard Earnshaw <rearnsha@arm.com>
To: jeroen dobbelaere <jeroen.dobbelaere@acunia.com>
Cc: nobody@gcc.gnu.org, gcc-gnats@gcc.gnu.org, Richard.Earnshaw@arm.com
Subject: Re: target/5828: gcc-3.0.4 on arm : floating point registers 
 incorrectly reloaded
Date: Wed, 06 Mar 2002 10:30:11 +0000

  + 2002-03-04  Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
  + 
  + 	* config/arm/arm.c (arm_output_epilogue): bug 5828 : offset
  + 	must start at 0 in stead of 12.
  + 
 
 This patch is incorrect.
 
 1) this doesn't precisely describe your patch (which starts at -4)
 2) It is cludge to work around another bug further down the function.
 
 R.
 

Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[jeroen dobbelaere]

The following reply was made to PR target/5828; it has been noted by GNATS.

From: jeroen dobbelaere <jeroen.dobbelaere@acunia.com>
To: jeroen dobbelaere <jeroen.dobbelaere@acunia.com>
Cc: gcc-gnats@gcc.gnu.org, gcc-prs@gcc.gnu.org, gcc-patches@gcc.gnu.org
Subject: Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded
Date: Tue, 05 Mar 2002 11:51:06 +0100

 This is a multi-part message in MIME format.
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 Content-Transfer-Encoding: 7bit
 
 http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=5828 
 
 
 
 This patch resolves the problem.
 It has been bootstrapped and introduced no new regressions.
 
 Greetings
 --
 Jeroen Dobbelaere
 Embedded Software Engineer
 
 ACUNIA Embedded Solutions
 http://www.acunia.com
 
 
 --------------040707040700090206020008
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  name="gcc-3.0.4-float-reload-jdo-1.patch"
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  filename="gcc-3.0.4-float-reload-jdo-1.patch"
 
 diff -rC5 gcc-3.0.4/gcc/ChangeLog gcc-3.0.4-jdo1/gcc/ChangeLog
 *** gcc-3.0.4/gcc/ChangeLog	Mon Mar  4 17:40:43 2002
 --- gcc-3.0.4-jdo1/gcc/ChangeLog	Mon Mar  4 17:39:35 2002
 ***************
 *** 1,5 ****
 --- 1,10 ----
 + 2002-03-04  Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
 + 
 + 	* config/arm/arm.c (arm_output_epilogue): bug 5828 : offset
 + 	must start at 0 in stead of 12.
 + 
   2002-02-20  Release Manager
   
   	* GCC 3.0.4 Released.
   
   2002-02-20  Release Manager
 Only in gcc-3.0.4-jdo1/gcc: ChangeLog~
 diff -rC5 gcc-3.0.4/gcc/config/arm/arm.c gcc-3.0.4-jdo1/gcc/config/arm/arm.c
 *** gcc-3.0.4/gcc/config/arm/arm.c	Mon Mar  4 17:40:56 2002
 --- gcc-3.0.4-jdo1/gcc/config/arm/arm.c	Mon Mar  4 17:38:15 2002
 ***************
 *** 7315,7326 ****
        int really_return;
   {
     int reg;
     unsigned long saved_regs_mask;
     unsigned long func_type;
 !   /* If we need this, then it will always be at least this much.  */
 !   int floats_offset = 12;
     rtx operands[3];
     int frame_size = get_frame_size ();
     FILE * f = asm_out_file;
     rtx eh_ofs = cfun->machine->eh_epilogue_sp_ofs;
   
 --- 7315,7326 ----
        int really_return;
   {
     int reg;
     unsigned long saved_regs_mask;
     unsigned long func_type;
 !   /* Offset is computed as needed, start from -4.  (fp points to stack entry-4) */
 !   int floats_offset = -4;
     rtx operands[3];
     int frame_size = get_frame_size ();
     FILE * f = asm_out_file;
     rtx eh_ofs = cfun->machine->eh_epilogue_sp_ofs;
   
 Only in gcc-3.0.4-jdo1/gcc/config/arm: arm.c~
 
 --------------040707040700090206020008--
 

Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[jeroen dobbelaere]

The following reply was made to PR target/5828; it has been noted by GNATS.

From: jeroen dobbelaere <jeroen.dobbelaere@acunia.com>
To: gcc-gnats@gcc.gnu.org, gcc-prs@gcc.gnu.org, jeroen.dobbelaere@acunia.com,
   gcc-bugs@gcc.gnu.org
Cc:  
Subject: Re: target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded
Date: Tue, 05 Mar 2002 11:43:37 +0100

 http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=5828
 
 Following testprogram can be used to verify
 
 Try with :
 g++ -Wall -O float-reload-jdo-1.cpp
 ./a.out
 g++ -Wall -O2 float-reload-jdo-1.cpp
 ./a.out
 g++ -Wall -O3 float-reload-jdo-1.cpp
 ./a.out
 
 
 
 ********* float-reload-jdo-1.cpp - begin ***********
 // float-reload-jdo-1.cpp
 #include <stdio.h>
 
 extern void* do_something(int s) throw(int);
 extern void* do_something_else(int s) throw(int);
 extern double getADouble(int i);
 
 int main(int argc, char* argv[])
 {
    double d0,d1,d2,d3,d4,d5,d6,d7;
    int i=0;
 
    d0=getADouble(i++);
    d1=getADouble(i++);
    d2=getADouble(i++);
    d3=getADouble(i++);
    d4=getADouble(i++);
    d5=getADouble(i++);
    d6=getADouble(i++);
    d7=getADouble(i++);
 
    do_something(1);
 
 
    if(d0 != getADouble(0)) return -1;
    if(d1 != getADouble(1)) return -1;
    if(d2 != getADouble(2)) return -1;
    if(d3 != getADouble(3)) return -1;
    if(d4 != getADouble(4)) return -1;
    if(d5 != getADouble(5)) return -1;
    if(d6 != getADouble(6)) return -1;
    if(d7 != getADouble(7)) return -1;
 
    printf("ok\n");
    return 0;
 }
 
 
 double getADouble(int i)
 {
    const double list[8] = { 123.333, 126.784353, 203.03415, 220.6234605, 0.000134315123, 9384.239451, 1239487157834, 9328432.234 };
 
    return list[i];
 }
 
 void* do_something(int s) throw(int)
 {
    return do_something_else(s);
 }
 
 void* do_something_else(int s) throw(int)
 {
    switch(s) {
    case 0:
      return 0;
    case 1:
      return (void*)1;
    default:
      throw s;
    }
 }
 
 
 ********* float-reload-jdo-1.cpp - end ***********
 
 
 

target/5828: gcc-3.0.4 on arm : floating point registers incorrectly reloaded

[jeroen.dobbelaere]

>Number:         5828
>Category:       target
>Synopsis:       gcc-3.0.4 on arm : floating point registers incorrectly reloaded
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    unassigned
>State:          open
>Class:          wrong-code
>Submitter-Id:   net
>Arrival-Date:   Mon Mar 04 07:06:01 PST 2002
>Closed-Date:
>Last-Modified:
>Originator:     jeroen.dobbelaere@acunia.com
>Release:        gcc-3.0.4 armv5l-unknown-linux-gnu
>Organization:
>Environment:
glibc-2.2.5
>Description:
Gcc generates incorrect code for reloading floating point values on arm-linux. (target cpu = xscale)

The reloading of the 4 fp registers starts at a wrong offset against the fp-register. (16 bytes wrong)
>How-To-Repeat:
Following program demonstrates the problem :

// *** floattest2.cpp ***
// compile : g++ -S -O2 floattest2.cpp
extern void* theP2(int a) throw(int);

void* thePointer(int a) throw(int)
{
  return theP2(a);
}
// *** end of floattest2.cpp ***

This results  in following assembler code :

root:/usr/src/build/tmp# g++ -v -O2 -S floattest2.cpp 
Reading specs from /usr/lib/gcc-lib/armv5l-unknown-linux-gnu/3.0.4/specs
Configured with: ../gcc-3.0.4/configure --prefix=/usr --with-cpu=xscale
Thread model: posix
gcc version 3.0.4
 /usr/lib/gcc-lib/armv5l-unknown-linux-gnu/3.0.4/cc1plus -v -D__GNUC__=3 -D__GNUC_MINOR__=0 -D__GNUC_PATCHLEVEL__=4 -Dunix -Dlinux -D__ELF__ -D__unix__ -D__linux__ -D__ELF__ -D__unix -D__linux -Asystem=unix -Asystem=posix -Acpu=arm -Amachine=arm -D__CHAR_UNSIGNED__ -D__OPTIMIZE__ -D__STDC_HOSTED__=1 -D_GNU_SOURCE -D__ARM_ARCH_5TE__ -D__XSCALE__ -D__APCS_32__ -D__ARMEL__ -D__arm__ floattest2.cpp -D__GNUG__=3 -D__GXX_DEPRECATED -D__EXCEPTIONS -D__GXX_ABI_VERSION=100 -quiet -dumpbase floattest2.cpp -O2 -version -o floattest2.s
GNU CPP version 3.0.4 (cpplib) (ARM GNU/Linux with ELF)
GNU C++ version 3.0.4 (armv5l-unknown-linux-gnu)
	compiled by GNU C version 3.0.4.
ignoring nonexistent directory "/usr/armv5l-unknown-linux-gnu/include"
#include "..." search starts here:
#include <...> search starts here:
 /usr/include/g++-v3
 /usr/include/g++-v3/armv5l-unknown-linux-gnu
 /usr/include/g++-v3/backward
 /usr/local/include
 /usr/lib/gcc-lib/armv5l-unknown-linux-gnu/3.0.4/include
 /usr/include
End of search list.

@ Generated by gcc 3.0.4 for ARM/elf
	.file	"floattest2.cpp"
	.text
	.align	2
	.global	_Z10thePointeri
	.type	_Z10thePointeri,function
_Z10thePointeri:
	@ args = 0, pretend = 0, frame = 52
	@ frame_needed = 1, current_function_anonymous_args = 0
	mov	ip, sp
	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc}
	sfmfd	f4, 4, [sp]!
	ldr	r3, .L8
	sub	fp, ip, #4  *****NOTE1
	sub	sp, sp, #52
	str	r3, [fp, #-108]
	ldr	r3, .L8+4
	ldr	r2, .L8+8
	str	r0, [fp, #-140]
	str	r3, [fp, #-96]
	sub	r0, fp, #132
	sub	r3, fp, #88
	str	r3, [fp, #-100]
	str	r2, [fp, #-104]
	str	sp, [fp, #-92]
	bl	_Unwind_SjLj_Register
	mov	r3, #1
	ldr	r0, [fp, #-140]
	str	r3, [fp, #-128]
	bl	_Z5theP2i
	str	r0, [fp, #-136]
	sub	r0, fp, #132
	bl	_Unwind_SjLj_Unregister
	ldr	r0, [fp, #-136]
	lfm	f4, 4, [fp, #-104]  ****NOTE2
	ldmea	fp, {r4, r5, r6, r7, r8, r9, sl, fp, sp, pc}
.L6:
	add	fp, fp, #88
	
	ldr	r3, [fp, #-120]
	ldr	r0, [fp, #-124]
	cmn	r3, #1
	bne	.L7
	str	r3, [fp, #-128]
	bl	__cxa_call_unexpected
.L7:
	mvn	r3, #0
	str	r3, [fp, #-128]
	bl	_Unwind_SjLj_Resume
.L9:
	.align	2
.L8:
	.word	__gxx_personality_sj0
	.word	.L6
	.word	.LLSDA0
.Lfe1:
	.size	_Z10thePointeri,.Lfe1-_Z10thePointeri
	.section .gcc_except_table,"aw"
	.align	2
.LLSDA0:
	.byte	0xff
	.byte	0x0
	.uleb128 .LLSDATT0-.LLSDATTD0
.LLSDATTD0:
	.byte	0x1
	.uleb128 .LLSDACSE0-.LLSDACSB0
.LLSDACSB0:
	.uleb128 0x0
	.uleb128 0x1
.LLSDACSE0:
	.byte	0x7f
	.byte	0x0
	.align	2
	.4byte	_ZTIi
.LLSDATT0:
	.byte	0x1
	.byte	0x0
	.text
	.ident	"GCC: (GNU) 3.0.4"




NOTE1 : xxx = sp at entry

        sp = xxx-92
        fp = xxx-4
        floating points at xxx-92 == fp-88 

NOTE2 : try to reload floats at fp-104 == xxx-108

Probably gcc thinks that saving a single float with sfm takes 4 words instead of 3
>Fix:

>Release-Note:
>Audit-Trail:
>Unformatted: