target/6526: sdivsi3_i4 can clobber xd0/xd2 on SH4

target/6526: sdivsi3_i4 can clobber xd0/xd2 on SH4

[marcus]

>Number:         6526
>Category:       target
>Synopsis:       sdivsi3_i4 can clobber xd0/xd2 on SH4
>Confidential:   no
>Severity:       non-critical
>Priority:       medium
>Responsible:    unassigned
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Tue Apr 30 19:16:00 PDT 2002
>Closed-Date:
>Last-Modified:
>Originator:     Marcus Comstedt
>Release:        3.0.4, 3.1 snapshot 20020325
>Organization:
>Environment:
Host: SunOS continuity 5.8 Generic_108528-10 sun4m sparc SUNW,SPARCstation-10
Target: sh-elf


>Description:
When using the -m4-single-only version of libgcc, the sdivsi3_i4 implementation uses dr0 and dr2 to perform the division.
This is fine in theory, however it also forcefully overwrites the fpscr register, including the FR bit.
This means that if FR was previously 1, the registers clobbered will not be those that the caller considers dr0 and dr2,
but rather xd0 and xd2.  This is harmful to programs making use of the XMTRX.
Other libgcc functions may be affected as well.
>How-To-Repeat:

>Fix:
Change the implementation to preserve the value of FR when overwriting fpscr.
>Release-Note:
>Audit-Trail:
>Unformatted: