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* optimization/7003: address of array loaded int register twice without any need
@ 2002-06-12 5:26 fshvaige
0 siblings, 0 replies; only message in thread
From: fshvaige @ 2002-06-12 5:26 UTC (permalink / raw)
To: gcc-gnats
>Number: 7003
>Category: optimization
>Synopsis: address of array loaded int register twice without any need
>Confidential: no
>Severity: non-critical
>Priority: medium
>Responsible: unassigned
>State: open
>Class: pessimizes-code
>Submitter-Id: net
>Arrival-Date: Wed Jun 12 05:26:01 PDT 2002
>Closed-Date:
>Last-Modified:
>Originator: fshvaige@cisco.com
>Release: 3.1 20020510 (prerelease)
>Organization:
>Environment:
../gcc-3.1/configure --with-gcc-version-trigger=/home/install/gcc-3.1/gcc/version.c --host=i686-pc-linux-gnu --with-newlib --enable-target-optspace --target=ppc-eabi --prefix=/home/crossGCC/ppc-eabi --with-local-prefix=/home/crossGCC/ppc-eabi --program-prefix=ppc-eabi- --enable-languages=c,c++ -v --norecursion
>Description:
File test3.c:
extern const char flags [256];
unsigned char * f (unsigned char * s) {
while (flags[*++s]);
while (!flags[*++s]);
return s;
}
Produced code (PowerPC):
f:
lis 4,flags@ha
la 11,flags@l(4)
.L2:
lbzu 5,1(3)
lbzx 4,11,5
cmpwi 0,4,0
bne+ 0,.L2
lis 6,flags@ha
la 11,flags@l(6)
.L5:
lbzu 8,1(3)
lbzx 7,11,8
cmpwi 0,7,0
beq+ 0,.L5
blr
Note: address of 'flags' array loaded into register 11 twice. Why? Register 11 does not change from first load to second.
>How-To-Repeat:
ppc-eabi-gcc -S -O3 test3.c -Wall
See test3.s
>Fix:
>Release-Note:
>Audit-Trail:
>Unformatted:
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2002-06-12 5:26 optimization/7003: address of array loaded int register twice without any need fshvaige
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