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* c/7960: GCC-3.2 for ARM does not work with c-code interrupt function
@ 2002-09-17 19:56 dong_geming
0 siblings, 0 replies; only message in thread
From: dong_geming @ 2002-09-17 19:56 UTC (permalink / raw)
To: gcc-gnats; +Cc: rearnsha
>Number: 7960
>Category: c
>Synopsis: GCC-3.2 for ARM does not work with c-code interrupt function
>Confidential: no
>Severity: critical
>Priority: medium
>Responsible: unassigned
>State: open
>Class: wrong-code
>Submitter-Id: net
>Arrival-Date: Tue Sep 17 19:56:01 PDT 2002
>Closed-Date:
>Last-Modified:
>Originator: Embest
>Release: arm-elf-gcc verson 3.2
>Organization:
>Environment:
Cygwin(Win32)
>Description:
Hi,
The arm-elf-gcc version 3.2 genrate wrong code when I compile a c-code interrupt function with option -mthumb-interwork.
If compile the c-code interrupt function without option -mthumb-interwork, It seems correct.
>How-To-Repeat:
/*The c-code interrupt function to be compiled:(irq.c)*/
void ext_IRQ0_handler(void) __attribute__ ((interrupt ("IRQ")));
/*-----------------------------------------------------*/
/* Function Name : ext_IRQ0_handler */
/*-----------------------------------------------------*/
void ext_IRQ0_handler(void)
{
int i = 1;
return;
}
If Compiled with: arm-elf-gcc -mthumb-interwork -gdwarf -c irq.c -o irq.o
Disassemble the irq.o:
irq.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <ext_IRQ0_handler>:
0: e52dc004 str ip, [sp, -#4]!
4: e1a0c00d mov ip, sp
8: e24ee004 sub lr, lr, #4 ; 0x4
c: e92dd808 stmdb sp!, {r3, fp, ip, lr, pc}
10: e24cb004 sub fp, ip, #4 ; 0x4
14: e24dd004 sub sp, sp, #4 ; 0x4
18: e3a03001 mov r3, #1 ; 0x1
1c: e50b3018 str r3, [fp, -#24]
20: e95b5808 ldmdb fp, {r3, fp, ip, lr}^ /*This is wrong!!!!!*/
if Compiled with: arm-elf-gcc -gdwarf -c irq.c -o irq.o
Disassemble the irq.o:
irq.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <ext_IRQ0_handler>:
0: e52dc004 str ip, [sp, -#4]!
4: e1a0c00d mov ip, sp
8: e24ee004 sub lr, lr, #4 ; 0x4
c: e92dd808 stmdb sp!, {r3, fp, ip, lr, pc}
10: e24cb004 sub fp, ip, #4 ; 0x4
14: e24dd004 sub sp, sp, #4 ; 0x4
18: e3a03001 mov r3, #1 ; 0x1
1c: e50b3018 str r3, [fp, -#24]
20: e95b9808 ldmdb fp, {r3, fp, ip, pc}^ /*This is maybe right!!!!*/
I need someone help me to resolve the problem as soon as possible, Because it's very important to me, Thank you very much.
My Email: dong_geming@hotmail.com
>Fix:
I think maybe some source file of gcc should be modified, but I don't know how to
>Release-Note:
>Audit-Trail:
>Unformatted:
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Content-Type: application/octet-stream; name="irq.c"
Content-Transfer-Encoding: base64
Content-Disposition: attachment; filename="irq.c"
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dHVybjsNCn0NCg==
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2002-09-17 19:56 c/7960: GCC-3.2 for ARM does not work with c-code interrupt function dong_geming
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